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Experiment #1

Jerico T. Canog
CPE102P-B11
II. Methodology
I. Introduction
This experiment includes three exercises
Hardware description language (HDL) is a
to practice coding hardware description
type of computer language that is specialized in
digital logic circuits and electronics. This type of
language. All of the exercise are basic
language is used for hardware structures and programming techniques that provides basic
used to analyze the behavior of electronic outputs.
circuits. It is basically the bridge that we can use
The first exercise is to design a program
to communicate with the hardware part of the
that will let the first green LED turn on if the
system. There are three modeling technique in
coding the HDL those are dataflow, behavioral
button is not pressed. If the button is
and gate level modeling. pressed, the first green LED will turn off but
the LED will not maintain the on state when
Dataflow modeling is the type of modeling released.
we should know how the data is process or
worked in the program structure. It is used for The second exercise is to edit the given
the continuous assignment of data into the net. program from the previous exercise and
Behavioral modeling is less detailed compared write a program that will switch the states of
with others. This type of modeling only requires the LED. When the LED is on and the button
the knowledge of the algorithm of the program. is pressed the LED will turn off and if the LED
It is similar in writing a C language program.
is off and the button is pressed the LED will
Gate level modeling is used by using the logic
turn on.
gates as tools for programming. They are also
used in replicating logical diagram to describe The last exercise is to make one of the
their behavior. green LED blink. To make this work we must
use the timing of the clock. Aside from
getting one LED to blink we made every LED
For this matter we are using an altus board
also blink by setting the other LEDs.
for testing out the HDL. To program this board
we are using Quartus it is a program that is used
to apply the codes into the board. Quartus is a
software that includes VHDL and Verilog
programming. It can be used in different
applications for HDL.
III. Results/Discussion that if the button is not pressed the LED will not
turn on but if it is pressed it will turn on.

Figure 1: Exercise 1 button not pushed.


Figure 3: Exercise 2 turning the LED off.

Figure 2: Exercise 1 button pushed.


Figure 4: Output of turning the LED off.
To solve the problem for number one we
were given the code on how to make it work. The The code for exercise 2 is derived by editing
code is shown below. the code for the exercise 1. The code is shown
below.
module exercise1(CLOCK_50, PB,
LEDG) module exercise2(SW, PB, LEDG)
input CLOCK_50; input [1:0]SW;
input [3:0] PB; input [3:0] PB;
reg [9:0] state; reg [9:0] state;
output [7:0] LEDG; output [7:0] LEDG;
assign LEDG =state; assign LEDG =state;
always @(posedge CLOCK_50) always @(posedge SW[0])
if (PB[0] == 0) if (PB[0] == 0 and state
state ==1)
<=10b0000000000; begin
else state[0] <=0;
state <=1; end
endmodule else if(PB[0] ==0 and state
==0)
begin
We can see in the code that always state[0] <=1;
@(posedge CLOCK_50) states that the function end
will always run for the positive edge of the clock endmodule
pulse. The condition inside of the function says
The code for this exercise almost the same else
the only difference is that we used a manual counter <=counter+1;
switch because the output is having trouble
always@(posedge CLOCK_50)
processing when clock is used. We can see that if(PB[0] == 0)
in figure 3 the LED is on we can turn it off bu state <= 8'b11111111;
pushing the button and turning the switch off else if(counter == 8000000)
and on to make a full cycle. The results can be state=~state;
seen in figure 4 the led turns off. We can also endmodule
see the condition of the button on the code
above.
The last part of the experiment is making
the LED blink. We can achieve that by knowing
that 8000000 is the half value of the half second
of the board. We can see that in the second
part of the code that of the counter reaches the
half we set the state of the LEDs to off. We also
created a code to manually reset the values
which can be seen in the first part.

Aside from the codes above the PIN


Figure 5: Blinking LEDs. assignment is also valuable to obtain the
necessary results. The figure below will show
the PIN assignment for the last exercise

Figure 6: Reset button.

module exercise3 (CLOCK_50, Figure 7: Pin Assignement.


PB,LEDG);

input [3:0] PB;


reg[7:0] state;
reg[23:0] counter;
output [7:0] LEDG;

assign LEDG = state;


always @(posedge CLOCK_50)
if(PB[0]==0)
counter <=0;
else if (counter == 8000000)
counter <=0;
IV. Conclusion vlsi.blogspot.com/2008/01/gate-
level-modeling.html
This experiment helped the students
in being familiar with the basic program
of the HDL. We have applied the lessons
we have taken for the HDL.
We can also conclude that the way
we program the hardware is basically
coding every detail on how the output
would work. We code every bit of small
details even the timing of the way the
LED blink. We must be familiar on the
characteristic of the board to know how
we would code the timers. Aside from
that, we should know how logic gates
functions. We are basically coding the
hardware so we should know on how to
actually translate the code to the
hardware. Regarding the pin assignment
we should know on how to trigger them
and on how to set them to the code.

V. Reference

Mepit. (2014 , July 15). Hardware


descrition language. Retrieved from
https://www.mepits.com/tutorial/1
43/VLSI/Hardware-Description-
Language
VHDL Behavioral Modeling Style.
(n.d.). Retrieved from http://surf-
vhdl.com/vhdl-syntax-web-course-
surf-vhdl/vhdl-behavioral-modeling-
style/
Gate-Level Modeling. (n.d.).
Retrieved from http://only-