LG 32LH240H Chassis LA96A

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LCD TV
SERVICE MANUAL
CHASSIS : LA96A
MODEL : 32LH240H 32LH240H-UA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL62195506 (0912-REV00) Printed in Korea

CONTENTS
CONTENTS ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 10
TROUBLE SHOOTING .......................................................................... 17
BLOCK DIAGRAM.................................................................................. 23
EXPLODED VIEW .................................................................................. 25
SVC. SHEET ...............................................................................................
Copyright LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instruments CONDUIT etc.
0.15uF
Leakage Current Cold Check(Antenna Cold Check) exposed
METALLIC PARTS
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1M and 5.2M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service unit under test.
manual and its supplements and addenda, read and follow the 2. After removing an electrical assembly equipped with ES
SAFETY PRECAUTIONS on page 3 of this publication. devices, place the assembly on a conductive surface such as
NOTE: If unforeseen circumstances create conflict between the aluminum foil, to prevent electrostatic charge buildup or
following servicing precautions and any of the safety precautions on exposure of the assembly.
page 3 of this publication, always follow the safety precautions. 3. Use only a grounded-tip soldering iron to solder or unsolder ES
Remember: Safety First. devices.
4. Use only an anti-static type solder removal device. Some solder
General Servicing Precautions removal devices not classified as "anti-static" can generate
1. Always unplug the receiver AC power cord from the AC power electrical charges sufficient to damage ES devices.
source before; 5. Do not use freon-propelled chemicals. These can generate
a. Removing or reinstalling any component, circuit board electrical charges sufficient to damage ES devices.
module or any other receiver assembly. 6. Do not remove a replacement ES device from its protective
b. Disconnecting or reconnecting any receiver electrical plug or package until immediately before you are ready to install it.
other electrical connection. (Most replacement ES devices are packaged with leads
c. Connecting a test substitute in parallel with an electrolytic electrically shorted together by conductive foam, aluminum foil
capacitor in the receiver. or comparable conductive material).
CAUTION: A wrong part substitution or incorrect polarity 7. Immediately before removing the protective material from the
installation of electrolytic capacitors may result in an leads of a replacement ES device, touch the protective material
explosion hazard. to the chassis or circuit assembly into which the device will be
installed.
2. Test high voltage only by measuring it with an appropriate high CAUTION: Be sure no power is applied to the chassis or circuit,
voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged
Do not test high voltage by "drawing an arc". replacement ES devices. (Otherwise harmless motion such as
3. Do not spray chemicals on or near this receiver or any of its the brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity
4. Unless specified otherwise in this service manual, clean sufficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10% (by volume) Acetone and 90% (by 1. Use a grounded-tip, low-wattage soldering iron and appropriate
volume) isopropyl alcohol (90%-99% strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500F to 600F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500F to 600F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500F to 600F)
Some semiconductor (solid-state) devices can be damaged easily b. First, hold the soldering iron tip and solder the strand against
by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors and component lead and the printed circuit foil, and hold it there
semiconductor "chip" components. The following techniques only until the solder flows onto and around both the
should be used to help reduce the incidence of component component lead and the foil.
damage caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. splashed solder with a small wire-bristle brush.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through Circuit Board Foil Repair
which the IC leads are inserted and then bent flat against the Excessive heat applied to the copper foil of any printed circuit
circuit foil. When holes are the slotted type, the following technique board will weaken the adhesive that bonds the foil to the circuit
should be used to remove and replace the IC. When working with board causing the foil to separate from or "lift-off" the board. The
boards using the familiar round hole, use the standard technique following guidelines and procedures should be followed whenever
as outlined in paragraphs 5 and 6 above. this condition is encountered.
Removal At IC Connections
1. Desolder and straighten each IC lead in one operation by gently To repair a defective copper pattern at IC connections use the
prying up on the lead with the soldering iron tip as the solder following procedure to install a jumper wire on the copper pattern
melts. side of the circuit board. (Use this technique only on IC
2. Draw away the melted solder with an anti-static suction-type connections).
solder removal device (or with solder braid) before removing the
IC. 1. Carefully remove the damaged copper pattern with a sharp
Replacement knife. (Remove only as much copper as absolutely necessary).
1. Carefully insert the replacement IC in the circuit board. 2. carefully scratch away the solder resist and acrylic coating (if
2. Carefully bend each IC lead against the circuit foil pad and used) from the end of the remaining copper pattern.
solder it. 3. Bend a small "U" in one end of a small gauge jumper wire and
3. Clean the soldered areas with a small wire-bristle brush. carefully crimp it around the IC pin. Solder the IC connection.
(It is not necessary to reapply acrylic coating to the areas). 4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
"Small-Signal" Discrete Transistor copper pattern. Solder the overlapped area and clip off any
Removal/Replacement excess jumper wire.
1. Remove the defective transistor by clipping its leads as close as
possible to the component body. At Other Connections
2. Bend into a "U" shape the end of each of three leads remaining Use the following technique to repair the defective copper pattern
on the circuit board. at connections other than IC Pins. This technique involves the
3. Bend into a "U" shape the replacement transistor leads. installation of a jumper wire on the component side of the circuit
4. Connect the replacement transistor leads to the corresponding board.
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder 1. Remove the defective copper pattern with a sharp knife.
each connection. Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
Power Output, Transistor Device 2. Trace along the copper pattern from both sides of the pattern
Removal/Replacement break and locate the nearest component that is directly
1. Heat and remove all solder from around the transistor leads. connected to the affected copper pattern.
2. Remove the heat sink mounting screw (if so equipped). 3. Connect insulated 20-gauge jumper wire from the lead of the
3. Carefully remove the transistor from the heat sink of the circuit nearest component on one side of the pattern break to the lead
board. of the nearest component on the other side.
4. Insert new transistor in the circuit board. Carefully crimp and solder the connections.
5. Solder each transistor lead, and clip off excess lead. CAUTION: Be sure the insulated jumper wire is dressed so the
6. Replace heat sink. it does not touch components or sharp edges.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application Range 3. Test method

This specification sheet is applied to the LCD TV used LA96A 1) Performance : LGE TV test method followed.
chassis. 2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC : FCC, ICE, IEC specification
2. Specification
Each part is tested as below without special appointment
1) Temperature : 25 5C (77 9F), CST : 40 5C

2) Relative Humidity : 65 10%
3) Power Voltage : Standard input voltage
(100-240V@ 50/60Hz)
* Standard Voltage of each products is marked by models
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
4. General Specification(TV)
No Item Specification Remark
1. Receiving System 1) VSB/64 & 256 QAM/ NTSC-M
2. Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3. Input Voltage 1) AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz
4. Market NORTH AMERICA
5. Screen Size 32 inch Wide(1366 x 768) HD 32LH2X0H-UA
37 inch Wide(1366 x 768) HD 37LH2X0H-UA
42 inch Wide(1366 x 768) HD 42LH2X0H-UA
6. Aspect Ratio 16:9
7. Tuning System FS
8. Module LC320WXN-SBA1 LGD 32LH2X0H-UA
LC370WXN-SBA1 LGD 37LH2X0H -UA
LC420WXE-SBA1 LGD 42LH2X0H -UA
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
5. Chroma & Brightness
No Item Min Typ Max Unit Remark
400 500 cd/m
Installer Menu > 99. Back Lighting
1 White brightness 400 500 cd/m
100 (32/37/42LH250H-UA)
400 500 cd/m
2 Color coordinate X Typ. 0.639 Typ. 32LH2X0H-UA
RED
(Default) Y -0.03 0.333 +0.03
X 0.292
GREEN
Y 0.604
BLUE X 0.145
Y 0.064
0.279
WHITE
Y 0.292
RED X Typ. 0.636 Typ. 37LH2X0H-UA
Y -0.03 0.335 +0.03
GREEN X 0.290
Y 0.610
BLUE X 0.144
Y 0.063
WHITE X 0.279
Y 0.292
RED X Typ. 0.637 Typ. 42LH2X0H-UA
Y -0.03 0.335 +0.03
GREEN X 0.290
Y 0.611
BLUE X 0.145
Y 0.062
WHITE X 0.279
Y 0.292
800:1 1200:1 32LH2X0H-UA
11 Contrast ratio 800:1 1200:1 37LH2X0H-UA
800:1 1200:1 42LH2X0H-UA
12 Bright Uniformity 77 % Full white

30000:
50000:1 32LH2X0H-UA
1
30000:
13 Dynamic CR 50000:1 37LH2X0H-UA
1
30000:
50000:1 42LH2X0H-UA
1
Cool Typ. 0.276 Typ. oK <Test Condition>
14 Color Temperature
-0.015 0.283 +0.015 85% Full white pattern
Medium Typ. 0.285 Typ. oK ** The W/B Tolerance is 0.015 for
-0.015 0.293 +0.015 Adjustment
Warm Typ. 0.313 Typ. oK
-0.015 0.329 +0.015
6. Component Video Input (Y, CB/PB, CR/PR)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

1. 720*480 15.73 60 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I
3. 720*480 31.50 60 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.0 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.500 60 148.50 HDTV 1080P
10. 1920*1080 67.432 59.94 148.352 HDTV 1080P
11. 1920*1080 27.000 24.000 74.25 HDTV 1080P
12. 1920*1080 26.97 23.976 74.176 HDTV 1080P
13. 1920*1080 33.75 30.000 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P
7. RGB input (PC)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

PC
1 640*350 31.469 70.08 25.17 DOS
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
7 1280*768 47.776 59.87 79.50 CVT(WXGA) O
8 1360*768 47.720 59.799 84.75 CVT(WXGA) O
8. HDMI input (PC/DTV)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

PC DDC
1. 640*480 31.469 59.94 25.17 VESA(VGA) O
2. 800*600 37.879 60.31 40.00 VESA(SVGA) O
3. 1024*768 48.363 60.00 65.00 VESA(XGA) O
4. 1280*768 47.776 59.87 79.50 CVT(WXGA) O
5. 1360*768 47.720 59.799 84.75 CVT(WXGA) O
DTV
1 720*480 31.47 60 27.027 SDTV 480P
2 720*480 31.47 59.94 27.00 SDTV 480P
3 1280*720 45.00 60.00 74.25 HDTV 720P
4 1280*720 44.96 59.94 74.176 HDTV 720P
5 1920*1080 33.75 60.00 74.25 HDTV 1080I
6 1920*1080 33.72 59.94 74.176 HDTV 1080I
7 1920*1080 67.500 60 148.50 HDTV 1080P
8 1920*1080 67.432 59.939 148.352 HDTV 1080P
9 1920*1080 27.000 24.000 74.25 HDTV 1080P
10 1920*1080 26.97 23.976 74.176 HDTV 1080P
11 1920*1080 33.75 30.000 74.25 HDTV 1080P
12 1920*1080 33.71 29.97 74.176 HDTV 1080P
9. Mechanical Spec.
No Item Min Typ Max Unit Remark

1 Appearance quality Satisfy appearance inspection LG(55)G1-1020
Distinguish printed matter at a distance of
2 Print specification
40cm
Before Packing 805(W) X 528.2 (H) X108.9(D) mm WITHOUT STAND
Product
3 Before Packing 805(W) X 583.0 (H) X 223.8(D) mm WITH STAND
Dimension
After Packing 986(W) X 621 (H) X 193(D) mm
Only SET 11.4 Kg WITHOUT STAND
Product
4 Only SET 12.6 Kg WITH STAND
Weight
With BOX 14.7 Kg
Container 20ft 40ft
Individual or
5 Loading Indi Wooden Indi Wooden Set
Palletizing
Quantity 422
SIZE 414.3(W) X 60.6 (H) X 223.8(D) mm WITHOUT TOP BODY
6 Stand Assy SWIVEL FORCE 0.5~2.5 Kgf
SWIVEL +/- 90 degree LEFT 90, RIGHT 90
0~1.0mm
C/A & B/C MAX 1.5mm (SPEC) SET
(Measure) (DQA)
0~1.0 SET
B/C & CONTROL BUTTON MAX 1.1mm (SPEC)
(Measure) (DQA)
7 GAP
0~1.1 SET
REAR A/V DECO & RJP MAX 2.0
(Measure) (DQA)
REAR A/V DECO & 0~2.5 SET
MAX 3.0mm
GAME CONT ROL (Measure) (DQA)
90~92.5 SET
8 ANGEL STAND SWIVEL ANGEL +/-90(SPEC)
(Measure) (DQA)
ADJUSTMENT INSTRUCTION
1. Application Object 3.2 Execution of download program (SAP
This spec sheet is applied all of the LCD TV with LA96A Configuration)
chassis.
2. Designation
2.1 The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
2.2. Power Adjustment: Free Voltage
3.2.1 Execution of SAP Configuration
2.3. Magnetic Field Condition: Nil.
2.4. Input signal Unit: Product Specification Standard
2.5. Reserve after operation: Above 15 Minutes
2.6. Adjustment equipments: Color Analyzer (CA-210 or CA- 1
110), Pattern Generator (MSPG-925L or Equivalent),
DDC Adjustment Jig equipment, SVC remote controller
Caution : When still image is displayed for a period of 20 2

minutes or longer (especially where W/B scale is strong.
Digital pattern 13ch and/or Cross hatch pattern 09ch),
there can some afterimage in the black level area.
3. Method of PTC MICOM Download

3.1 Connection of MICOM JIG 3 4
1) Connect port(3) with Power Code
2) Connect jack(1) with PTC Micom.
3) Connect USB Cable to the computer
4) Download Program execution (SAP Configuration)
1. Select HCS12
2. Target Frequency Settings :
A. Checking the factor -> Use Specified Target Frequency,
Unsecure target.
B. Insert Target Bus Frequency -> 7372800
3. Specify Algorithm: 9S12dt128_128k .12P
4. Specify S Record: select download file.
5. Checking factor: Erase Device, Blank Check Device,
Program Device, Verify Device
Notice!
Dont check other checking boxes. You must follow fig.
6. Push the Save Image to Cyclone PRO button, files

transfer from PC to the Download JIG.
Notice!
Because PTC Download JIG has internal memory, it can save
download files using download program (SAP Configuration).
Push the START button (4) after file saving, then it execute
download.
Copyright LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
3.3 PTC download by USB 4. Main PCB check process
a. Attach the USB Memory to TV * APC - After Manual-Insult, executing APC
b. MENU > OPTION
-> press left arrow key once
-> press the key 7 for 7 times 4.1 Download
4.1.1 Boot file Download
1. Execute ISP program Mstar ISP Utility and then click
Config tab.
2. Set as below, and then click Auto Detect and check OK
message If display Error, Check connect computer, jig,
and set.
3. Click Read tab, and then load download file (XXXX.bin) by
clicking Read
(3)
filexxx.bin
c. Select PTC Software.
4. Click Connect tab.

If display Cant , Check connect computer, jig, and set.
(1) (4)
d. Select downloading file. (*.s19)

e. Downloading.
- When the downloading is completed, TV will reset itself
automatically.
- If you fail to download, retry to download with PC.
- Do not remove USB in downloading.
Please Check the Speed :

To use speed between
from 200KHz to 400KHz
5. Click Auto tab and set as below

6. Click Run.
7. After downloading, check OK message.
(5)
filexxx.bin
(5)
(7) .OK
(6)
* USB DOWNLOAD(*.epk file download) * After downloading, have to adjust TOOL OPTION again.
1. Put the USB Stick to the USB socket 1. Push "Adj" key in service remote controller.
2. Automatically detecting update file in USB Stick 2. Select "Tool Option 1~ 4" and Push OK button.
- If your downloaded program version in USB Stick is Low, it 3. Punch in the number. (Each model has their number.)
didnt work. But your downloaded version is High, USB data
is automatically detecting Model Tool option1 Tool option1 Tool option1 Tool option1
3. Show the message Copying files from memory 37LH250H-UA 22273 1576 33056 1024
32LH250H-UA 18177 1576 33056 1024
42LH250H-UA 26369 1576 33056 1024
4. Completed selecting Tool option
4. Board-level adjustment
4.1 ADC adjustment
4.1.1 Overview
ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation.
4.1.2 Equipment & Condition

1) Jig (RS-232C protocol)
4. Updating is staring. 2) Input : MSPG-925FS(Model : 209 ,Pattern : 65, Only
component))
3) RGB Adjust use internal pattern.
4.1.3 Adjustment
4.1.3.1 Method
Using RS-232, adjust items listed in 3.1 in the order shown in
4.1.3.3.
4.1.3.2 Adj. protocol
Protocol Command Set ack
Enter adj. ad 00 00 d 00 OK00x
mode
Begin adj. ad 00 10
Return adj. OKx (Success)
result NGx (Fail)
Read adj. (main) (main)
data ad 00 20 000000000000000000000000007c007b006dx
(sub ) (Sub)
ad 00 21 000000070000000000000000007c00830077x
Confirm adj. ad 00 99 NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
5. Updating Completed, The TV will restart automatically. OK 03 03x (Success)

6. If your TV is turned on, check your updated version and Tool End adj. ad 00 90 d 00 OK90x
option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel Ref.) ADC adj. RS232C Protocol_Ver1.0
recover. if all channel data is cleared, you didnt have a
DTV/ATV test on production line. 4.1.3.3 Adj. order
ad 00 00 [Enter ADC adj. mode]
ad 00 10 [Adjust 480i Comp1/1080p Comp1/1024*768 RGB]
ad 00 90 End adj.
5. ADC Process 5.1.2 Confirmation
We confirm whether 0xAA (RGB) address of EEPROM
5.1 PC input ADC 0xA2 is 0xAA or not.
5.1.1 Auto RGB Gain/Offset Adjustment If 0xAA (RGB) address of EEPROM 0xA2 isnt 0xAA, we
Convert to PC in Input-source. adjust once more.
Signal equipment displays. We can confirm the ADC values from 0xA4~0XA9 (RGB)
Output Voltage : 700 mVp-p addresses in a page 0xA2
- Impress Resolution XGA (1024 x 768 @ 60Hz)
* Manual ADC process using Service Remocon. After enter
Service Mode by pushing ADJ key, execute ADC Adjust by
pushing key at 5. ADC Calibration and click Start.
Model : 60 in Pattern Generator

Pattern : 65 in Pattern Generator (MSPG-925 SERISE)
Adjustment pattern (PC)
Adjust by commanding AUTO_COLOR_ADJUST.
5.2 COMPONENT input ADC

5.2.1 Component Gain/Offset Adjustment
Convert to Component in Input-source.
Signal equipment displays.
- Impress Resolution 480i
MODEL: 209 in Pattern Generator(480i Mode) 5.3 Function Check
PATTERN : 65 in Pattern Generator( MSPG-925 SERISE) 5.3.1 Check display and sound
- Impress Resolution 1080p Check Input and Signal items. ( cf. work instructions)
1.TV
2. AV (CVBS/ S-Video)
3.COMPONENT (480i)
4.RGB (PC : 1024 x 768 @ 60hz)
5.HDMI
6.PC Audio In and H/P Out
* Display and Sound check is executed by Remote controller.
5.4 EDID(The Extended Display Identification Data)

/ DDC(Display Data Channel) download
5.4.1 Overview
It is a VESA regulation. A PC or a MNT will display an optimal
MODEL: 223 in Pattern Generator(1080p Mode) resolution through information sharing without any necessity of
PATTERN: 65 in Pattern Generator( MSPG-925 SERISE) user input. It is a realization of Plug and Play.
5.2.2 Confirmation 5.4.2 Equipment

We confirm whether 0xB3 (480i)/0xBC (1080p) address of Adj. R/C
EEPROM 0xA2 is 0xAA or not. Since embedded EDID data is used, EDID download jig,
If 0xB3 (480i)/0xBC(1080i) address of EEPROM 0xA2 HDMI cable and D-sub cable are not need.
isnt 0xAA, we adjust once more.
We can confirm the ADC values from 0xAD~0XB2 5.4.3 Download method
(480i)/0XB6~BB(1080p) addresses in a page 0xA2 1) Press Adj. key On the Adj. R/C, press Adj. key then select
EDID D/L. By pressing Enter key, EDID download will
* Manual ADC process using Service Remocon. After enter begin.
Service Mode by pushing ADJ key, execute ADC Adjust by 2) If Download is successful, OK is displayed.
pushing key at 5. ADC Calibration and then click Start. 3) If Download is a failure, NG is displayed.
4) Re-try download.
- Impress Resolution 480i/1080p/RGB
5.4.4 EDID DATA
Reference: Download is only possible in POWER ON MODE.
HDMI I [C/S: 1DBA]
HDMI II [C/S: 1DAA] 6.1.3 Equipment connection map
Color Analyzer
Probe RS-232C
RS-232C Computer
RS-232C
# Pattern Generator
Signal Source
* If TV internal pattern is used,not needed
RGB [C/S: 71FF] 6.1.4 Adj. Command (Protocol)

Protocol
<Command Format>
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A STOP
- LEN: Number of Data Byte to be send

- CMD: Command
- VAL: FOS Data
- CS: Checksum of sent Data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
RS-232C COMMAND Explanation

[CMD ID DATA]
Wb 00 00 Begin White Balance adjust.
Wb 00 10 Begin Gain adjust (internal white pattern)
6. Final Assembly adj. Wb 00 1f End Gain adjust

Wb 00 20 Begin Offset adjust (internal white pattern)
6.1 White Balance adj.
Wb 00 2f End Offset adjust
6.1.1 Overview
W/B adj.: Objective & How-it-works Wb 00 ff End White Balance adjust(internal pattern
- Objective: To reduce each Panels W/B deviation disappears )
- How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. Adj. Map
In order to prevent saturation of Full Dynamic - Applied model:
range and data, one of R/G/B is fixed at 192,
Item Command Data Range Default
and the other two is lowered to find the (lower case ASCII) (Hex.) (Decimal)
desired value. CMD1 CMD2 MIN MAX
Cool R Gain j g 00 C0 TBD
6.1.2 Equipment G Gain j h 00 C0 TBD
1) Color Analyzer : CA-210 (NCG: CH 9 / WCG: CH12 /LED
B Gain j i 00 C0 TBD
Module:CH14)
R Cut TBD
2) Adj. Computer (During auto adj., RS-232C protocol is
G Cut TBD
needed)
B Cut TBD
3) Adj. R/C
4) Video Signal Generator MSPG-925F 720p/216Gray Medium R Gain j a 00 C0 TBD
(Model:217, Pattern:78) G Gain j b 00 C0 TBD
-> Only when internal pattern is not available B Gain j c 00 C0 TBD
R Cut TBD
Color Analyzer Matrix should be calibrated using CS-1000 G Cut TBD
B Cut TBD
Warm R Gain j d 00 C0 TBD
G Gain j e 00 C0 TBD
B Gain j f 00 C0 TBD
R Cut TBD
G Cut TBD
6.1.5 Adj. method 6.1.6 Reference (White Balance adj. coordinate and color
6.1.5.1 Auto adj. method temperature)
1) Set TV in adj. mode using POWER On Key 6.1.6.1 Adjustment Preparation
2) Zero calibrate probe then place it on the center of the W/B Equipment condition
Display CA210: CH 9, Test signal: Inner pattern (85IRE)
3) Connect Cable(RS-232C) Above 5 minutes H/run in the inner pattern. (power on key
4) Select mode in adj. Program and begin adj. of adjust remote control)
5) When adj. is complete (OK Sign), check adj. status per 15 Pin D-Sub Jack is connected to the AUTO W/B
mode (Warm, Medium, Cool) EQUIPMENT.
6) Remove probe and RS-232C cable to complete adj. Adjust Process will start by execute I2C Command (Inner
pattern (0xF3, 0xFF)).
Adj. must begin w/ command wb 00 00, and end w/wb 00
ffand adj. offset if needed. X=0.276 0.003 <Test Signal>
Cool 11,000 K
Y=0.283 0.003 Inner pattern
6.1.5.2 Manual adj. method Color X=0.285 0.003
Medium 9,300 K
Temperature Y=0.293 0.003 (216gray, 85 IRE)
Dynamic contrast : off
X=0.313 0.003
Dynamic color : off Warm 6,500 K
Y=0.329 0.003
OPC : Off
Energy saving mode : Off
Manual White Balance adjust process using Service Remo-
1) Set TV Picture Mode to Standard and in Advanced Control, con. After enter Service Mode by pushing ADJ key, enter
set Dynamic Contrast and Color Off. White Balance by pushing key at 6. White Balance.
2) Set TV in adj. mode using POWER On Key (CA-210, CH-9)
3) Press ADJ key -> EZ adjust using adj. R/C
4) Using CH + / - KEY, select 10.TEST PATTERN then press
Enter to place in HEAT RUN mode and wait for 30 minutes.
5) Zero calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10 cm of the surface.
6) Press ADJ key -> 7. White-Balance then press the cursor
to the right (KEY )
(When is pressed Full White internal pattern will be
displayed)
7) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
8) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature
If internal pattern is not available, use HDMI input. In EZ Adj. *Adjust R/G/B - GAIN by pushing , key at Cool
menu 7.White Balance, you can select one of 3 options: *Adjust R/G/B - GAIN by pushing , key at Medium
None, Inner, HDMI. Default is inner. By selecting HDMI, you *Adjust R/G/B - GAIN by pushing , key at Warm
can adjust using HDMI signal.
Adj. condition and cautionary items

1) Lighting condition in surrounding area
Surrounding lighting should be lower than 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
- LCD: Color Analyzer (CA-210) probe should be within 10cm
and perpendicular of the module surface (80~ 100)
- In case of LCD, B/L on should be checked using no signal or
Full white Pattern
TROUBLESHOOTING
1. Power-up boot check
No OK OK
Check stand-by Voltage. Check Power connector
Check Fuse. Replace Power board.
P700 8pin : +5V_ST and AC S/W on?
OK
No
Check X100 clock Replace X100.
OK
No OK
Check P700 PWR_ON.
Re-download software. Replace Mstar(IC100) or Main board
2pin : 5V
OK
No
Check Multi Voltage
Replace Power board
P700 13pin : 12V, 18pin : 24V
OK
No
Check Q706 Output.
Replace Q706
12V, 5V
OK
Check inverter control & error No

P700 22pin : Low Check Power board or Module
P700 20pin : high
OK
No
Check Mstar LVDS output
Replace Mstar(IC100) or Main board
R812, R813,..., R821
2. Digital TV Video
Check RF cable & Signal.
OK
No
Check Tuner 5V Power Check IC1002
IC1001 4pin (19",22")Check IC1002.
OK
No
Check IF_P/N Signal Replace Tuner.
OK
No
Check Check Demodulator Input
Replace X1005.
Clock(X1005)
OK
No
Check IC1004(LGDT) Output
Replace IC1004.
- AR1070, AR1071
OK
No
Check Mstar LVDS output
Replace Mstar(IC100) or Main board.
R812, R813,..., R821
3. Analog TV Video
Check RF cable.
OK
No
Check Tuner 5V Power. Check IC1002
IC1001 4pin Check IC1005(19",22")
OK
No
Check CVBS signal.
Bad Tuner.
TU1001 #19 Pin
OK
No
Check Mstar LVDS output Replace Mstar(IC100) or Main board.
4. Component Video
Check input signal format.
Is it supported?
OK
Check Component Cable.
OK
No
Check JK1200. Replace Jack.
OK
No
5. RGB Video
Is it supported?
OK
Check RGB Cable conductors for

damage.
OK
No
Check JK1204. Replace Jack.
OK
No
Check EDID. Replace the defective IC or re-download EDID data
OK
No
Check signal R/G/B/H/V-Sync Check other set.
C113, C108, C114, R146, R149 If no problem, check signal line.
OK
No
6. AV Video
Is it supported?
OK
Check AV Cable for damage or open conductor.
OK
No
Check JK1200(*JK1202). Replace Jack.
OK
No
7. HDMI Video
Is it supported?
OK
Check HDMI Cable conductors for

damage of open conductor.
OK
No
Check JK500, 501, 502 Replace Jack.
OK
No
Check EDID & EEPROM Replace the defective IC or re-download
IC500, 501, 502. EDID data.
I2C Signal (#5, #6)
OK
No
Check HDCP key NVRAM(IC105)
Replace the defective IC.
power & I2C Signal (#5, #6)
OK
No No
Check other set.
Check HDMI Signal Replace Main board.
If no problem, check signal line.
OK
No
8. All Source Audio
Make sure you cant hear any audio.
OK
No
Check Mstar AUDIO_MASTER_CLK Replace Mstar(IC100) or Main board.
OK
No
Check Mstar I2S Output
Check signal line. Or replace IC100.
R604, R605, R606
OK
No
Check IC500 Power
Check Regulator IC601, IC704
*24V, 3.3V, 1.8V.
OK
No
Check Output Signal P600 1, 2, 3, 4 pin. Replace NTP(Audio AMP) IC500
OK
No
Check Connector & P600 Replace connector if found to be damaged.
OK
No
Check speaker resistance
Replace speaker.
and connector damage.
9. Digital TV Audio
No
Check Tuner 5V Power Check IC1002.
TU1001 4pin. Check IC1005(19, 22)
OK
No No
Check IF_P/N Signal. Bad Tuner. Replace Tuner Bad Tuner.
OK
No
Check Demodulator Input Clock(X1005). Replace X1005.
OK
No
Check IC400(LGDT) Output
Replace IC400.
- AR1070, AR1071
OK
No
Check Output Signal Replace NTP3100L
P600 1, 2, 3, 4 pin (Audio AMP) IC500
OK
No
Replace connector
Check Connector & P600
if found to be damaged.
OK
No
Check speaker resistance
Replace speaker.
and connector damage.
10. Analog TV Audio

Check RF Cable.
OK
No No
Check Tuner 5V Power Check IC1002. Bad Tuner
TU1001 4pin Check IC1005(19, 22). Replace Tuner.
OK
No
Check SIF buffer signal. Check SIF Signal line.
OK
No
Follow procedure All source audio Replace Mstar(IC100)
trouble shooting guide. or Main board.
BLOCK DIAGRAM
Copyright
MPI Control
SCL, SDA_3.3V
VSB
PTC
MPEG2, IF +/- Demod. TS In[07]
LINUX TS_clk, SOP, Val
TU_CVBS
TR Buffer
SIF
SDA/SCL_5V LVDS
LCD Module
Reset / IF_AGC

Half-NIM Tuner
CVBS, L/R
AV
Y Pb Pr, L/R
Component 1
Saturn6 Reset IC
Reset Switch
LG Electronics. Inc. All right reserved.

12MH
(ATSC z X-tal
EEPROM
RGB/H/V US)
D-sub RGB Data [0 7]
Audio L/R NAND Flash
Audio L/R (for RGB) Addr[01], CS (256Mb)
EEPROM
MPEG2/4
- 24 -
HDMI 1
EEPROM
JACK PACK Linux
at REAR DDR_Data[0:15], DQS, DM
HDMI 2
Scaler DDR2 (512Mbit)
Qimonda / Hynix
RJP Control Addr.[ ], ctrl. data
RJP PIP : x
IR OUT DDR2 (512Mbit)
Qimonda / Hynix
Speaker Out(8ohm) AMP Data[16:31]
RX/TX RX/TX Digital AMP

RS-232C (Ctrl./SVC) MAX3232 I2S
NTP3100A
CVBS, L/R
Side AV
SCL, SDA_3.3V EEPROM
512Kb
JACK PACK DP/D
at SIDE M SCL, GPIO
USB2.0 IO Expander
+5V O.C. Protector +5V SDA_3.3V
Audio L/R CLK,TDI,TDO,MS,RST

Headphone(opt) Out H/P Amp. JTAG
LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
590
520
540
804
805
801
803
800
806
550
900
530
802
810
200
A10
LV1
120
300
500
510
A2
SIDE_AV R,G,B PC&DDC
D1215 L1208
ADUC30S03010L BG2012B080TF
30V 008:D26
JK1202 SIDEAV_CVBS_IN
PPJ218-01 R1238 C1227
OPT 75 +3.3V 100pF
[YL]O_SPRING OPT
4A
R1248
10K R1254
5A [YL]CONTACT 1K 009:P28 +5V_ST_PTC
SIDEAV_SW
D1221
2A [YL]U_CAN ADMC5M03200L C1219
100pF
5.6V
3B [WH]C_LUG L1206
BG2012B080TF R1259
10K
008:R33
2B [WH]U_CAN SIDEAV_L_IN
R1246 C1224 R1264
D1213 100pF 12K
OPT ADMC5M03200L 470K 50V
4C [RD]O_SPRING
5.6V
L1207 D1223
[RD]CONTACT BG2012B080TF R1258
5C 10K 008:R33 ENKMC2838-T112
A1
C1225 SIDEAV_R_IN
[RD]U_CAN D1214 R1247 R1263 C
2C OPT 100pF
ADMC5M03200L 470K 12K A2
5.6V 50V
IC1200
C1228
AT24C02BN-10SU-1.8 0.1uF
R1249 R1253 R1262 16V
4.7K 4.7K 10K
A0 VCC
1 8
R1269
A1 WP 100
2 7
EEPROM_WP
008:AP22;002:T21;002:T8
A2 SCL
COMPONENT1,AV1 3 6
ISP_RXD
008:AB27
GND SDA
4 5 ISP_TXD
D1242 008:AB27;008:AR31
L1218 ADMC5M03200L C1222 C1223 R1257
R1205 5.6V
10K BG2012B080TF 18pF 18pF 22 R1265
AV_R_IN 50V 50V 22
008:R32 C1250
R1207 R1206 OPT D1224
12K 100pF 470K ADMC5M03200L
50V D1222 5.6V
JK1200 D1212 ADMC5M03200L
5.6V OPT
ADMC5M03200L R1251
PPJ228-01 OPT
5.6V 10K
L1217 COMP1_R_IN
R1211 R1232
10K BG2012B080TF [RD]CONTACT-S R1245 C1221 008:R33 0
AV_L_IN OPT 470K R1255 008:D29 DSUB_VSYNC
1000pF 12K
008:R32 [RD]CONTACT-L 6H 3E 50V
R1210
C1251
R1208
[RD]O-SPRING-S 0 R1233
100pF OPT
12K 470K 008:D29 DSUB_HSYNC
50V R1252
[RD]O-SPRING-L 5H 4E [RD]E-LUG_2 10K D1216
COMP1_L_IN ADUC30S03010L
D1207
30V
D1243 9E [WH]C-LUG-S OPT
R1244
470K
C1220 R1256 008:R33 ADUC30S03010L
1000pF 12K 30V
ADMC5M03200L
5.6V D1211 50V
[WH]C-LUG-L 7G 8D [WH]E-LUG ADMC5M03200L
5.6V
9D [RD]C-LUG-S 008:D28 DSUB_B

COMP1_PR D1217
R1234 C1216
[YL]CONTACT-L 6F 8C D1210 R1243 008:D31 75
ADUC30S03010L 75 0.1uF 30V
OPT OPT
AV_CVBS_IN 30V
008:D26 [YL]O-SPRING-L 5F [RD]E-LUG_1 +5V_GENERAL
C1252 D1209
R1215 D1245
47pF 75 OPT
ADUC30S03010L 9C [BL]C-LUG-S ADUC30S03010L
30V
50V 1% 30V COMP1_PB
008:D29 DSUB_G
R1270
8B [BL]E-LUG R1242 008:D31
C1217 D1218 OPT 10K
75 R1235 ADUC30S03010L
OPT 75 0.1uF SIGN25
OPT 30V
9B [GN]CONTACT-S
R1268
3A [GN]O-SPRING-S
OPT
0
D1225
COMP1_Y ADMC5M03200L
4A [GN]E-LUG D1208
OPT R1241 008:D31
5.6V
ADUC30S03010L 75 008:D29 DSUB_R OPT
30V C1218 D1219
9A R1236 ADUC30S03010L
0.1uF
75 OPT 30V
11
12
13
14
15
JK1204
16
10
6
9
KCN-DS-1-0089
5
PC AUDIO
JK1205
PEJ024-01
3 E_SPRING
6A T_TERMINAL1
D1234
5.6V
R1300 R1305
B_TERMINAL1 ADMC5M03200L 10K
7A 0
PC_R_IN
008:R32
R_SPRING C1240 R1303
4 OPT 100pF R1297
470K 12K
50V
5 T_SPRING
D1235
5.6V R1301 R1307
7B B_TERMINAL2 ADMC5M03200L 10K 0
PC_L_IN
008:R31
6B T_TERMINAL2
C1241 R1298
OPT 100pF R1304
50V 470K 12K
8 SHIELD_PLATE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 37LH250H 09.05.19
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IN/OUT 1 14
TUNER
HDMI1 EDID
+3.3V_ST
5V_HDMI_1
R556
C 47K
R513
10K OPT
Q504 B
2SC3052
HPD1
22 E 008:D37
19 R552 +5V_GENERAL 5V_HDMI_1

1K
AVRL161A1R1NT
18 C501
R501 VR500
0.1uF
JP502
17 16V
820 R510 0
OPT
ENKMC2838-T112
16 DDC_SDA_1
008:D38;002:S20
A1
A2
15 0 DDC_SCL_1
R511
D501
JP503 008:D37;002:S20
14
R509 0
C
13
R569 0 008:D39
CK-_HDMI1 IC500
12
CAT24C02WI-GT3 C509
11 008:D39 0.1uF
R570 0 50V
CK+_HDMI1 R542
10 10K
R571 0 008:D39 A0 VCC
1 8 OPT
D0-_HDMI1 R536 R539
9
4.7K 4.7K
R545
8 A1 WP 100
JP500
R572 008:D39 2 7
0 EEPROM_WP
D0+_HDMI1
7
R573 008:D38 HDMI1 R530
0 A2 SCL
D1-_HDMI1 22
6 3 6 DDC_SCL_1
5 R531
R574 0 008:D38 VSS SDA 22
D1+_HDMI1 4 5 DDC_SDA_1
4
R575 0 008:D38
D2-_HDMI1
3
C512 C515
2 8pF 8pF
R576 008:D38
0 50V 50V
D2+_HDMI1 OPT OPT
1
20
21
GND
QJ41193-CFEE1-7F
JK500
HDMI2 EDID
008:Q29;002:S11 +3.3V_ST
5V_HDMI_2
R557
C 47K
R514 OPT
Q505 B 10K
22
2SC3052
HPD2
R553 E 008:D35
19
1K C502
0.1uF
JP504
18 16V +5V_GENERAL 5V_HDMI_2

R502
17 VR501 008:D35;002:S7
820 AVRL161A1R1NT R506 0
OPT
16 DDC_SDA_2
008:D35;002:S7
JP505
ENKMC2838-T112
15 0 DDC_SCL_2
R507
A1
A2
14
D502
R508 0
13
R577 0 008:D37
C
CK-_HDMI2
12
11 IC501
R578 008:D37
0
CK+_HDMI2
CAT24C02WI-GT3 C510
10 0.1uF
R579 0 008:D36 50V R543
D0-_HDMI2 10K
9 A0 VCC
1 8 OPT
R537 R540
8 008:D36 4.7K 4.7K
R580 0 R546
D0+_HDMI2 A1 WP 100
7
JP501
R581 008:D36 2 7 EEPROM_WP

0
D1-_HDMI2 HDMI2
6 R532
A2 SCL 22
5 3 6 DDC_SCL_2
R582 0 008:D36
D1+_HDMI2 R533
4 VSS SDA
R583 0 008:D35 22
4 5 DDC_SDA_2
D2-_HDMI2
3
2
R584 0 008:D36 C513 C516
D2+_HDMI2 8pF 8pF
1
50V 50V
20 OPT OPT
21
QJ41193-CFEE1-7F
JK501 GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 2 14
HDMI
+1.8V_AMP & +24V_AMP EXTERNAL SPEAKER OUT +5V_GENERAL
L300
CB3216PA501E
C2143 C2144
10uF 0.1uF
16V
R2238
OPT
IC300
TPA6011A4PWPRG4
R2225
R2223
10K
1K
PGND_1 ROUT+
1 24
E
IC601 2SA1530A-T112-1R OPT SHIELD_PLATE 8
Q1104 ROUT- SE/BTL R2235

2 23
+3.3V AZ1117H-1.8TRE1(EH13A) +1.8V_AMP B SUB_MUTE T_TERMINAL2 6B
R2232
100
C 008:AB19;003:AC20
PVDD_1 HP/LINE 7B
3 22 B_TERMINAL2
R2231
EXT_SPK_L-
INPUT ADJ/GND 0 R2234 5
C2140
003:P20 0
3 1 RHPIN VOLUME 3.3K T_SPRING
10uF
6.3V
C 4 21 R2250
EXT_SPK_L+
B Q1103 003:W20 0 R_SPRING 4
2 EXT_SPK
008:V28
2SC3875S(ALY) RLINEIN
5 20
SEDIFF R2251
B_TERMINAL1 7A
E
C646
C647
OUTPUT C2139
R2227
RIN SEMAX C2148 C2149
R2224
22uF 15pF 6 19 6A
R2236
16V 0.1uF 1.6K OPT 1uF OPT 1uF T_TERMINAL1
GND 50V R2229
6.8K
10V
OPT
16V
3K
OPT 10V
VDD AGND 3
7 18 +5V_GENERAL E_SPRING
R2226
OPT
390
C2141 PEJ024-01
C648 C649 0.1uF LIN BYPASS
8 17 JK300
C2142
0.1uF 22uF
16V 16V
1uF
10V
C2145 4.7K
LLINEIN FADE OPT 1uF R2240
9 16
50V
R2230
R2237
LHPIN SHUTDOWN 100
10 15
+24V_AUDIO +24V_AMP PVDD_2 LOUT+ R2239

11 14
9.1K
R2242
4.7K
EXT_SPK_L+
LOUT- PGND_2 003:AF24 C
003:AF24 EXT_SPK_L- 12 13
R2233
B
SUB_MUTE
R2228
1K
L602 Q1105 008:AB19;003:Z25
CB3216PA501E E 2SC3052
1K
NTP3100L
SPK_L+ 003:AK13
SPEAKER_L
+24V_AMP C639
L606 0.01uF
SIGN97
R613 50V
D601 DA-8580
SIGN75
100V 5.6 C635 R617
R625 EAP38319001 R621
OPT 0.1uF 4.7K
3.3 C629 2S 2F 50V
1000pF 3.3
50V C633
0.47uF
C615 C643 50V
0.01uF 1S 1F R622
C602 0.01uF
SIGN73
50V C620 C630 C636 3.3
C625 68uF 1000pF
SIGN76
0.1uF 0.1uF D602 0.1uF R618
50V 50V C640
50V 50V 100V WAFER-ANGLE
OPT R614 4.7K 0.01uF
50V
C614 5.6 L608
MLB-201209-0120P-N2
+3.3V SPK_L- 003:AK13

22000pF 120-ohm
50V C618 003:AD16 SPK_L+
22000pF 4
50V L609
L605 120-ohm
003:AD14 SPK_L-
PGND1A_2
PGND1A_1
PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1
PGND1B_2
PGND1B_1
C619 3
OUT1A_2
OUT1A_1
OUT1B_2
OUT1B_1
SIGN91
1uF L611
16V
BST1B
VDR1B
R601 120-ohm SIGN88

008:AB21 100 003:AD12 SPK_R+
AMP_RST 2
L610
C606 120-ohm SIGN68
56
55
54
53
52
51
50
49
48
47
46
45
44
43
1000pF 003:AD9 SPK_R-

50V 1
008:V26
R603
0 C611
BST1A 1 42 NC C622
SPK_R+ 003:AK12 SPEAKER_R
AUDIO_MASTER_CLK VDR1A VDR2A 16V1uF C624 P600
2 41
1uF 10V RESET BST2A SIGN85 22000pF
3 40
SIGN102
+1.8V_AMP R615 L607 C641

AD PGND2A_2 50V
39 DA-8580
SIGN89
4 5.6
D603 0.01uF
MLB-201209-0120P-N2
+1.8V_AMP DVSS_1 PGND2A_1 EAP38319001 C634 C637 R619

5 38 100V 0.47uF 50V
C608 2S 2F
0.1uF VSS_IO 37 OUT2A_2 OPT C631 50V 0.1uF 4.7K R623
MLB-201209-0120P-N2
6 IC600 1000pF 50V 3.3

CLK_I 7 36 OUT2A_1 50V
L604
C607 VDD_IO 8 35 PVDD2A_2 1S 1F
R600 C604 1000pF R624
L603 50V DGND_PLL EAN60664001 PVDD2A_1 C632
0 9 34 1000pF
SIGN69
100pF D604 3.3

R602 AGND_PLL PVDD2B_2 50V C638 R620
50V 10 33 100V
OPT 0.1uF 4.7K C642
3.3K LFM 11 NTP-3100L 32 PVDD2B_1 R616 0.01uF
50V 50V
AVDD_PLL 12 31 OUT2B_2 5.6
SPK_R- 003:AK12
DVDD_PLL 13 30 OUT2B_1
TEST0 14 29 PGND2B_2
C600 C603 C605
10uF C601 10uF +24V_AMP
0.1uF
15
16
17
18
19
20
21
22
23
24
25
26
27
28
16V 0.1uF 16V

16V 16V
R626
3.3
DVSS_2
DVDD
SDATA
WCK
BCK
SDA
SCL
MONITOR_0
MONITOR_1
MONITOR_2
FAULT
VDR2B
BST2B
PGND2B_1
+1.8V_AMP C644
C626 C645
Mstar Application C627 C628 0.01uF
0.1uF
0.01uF 0.1uF 68uF 50V
50V
50V 50V
C610 C617
10uF 1uF
C613 10V C623
10V 0.1uF
16V
22000pF
50V
R604 100
008:V26 MS_LRCH
R605 100 C616
008:V26 MS_LRCK 33pF
R606 100 50V
008:V26 MS_SCK OPT
R607 100
008:AI4;010:B8 SDA_SUB/AMP
R608 100 R627 47K
008:AI4;010:B10 SCL_SUB/AMP POWER_DET
C609 C612
33pF 33pF
50V 50V +3.3V_ST
R611
R610 0 10K
C
B R612
R609 Q600 AMP_MUTE
33K OPT 2SC3052 10K
E 008:C13

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Audio Amp 3 14
AMP
FROM LIPS & POWER B/D
+5V_ST_PTC +5V_ST_PTC +5V_+12V Stand-by +3.3V
R705
4.7K
OPT
R411
L701 RT1P141C-T112 OPT

Q701 R771 +3.3V_ST
BG2012B121F +5V_ST
0 +12V
OPT POWER_ON_DELAY L708
3 1 R706 +5V
R703 CB3216PA501E
CB3216PA501E
10K SIGN192 OPT ***Relay_PTC is high=> Relay On
0 +5V_ST
C711 R708 2 R751 L715
15pF 33K 0 C749
RELAY_PTC CB3216PA501E
L729
OPT
50V C 004:E15;009:U27 IC702
R702
SIGN150
0.1uF C758
Q700 B 10K OPT
POWER_ON/OFF1
C756 AP1117E33G-13
2SC3875S(ALY) Q706 10uF 0.1uF
R752 0 +5V_ST SI4925BDY 16V
008:AR31;004:T24 IN ADJ/GND
+5V_GENERAL 3 1
E R701
+5V_ST L714
S1 1 8 D1_2 CB3216PA501E
120K R729 C704 C705 2 C708 C710
OPT 10K 10uF 0.1uF 10uF 0.1uF
C742 C757 OUT C2254
OPT C760 10V 16V 6.3V 16V
P700 OR_RELAY_ON 10uF G1 2 7 D1_1 10uF 0.1uF 16V
FM20020-24 R25430 R747 10V 220uF
004:L14 10K 16V
R730
OPT 560 S2 3 6 D2_2
+3.3V_ST
C752
NC PWR ON +5V_ST_PTC 22uF
1 2 Q703 16V
G2 4 5 D2_1
GND GND R750 2SC3052 C
3 4
GND GND R718 0
5 6 L706 B
008:V17;004:P28 10K R739 C743
+12V 5.2V 7 8 5.2V OPT +24V_AUDIO 47K 4.7uF PANEL_POWER
5.2V 9 10 5.2V C730 POWER_ON_DELAY R745 0 R726 C 25V
CB4532UK121E C726 E
GND GND 220uF 22uF 10K
L707 11 12 B Q707
MLB-201209-0120P-N2 16V 16V
12V 13 14 12V R746 0 2SC3052
OPT L728
GND GND POWER_ON/OFF1 C761 C762 OPT
C731 C728 C722 15 16 L704 R725 E +3.3V_AVDD_MPLL
C720 CB4532UK121E 008:AR31;004:P26 4.7uF 4.7uF CB3216PA501E +3.3V_ST
22uF 0.1uF 47uF 24V 24V 120K 6.3V 6.3V
0.1uF 17 18
16V 50V 25V OPT OPT OPT R740
50V NC 19 20 INV ON
C723 C727 47K
OPT A.DIM Err OUT C721 68uF R732 MSTAR CORE ON
21 22 1uF 68uF 22K C748
NC PWM_DIM C719 35V 50V 35V C755 L703
23 24 0.1uF 1uF
L700 50V 22uF BLM18PG121SN1D
25V
BG2012B080TF 25V
A_DIM 25
008:AF11 +5V_GENERAL C
R704 +3.3V_ST R728 C717
4.7K C706 C707 10K OPT 0.1uF
B Q705
1uF 16V C794 16V
25V 0.1uF R714 100 R717 2SC3052
0.1uF Q704
OPT 50V 3.3K 2SC3052 C
R720 R727 E
R715 C 10K 10K B R735
6.8K PANEL_CTL
R719 22K
OPT Q702 B 10K R759 0
INV_ON_DEBUG 008:AR32
2SC3052 C *** INV_CTL is High => Inv On E
L733 R760
BG2012B080TF Q708 B 10K
R743 SIGN193 E INV_CTL
0 2SC3875S(ALY)
PWM_DIM OPT 008:AR32
008:AF11;007:P26;007:Y25 OPT C725 R721
1uF E 10K
0 R742 25V OPT OPT
OPC_OUT OPT ERROR_OUT
007:P25;007:Y25
C709 R707 008:AB20
R709 4.7K
0 0.1uF
16V
OPT OPT
+24V_AUDIO +12V +5V_EXT

+3.3V L734
CB3216PA501E
L735
CB3216PA501E
008:AR30;004:X17;005:AA6
OPT
OPT OPT R765
R2550 0
+5V 008:AR30;004:AM17;005:AA6
R762 100
POWER_EN
+3.3V_FE 10K Close to IC
POWER_EN 1/10W
CB3216PA501E
C767 OPT
+5V_ST_PTC
R756
1000pF
L727
OPT
100
BLM18PG121SN1D R763 68K
L716
+3.3V C780
IC706 OPTR1
0.1uF IC703
BLM18PG121SN1D
74LVC1G32GW OPT 16V Close to IC
R733 MP2212DN
10K +5V_EXT
L720
OPT B VCC Close to IC
RL_ON 1 5 FB EN/SYNC
Vout=0.8*(1+R1/R2) R761
008:AR33 R25410 13K 1 8
A 1/8W L737
OPT
RELAY_PTC 2 OPT IC704 1uF
1% R2
GND SW_2 3.6uH
004:P27;009:U27 R25400 C411 R770 Close to IC MP2212DN OPT 2 7
82K 10V
560pF 56K R1 R422 C412 OPT
GND Y 1/10W
3 4 OPT OR_RELAY_ON 50V OPT OPT OPT
1% IN SW_1 C771
3 6 C772 C773
R25420 004:P26
FB
1 8
EN/SYNC 22uF
Placed on SMD-TOP 0.1uF 0.1uF
16V 16V 16V
R769 L710
18K D704 OPT BS VCC C770 3225
R2 GND SW_2 3.6uH 4 5
1/10W C763 C764 10nF OPT
2 7 Placed on SMD-TOP 100V 50V PI Result
C2253 1% 22uF 22uF
R421 OPT
0.1uF NR8040T3R6N 16V 16V 1N4148W_DIODES
100K OPT OPT R764 +5V_GENERAL
16V IN SW_1 C751 C750 47
3 6 5% C746 22uF
10uF 0.1uF OPT R767 OPT
6.3V 16V 16V
D700 BS VCC C741 10K
OPT 4 5 10nF R766 OPT
C768
C732 C733 100V 50V
1uF 10
22uF 22uF 1N4148W_DIODES 10V
OPT
16V OPT R737 +5V_GENERAL +5V_EXT
R734 47
Placed on SMD-TOP
L736
10 C737 CB3216PA501E
1/10W 1uF
1% 10V
C765 C766 C769
10uF 0.1uF 1uF
10V 16V 10V
+1.8V for Saturn5 DDR +1.26 Core for Saturn5

+5V_GENERAL
465 mA @85% efficiency
+5V_ST ON
+3.3V
+3.3V
+1.8V_DDR
IC701
SC4215ISTRT CB3216PA501E
L711 R738 MAX 3A +5V_ST
1/10W +5V_ST_PTC +5V_ST_PTC
NC_1 GND OPT 10K +1.26V_VDDC
BLM18PG121SN1D R711
1 8 12K R731
L702
1%
R710 10K C790
3.3K EN ADJ 1/10W Close to IC 0.1uF
2 7 Vout=0.8*(1+R1/R2) 16V OPT Q404
R736 24K SI4925BDY
Close to IC IC705 1/8W
1600 mA
VIN VO R723
3 6 MP2212DN S1 1 8 D1_2
22K
R1 R414 C405
1/10W $0.07 22K C406
NC_2 NC_3 R713 C714 C715 1% 4.9A 0.0150OHM 34MHZ 2.2uF 100uF
4 5 25V G1 2 7 D1_1
C712 C713 9.1K 22uF 0.1uF FB EN/SYNC 3A, DCR=0.025 ohm 16V
1 8 C407
10uF 0.1uF 1% 16V 16V R722 220uF
10V 75K L726 16V
R412
16V L717 S2 3 6 D2_2
R2
OPT
1/8W 3.6uH BLM18PG121SN1D R415
1K
GND SW_2
1% 2 7 2.2K
$0.24 G2 4 5 D2_1
R1/R2 : 27K / 20K => Vout=1.88 NR8040T3R6N Q403
C OUT C
R1/R2 : 15K / 12K => Vout=1.80 IN SW_1 2SC3875S(ALY)
Placed on SMD-TOP 3 6 C793 009:N27
R1/R2 : 12K / 9.1K => Vout=1.85 C791 C792 0.1uF B
MSTAR_POWER_ON
22uF 22uF R413
D703 OPT BS VCC 16V 16V 10K
4 5 C789 E
C IN C786 C787 10nF
22uF 100V 50V
22uF Placed on SMD-TOP
OPT 1N4148W_DIODES
R744
R724 47
10
C788
1uF
16V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power 4 14
TUNER LGDT3305
+5V_TU
L1003
500
SANYO_TUNER INNOTEK_TUNER C1007 C1005 C1011

C1008 C1013 C2250
TU1001-*1 0.01uF 0.1uF 0.1uF 10uF 220uF 220uF
TU1001 25V 50V 50V 10V 16V 16V
UCA36AL +3.3V_AVDD_PVSB
TDVW-H104P
+5V_TU
1N4148W
NC_1 NC_1 R1074 D1000
1 1 47K
NC_2 NC_2 C1071 C1072
2 2 27pF X1005 27pF
GND_1 C1073 R1075 VSB_RESET
GND_1 OPT
3 3 1uF
R1013 R1017 25MHz 10V
+5V[MAIN] +B1[5V]
4 4 4.7K 4.7K
OPT Close to tuner R1072 1M
NC_3[RF_AGC] RF_AGC C1027
5 5 100pF +3.3V_AVDD_PVSB
NC_4[VT] GND_2 50V (I2C Channel 6)
6 6
R1073 0
R1023 22 R1026 0 FE_TUNER_SDA +1.2V_DVDD_PVSB
GND_2 DATA +3.3V_DVDD_PVSB
7 7
R1022 22 R1027 0 FE_TUNER_SCL
SDA CLOCK L1219
8 8 CB3216PA501E
C1017 OPT OPT
SCL AS C1015 C1024 C1025 0 L1013
9 R1031 0 100pF
9 100pF 27pF 27pF
OPT
50V 50V 50V 50V IF_N C2138
AS DIF[+] 1/10W
10 10 0.1uF
5%
NC_5 DIF[-] R1032 R1068 50V
0
48
47
46
45
44
43
42
41
40
39
38
37
11 11 5.1K
R1033 C1006 OPT
D_IF1 IF_AGC 0 47pF L1002
VCCAAD10A
VSSAD10
VDD
XM
VSS
XTALO
XTALI
VSS33
SLIM_SCAN
VDD33
OPM
NRST
12 12 270nH
D_IF2 SIF IF_AGC 1 36
C1069 VROA PLLAVSS
13 13 R1061 100 2 35
0 L1014 0.01uF PLLAVDD
IF_P VINA2
14
IF_AGC
14
NC_3 +5V_TU IF_P 0.01uF C1070 3 34
L1004 6.8uH IF_N VINA1 VSS33
1/10W R1062 100 4 33
+5V[VIF] AUDIF
15 15 5%
5
INCAP
IC1004 VSS
32
VSSAAD10A VDD
SIF VIDEO R1007 0.1uF C1068 R1064 100 31
16 16 12K
R1010
470
6
I2CSEL LGDT3305 VSS
R1009 R1003 OPT 0 7 30 22R1077
NC_6[AFT] R1065 ANTCON SCL
17 OPT 0 0
17 FE_SIF 8 29 FE_DEMOD_SCL
VDD VDD33
NC_7
R1066 9 28 22 R1078
18 C1009 OPT I2CRPT_SCL SDA
0.01uF E 10 27 FE_DEMOD_SDA
VIDEO SHIELD 50V R1067 OPT I2CRPT_SDA NIRQ C1074
19 SIGN273 C1075
11 26 OPT OPT
ISA1530AC1 IF_AGC IF OUT TPSOP
B Q1000 R1060 R1063 1K 12 25
TPDATA[0]
TPDATA[1]
TPDATA[2]
TPDATA[3]
TPDATA[4]
TPDATA[5]
TPDATA[6]
TPDATA[7]
1K RF OUT TPCLK
20
TPVALID
R1008 C R1076
TPERR
VDD33
VSS33
10K OPT
SHIELD C1066 C1067
13
14
15
16
17
18
19
20
21
22
23
24
R1004 0.1uF 0.1uF
2.2K +3.3V_DVDD_PVSB
OPT AR1079
100
1/16W
0.1uF
470
SIFMO TS_SYNC
R1016 R1069
C1021 LD1000 TS_CLK
47
OPT +5V_TU
OPT TS_VALID
MStar Option
50V
0.1uF
C1014
R1019
270 R1021 AR1070 100
R1005 R1018
0 0 0 FE_VMAIN TS_0
OPT TS_0
008:D24
TS_1 TS_1
R1020 TS_2 TS_2
270
L1001
FM Rejection Option TS_3 TS_3
ISA1530AC1 E
Q1001 AR1071 100
TS_4
TS_4
TS_5
B C1004 TS_5
82pF TS_6
C TS_6
50V TS_7
R1006 TS_7
10K C1012
0.047uF
OPT 50V
VCOMO
MStar Option The value of coil & cap could be changed to optimized each
Mercury Option LGDT3305 POWER

TUNER 5V
+5V_GENERAL
OPT
IC1001 +3.3V_PVSB +3.3V_FE
L1000 SC156515M-1.8TR
MLB-201209-0120P-N2 L1005
OPT 500
VIN VO
VSB +3.3V B+ BLOCK
2 4
R1001
4.7K OPT R1014 +3.3V_PVSB +3.3V_AVDD_PVSB +3.3V_PVSB
R1002 OPT +3.3V_DVDD_PVSB
VSB_CTRL OPT 1K EN ADJ 15K
1 5
GND2
R1015 OPT L1007 L1008

IC1002 3 8.2K 500 500
KIA78R05F C1002 C1003 C1018 C1020
100uF 0.1uF GND 100uF 0.1uF C1023 C1026 C1028 C1030 C1032 C1033
6 16V 50V 16V 50V 10uF 0.1uF 10uF 0.1uF 0.1uF 0.1uF
OPT OPT
16V 50V 16V 50V 50V 50V
3216 3216
1 2 3 4 5
PANEL_POWER
VIN
VC
VOUT
NC
GND1
+5V_TU
L1012
IC1003 008:AR30;004:X17;004:AM17
AS7809DTRE1 POWER_EN
IC1000
INPUT 1 3 OUTPUT
L1010
BG2012B800
R1028
100 SC4215ISTRT VSB +1.0V B+ BLOCK
2 OPT
OPT R1035 +1.2V_PVSB +1.2V_PVSB +1.2V_DVDD_PVSB
C1081 C1082 C1034 C1035 C1036 C1037 C1040 C1041 100 NC_1 GND
GND C1039
0.1uF 100uF 0.1uF 100uF 0.33uF 0.1uF 0.1uF 0.01uF OPT 1 8
16V 16V 47uF
16V 16V 16V 16V 16V 25V R1011
R1036 20K R2
20K EN ADJ R1034
2 7 0
R1012
C1076 10K R1
1uF VIN VO 1/4W
16V 3 6 5% C1043 C1044
C1038 0.1uF
V0 = 0.8(R1+R2) / R2 10uF 0.1uF
C1019 16V 50V 50V
NC_2 NC_3 C1079
C1077 C1078 4 5 100uF 0.1uF
2.2uF 2.2uF 16V 50V 3216
25V 25V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Tuner/3305 5 14
TUNER
DDR DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_DDR +1.8V_S_DDR
L1
BLM18PG121SN1D
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
0.1uF
0.1uF
C1 C22
10uF
10uF
10uF
C24
C27
C30
C31
C32
C33
C34
C35
C36
C37
C38
C39
C41
C23
C25
C29
C43
C13
0.1uF 0.1uF
C10
C11
C12
C14
C15
C17
C19
C20
C21
C3
C5
C6
C7
C8
C9
+1.8V_S_DDR
+1.8V_S_DDR +1.8V_S_DDR
1K 1%
1K 1%
R47
R23
1K
1%
R4
0.1uF
0.1uF
1000pF
1K 1%
1%
1000pF
1G_HYNIX C40 C42
512M_HYNIX
IC100
R24
R44
IC1 0.1uF 1000pF IC2
1K
1%
1K
C18
C16
HY5PS1G1631CFP-S6 LGE3369A (Saturn6 Non RM) H5PS5162FFR-S6C
R5
C4
C2
SDDR_D[0] DQ0 G8 J2 VREF AR1 D15 VREF J2 G8 DQ0 TDDR_D[0]
HYNIX SDDR_A[5] ADDR2_A[5] A_MVREF HYNIX
SDDR_D[1] DQ1 G2 AR13 G2 DQ1 TDDR_D[1]
SDDR_A[3] ADDR2_A[3] BDDR2_A[9] TDDR_A[9]
SDDR_D[2] DQ2 H7 H7 DQ2 TDDR_D[2]
M8 A0 SDDR_A[0] SDDR_A[1] ADDR2_A[1] ADDR2_A[0] C13 T26 BDDR2_A[0] BDDR2_A[3] TDDR_A[3] TDDR_A[0] A0 M8
SDDR_D[3] DQ3 H3 A_DDR2_A0 B_DDR2_A0 H3 DQ3 TDDR_D[3]
A1 SDDR_A[1] SDDR_A[10] 56 56 ADDR2_A[10] ADDR2_A[1] A22 AF26 BDDR2_A[1] BDDR2_A[1] TDDR_A[1] TDDR_A[1] A1
DQ4 M3 M3 DQ4
SDDR_D[4] H1 A_DDR2_A1 B_DDR2_A1 H1 TDDR_D[4]
M7 A2 SDDR_A[2] ADDR2_A[2] B13 T25 BDDR2_A[2] BDDR2_A[10] 56 TDDR_A[10] TDDR_A[2] A2 M7
SDDR_A[0-12]
TDDR_D[0-15]
SDDR_D[5] DQ5 AR3 A_DDR2_A2 B_DDR2_A2 DQ5 TDDR_D[5]
ADDR2_A[0-12]
H9 AR12 H9
SDDR_D[0-15]
N2 A3 SDDR_A[3] SDDR_A[9] ADDR2_A[9] ADDR2_A[3] C22 AF23 BDDR2_A[3] TDDR_A[3] A3 N2

SDDR_D[6] DQ6 F1 A_DDR2_A3 B_DDR2_A3 F1 DQ6 TDDR_D[6]
N8 A4 SDDR_A[4] SDDR_A[12] ADDR2_A[12] ADDR2_A[4] A13 T24 BDDR2_A[4] TDDR_A[4] A4 N8
BDDR2_A[5] TDDR_A[5]
TDDR_A[0-12]
SDDR_D[7] DQ7 A_DDR2_A4 B_DDR2_A4 DQ7 TDDR_D[7]
BDDR2_A[0-12]
F9 A5 A23 AE23 BDDR2_A[5] A5 F9
N3 SDDR_A[5] SDDR_A[7] ADDR2_A[7] ADDR2_A[5] BDDR2_A[12] TDDR_A[12] TDDR_A[5] N3
SDDR_D[8] DQ8 C8 A_DDR2_A5 B_DDR2_A5 C8 DQ8 TDDR_D[8]
N7 A6 SDDR_A[6] AR2 ADDR2_A[6] C12 R26 BDDR2_A[6] 56 TDDR_A[6] A6 N7
SDDR_D[9] DQ9 SDDR_A[0] ADDR2_A[0] A_DDR2_A6 B_DDR2_A6 BDDR2_A[7] TDDR_A[7] DQ9 TDDR_D[9]
C2 A7 B23 AD22 BDDR2_A[7] A7 C2
P2 SDDR_A[7] ADDR2_A[7] AR14 TDDR_A[7] P2
SDDR_D[10] DQ10 D7 SDDR_A[2] ADDR2_A[2] A_DDR2_A7 B_DDR2_A7 BDDR2_A[0] TDDR_A[0] D7 DQ10 TDDR_D[10]
P8 A8 SDDR_A[8] ADDR2_A[8] B12 R25 BDDR2_A[8] TDDR_A[8] A8 P8
SDDR_D[11] DQ11 D3 SDDR_A[4] ADDR2_A[4] A_DDR2_A8 B_DDR2_A8 BDDR2_A[2] TDDR_A[2] D3 DQ11 TDDR_D[11]
P3 A9 SDDR_A[9] ADDR2_A[9] C23 AC22 BDDR2_A[9] TDDR_A[9] A9 P3
SDDR_D[12] DQ12 D1 SDDR_A[6] 56 ADDR2_A[6] A_DDR2_A9 B_DDR2_A9 BDDR2_A[4] TDDR_A[4] D1 DQ12 TDDR_D[12]
M2 A10/AP SDDR_A[10] ADDR2_A[10] B22 AD23 BDDR2_A[10] TDDR_A[10] A10/AP M2
SDDR_D[13] DQ13 SDDR_A[11] R21 56 ADDR2_A[11] A_DDR2_A10 B_DDR2_A10 BDDR2_A[6] 56 TDDR_A[6] DQ13 TDDR_D[13]
D9 A11 D9
P7 SDDR_A[11] ADDR2_A[11] A12 R24 BDDR2_A[11] TDDR_A[11] A11 P7
SDDR_D[14] DQ14 B1 SDDR_A[8] R22 56 ADDR2_A[8] A_DDR2_A11 B_DDR2_A11 BDDR2_A[11] R27 56 TDDR_A[11] B1 DQ14 TDDR_D[14]
R2 A12 SDDR_A[12] ADDR2_A[12] A24 AE22 BDDR2_A[12] TDDR_A[12] A12 R2
SDDR_D[15] DQ15 B9 A_DDR2_A12 B_DDR2_A12 BDDR2_A[8] R28 56 TDDR_A[8] B9 DQ15 TDDR_D[15]
+1.8V_S_DDR
+1.8V_S_DDR
L2 BA0 SDDR_BA[0] R6 56 ADDR2_BA[0] C24 AC23 BDDR2_BA[0] R29 56 TDDR_BA[0] BA0 L2
A_DDR2_BA0 B_DDR2_BA0
L3 BA1 SDDR_BA[1] R7 56 ADDR2_BA[1] B24 AC24 BDDR2_BA[1] R30 56 TDDR_BA[1] BA1 L3
VDD5 A1 A_DDR2_BA1 B_DDR2_BA1 A1 VDD5
L1 BA2 R49 0 ADDR2_BA[2] D24 AB22 BDDR2_BA[2] R50 OPT 0 TDDR_BA[2]
VDD4 E1 A_DDR2_BA2 B_DDR2_BA2 E1 VDD4
SDDR_CK R8 33 ADDR2_MCLK B14 V25 BDDR2_MCLK R31 33 TDDR_MCLK
VDD3 J9 A_DDR2_MCLK B_DDR2_MCLK CK J8 J9 VDD3
OPT
OPT
150
R45
150
VDD2 M9 J8 CK CK K8 M9 VDD2
R2
VDD1 R1 K8 CK R9 33 /ADDR2_MCLK A14 V24 /BDDR2_MCLK R32 33 CKE K2 R1 VDD1

/A_DDR2_MCLK /B_DDR2_MCLK
K2 CKE SDDR_CKE R10 56 ADDR2_CKE D23 AB23 BDDR2_CKE R33 56 TDDR_CKE
A_DDR2_CKE B_DDR2_CKE
ODT K9
VDDQ10 A9 K9 ODT SDDR_ODT R11 56 ADDR2_ODT D14 U26 BDDR2_ODT R34 56 CS L8 A9 VDDQ10
A_DDR2_ODT B_DDR2_ODT
VDDQ9 C1 L8 CS RAS K7 C1 VDDQ9
VDDQ8 C3 K7 RAS /SDDR_RAS R12 56 /ADDR2_RAS D13 U25 /BDDR2_RAS R35 56 CAS L7 C3 VDDQ8
/A_DDR2_RAS /B_DDR2_RAS
VDDQ7 C7 L7 CAS /SDDR_CAS R13 56 /ADDR2_CAS D12 U24 /BDDR2_CAS R36 56 WE K3 C7 VDDQ7
/A_DDR2_CAS /B_DDR2_CAS
VDDQ6 C9 K3 WE /SDDR_WE R14 56 /ADDR2_WE D22 AB24 /BDDR2_WE R37 56 /TDDR_WE C9 VDDQ6
/A_DDR2_WE /B_DDR2_WE
VDDQ5 E9 E9 VDDQ5
LDQS F7
VDDQ4 G1 G1 VDDQ4
F7 LDQS SDDR_DQS0_P R15 56 ADDR2_DQS0_P B18 AB26 BDDR2_DQS0_P R38 56 UDQS B7
VDDQ3 G3 A_DDR2_DQS0 B_DDR2_DQS0 G3 VDDQ3
B7 UDQS SDDR_DQS1_P R16 56 ADDR2_DQS1_P C17 AA26 BDDR2_DQS1_P R39 56
VDDQ2 G7 A_DDR2_DQS1 B_DDR2_DQS1 G7 VDDQ2
VDDQ1 G9 LDM F3 G9 VDDQ1
F3 LDM SDDR_DQM0_P R17 56 ADDR2_DQM0_P C18 AC25 BDDR2_DQM0_P R40 56 UDM B3
A_DDR2_DQM0 B_DDR2_DQM0
B3 UDM SDDR_DQM1_P R18 56 ADDR2_DQM1_P A19 AC26 BDDR2_DQM1_P R41 56 TDDR_DQM1_P
A_DDR2_DQM1 B_DDR2_DQM1
VSS5 A3 LDQS E8 A3 VSS5
VSS4 E3 E8 LDQS SDDR_DQS0_N R19 56 ADDR2_DQS0_N A18 AB25 BDDR2_DQS0_N R42 56 UDQS A8 E3 VSS4
A_DDR2_DQSB0 B_DDR2_DQSB0
VSS3 J3 A8 UDQS SDDR_DQS1_N R20 56 ADDR2_DQS1_N B17 AA25 BDDR2_DQS1_N R43 56 TDDR_DQS1_N J3 VSS3
A_DDR2_DQSB1 B_DDR2_DQSB1
VSS2 N1 N1 VSS2
AR4 AR10 NC4 L1
VSS1 P9 SDDR_D[11] ADDR2_D[11] ADDR2_D[0] B15 W25 BDDR2_D[0] BDDR2_D[11] TDDR_D[11] P9 VSS1
R3 NC5 A_DDR2_DQ0 B_DDR2_DQ0 NC5 R3
SDDR_D[12] ADDR2_D[12] ADDR2_D[1] A21 AE26 BDDR2_D[1] BDDR2_D[12] TDDR_D[12]
R7 NC6 A_DDR2_DQ1 B_DDR2_DQ1 NC6 R7
SDDR_D[9] ADDR2_D[9] ADDR2_D[2] A15 W24 BDDR2_D[2] BDDR2_D[9] TDDR_D[9] R51
A_DDR2_DQ2 B_DDR2_DQ2 0
OPT SDDR_D[14] 56 ADDR2_D[14] ADDR2_D[3] B21 AF24 BDDR2_D[3] BDDR2_D[14] TDDR_D[14]
VSSQ10 B2 A_DDR2_DQ3 B_DDR2_DQ3 AR8 B2 VSSQ10
NC1 R48 AR6 ADDR2_D[4] C21 AF25 BDDR2_D[4] 56 NC1
VSSQ9 A2 SDDR_D[4] ADDR2_D[4] BDDR2_D[4] TDDR_D[4] A2 VSSQ9
B8 0 A_DDR2_DQ4 B_DDR2_DQ4 B8
E2 NC2 ADDR2_D[5] C14 V26 BDDR2_D[5] NC2 E2
BDDR2_D[0-15]
VSSQ8 SDDR_D[3] ADDR2_D[3] A_DDR2_DQ5 B_DDR2_DQ5 BDDR2_D[3] TDDR_D[3] VSSQ8
A7 A7
ADDR2_D[0-15]
R8 NC3 ADDR2_D[6] C20 AE25 BDDR2_D[6] NC3 R8

VSSQ7 SDDR_D[1] ADDR2_D[1] A_DDR2_DQ6 B_DDR2_DQ6 BDDR2_D[1] TDDR_D[1] VSSQ7
D2 C15 W26 D2
SDDR_D[6] 56 ADDR2_D[6] ADDR2_D[7] BDDR2_D[7] BDDR2_D[6] 56 TDDR_D[6]
VSSQ6 D8 A_DDR2_DQ7 B_DDR2_DQ7 D8 VSSQ6
AR5 ADDR2_D[8] C16 Y26 BDDR2_D[8] AR11
VSSQ5 SDDR_D[15] ADDR2_D[15] A_DDR2_DQ8 B_DDR2_DQ8 BDDR2_D[15] TDDR_D[15] +1.8V_S_DDR VSSQ5
E7 J7 VSSDL C19 AD25 VSSDL J7 E7
ADDR2_D[9] BDDR2_D[9]
VSSQ4 F2 SDDR_D[8] ADDR2_D[8] A_DDR2_DQ9 B_DDR2_DQ9 BDDR2_D[8] TDDR_D[8] F2 VSSQ4
+1.8V_S_DDR ADDR2_D[10] B16 Y25 BDDR2_D[10]
VSSQ3 F8 SDDR_D[10] ADDR2_D[10] A_DDR2_DQ10 B_DDR2_DQ10 BDDR2_D[10] TDDR_D[10] F8 VSSQ3
ADDR2_D[11] B20 AE24 BDDR2_D[11]
VSSQ2 H2 SDDR_D[13] 56 ADDR2_D[13] A_DDR2_DQ11 B_DDR2_DQ11 BDDR2_D[13] TDDR_D[13] H2 VSSQ2
AR7 ADDR2_D[12] A20 AD26 BDDR2_D[12] AR9 56
VSSQ1 H8 J1 VDDL A_DDR2_DQ12 B_DDR2_DQ12 VDDL J1 H8 VSSQ1
SDDR_D[7] ADDR2_D[7] ADDR2_D[13] A16 Y24 BDDR2_D[13] BDDR2_D[7] TDDR_D[7]
SDDR_D[0] ADDR2_D[0] A_DDR2_DQ13 B_DDR2_DQ13 BDDR2_D[0] TDDR_D[0]
ADDR2_D[14] B19 AD24 BDDR2_D[14]
SDDR_D[2] ADDR2_D[2] A_DDR2_DQ14 B_DDR2_DQ14 BDDR2_D[2] TDDR_D[2]
ADDR2_D[15] A17 AA24 BDDR2_D[15]
SDDR_D[5] ADDR2_D[5] A_DDR2_DQ15 B_DDR2_DQ15 BDDR2_D[5] 56 TDDR_D[5]
56

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR2 6 14
DDR
LVDS OPT
P1208
FF10001-30 P1401
FI-X30SSL-HF
1
1 GND
2
2
3 R811 0
PWM_DIM 008:AF11;004:B20;007:Y25
3
4 R810 0
OPC_OUT 004:B20;007:Y25 R834 0
4 PWM_DIM 008:AF11;004:B20;007:P26
5
5 R833 0
OPC_OUT 004:B20;007:P25
6 LVDS_TXA3+
6
7 LVDS_TXA3-
7 LVDS_TXA3+
8
8 LVDS_TXA3-
9 LVDS_TXAC+
9
0 R812 10 LVDS_TXAC-
TXA1-[9] LVDS_TXA3+
10 LVDS_TXAC+
0 R813 11
TXA1+[8] LVDS_TXA3-
11 LVDS_TXAC-
12 LVDS_TXA2+
12
TXA2-[7] 0 R814 13 LVDS_TXA2-
LVDS_TXAC+
13 LVDS_TXA2+
0 R815 14
TXA2+[6] LVDS_TXAC-
14 LVDS_TXA2-
15 LVDS_TXA1+
15
0 R816 16 LVDS_TXA1-
TXAC-[5] LVDS_TXA2+
16 LVDS_TXA1+
0 R817 17
TXAC+[4] LVDS_TXA2-
17 LVDS_TXA1-
18 LVDS_TXA0+
18
0 R818 19 LVDS_TXA0-
TXA3-[3] LVDS_TXA1+
19 LVDS_TXA0+
0 R819 20
TXA3+[2] LVDS_TXA1-
20 LVDS_TXA0-
R822 0
21 OPC_EN 008:AQ28;007:Y20
21
0 R820 22 R823 0
TXA4-[1] LVDS_TXA0+ LVDS_SEL 008:AR30;007:Y19 R835 0
OPT 22 OPC_EN 008:AQ28;007:P20
0 R821 23
TXA4+[0] LVDS_TXA0- R836 0
23 LVDS_SEL 008:AR30;007:P20
24 OPT
24
25 PANEL_POWER
25
26
26
27
L1304 27
28 CB3216PA501E
28
29
29
30
30
31 31
32 GND
33
32INCH
GAS1
MDS61887701

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS 7 14
+3.3V
+3.3V_VDDP
L101
BLM18PG121SN1D
+1.26V_VDDC
C164 C167 C170 C173 C176 C179 C184 C189 C195 C196
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C163 C166 C169 C172 C175 C178 C183 C188 C193 C198 C2104 C2109 C2115 C2119 C2120 C2123 C2124 C2125 C2126 C2127 C2128 C2129 C2130 C2131 C2132 C2133 C2134 C2135 C2136 C2137
330uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
OPT
IC100
LGE3369A (Saturn6 Non RM)
+1.8V_DDR
002:I22 F1 RXACKP AE16

CK+_HDMI1 LVA0P
002:I22 F2 RXACKN AD16 C2105
CK-_HDMI1 LVA0M C165 C168 C171 C174 C177 C180 C185 C190 C194 C199 C2110 C2111
002:I21 G2 RXA0P AD15 330uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
D0+_HDMI1 LVA1P
002:I21 G3 RXA0N AF16 OPT
D0-_HDMI1 LVA1M
002:I20 H3 RXA1P AF15
D1+_HDMI1 LVA2P
G1 AE15 S6_Reset 008:X13
D1-_HDMI1 002:I21 RXA1N
LVA2M IC100
002:I19 H1 RXA2P AD13
D2+_HDMI1 LVA3P LGE3369A (Saturn6 Non RM)
002:I20 H2 RXA2N AF14 C186 20pF IC100 +1.26V_VDDC
D2-_HDMI1 LVA3M
R2113 0 A1 AF13 LGE3369A (Saturn6 Non RM)
DDC_SDA_1 002:I24;002:S20 DDCD_A_DA R252
LVA4P PCM_D[5-7]
002:I23;002:S20 R2114 0 B2 DDCD_A_CK AE13 1M X100
DDC_SCL_1 LVA4M D4 HWRESET B3 12MHz
002:J25 R2115 100 A2 HOTPLUG_A XIN
HPD1 A3 R231 0 C187 20pF E16 D16
AE14 VDDC_1
CK+_HDMI2
002:I9 C3 RXBCKP
LVACKP
LVACKM
AD14 LVDS AC16
AA15
PCMD0/CI_D0
XOUT
E6 R232 0
E17
E18
GND_2
GND_3
VDDC_2 D17
D18
B1 PCMD1/CI_D1 TESTPIN/GND VDDC_3
CK-_HDMI2 002:I9 RXBCKN AA16 GND_4
F7 VDDC_4 D19
002:I8 C1 RXB0P AE20 PCMD2/CI_D2 GND_5
D0+_HDMI2 LVB0P AC6 L9 D20
C2 AD20 PCMD3/CI_D3 VDDC_5
002:I8 RXB0N GND_6
HDMI 1/2
D0-_HDMI2 LVB0M Y10 AE11 R225 33 008:I9 SPI_DI L10 H18

D2 AD19 PCMD4/CI_D4 SPI_DI VDDC_6
D1+_HDMI2 002:I7 RXB1P Y11 AF12 GND_7
LVB1P AR107 TXA3-[3] PCM_D[5] 008:E10 SPI_DO L11 VDDC_7 H19
002:I8 D3 RXB1N AF20 TXA3-[3] PCMD5/CI_D5 SPI_DO GND_8
D1-_HDMI2 LVB1M 22 TXA3+[2] PCM_D[6] Y12 AE12 R226 33 008:E10 SPI_CS H20
E3 AF19 TXA3+[2] PCMD6/CI_D6 /SPI_CS VDDC_8
D2+_HDMI2 002:I6 RXB2P Y13 AD11
LVB2P TXA4-[1] PCM_A[0-7,10-11] PCM_D[7] R227 33 008:I9 SPI_CK VDDC_9 J20
002:I7 D1 RXB2N AE19 TXA4-[1] PCMD7/CI_D7 SPI_CK
D2-_HDMI2 LVB2M TXA4+[0] L12 K20
R2116 0 E1 AD17 TXA4+[0] VDDC_10
DDC_SDA_2 002:I11;002:S7 DDCD_B_DA PCM_A[0] AB16 GND_9
LVB3P AR108 TXA2-[7] L13 VDDC_11 L20
002:I10;002:S7 R2117 0 F3 DDCD_B_CK AF18 TXA2-[7] PCM_A[1] PCM_A0/CI_A0 GND_10
DDC_SCL_2 LVB3M 22 TXA2+[6] AC15 L14 M20
002:J12 R2118 100 E2 AF17 TXA2+[6] PCM_A1/CI_A1 VDDC_12
HPD2 HOTPLUG_B PCM_A[2] AC14 GND_11
LVB4P TXAC-[5] L15 VDDC_13 P7
AE17 TXAC-[5] PCM_A[3] PCM_A2/CI_A2 GND_12
LVB4M TXAC+[4] AB14 L16 R7
AE8
AD8
RXCCKP
RXCCKN LVBCKP
AE18 AR109
TXAC+[4] PCM_A[4]
PCM_A[5]
AC12
AB8
PCM_A3/CI_A3
PCM_A4/CI_A4 USB_DP_1
B5
A5
R801 0
R802 0
USB L17
GND_13
GND_14
VDDC_14
VDDC_15 T7
22 L18 GND_15 T22
AD9 RXC0P AD18 PCM_A[6] PCM_A5/CI_A5 USB_DM_1 VDDC_16
LVBCKM TXA1-[9] AC13 AC10 R233 0 M9 U7
AF8 TXA1-[9] PCM_A6/CI_A6 USB_DM_2 USB_DM 013:G22 GND_16 VDDC_17
RXC0N PCM_A[7] AA9 AB10
TXA1+[8] R234 0 USB_DP U20
AF9 RXC1P TXA1+[8] PCM_A7/CI_A7 USB_DP_2 013:G21 VDDC_18
R2172 OPT 33 AB5 M10 U22
AE9 GND_17
AE10
RXC1N
RXC2P AUR0
AA3 C134 2.2uF 001:O24 SIDEAV_R_IN
R2123 OPT 33
PCM_A[10]
AA4
V4
PCM_A8/CI_A8
PCM_A9/CI_A9
R254
15K
OPT
R256
15K
OPT
Stand-by GPIO M11
M12
GND_18
VDDC_19
VDDC_20
V7
V22
AD10 RXC2N Y1 C135 2.2uF 001:O25 PCM_A[11] PCM_A10/CI_A10 004:E15 GND_19 VDDC_21
AUL0 SIDEAV_L_IN Y4 +3.3V_ST M13 W11
AE7 DDCD_C_DA AE1 C136 2.2uF 001:U18 PCM_A11/CI_A11 RL_ON GND_20 VDDC_22
AUR1 COMP1_R_IN AB9 M14 W12
AF7 DDCD_C_CK AF3 C137 2.2uF 001:U17 PCM_A12/CI_A12 008:G14;008:Z22 GND_21 VDDC_23
AUL1 COMP1_L_IN AA7 R236 OPT 100 M15 W19
AD7 AE3 C138 2.2uF 001:D19 PCM_A13/CI_A13 SB_MUTE
HOTPLUG_C GND_22 VDDC_24
R253
AUR2 AV_R_IN AD6 R108 OPT 100 M16 W20
10K
J3 POWER_DET
R145 100 CEC AUL2 AE2 C139 2.2uF 001:D18 AV_L_IN
PCM_A14/CI_A14
R2221 100 GND_23 VDDC_25
TX_F5 M17 W22
AA1 +5V_GENERAL GND_24 VDDC_26
AUR3 R2477 33 AA14 E5 R237 100 012:K7 Y22
AB1 PCM_RST/CI_RST GPIO_PM0/GPIO134 VDDC_27
AUL3 R2478 33 AB18 F5 INV_CTL M18
004:P20
AB2 C142 2.2uF 001:N7 PC_R_IN Y5
PCM_CD/CI_CD GPIO_PM1/GPIO135
G5 R244 PANEL_CTL GND_25 +3.3V_VDDP
AUR4 R2479 33 100 004:W21 N4
N2 HSYNC0/SC1_ID AC2 C143 2.2uF 001:N6 /PCM_OE /PCM_OE GPIO_PM2/GPIO136 GND_26
AUL4 PC_L_IN R2480 33 AB15 H5 R245 100 POWER_ON/OFF1 N9 H9
COMPONENT1
N1 VSYNC0/SC1_FB AB3 C144 2.2uF PCM_REG/CI_CLK GPIO_PM3/GPIO137 004:P26;004:T24 GND_27 VDDP_1

AUR5 R2481 OPT 10K AA10 F6 R251 100 N10 H10
001:U16 R120 47 C101 0.047uF P2 RIN0P/SC1_R AC3 C145 2.2uF PCM_WAIT/CI_WACK GPIO_PM4/GPIO138 POWER_DET GND_28 VDDP_2
COMP1_PR AUL5 R2482 OPT 10K AC8 G6 R830 100 R2222 100 N11 H11
001:U13 R121 47 C102 0.047uF R3 GIN0P/SC1_G /PCM_IRQA GPIO_PM5/INT1/GPIO139 RX_G6 GND_29 VDDP_3
COMP1_Y R2483 33 AC7 H6 012:C8 R246 100 N12 H12
001:U14 R122 47 C103 0.047uF R1 BIN0P/SC1_B /PCM_WE GPIO_PM6/INT2/GPIO140 ISP_TXD 008:AB27;001:AK20 GND_30 VDDP_4
COMP1_PB R2484 33 AA5 AC17 R2193 100 004:X17;004:AM17;005:AA6 OPT POWER_EN N13 N20
R123 470 C104 1000pF P3 SOGIN0/SC1_CVBS PCM_IOWR/CI_WR GPIO131/LDE/SPI_WPn1 GND_31 VDDP_5
R2485 33 W4 AB17 R220 100 007:P20;007:Y19 N14 P20
R124 47 C105 0.047uF P1 RINM W3 C146 0.1uF R171 47 005:P21 AR103 PCM_IOR/CI_RD GPIO130/LCK LVDS_SEL GND_32 VDDP_6
SIF0P FE_SIF R2486 33 T4 AF11 R238 100 008:B10 Flash_WP_1 W9
R125 47 C106 0.047uF T3 BINM W2 C147 0.1uF R172 47 005:N19 /PCM_CE /PCM_CE GPIO132/LHSYNC/SPI_WPn VDDP_7
SIF0M SIFMO /PF_CE0 008:S8 AE6 AA18 R239 0 008:AN4 SDA1 N15 W10
R126 47 C107 0.047uF R2 /PF_CE0 GPIO60/PCM2_RESET/RX1 +3.3V
GINM R2220 0 008:T6 AF6 AA17 GND_33 VDDP_8
/PF_CE1 R240 0 008:AN4 SCL1 N16
5V_HDMI_2 /PF_CE1 GPIO62/PCM2_CD_N/TX1 GND_34
R107 R109 /PF_OE 008:S8 AR102 AA12 R2559 100 N17 L109
10K 10K F11 /PF_OE GND_35 BLM18PG121SN1D
SPDIF_IN 008:T5 22 AA11 R2558 OPT100 N18 W7
R146 22 K3 E9 /PF_WE
001:AB17 HSYNC1/DSUB_HSYNC R159 22 /PF_WE GND_36 AVDD_AU
DSUB_HSYNC SPDIF_OUT PF_ALE 008:T5 AC9 R2557 OPT 100 OPT P4
001:AB18 R149 22 K2 PF_ALE +1.8V_DDR
DSUB
VSYNC1/DSUB_VSYNC GND_37
DSUB_VSYNC
R127 0.047uF L1 PF_WP 008:R4 Y14
PF_AD15
R2556 OPT 100 I2C for Tuner_5V P9 C215 C219
001:AB13 47 C113 RIN1P/DSUB_R Only 250H GND_38
DSUB_R /F_RB 008:S8 22 AB11 E7 R202 0 008:AI6;005:R24 FE_TUNER_SCL P10 G12
001:AB14 R128 47 C108 0.047uF L3 GIN1P/DSUB_G F_RBZ LHSYNC2/I2S_OUT_MUTE/RX1 5V_HDMI_1 GND_39 AVDD_DDR_1 0.1uF 0.1uF
DSUB_G AC18 R2185 22 G13
001:AB16 R129 47 C114 0.047uF K1 BIN1P/DSUB_B LVSYNC/GPIO133 OPC_EN AVDD_DDR_2
DSUB_B EEPROM_SCL 008:G4;008:N14;008:AN6 R215 0 F8 C6 R203 0 008:AI6;005:R24 FE_TUNER_SDA H13
R130 470 C109 1000pF L2 SOGIN1 AF1 R164 OPT 100 UART2_TX/SCKM GPIO79/LVSYNC2/TX1 AVDD_DDR_3
AUOUTR0/HP_ROUT 003:L24 EEPROM_SDA 008:G4;008:N14;008:AN6 R216 0 D11 F9 R2186 22 P11 H14
AF2 R165 OPT 100 EXT_SPK UART2_RX/SDAM UART2_RX/GPIO84 GND_40 AVDD_DDR_4
AUOUTL0/HP_LOUT 008:AN5 R217 0 AB21 F10 P12 H15
AD3 R166 OPT 100 SDA0 DDCR_DA UART2_TX/GPIO85 USB_OCD 013:N23
0 AC21 A6 33 GND_41 AVDD_DDR_5
AUOUTR1/SC1_ROUT 008:AN5 R218 R267 P13 H16
V1 AD1 100 ISP Debug port for S5 SCL0 PTC_TX_MSTAR 012:K9
0.01uF
RIN2P/COMP_PR+ R167 OPT DDCR_CK UART1_RX/GPIO86 GND_42 AVDD_DDR_6
R800
C800
AUOUTL1/SC1_LOUT B6 R268 33 P14 W14
22K
V2 GIN2P/COMP_Y+ AC1 R168 100 UART1_TX/GPIO87 PTC_RX_MSTAR 012:D13 GND_43 AVDD_DDR_7
AUOUTR2/SC2_ROUT 001:AK20 R191 22 J1 AF5 R2194 33 P15 W15
U1 BIN2P/COMP_PB+ AD2 R169 100 ISP_RXD DDCA_CLK GPIO42/PCM2_CE_N GND_44 AVDD_DDR_8
AUOUTL2/SC2_LOUT R192 22 J2 AF10 R2187 22 P16 W16
0.01uF
0.01uF
008:AR31;001:AK20 PM_TS[0-7]
0.01uF
0.01uF
V3 ISP_TXD DDCA_DA GPIO43/PCM2_IRQA_N
R170
C153
R173
SOGIN2 SIGN487 GND_45 AVDD_DDR_9
C151
33 W5 010:AO19
R176
R177
22K
22K
R183 P17 W17
22K
C159
C160
22K
J5 VSYNC2 012:Z7 MSTAR_RX SIGN486 UART_RX2 GND_46 AVDD_DDR_10 +3.3V
R184 33 V5 AA8 PM_TS[0] P18 W18
012:Q9 MSTAR_TX UART_TX2 TS0_D0 GND_47 AVDD_DDR_11
OPT OPT OPT OPT OPT OPT OPT OPT Y8 PM_TS[1]
PM_TS[0-7]
A8 R160 22 L106
003:E12 TS0_D1 BLM18PG121SN1D
I2S_OUT_MCK AUDIO_MASTER_CLK Y9 PM_TS[2] R4 H17
B7 R161 22 003:E6 TS0_D2 GND_48 AVDD_MEMPLL_1
U3 CVBS1/SC1_CVBS I2S_OUT_WS MS_LRCK AB7 PM_TS[3] R9 T20
CVBS
C7 R162 22 003:E6 TS0_D3 GND_49 AVDD_MEMPLL_2 C200 C206 C216

001:O27 R114 47 C112 0.047uF U2 I2S_OUT_BCK MS_SCK AA6 PM_TS[4] R10 V20 C209
SIDEAV_CVBS_IN CVBS2/SC2_CVBS D8 R163 22 003:E7 TS0_D4 GND_50 AVDD_MEMPLL_3
001:D15 R137 47 C118 0.047uF T1 CVBS3/SIDE_CVBS I2S_OUT_SD MS_LRCH AB6 PM_TS[5] R11
AV_CVBS_IN C8 TS0_D5 GND_51 0.1uF 0.1uF 0.1uF 0.1uF
R138 47 C119 0.047uF T2 VCOM1 I2S_IN_SD TP804 C152 C154 C155 C157 U4 PM_TS[6] R12
TS0_D6 +3.3V
22pF 22pF 22pF 22pF AC5 GND_52
PM_TS[7] R13
OPT OPT OPT OPT TS0_D7 GND_53
AC4 010:AO21 PM_TS_SYNC R14 L108
M1 CVBS4/S-VIDEO_Y +3.3V TS0_SYNC GND_54 BLM18PG121SN1D
C150 AD5 010:AO21 R15 R20
M2 K4 0.1uF TS0_VLD PM_TS_VALID
CVBS6/S-VIDEO_C C127 0.1uF AB4 GND_55 AVDD_LPLL
VCLAMP 010:AN22
H4 C148 TS0_CLK PM_TS_CLK +3.3V_AVDD_MPLL
REFP +3.3V_ST R16 C211 C218
R140 47 C124 0.047uF N3 CVBS5 J4 GND_56
REFM 0.1uF +3.3V_ST AB19 R2173 OPT 100 R17 H7
R141 47 C125 0.047uF M3 CVBS7 G4 R152 390 TS1_D0 GND_57 AVDD_MPLL 0.1uF 0.1uF
REXT C149 AA20 R2175 OPT 100 R18
1% 0.1uF TS1_SYNC GND_58 C191 C201
PWM0 008:M9;008:AK11 AB13 AC19 R2174 OPT 100 T5
R139 W1
FROM FPGA
R832
4.7K
005:T17 100 C122 0.047uF CVBS0/RF_CVBS PWM0 TS1_VLD GND_59 10uF
R831
4.7K
FE_VMAIN PWM1 008:M9;008:AK11 AB12 AA19 R2176 OPT 100 T9 10V
005:M15 R117 100 C123 0.047uF Y3 VCOM0 AE5 C128 0.1uF PWM1 TS1_CLK GND_60 0.1uF
VCOMO AUCOM 008:AK10 AD12 T10
TV
AE4 PWM2 PWM2 +3.3V

GND_61
AUVRM R195 100 AA13 C10 R829OPT 100 T11
R2122 100 Y2 CVBSOUT0/SC2_MNTOUT AF4 C129 10uF 10V PWM3 ET_TXD0 GND_62
AUVRP B11 R235OPT 100 T12 L103
AA2 CVBSOUT1 AD4 C130 0.1uF ET_TXD1 GND_63 BLM18PG121SN1D
TP803 AUVAG R827 100 A4 A9 R243 OPT 100 J7
C132 1uF SAR0 ET_TX_CLK AVDD_33_1
R828 100 B4 C11 R110OPT 100 T13 K7
C133 4.7uF SAR1 ET_RXD0 GND_64 AVDD_33_2 C204 C205 C202 C203 C207 C214
R2190 0 F4 C9 R2188OPT 100 T14 L7
+3.3V_ST SAR2 ET_RXD1
008:G14;008:AR32 R2191 0 SIGN495 E4 B10 002:T21;002:T8;001:AK21 GND_65 AVDD_33_3
R249 100 T15 M7 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
SB_MUTE TP806 SAR3 ET_TX_EN EEPROM_WP GND_66 AVDD_33_4
R193 0 C4 A10 R250 100 005:X10 T16 N7
IR_mstar IRIN ET_MDC VSB_CTRL GND_67 AVDD_33_5
---------------------- 008:K6 B9 R2189 100 005:AM26;010:G19 T17
POWER_DET R274 ET_MDIO VSB_RESET GND_68 +3.3V
HIGH LOW OPT A11 R111 OPT100 T18
D6 LCD PDP SIGN459 ET_COL GND_69
R28310K OPT
010:G18 R112 0 AC11 U5 W8 L107
D7 B_LVDS A_LVDS SYS_RESET TP807 GPIO44 GND_70 AVDD_DM
E11 MOVING : PWM R/B W13 +3.3V BLM18PG121SN1D
R280 10K
R28110K
R28210K
B9 FHD HD 100 D9 GND_71 C210 C217
R196 Y21 L102
Close to IC ---------------------- GPIO96 GND_72 BLM18PG121SN1D
AMP_RST 003:E12 R200 100 D10 AA23 H8
as close as possible GPIO88 GND_73 AVDD_USB 0.1uF 0.1uF
R248 100 D7
GPIO90/I2S_OUT_MUTE C208
R221 100 E11 C192
GPIO91
ERROR_OUT 004:N20 R201 100 E8 0.1uF
GPIO97 0.1uF
NTP_MUTE 008:G13 R219 100 E10
GPIO98
D6 D7 E11 B9 R255 100 D6
GPIO99
R179 22 D5
R284
R287 0
R285
0 OPT
0 OPT
R286 0
OPT
GPIO103/I2S_OUT_SD3
SUB_MUTE 003:Z25;003:AC20 R2160 100 C5
GPIO102
POWER SQ Check JTEG
+3.3V
OPT
P1
Audio Mute HDCP EEPROM S5 Reset GIL-G-03-S3T2 PANEL_POWER
R300
10K
R303
1K
R304 0 PCM_A[11] JTINT
R305 0 PCM_D[5] /JTRST

1
R301 R306 OPT 0 PCM_D[7] JTCK
POWER_ON_DELAY 10K
2 OPT R307 OPT 0 /PCM_CE JTMS
C
R188 LVDS_TXAC+ R308 0
B Q107 /PCM_OE JTDO
+5V_ST 2SC3052 3
+3.3V_ST R309 0 PCM_A[10] JTDI
4.7K INV_ON_DEBUG
E
R310 0
PCM_D[6] /RST
R187
0 IC103 013:L24 R302
MAX810RTR SW100 A7 R224 100
R2577
IC105 GPIO67 USB_CTL 10K

4.7K
B8 R242
3
+3.3V_ST CAT24WC08W-T 100

R106 VCC 3 2 RESET GPIO68
OPT
4.7K A0 1 VCC
Addr:10101-- +3.3V_ST
8 1
A1 $0.199
SIGN483
R131 GND
7 WP
4
3.3K 2 008:G4;008:AB28;008:AN6
SIGN482 22 EEPROM_SCL R228 R135 100
A2 3 6 SCL R181
D102 100
SIGN484
ENKMC2838-T112 VSS 4 SDA 22 C

5 R182 R133
A1 008:Z22;008:AR32
SB_MUTE EEPROM_SDA 10K B Q108
003:Q4 C 2SC3052
AMP_MUTE C197 0.1uF 008:G4;008:AB28;008:AN6
A2 008:AB20
R2576
NTP_MUTE E
C120
S6_Reset POWER DETECT
0
OPT
4.7uF C121
10V R134
10K 10uF
6.3V
Serial FLASH MEMORY MCU BOOT STRAP

+3.3V_ST
for BOOT PWM Dimming +5V_GENERAL

NAND FLASH MEMORY
008:AR30
IC101 +3.3V
+3.3V R2200
IC102 10K
MX25L3205DM2I-12G HY27US08121B-TPCB +3.3V
+12V 008:Z22;008:AR32;008:AR31;003:P6;009:P28
+3.3V
R105
4.7K
004:A22 R185 1.2K R2192 0

L110
A_DIM 008:M9;008:AB24 PWM0 R2197 POWER_DET

004:B20;007:P26;007:Y25 R186 100 OPT 008:M9;008:AB24 PWM1 10K OPT
CS# VCC 10 : BOOT 51 PWM_DIM
Flash_WP_1
SPI_CS 1 8 11 : BOOT RISC NC_1 NC_28 R189 100 C

1 48 008:AB23 PWM2
R2195 R2198
+3.3V +3.3V /PF_CE0 B Q103
0.1uF
008:AR36 NC_2 NC_27 C181 20K

H : Serial Flash 2 47 C182 2SC3052
C126
R104 SO HOLD# 1uF 1uF 1K

SPI_DO 2 7 L : NAND Flash PCM_A[0-7] C
R103
008:AR36
10K
NC_3 NC_26 OPT E +24V_AUDIO

33 R150 1K /PF_CE1 3 46 B Q102 R2211
H : 16 bit R2199 0
WP# SCLK OPT NC_4 NC_25 2SC3052 2.2K
3.9K
1K
R101 0 L : 8 bit 4 45 +5V

3 6 SPI_CK PWM0 008:AB24;008:AK11 AR100 OPT
R147 1K NC_5 I/O7 R2196 E
C 008:AR35 PCM_A[7] 1.5K
008:AR36 5 44
R102 OPT0 B GND
4 5
SI
SPI_DI OPT R151 1K
PWM1 008:AB24;008:AK11 NC_6 I/O6 R2201 R2204 C
SIGN490
SIGN501
PCM_A[6] 33K 10K
R158
6 43
R156
SIGN488 B Q105 +5V_ST_PTC

R148 1K
Q100 R/B I/O5 2SC3052
E 7 42 PCM_A[5] R2202 R2205 1K
KRC103S /F_RB 0 C
008:AB29 RE I/O4 E +12V +24V_AUDIO
8 41 PCM_A[4] B Q104
/PF_OE
I2C R2206
SIGN489
CE NC_24 22 2SC3052 2K
R2561
008:AB29 9 40
/PF_CE0
OPT
+3.3V E IC107
3K
008:AB30 NC_7 NC_23 +5V_GENERAL R2203 LIPS PSU
10 39 C161 NCP803SN293 R2216
10uF 6.3V 2K R2218
NC_8 PRE 15K 30K
OPT
R157
11 38
1K RESET VCC
VCC_1 VCC_2 2 3
+5V_ST_PTC +5V_ST_PTC 12 37
1
R2106
EEPROM C131 0.1uF VSS_1 VSS_2 C162 0.1uF
R260
4.7K
R197
4.7K
4.7K
R2107 1.2K
R2108 1.2K
R2109 1.2K
R2110 1.2K
R266
4.7K
+3.3V OPT 13 36 GND R2217
OPT
R154 NC_9 NC_22 OPT 5.6K

R2544
1/10W
R2212
R2547
1/10W
1K 14 35 OPT
10K
10K
NC_10 NC_21
5%
5%
+3.3V 15 34 FE_TUNER_SDA EEPROM_SDA 008:G4;008:N14;008:AB28

+5V_GENERAL 008:AQ28;005:R24
009:Y8;011:M21 CLE NC_20 FE_TUNER_SCL EEPROM_SCL 008:G4;008:N14;008:AB28
IR 16 33 008:AQ29;005:R24
/PF_CE1 AR101
R153
008:AB22
10K
IC104 L105 IR_mstar ALE I/O3

L104 008:AB30 17 32 PCM_A[3]
R2548
1/10W
AT24C512BW-SH-T OPT C PF_ALE

100K
+3.3V_ST WE I/O2
0 008:AB29
5%
Q1405 B 18 31 PCM_A[2]
C R180 /PF_WE
R2127 A0 VCC 2SC3875S(ALY) R2100 0 008:AB28
1 8 4.7K 0 008:AB29 WP I/O1 005:AN21;010:B7
FE_DEMOD_SDA SDA0
C100 19 30 PCM_A[1]
R2545
1/10W
0 R118 R132 R2546 Q1406 B R258 FE_DEMOD_SCL R2101 0

0.1uF E 005:AN21;010:B9 SCL0
4.7K 4.7K 2SC3875S(ALY) 10K NC_11 I/O0
10K
R155
R2125 A1 WP PCM_A[0] 008:AB28

5%
2 7 OPT OPT OPT 20 29

R2549
1/10W
1K
Q101
100K
0
R2111
E
PF_WP NC_12 NC_19 22
R2126 A2 KRC103S 21 28 SDA_SUB/AMP R2104 0
5%
SCL 33 008:N14;008:AB28;008:AN6 003:E6;010:B8 SDA1 008:AR30

3 6 EEPROM_SCL 008:AB29 OPT NC_13 NC_18 R2105 0
SCL_SUB/AMP SCL1
22 27 003:E6;010:B10 008:AR30
GND SDA R2112 33 008:N14;008:AB28;008:AN6 NC_14 NC_17
4 5 EEPROM_SDA 23 26
NC_15 NC_16
24 25
Mstar IR

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 09.05.19
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR 37LH250H
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. KIM SUNG KYEONG MAIN IC 8 14
MSD2379AQ
b_LAN MPI pin3 power control
PTC +12V_C_MPI
PTC UPDATE
SW900 Switch port for b_LAN or MPI Card Communication lines

SKHMPWE010 R2324 R2335
1 2 330 330
UART_SWA bLAN_CTRL_PTC_1
5VST 012:AA5 R2332
3 4 330
R2325 bLAN_CTRL_PTC_0
R2291 012:O6 330 R2333
5%
1/10W
10K
R947
5
2.2K UART_SWB 330
R2300 bLAN_POWER_MANAGE
4.7K
SAM2333
A1[RD] R2323 5VST
LD904 C
A2[GN] 330
E
RJP 2N3906S-RTK
SAM2333 3.3K B Q910
5VST R2342 R948
A1[RD] 4.7K C
LD903 C R2322 R2338
A2[GN] 330 330
R2575
R2574
L902
BEXT_5V
200
R2343
200
5VST
1W
MLB-201209-0120P-N2
1W
OPT
1.2K
10K
10K
10K
10K
011:N25 LED_AM R2301 0
011:N25 LED_GR
R2302 0 C912
R2314 100 220pF
R2275
R2279
50V MPI_5V or 12V
R2276
R2281
R2283
C
R953
Q909 B 3.3K
b_com_PWCTRL
PAD15/AN15/KWAD15
PAD14/AN14/KWAD14
PAD13/AN13/KWAD13
PAD12/AN12/KWAD12
PAD11/AN11/KWAD11
PAD10/AN10/KWAD10
PAD09/AN09/KWAD09
PAD08/AN08/KWAD08
R2286 100 2SC3875S(ALY)
011:M8 RJP_CTRL4 1/10W 014:K21
R2287 100 C2158
RJP_CTRL3 0.22uF E 5%
011:M8 VCC1
R2288 100 25V
011:M9 RJP_CTRL2
R2289 100
011:M9 RJP_CTRL1 OPT
PP0/PW00
PP1/PW01
PP2/PW02
PP3/PW03
PP4/PW04
PP5/PW05
R2290 100
PM1/DA1
PM0/DA0
IC1203 011:M10 RJP_CTRL0 P1203 MPI_5V or 12V (PIN3) Select Control from b-LAN
FM24C16A
VDD1
VSS1
VSSA
GIL-G-02P
VRL
C2167 C2168
0.1uF 1uF 5VST
NC_1 VDD
R2267
R2268
C2150 50V 50V
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
1 8
10K
10K
0.1uF PM3 VRH

R2306 1 60 2
50V 0
NC_2 WP RXD2/PM4 2 59 VDDA
012:J8;012:Z7 PTC_DEBUG_RX
2 7
R2359
TXD2/PM5 3 58 PAD07/AN07/KWAD07
470K
012:D9;012:Q8 PTC_DEBUG_TX
R2303 0 SDA/PM6 PAD06/AN06/KWAD06 1K R2349 011:U24 1
4 57 KEY_CTL_0
NC_3 SCL SCL/PM7 PAD05/AN05/KWAD05
3 6 5 56
R2297 0 FAULT0/PQ0 PAD04/AN04/KWAD04 1K R2347 011:U24
6 55 KEY_CTL_1 R2357
R2284
VSS SDA 0 VCC1 VCC1 R2312 0 FAULT1/PQ1 7 IC1204 54 PAD03/AN03/KWAD03 0 R2348 100
C 5VST
4 5 R2309 0 FAULT2/PQ2 PAD02/AN02/KWAD02 0 R2346 R2361
SIDEAV_SW 8 53 MISO Q1112 B 4.7K
001:O26
OPT R2310 0 FAULT3/PQ3 MC9S12E128CFUE PAD01/AN01/KWAD01 C2170 BUFFERED_MPI_DIN
POWER_DET 9 52 009:N26 2SC3875S(ALY)
008:Z22;008:AR32;008:AR31;008:BC11;003:P6 R2296 0 VDDX PAD00/AN00/KWAD00 R2350 0 47pF 009:I14;014:S6
VCC1
R2362
R2285 10 51 50V 5VST
R2299
E
4.7K
10K 1uF 0.1uF VSSX VSS2 R2351 0
4.7K
10V 50V 11 50
R2356
OPT C2155 C2156 R2313 0 IS0/PQ4 VDD2 C2169 0.22uF
12 49
10K
MSTAR_POWER_ON RELAY_PTC IS1/PQ5 PS7/SS 0 R2340 R2363
13 48 100
004:AG4 R2280 R2293 004:E15;004:P27 IS2/PQ6
0 0 14 47 PS6/SCK R2358 MPI_DOUT
SCK
009:AD27 SCK MODC/TAGHI/BKGD PS5/MOSI 0 R2345 009:N27 100 009:I13;014:Y7
R2278 15 46 SPI_DATA_OUT
0 IOC04/PT0 PS4/MISO C
009:AE28 R2308 16 45 R2360 009:I13;014:Y14
MISO 0 4.7K
R2282 IOC05/PT1 17 44 PS3/TXD1 B Q1113
100 IOC06/PT2 PS2/RXD1 2SC3875S(ALY)
R2307 18 43 R2352
009:I12;014:S13
SPI_DATA_IN 0 0
IOC07/PT3 19 42 PS1/TXD0 C2171 E
PTC_TX
IOC14/PT4 PS0/RXD0 47pF
R2294 20 41 012:C8 50V
100 R2311 0
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
009:I12;014:Y13 SPI_CLOCK
R2353
0 PTC_RX_5V
12V_DCDC
IOC15/PT5
IOC16/PT6
IOC17/PT7
PW10/IOC24/PU0
PW11/IOC25/PU1
XCLKS/NOACC/PE7
ECLK/PE4
VSSR
VDDR
RESET
VDDPLL
XFC
VSSPLL
EXTAL
XTAL
TEST
PW12/IOC26/PU2
PW13/IOC27/PU3
IRQ/PE1
XIRQ/PE0
009:AS17 PTC_RX_5V
DCDC_EN 012:J7;012:K14
R2331 100 0
R2339 5VST
5VST
CM3216F100KE
R2318
0
L1224
R2271
22 009:G16
VCC1
10
R2295 5VST 12V_DCDC
R2354
4.7K
0.1uF
R2330
C2165 C2166 X900
1uF
C2151 C2152 2SA1530A-T112-1R
10uF 4.7K
0.1uF C2162 1uF 0.1uF 7.37280MHz
16V Q1108
50V E 1000pF 10V 50V SV VC
R2274 L1226 D1249
50V 6 1
C2157
4.7K C2163
C2160
10uH MBRM140T1G
0.01uF NC TRI-STATE
R2355
MLB-201209-0120P-N2
B
4.7K
50V R2344 5 2
10K 40V
C OUTPUT GND
4 3
R2341
8 SHIELD_PLATE R2336
10K
R2334
L1225
C2161
0 IC1206
220pF 100
6B 50V
LT3479EFE
T_TERMINAL2 R2265
R2383
1/10W
0 C2175
VCC1
200K
10uF
7B
5%
B_TERMINAL2 330 SW_1 GND_3 16V
R2270 1 16
R2305
5 T_SPRING R2266
10K
0 SW_2 GND_2
P1202 2 15
R2326
4 R_SPRING GIL-G-06-S3T2
L GND_1
C 3 14
0
7A B_TERMINAL1
Q1107 B
2SC3875S(ALY) 1 VS SS
6A T_TERMINAL1 4.7K 4 13
E R2273
3 E_SPRING 2 VIN VC
5 12
PEJ024-01
JK1206 3 RT FBN
6 11
009:Q27;009:S28;009:S28;009:T20;009:W23;009:AD31 R2315
0 R2364
R2381
5VST 4 0 SHDN FBP
10K
VCC1 7 10
DCDC_EN
R2365
009:N25 R2384
5 5VST C2172 22K
MLB-201209-0120P-N2
11K
GND VREF
+5V_ST_PTC
2.2uF 8 9
5VST 16V C2173 C2174
L1220 6 2200pF 0.01uF
R2366
5VST
L1221
MLB-201209-0120P-N2 50V 50V
6.8K
R2382
+12V 12V_DCDC
0
MBRA340T3G
MBRA340T3G
D1247
SMD Type R901 10K

D1246
SW901
R2269 SKHMPWE010
IC900 R902
0
40V
1 2
40V
KIA7042AF 1K
5VST
R2272
R900 0 O I R904 1K 3 4
3 1
330
CM3216F100KE
+12V_C 5
OPT
009:AJ28;014:S6 2 C901
R903
L1223
22K
0 R2555 C900 G 10uF
MLB-201209-0120P-N2
BUFFERED_MPI_DIN 16V
OPT
PTC_RESET
A2[GN]
A1[RD]
NON_bLAN
009:AO27;014:Y7
0 R2554
L1222
SAM2333
MPI_DOUT
OPT
LD900
P1201 NON_bLAN
009:AJ27;014:Y14 C2153
SMW200-11 10uF
0 R2552 16V
SPI_DATA_OUT
C
NON_bLAN C2154
009:N26;014:S13
12V 0.1uF
1 +12V_C 0 R2553
SPI_DATA_IN 50V
009:N25;014:Y13
NON_bLAN
GND 0 R2551
2 SPI_CLOCK
NON_bLAN 014:S6
R2252 R2262
BUFFERED_MPI 0 0
3 DUM_BUFFERED_MPI_DIN C
1/10W Q1109 B
5% R2259 R2263 014:R7
MPI_DOUT 0 0 2SC3875S(ALY)
4 DUM_MPI_DOUT
1/10W E
R2253 5% R2260 014:S14
SPI_DATA_OUT 0 0
5 DUM_SPI_DATA_OUT
1/10W
R2258 R2264 014:S12
R2298
R2304
5%
R2528
SPI_DATA_IN 0 0
100K
100K
6
10K
DUM_SPI_DATA_IN
1/10W
R2254 5% R2261
SPI_CLOCK 0 0 014:Y12
7 DUM_SPI_CLOCK
R2292
1/10W
100K
GND 5%
8
R2255
VCC 0
9
1/10W
5VST
5% R2257 009:M8 R2277
IR_IN_MODEM 0 100
10 IR_IN_MODEM IR_IN_MODEM 008:O6;011:M21
1/10W
R2320
1/10W
009:H8 IR
GAME CONT 5%
10K
11
5%
R2328
1/10W
C
100K
5%
Q1110 B
2SC3875S(ALY) C
4.7K
R2316
1/10W
R2317 Q1111 B
E
2SC3875S(ALY)
10K
to b_LAN IR input
5%
E
R2329
1/10W
100K
R2527
100
5%
b_IR_IN_MODEM
GND 014:N19;014:Y23
C
Q1403 B
2SC3875S(ALY)

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
37LH250H 09.05.19
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PTC&DCDC 9 14
FPGA
3.3V_Proidiom
+VCCINT_1.5V
FPGA POWER +VCCINT_1.5V
+3.3V
MLB-201209-0120P-N2
MLB-201209-0120P-N2
MLB-201209-0120P-N2
MLB-201209-0120P-N2
3.3V_Proidiom
MLB-201209-0120P-N2
MLB-201209-0120P-N2
MLB-201209-0120P-N2 L1231
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
L1232
L1233
L1234
L1235
L1227 L1230
L1236
0.01uF
0.01uF
0.1uF
010:T25;010:AJ26
0.1uF
3.3V_Proidiom +VCCINT_1.5V
1uF
MLB-201209-0120P-N2
1uF
C2193
C2194
C2195
C2196
C2197
C2198
C2199
C2200
C2201
C2202
C2203
C2204
C2205
C2206
C2207
C2208
C2209
C2210
C2211
C2212
C2213
C2214
C2215
C2216
C2217
C2218
16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V16V
C2186 C2189
MLB-201209-0120P-N2 3.3uF 3.3uF
C2187
C2188
C2192
C2190
C2191
L1228
C2185
16V
50V 16V 16V 16V 50V
3.3V_Proidiom
VCCA_PLL2
VCCA_PLL1
GNDG_PLL2
GNDA_PLL2
GNDG_PLL1
GNDA_PLL1
VCCINT_12
VCCINT_11
VCCINT_10
R2424 0
VCCIO2_4
VCCIO2_3
VCCIO2_2
VCCIO2_1
VCCIO3_3
VCCIO3_2
VCCIO3_1
VCCIO4_4
VCCIO4_3
VCCIO4_2
VCCIO4_1
VCCIO1_3
VCCIO1_2
VCCIO1_1
VCCINT_9
VCCINT_8
VCCINT_7
VCCINT_6
VCCINT_5
VCCINT_4
VCCINT_3
VCCINT_2
VCCINT_1
IO2_40
IO2_39
IO2_38
IO2_37
IO2_42
IO2_35
GND_26
GND_25
GND_24
GND_23
GND_22
GND_21
GND_20
GND_19
GND_18
GND_17
GND_16
GND_15
GND_14
GND_13
GND_12
GND_11
GND_10
R2418 OPT 0
GND_9
GND_8
GND_7
GND_6
GND_5
GND_4
GND_3
GND_2
GND_1
OPT
C2177 C2219
100uF 62pF
16V 50V
E5
E6
D5
D6
B5
B6
H11
H6
J12
J11
J5
J6
T16
T12
T5
T1
L11
L9
L8
L6
K10
K8
K6
J9
J7
H10
H8
G11
G9
G7
F11
F9
F8
F6
A12
A5
A16
A1
A3
F7
F10
A14
C16
K11
P16
T14
L10
L7
T3
P1
G6
C1
T10
T7
K9
K7
J10
J8
H9
H7
G10
G8
A10
A7
CLK1 IO4_34/CH_CLK R2441 100 008:AP25
005:AN19 TS_CLK H1 R11 PM_TS_CLK
TS_VALID IO2_29/TP_SOP B8 R8 IO4_20/CH_VALID R2442 100 008:AP25
005:AN19 PM_TS_VALID
TS_SYNC IO2_21/TP_VALID B9 R9 IO4_26/CH_SOP R2443 100 008:AP25
005:AN19 PM_TS_SYNC
IO2_17/TP_ERR B10 R10 IO4_30/CH_ERR R2444 100
005:AF17 TS_0 TS_0 IO2_41/TP_DATA[7] C5 P5 IO4_8/CH_DATA[0] PM_TS[0]

TS_1 IO2_36/TP_DATA[6] IO4_13/CH_DATA[1] PM_TS[1]
005:AF17 TS_1 C6 P6
005:AF17 TS_2 C7 P7
005:AF17 TS_3 C8 P8
RESET 3.3V_Proidiom 005:AF16 TS_4
TS_4
TS_5
IO2_23/TP_DATA[3] C9 P9 IO4_28/CH-DATA[4] PM_TS[4]
005:AF16 TS_5 IO2_18/TP_DATA[2] C10 P10 IO4_33/CH_DATA[5] PM_TS[5]

OPT 005:AF16 TS_6 C11 P11
1N4148W TS_7 IO2_8/TP_DATA[0] IO4_41/CH_DATA[7] PM_TS[7]
R2390 D1250 005:AF16 TS_7 C12 P12
10K OPT 008:AP22;005:AM26 IO1_29 IO2_34
010:Q17 R2393 M1 E7
100 VSB_RESET IO1_2 IO2_33
C3 A6
FPGA_RESET
OPT IO1_3 C2 B7 IO2_32 008:AP27
C2179
R2563
OPT IO1_4 IO2_43

4.7K
R2394 008:AB21 B1 A4
1uF PM_TS[0-7]
25V 100 10K IO1_5 G5 D7 IO2_30
SYS_RESET
R2422 IO1_6 F4 A8 IO2_28
R2564
IO1_7 D3 E8 IO2_27
GND
OPT
100
IC1210 3.3V_Proidiom IO1_8 IO2_26

MAX809RTR 3.3V_Proidiom 3.3V_Proidiom
0 IO1_9
IO1_10
E4
F5
IC1209
D8
B4 IO2_44
IO2_24
INNER LAYER PATERN
R2420 E3 E10
RESET 2 3 VCC IO1_11 IO2_45
R2406 10K D2 C4
IO1_12 IO2_22
1
GND C2255
1uF
25V
010:C12 DE_H_SYSCLK
OPT
CLK0
IO2_48/RESET
E2
G1
B2
LGDT1129 D9
A9
D10
IO2_20
IO2_19
OPT 010:B19 FPGA_RESET R2415 22 IO3_37/I2C_SCK D14 A11 IO2_16
MSCL_3.3V R2416 22 IO3_34/I2C_SDA E14 B11 IO2_15
MSDA_3.3V R2417 22 DCLK K4 B3 IO2_46
CONF_DONE K13 D11 IO2_13
R2412 10K NCONFIG IO2_12
H3 D12
R2413 10K NCE IO2_11
J4 E9
R2414 10K DATA0 IO2_10
H2 E11
27MHz 3.3V_Proidiom IO1_21SO G4 E12 IO2_9
3.3V_Proidiom IO1_22/ASDO IO2_47
K3 A2
NCEO H4 B12 IO2_7
R240910K NSTATUS IO2_6
J13 A13
MSEL0 J3 B13 IO2_5
X1006 MSEL1 J2 C13 IO2_4
27MHz TCK IO2_3
J14 B14
TDO H15 A15 IO2_2
6 1
TMS J15 B15 IO2_1
C2176 C2178 5 2 TDI IO3_43
H14 D13
10uF 0.1uF
IO1_1/INIT_DONE D4 C14 IO3_42
16V 16V 4 3 IO1_13 D1 C15 IO3_41
R2408 10K R2421 IO1_14 F3 B16 IO3_40
1K 0 IO1_15 IO3_39
G3 G12
R2402 IO1_16 F2 H13 IO3_38
R2387 22
010:Q17 DE_H_SYSCLK 1K IO1_17 IO3_36
E1 E13
R2403 IO1_18 G2 F12 IO3_35
1K IO1_19 IO3_33
F1 D15
R2404 IO1_20 H5 D16 IO3_32
IO1_23 J1 E15 IO3_31
R2405 OPT IO1_24 K2 E16 IO3_30
IO1_25 L3 F15 IO3_29
GND IO1_26 IO3_28
I2C R2419
0 IO1_27
K1
L1
F13
F14 IO3_27
3.3V_Proidiom IO1_28 IO3_26
+5V_GENERAL L2 F16
SCL_SUB/AMP
IO1_30 N1 G15 IO3_25
008:AI4;003:E6
IO1_31 M2 G13 IO3_24
R2385
R2391
OPT
1K
R2397
IO1_32 N2 G14 IO3_23

10K
IO1_33 IO3_22
0
M3 H12
R2423 IO1_34 CLK2 R2435 0
0 R2446 L5 G16
MSCL_3.3V D 0 IO1_35 CLK3 R2436 0
M4 H16
B
M10
T11
N10
N11
N12
M11
M12
R12
T13
R13
R14
P13
T15
R15
N13
P14
P15
R16
N15
N16
K12
K14
L12
N14
M13
M14
L13
M15
M16
L14
L15
L16
K16
K15
J16
0 R2447
N3
K5
L4
R1
P2
P3
N4
R2
T2
R3
P4
R4
T4
R5
M5
M6
N5
N6
R6
M7
T6
R7
N7
T8
M8
N8
T9
N9
M9
FE_DEMOD_SCL S G
Q1114 R2399 R2401
008:AI5;005:AN21 BSS83 0 0
C2180
IO1_36
IO1_37
IO1_38
IO1_39
IO1_40
IO1_41
IO1_42
IO4_1
IO4_2
IO4_3
IO4_4
IO4_5
IO4_6
IO4_7
IO4_9
IO4_10
IO4_11
IO4_12
IO4_14
IO4_15
IO4_16
IO4_17
IO4_19
IO4_21
IO4_22
IO4_23
IO4_25
IO4_27
IO4_29
IO4_31
IO4_32
IO4_36
IO4_37
IO4_38
IO4_39
IO4_40
IO4_42
IO4_43
IO4_44
IO4_45
IO4_46
IO4_47
IO4_48
IO3_1
IO3_2
IO3_3
IO3_4
IO3_5
IO3_6
IO3_7
IO3_8
IO3_9
IO3_10
IO3_11
IO3_12
IO3_13
IO3_14
IO3_15
IO3_16
IO3_17
IO3_18
IO3_19
IO3_20
IO3_21
3.3V_Proidiom 0.1uF
16V
SDA_SUB/AMP OPT
R2431 0
008:AI4;003:E6
R2386
R2392
R2426
OPT
0
10K
0
0 R2448 R2425 0
MSDA_3.3V D
B
0 R2449
FE_DEMOD_SDA S G
Q1115
008:AI5;005:AN21
BSS83
C2181
0.1uF
16V
OPT

37LH250H
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FPGA 10 14
IR & LED & CONTROL
P1100
12507WS-12L
+5V_ST_PTC
R1104
LED_B 0
1 LED_GR 009:R32
R1105
LED_R
R1110
R1113
0
2
4.7K
4.7K
LED_AM 009:R33
D1101 L1103
D1102 50V 50V BG2012B080TF R1115
GND UDZS5.1B
5.1V UDZS5.1B 1000pF 1000pF 100
3 KEY_CTL_0
5.1V C1102 C1104
009:AD29
L1104 R1116
KEY1 BG2012B080TF 100
4 KEY_CTL_1
009:AD28
KEY2
5 +5V_ST_PTC
L1102
CB3216PA501E
5V_ST
6
ZD1110
0.1uF
0.1uF
C1103
C1105
C1106 C1108
5.6B ZD1112 0.1uF
GND 1000pF
7 5.6B 50V 16V
NC
8
L1100
IR BG2012B080TF
9 IR
C1101 008:O6;009:Y8
ZD1111
GND 100pF
10 5.6B 50V
NC
11
NC
12
13
GND
RJP
+12V
Q1118
SI4925BDY
L1237
MLB-201209-0120P-N2 S1 D1_2
1 8
R2471 2K
R2560 2K
C2230
OPT G1 D1_1 47uF R2476
C2220 C2221 C2222 C2223 C2224 10K
C2256 2 7 25V
47uF 47uF 0.01uF 47uF 0.01uF
25V 4.7uF
25V 25V
R2470 25V S2 D2_2
10K 3 6
R2474
R2472 100K
5.1K G2 D2_1
JK1100 4 5
MJ-657PT-8-SD R2473
5.1K
1
1
R2466 100
2
2 RJP_CTRL0 009:N30
R2467 OPT
3 R2464 100
3 RJP_CTRL1 009:N31
4 R2468 100
4 RJP_CTRL2 009:N31
5 R2465 100
5 RJP_CTRL3 009:N31
6 R2469 100
6 RJP_CTRL4 009:N31
7
7
8
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
8
5.1V
5.1V
5.1V
5.1V
5.1V
9
ZD1105
ZD1106
ZD1109
ZD1107
ZD1108
C2225
C2226
C2229
C2227
C2228

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR 37LH250H
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR&RJP 11 14
TUNER
UART R925 OPT
+5V_ST_PTC +5V_ST_PTC
R927
22K
R922
22K
Q903
2SC3875S(ALY)
C
Q902
R923 1K B Serial Port
2SC3875S(ALY)
C
E
R917 10K B
012:C9 PTC_TX_1
+5V_ST_PTC
+5V_ST_PTC
R928
22K
R921
22K Q904
2SC3875S(ALY)
C +5V_ST_PTC
+5V_ST_PTC R924 1K B
+3.3V_ST IC902
Q901
ST3232CDR
2SC3875S(ALY)
C E P900
KCN-DS-1-0088
R912 10K B C1+ VCC
C907
009:AF25;012:J7 PTC_RX_5V 1 16 0.1uF
C904 1
C903 0.047uF V+ GND 6
R2522 +3.3V_ST E 2 15 RxD
R2521 2
4.7K 4.7K 0.33uF 7
C1-
3 14
T1OUT R932 100
3
Q1200 C906 8
BSS83 C2+
4 13
R1IN R934 100 4
D C909 C910 9
012:J8 0.33uF 220pF

PTC_RX_MSTAR_5V B C2-
5 12
R1OUT R935 0 5
10
S G 220pF
008:AQ27 PTC_RX_MSTAR C905 0.33uF V- T1IN R933 100
6 11
D900 D901
SDC15 SDC15
A1 A1
GND T2OUT
7 10
T2IN
C C
A2 A2
R2IN R2OUT
8 9
+5V_ST_PTC
L900
MLB-201209-0120P-N2
C902
IC901 0.1uF
MC14053BDR2G
IC903 +5V_ST_PTC
R910 0 Y1 VDD MC14053BDR2G
009:Q29;012:Q8 PTC_DEBUG_TX 1 16
L901
OPT Y1 VDD MLB-201209-0120P-N2
R909 0 Y0 Y R913 0 R930 100
2 15 008:AB27 MSTAR_TX 1 16
012:K17 PTC_TX_1 PTC_TX_MSTAR 008:AQ28
R955 Z1 X R914 Y0 Y C908

0 0 R931 100 2 15
3 14 PTC_RX_MSTAR_5V 012:D13 009:Q29;012:D9PTC_DEBUG_TX 0.1uF
009:AF26 PTC_TX
R907 0 OPT
R956 100 Z X1 R915 0 Z1 X
4 13 3 14
RX_G6 PTC_DEBUG_RX 009:Q29;012:Z7
008:AO31
R958 0 OPT
OPT +5V_ST_PTC Z X1
R957 0 Z0 X0 R916 0 009:AF25;012:K14 R939 100
5 12 4 13 MSTAR_RX 008:AB27
PTC_RX_5V
OPT OPT
TX_F5
INH A Z0 X0 R940 100
6 11 R918 100 0 R959 008:AR32 5 12
R926 PTC_DEBUG_RX009:Q29;012:J8
10K
VEE B INH A R936 100
7 10 R919 100 6 11 +5V_ST_PTC
C
VSS C VEE B R937 100
8 9 R920 100 Q905 B R929 1K 7 10
UART_SWB 009:W35 R941
OPT 10K
2SC3875S(ALY)
E +5V_ST_PTC VSS
8 9
C R938 100
+3.3V_ST
C
Q906 B R942 1K
UART_SWA
2SC3875S(ALY) 009:W36
E
R1200 R1201 +3.3V_ST
4.7K 4.7K
Q1201
BSS83
D
B
S G
GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. UART 12 14
USB JACK (DOWN LOAD ONLYU)
+3.3V
+5V_EXT
IC1304 R2515
MIC2009YM6-TR
4.7K
VOUT VIN
6 1
ILIMIT GND
5 2
C2249
C2251 C2252 USB_CTL C2248 0.1uF
R2513
FAULT/ ENABLE
47uF 47uF 4 3 10uF
10V
180
10V 10V R2518
10K
CB3216PA501E
R2514
L1300
47 USB_OCD
P1207
SIGN799
KJA-UB-4-0004
1
USB DOWN STREAM
008:AR34
2
USB_DM
008:AR34
3
USB_DP
4
5
D1304
D1305
ADMC5M03200L ADMC5M03200L
5.6V 5.6V
USB +5V Over Current Protection --> USB Jack

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB JACK 13 14
TUNER
B-LAN JIG WAFER B-LAN POWER
P1405 5VST_JIG
BLAN CHECK
12505WS-15A00 5VST 5VST
TU1002 L1404 +5V_BLAN

NC MLB-201209-0120P-N2
TMMB-H001P(W/O Tuner) 1
Q507
P1400 bLAN_CHECK_5V SI4925BDY
YFDW254-06S 014:Y21 5VST_JIG
GND BLAN CHECK
RF_OUT[NC] 2
1 S1 1 8 D1_2
R630 +12V_C_MPI
22K C801 C802
R629
GND_1 R2529 0 R2568
22K
2 1 2 MPI IN0 2.2uF 100uF
3 25V G1 2 7 D1_1
b_MPI_DIN 16V
+3.3V +5V_BLAN 014:K21;014:S7 bLAN_CHECK_5VON
R2566
OPT
3 014:Y22
R2530 R2569
0
10K
TSCL 3 4 MPI OUT
0 S2 3 6 D2_2
4 4 b_MPI_DOUT R631
L502
TSDA MLB-201209-0120P-N2 014:K21;014:S7 2.2K
2SC3875S(ALY)
5 R2570 G2 4 5 D2_1
5 6 PM4 C
GND_2 5
0 R2567 Q506
b_SPI_DATA_OUT 0
6 014:K20;014:S14 B
bLAN_POWER_MANAGE
R2571
R1093
IF_AGC C1411 C1412 C1413 R628
OPT
7 100uF PM2 0 009:AA35;014:AD19 47K
0.22uF 100uF 6 b_SPI_DATA_IN
16V E
0
DIF-P 50V 16V
8 014:K20;014:S13 C1906
R2572 22uF
DIF-N PM1 0 25V
9 7 b_SPI_CLOCK
+5V 014:K20;014:Y13
10
GND
GND_3 8
11 +12V_C +12V_C
JK1400
JP2-P1 PEJ024-01
12 NC
9
JP2-P4 E_SPRING 3
13
R1418 R2573
J1-P2 0 T_TERMINAL1 6A
PTO 0
14 10 C1903 C1904
b_IR_IN_MODEM
R1414 2.2uF 47uF
J1-P3 0 B_TERMINAL1 009:M6;014:N19 25V
15 7A 25V
R1413 NC R1909
J1-P4 11 5VST_JIG 47K
0 R_SPRING 4
16 BLAN CHECK
R1415
J1-P5 0 T_SPRING
17 5 5V ON
12
R1905
R1416 bLAN_CHECK_5VON
PTS R2519 0 R1910
47K
0 B_TERMINAL2 bLAN_CHECK_12VON
D1405
18 014:AF25
D1404
5.6V D1407
7B
D1406
b_com_PWCTRL 009:BA31
OPT
R2565
014:Y21 47K
JP1-P3 R1417 12V ON
R1409 0
10K
19 0 T_TERMINAL2 6B
13 bLAN_CHECK_12VON
b_MPI_DIN
014:S7;014:Y26
2SC3875S(ALY)
5.6V
5.6V
OPT 5.6V
JP1-P4 R1402 0 014:AD20 Q908 C
20 014:S7;014:Y26
b_MPI_DOUT SHIELD_PLATE 8 R1904
5VST
14 47K B
OPT
JP1-P5
OPT
0
OPT
R1403 bLAN_CHECK_5V bLAN_POWER_MANAGE
21 b_SPI_DATA_OUT
014:S14;014:Y25 R1906
014:AF26 009:AA35;014:AF24
JP1-P6 R1404 0 0
22 GND NC E
014:S13;014:Y25
b_SPI_DATA_IN 15
JP1-P7 GND
R1405 0
23
R2537
b_SPI_CLOCK
014:Y24;014:Y13
OPT
JP1-P10 ***Lines is same length as Possible as 16
22K
24 0
R1400
J2-P1 009:M6;014:Y23
b_IR_IN_MODEM
25 GND
J2-P2
26
R2562
R2539
J2-P3 GND
27 0
OPT
0
J2-P4
OPT
28
J2-P6
29
30
SHIELD
BEXT_5V
R1410 0
BEXT_MPI_OUT 014:J11
GND R1407 0
BEXT_MPI_DIN 014:J10
L1401 MLB-201209-0120P-N2
R1406 0
BEXT_Game_Control_Latch 014:J9
B-LAN ON/OFF Control

R1401 0
BEXT_IR_MODEM
014:J8
+5V_ST_PTC
IC1401 L1403
+5V_ST_PTC
MC14053BDR2G
C1415 MLB-201209-0120P-N2
0.1uF
R1463
Y1 VDD
R1466
R1434 0 1 16
014:K20;014:Y25
b_SPI_DATA_OUT
10K
10K
R1435 0 Y0 Y R1454 0
009:K10 DUM_SPI_DATA_OUT 2 15 009:I13;009:AJ27
SPI_DATA_OUT R1462 0
bLAN_CTRL_0
R1436 0 Z1 X R1453 0 014:Y12 C
b_SPI_DATA_IN 3 14 009:I12;009:N25
SPI_CLOCK
014:K20;014:Y25
Q1402 B R1464 4.7K R1467 0
R1465
R1437 0 Z X1 R1452 0 bLAN_CTRL_PTC_0
4 13 014:K20;014:Y24
b_SPI_CLOCK
SPI_DATA_IN
009:I12;009:N26 2SC3875S(ALY) 009:AA35
E
OPT
R1438 0 Z0 X0 R1451 0
009:K10 DUM_SPI_DATA_IN 5 12 DUM_SPI_CLOCK 009:K9
POWER LINE
0
INH A R1448 0
6 11
VEE B R1449 0
7 10 bLAN_CTRL_0
BEXT_5V
VSS C R1450 0
b_LAN MPI JACK 8 9
+5V_ST_PTC
JK1401
R2532
R2535
MJ-623PT-6-S-SD
10K
10K
R2531 0
1 bLAN_CTRL_1
BEXT_MPI_OUT 014:L17 014:Y5 C
Q1404 B R2533 4.7K R2536 0
R2534
2 bLAN_CTRL_PTC_1
BEXT_MPI_DIN 014:L17 +5V_ST_PTC 2SC3875S(ALY) 009:AA36
E
OPT
***MPI_OUT bypass
3
0
IC1400 L1402
4 MC14053BDR2G
BEXT_Game_Control_Latch 014:L16 MLB-201209-0120P-N2
C1414
0.1uF
R1419 0 Y1 VDD
014:K21;014:Y26 1 16
5 b_MPI_DOUT
009:K11 R1420 0 Y0 Y R1431 0

2 15 MPI_DOUT
DUM_MPI_DOUT
6 BEXT_IR_MODEM 009:I13;009:AO27
014:L15 R1421 0 Z1 X R1430 OPT 0
5.6V
3 14
D1402 5.6V
D1403 5.6V
b_MPI_DIN
014:K21;014:Y26
OPT 5.6V
30V
7
R1422 0 Z X1 R1429 OPT 0
D1408
D1400
OPT
D1401
OPT
4 13
OPT
OPT
009:I14;009:AJ28
BUFFERED_MPI_DIN
R1423 0 Z0 X0 R1428 OPT 0

5 12
DUM_BUFFERED_MPI_DIN
009:K11 INH A R1425 0
6 11
VEE B R1426 0
7 10
bLAN_CTRL_1
VSS C R1427 0
8 9
R2538
10K
OPT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. B-LAN 14 14
TUNER

LG 32LH240H Chassis LA96A

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LG 32LH240H Chassis LA96A

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 32LH240H 32LH240H-UA

P/NO : MFL62195506 (0912-REV00) Printed in Korea

PRODUCT SAFETY ................................................................................. 3

ADJUSTMENT INSTRUCTION .............................................................. 10

TROUBLE SHOOTING .......................................................................... 17

EXPLODED VIEW .................................................................................. 25

SVC. SHEET ...............................................................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

always perform an AC leakage current check on the exposed

1. Application Range 3. Test method

1) Temperature : 25 5C (77 9F), CST : 40 5C

11 Contrast ratio 800:1 1200:1 37LH2X0H-UA

800:1 1200:1 42LH2X0H-UA

12 Bright Uniformity 77 % Full white

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

7. RGB input (PC)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

8. HDMI input (PC/DTV)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

No Item Min Typ Max Unit Remark

Caution : When still image is displayed for a period of 20 2

3. Method of PTC MICOM Download

6. Push the Save Image to Cyclone PRO button, files

c. Select PTC Software.

4. Click Connect tab.

d. Select downloading file. (*.s19)

Please Check the Speed :

5. Click Auto tab and set as below

4. Completed selecting Tool option

4.1.2 Equipment & Condition

4.1.3.2 Adj. protocol

Protocol Command Set ack

Enter adj. ad 00 00 d 00 OK00x

Return adj. OKx (Success)

result NGx (Fail)

Read adj. (main) (main)

Confirm adj. ad 00 99 NG 03 00x (Fail)

5. Updating Completed, The TV will restart automatically. OK 03 03x (Success)

Model : 60 in Pattern Generator

Adjustment pattern (PC)

Adjust by commanding AUTO_COLOR_ADJUST.

5.2 COMPONENT input ADC

5.4 EDID(The Extended Display Identification Data)

5.2.2 Confirmation 5.4.2 Equipment

HDMI I [C/S: 1DBA]

* If TV internal pattern is used,not needed

RGB [C/S: 71FF] 6.1.4 Adj. Command (Protocol)

START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A STOP

- LEN: Number of Data Byte to be send

RS-232C COMMAND Explanation

6. Final Assembly adj. Wb 00 1f End Gain adjust

Adj. condition and cautionary items

Check inverter control & error No

Check Component Cable.

Check RGB Cable conductors for

Check AV Cable for damage or open conductor.

Check HDMI Cable conductors for

10. Analog TV Audio

Only for training and service purposes

LG Electronics. Inc. All right reserved.