Documente Academic
Documente Profesional
Documente Cultură
As of mid-2004, billion-transistor
processors are not yet economically
feasible for most uses, but they are
achievable in laboratory settings, and they
are clearly on the horizon as
semiconductor fabrication moves from the
2. Wafer processing layers and then is removed.
The silicon crystal (in some cases also 4.Oxide growth and removal
containing doping) is manufactured as a
cylinder (ingot) with a diameter of Oxide can be grownfrom silicon through
8-12 inches(1=2.54cm). heating in an oxidizing atmosphere
This cylinder is carefully sawed into Gate oxide, device isolation
thin(0.50-0.75 mm thick) disks called Oxidation consumes silicon
wafers, which are later polished and
marked for crystal orientation. SiO2is depositedon materials other than
silicon
3.Lithography through reaction between gaseous silicon
compounds and oxidizers
Lithography: process used to transfer Insulation between different layers of
patterns to each layer of the IC metallization
Printing: transfer the mask pattern to the Doping materials are added to
wafer surface Change the electrical characteristics
of silicon locally through:
Process the wafer to physically pattern Diffusion: dopants deposited on silicon
each layer of the IC. move through the lattice by thermal
diffusion (high temperature process)
(a).Photo resist application: Wells
the surface to be patterned is Ion implantation: highly energized donor
spin-coated with a light-sensitive or acceptor atoms impinge on the surface
organic polymer called photoresist and travel below it
The patterned SiO2serves as an
(b)Printing (exposure): implantation mask
the mask pattern is developed on the Source and Drain regions
photoresist, with UV light exposure
6. Annealing
depending on the type of
photoresist(negative or positive), the Thermal annealing is a high temperature
exposed or unexposed parts become process which:
resistant to certain types of solvents allows doping impurities to diffuse further
into the bulk
(c)Development: repairs lattice damage caused by the
the soluble photo resistis chemically collisions with doping ions
removed
8.Metallization
9.Testing
Fabrication
6, 8, 12 wafers
Packaging
Limitations
Placement Issues
Development Tools
Conclusion
The demand for low power VLSI digital
circuits in the growing area of
portable communications and computing
systems will continue to increase in
the future. Cost and life cycle of these
products will depend not only on low
power synthesis techniques but also on
new DFT methods targeting power
minimization during test application. This
is because the traditional DFT
methods are not suitable for testing low
power VLSI circuits since they reduce
the reliability and manufacturing yield.
References
en.wikipedia.org/wiki/VLSI_Technology
www.ieee.org
www.epfl.ch
Principles of CMOS VLSI Design
Neil H.E.Weste
Kamran Eshraghian