NEW YORK CITY COLLEGE OF TECHNOLOGY

THE CITY UNIVERSITY OF NEW YORK

Department of Computer Engineering Technology
300 Jay Street, Brooklyn, NY 11201-1909

EMT 1250 Fundamentals of Digital Systems Fall 2017

4 Credits, 3 Class Hours, 3 Lab Hours

Course Students learn how to implement and analyze control

Description and functions and arithmetic operations using digital ICs.
Objectives: Computer techniques are used to simulate systems and also
for troubleshooting. Laboratory problems are solved through
the synthesis, bread-boarding and testing of such systems.
State-of-the-art integrated circuits are used by students
working with their individual digital trainers.
Instructor: Robert Armstrong Office: V623
Office Hours: Monday 5 7 PM and Tuesday/Thursday 1:30-
2:30 PM
Email: rarmstrong@citytech.cuny.edu
Dept. Tel: 718-260-5885
Prerequisites: EMT 1150, EMT 1130, and EMT 1111

Co-requisites: EMT 1250L

Text book: Digital Systems: Principles and Applications, 12th edition by

Tocci,
Widmer, and Moss, ISBN# 13: 9780134220192

Lab Text: Lab instructor will provide the experiments on Blackboard.

Students must print out and bring the sheets to lab.
References: The Science of Electronics: Digital By T. Floyd, D. Buchla
published by Pearson Prentice Hall ISBN# 0-13-087549-X
Digital Electronics, 10th. Ed.by R. Tocci published by
Prentice Hall, 2006.
Computer Usage: The students simulate lecture and lab assignments on the lab
computers using Alteras Quartus II V9.1.
Oral and Written Students write lab reports for every experiment. Lab report
Communication submission deadline is exactly one week after the lab session
Requirements: but students are encouraged to submit the report within a
couple of days after completing the lab. There will be a 20%
late penalty for submitting a report one week late. No report
will be accepted after two weeks of the respective lab
session.
Course understand the logic functions (AND, OR, NOT, and so on)
Learning through building simple circuits on their own digital
Outcomes: trainer.
understand the concept of active levels and identify active
LOW and HIGH terminals of logic gates.
Students will be familiar with the difference between
analog and digital, number systems, and pulse waveforms.
Students should understand logic gates and their
integrated circuits, truth tables, and be able to use
Boolean algebra and Karnaugh mapping to simplify
combinational logic circuits developing their basic skills of
problem solving and critical thinking by solving basic
problems.
Students should be familiar with BCD and ASCII codes,
decoders, encoders, multiplexers, demultiplexers, shift
registers, PLDs, PAL, GAL, CPLDs, FPGAs, PLD
Programming, and Intro to VHDL.
Students should be able to describe the operation of, and
build latches, flip-flops, binary and decade counters. They
will be familiar with frequency division, how a counter is
decoded, and the basic operation of a digital clock.
Students will learn how to wire digital circuits, use lab
equipment, test
And troubleshoot circuits, They will write lab reports, and
perform
computer simulations in lab for problem solving. They will
develop
team skills by working in small teams.
 be familiar with Altera's Quartus II software to design and
simulate simple combinational circuits.
encode Boolean expressions and truth tables in VHDL
using concurrent signal assignment statements.
program Altera DE2 board with their schematic and VHDL
designs.
Students should be able to understand, analyze, and safely
use basic electrical and
electronic circuits/systems and electromechanical devices.
Students should be able to troubleshoot and fix problems
in electrical
circuits/systems and electromechanical devices.
Students should be able to develop skills to use the tools
and instruments to build
electromechanical devices.
Students will be able to be proficient in oral and written
communication skills using appropriate technology.
Students will demonstrate the ability to integrate, analyze,
and build systems using multi-disciplinary technology
Library Usage: Students are strongly encouraged to use the library and
Internet as a supplement to the lectures and textbook. In
particular, they are urged to browse through the popular
scientific journals and electronics magazines for recent
developments in digital applications, such as new computer
related products.
Grading Policy Lecture 75%
Lab 25%
(Note: Department policy states that an F in EMT 1250L
fails you for the entire EMT 1250 Course)

The final grade will be determined as follows:

Midterm 20%
Final (Cumulative) 30%
EMT 1250L 25%
Quizzes 20%
Class Participation 5%

Withdrawal Date: 11-09-17

Homework, Homework is a great preparation for quizzes and tests, and will
Quizzes and affect your Class Participation grade. All students will be asked
Exams questions in class and will be assigned problems to put on the
board. Cell phone ringing and any other distracting behavior
will affect this grade. Neither food nor drinks are allowed in
class. Quizzes will be given weekly and at the beginning of
class. They will cover the previous sessions lecture and
homework assignment. There will NOT be any make-ups. So
please, be there and be on time.

Attendance Under CUNY mandate, attendance in EACH class and lab is

Policy REQUIRED and attendance WILL be taken at each class and lab
meeting. You are allowed a MAXIMUM of 2 absences. If you
exceed that number, you may receive a WU grade. EXCESSIVE
LATENESS (more than 5 minutes) will be considered to be an
absence from that class meeting.
It is understood that sometimes things happen and a student
will not be penalized with a documental proof if the student
has an excused absence (such as doctors appointment).
Academic Students and all others who work with information, ideas,
Integrity Policy texts, images, music, inventions, and other intellectual
Statement property owe their audience and sources accuracy and
honesty in using, crediting, and citing sources. As a community
of intellectual and professional workers, the College recognizes
its responsibility for providing instruction in information
literacy and academic integrity, offering models of good
practice, and responding vigilantly and appropriately to
infractions of academic integrity. Academic dishonesty is
prohibited in The City University of New York and is punishable
by penalties, including failing grades, suspension, and
expulsion. Some examples of academic dishonesty are
cheating, plagiarism, Internet plagiarism, obtaining unfair
advantage, falsification of records and official documents, and
collusion.

Helpful Hints: 1) You may get assistance in the Tech Learning Center.
2) Students who are failing should consider officially
withdrawing on or before the Withdrawal Date to avoid an F
or WU grade.
3) Study in groups. Studies have shown that students who
study in this manner perform better in all of their classes. SO
MAKE FRIENDS.
4) Do your homework and seek help immediately for any
difficulties that arise. Dont wait until the night before the work
is due.
5) Dont expect every concept to be crystal clear after a single
reading. More than one reading of a section may be necessary.
6) Work through the example problems step by step before
trying the related problems.
7) Review the chapter Summary and equation list. Take the
multiple choices self-test.
Class Schedule
Week LectureTopics Reading Homework Lab Experiments
Assignment Problems
1 Introduction and Chapter 1 1,3,6,711,13 0. Introduction
motivation p. 3-32. a,15, *Digital Trainer
17,19, and *Lab Kit
Ch 1: Introductory 22. *Equipment
Concepts
2 Ch 2: Number Chapter 2 1ac,2ac,3a,4 1. Logic probe and
Systems and p. 37-61. ac, oscilloscope
Codes 5ac,6g,7c,11
c,
12c,19c,21a,
25,
27a, and
28b.
3 Ch 3: Describing Chapter 3 1a,6a,7,8,12 2. Basic Logic
Logic p. 69-114. a, Gates
Circuits 14a,17a,19,2
3,
24a,26a,27,
35abc, and
40.
4 (Continue Ch 3) 3. NAND and NOR
Gates

5 Ch 4: Combinational Chapter 4 1abcd,3,8, 4. Combinational

logic p. 137-181 11ab,14abc, Logic
Circuits 18,20a,24,28 Circuits
,
34, and 36.
6 (Continue Ch 4) 5. Universal
Capability of
NAND/NOR Gates
(Begin)
7 (Continue Ch 4) 5. Universal
Capability of
 NAND/NOR Gates
(Complete)
8 Midterm Exam 6. Quartus
II Tutorial and
DE2 Board

9 Ch 5: Flip-Flops and Chapter 5 8,11,13a,15a 7. Binary Adders

Related p. 237-294 ,
Devices 17a,18,20,
30a-13, and
33abc.
10 (Continue Ch 5) 8. Magnitude
Comparators

11 Ch 6: Digital Chapter 6 1a,2ab,3ab, 9. Seven-Segment

Arithmetic: p. 342-380. 13ab, Decoder
Operations and 14a,15a, 19, Display
Circuits and
27a.
12 (continue Ch 6) 10. D and J-K Flip-
Flops

13 Ch 7: Counters and Chapter 7 1,2,5,6a,7ab 11. Synchronous

Registers P. 409- , Counters
455 and 9abc,11,12,
492-509. 13,16,17,
23abc,67,
and 77.
14 (Continue Ch 7) 12. Shift Registers
15 Final Exam

Note:
1. The instructor reserves the right to modify this outline anytime.

Prepared by: Robert Armstrong 08-28-17