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Code No: 117FD Set No.

1
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.Tech. I Sem., I Mid-Term Examinations, September-2017
MICROPROCESSORS AND MICROCONTROLLERS
Objective Exam
Name: ______________________________ Hall Ticket No. A
Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10.

I. Choose the correct alternative:

1. The purpose of the microprocessor is to control ______


A) Memory B) Switches C) Processing D) Tasks [ ]

2. If MN/MX is low the 8086 operates in __________ mode


A) Minimum B) Maximum C) Both A)and B D) Medium [ ]

3. Status register is also called as ___________.


A) Accumulator B) Stack C) Counter D) Flags [ ]

4. In _________________ of addressing, immediate data is a part of instruction, and appears in the form of
successive byte or bytes.
A) Immediate B) Direct C) Register direct D) Register Indirect [ ]

5. JMP 5000H, 2000H; results in


A) Intrasegment direct B) Intrasegment indirect
C) Intersegment direct D) Intersegment indirect [ ]

6. A ___________is a call to a procedure which is in the same code segment as the CALL instruction
A) Far CALL B) Near CALL C) Both D) JMP [ ]

7. In ______________ technique, a CPU automatically executes one of a collection of special routines


whenever certain condition exists within a program or a processor system.
A) I/O B) Bypass C) Interrupt driven I/O D) All [ ]

8. Accumulator register consists of_______________8-bit registers


A) 1 B) 2 C) 3 D) 4 [ ]

9. ______________flag affects the direction of moving data blocks by such instructions as MOVS, CMPS
and SCAS.
A) Direction B) Interruption C) Carry D) Trap [ ]

10. The direct memory access DMA interface of the 8086 minimum mode consist of the __________signals.
A) HOLD and RST B) RST and HLDA
C) HOLD and HLDA D) WR and HLDA [ ]

Cont..2
Code No: 117FD :2: Set No. 1

II Fill in the Blanks

11. The CS register stores instruction _____________ in code segment.

12. The address bits are sent out on lines through __________.

13. A 20-bit address bus can locate ________locations.

14. MOV [589H], BX; means ___________________________________________-

15. The ____________instruction decrements the stack pointer by two and copies the word from source to
the location where stack pointer now points.

16. ROL BL, 1; means_________________

17. In 8255 ______________________ are eight port A lines that acts as either latched output or buffered
input lines depending upon the control word loaded into the control word register.

18. The time taken by the ADC from the active edge of SOC pulse till the active edge of EOC signal is called
as the ___________________delay of the ADC.

19. In the _____________mode, the 8086 is operated by strapping the MN/MX pin to ground.

20. __________________is responsible for displaying the message Divide Error on the screen.

-oOo-
Code No: 117FD Set No. 2
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.Tech. I Sem., I Mid-Term Examinations, September-2017
MICROPROCESSORS AND MICROCONTROLLERS
Objective Exam
Name: ______________________________ Hall Ticket No. A
Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10.

I. Choose the correct alternative:

1. In _________________ of addressing, immediate data is a part of instruction, and appears in the form of
successive byte or bytes.
A) Immediate B) Direct C) Register direct D) Register Indirect [ ]

2. JMP 5000H, 2000H; results in


A) Intrasegment direct B) Intrasegment indirect
C) Intersegment direct D) Intersegment indirect [ ]

3. A ___________is a call to a procedure which is in the same code segment as the CALL instruction
A) Far CALL B) Near CALL C) Both D) JMP [ ]

4. In ______________ technique, a CPU automatically executes one of a collection of special routines


whenever certain condition exists within a program or a processor system.
A) I/O B) Bypass C) Interrupt driven I/O D) All [ ]

5. Accumulator register consists of_______________8-bit registers


A) 1 B) 2 C) 3 D) 4 [ ]

6. ______________flag affects the direction of moving data blocks by such instructions as MOVS, CMPS
and SCAS.
A) Direction B) Interruption C) Carry D) Trap [ ]

7. The direct memory access DMA interface of the 8086 minimum mode consist of the __________signals.
A) HOLD and RST B) RST and HLDA
C) HOLD and HLDA D) WR and HLDA [ ]

8. The purpose of the microprocessor is to control ______


A) Memory B) Switches C) Processing D) Tasks [ ]

9. If MN/MX is low the 8086 operates in __________ mode


A) Minimum B) Maximum C) Both A)and B D) Medium [ ]

10. Status register is also called as ___________.


A) Accumulator B) Stack C) Counter D) Flags [ ]

Cont..2
Code No: 117FD :2: Set No. 2

II Fill in the Blanks

11. MOV [589H], BX; means ___________________________________________-

12. The ____________instruction decrements the stack pointer by two and copies the word from source to
the location where stack pointer now points.

13. ROL BL, 1; means_________________

14. In 8255 ______________________ are eight port A lines that acts as either latched output or buffered
input lines depending upon the control word loaded into the control word register.

15. The time taken by the ADC from the active edge of SOC pulse till the active edge of EOC signal is called
as the ___________________delay of the ADC.

16. In the _____________mode, the 8086 is operated by strapping the MN/MX pin to ground.

17. __________________is responsible for displaying the message Divide Error on the screen.

18. The CS register stores instruction _____________ in code segment.

19. The address bits are sent out on lines through __________.

20. A 20-bit address bus can locate ________locations.

-oOo-
Code No: 117FD Set No. 3
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.Tech. I Sem., I Mid-Term Examinations, September-2017
MICROPROCESSORS AND MICROCONTROLLERS
Objective Exam
Name: ______________________________ Hall Ticket No. A
Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10.

I. Choose the correct alternative:

1. A ___________is a call to a procedure which is in the same code segment as the CALL instruction
A) Far CALL B) Near CALL C) Both D) JMP [ ]

2. In ______________ technique, a CPU automatically executes one of a collection of special routines


whenever certain condition exists within a program or a processor system.
A) I/O B) Bypass C) Interrupt driven I/O D) All [ ]

3. Accumulator register consists of_______________8-bit registers


A) 1 B) 2 C) 3 D) 4 [ ]

4. ______________flag affects the direction of moving data blocks by such instructions as MOVS, CMPS
and SCAS.
A) Direction B) Interruption C) Carry D) Trap [ ]

5. The direct memory access DMA interface of the 8086 minimum mode consist of the __________signals.
A) HOLD and RST B) RST and HLDA
C) HOLD and HLDA D) WR and HLDA [ ]

6. The purpose of the microprocessor is to control ______


A) Memory B) Switches C) Processing D) Tasks [ ]

7. If MN/MX is low the 8086 operates in __________ mode


A) Minimum B) Maximum C) Both A)and B D) Medium [ ]

8. Status register is also called as ___________.


A) Accumulator B) Stack C) Counter D) Flags [ ]

9. In _________________ of addressing, immediate data is a part of instruction, and appears in the form of
successive byte or bytes.
A) Immediate B) Direct C) Register direct D) Register Indirect [ ]

10. JMP 5000H, 2000H; results in


A) Intrasegment direct B) Intrasegment indirect
C) Intersegment direct D) Intersegment indirect [ ]

Cont..2
Code No: 117FD :2: Set No. 3

II Fill in the Blanks

11. ROL BL, 1; means_________________

12. In 8255 ______________________ are eight port A lines that acts as either latched output or buffered
input lines depending upon the control word loaded into the control word register.

13. The time taken by the ADC from the active edge of SOC pulse till the active edge of EOC signal is called
as the ___________________delay of the ADC.

14. In the _____________mode, the 8086 is operated by strapping the MN/MX pin to ground.

15. __________________is responsible for displaying the message Divide Error on the screen.

16. The CS register stores instruction _____________ in code segment.

17. The address bits are sent out on lines through __________.

18. A 20-bit address bus can locate ________locations.

19. MOV [589H], BX; means ___________________________________________-

20. The ____________instruction decrements the stack pointer by two and copies the word from source to
the location where stack pointer now points.

-oOo-
Code No: 117FD Set No. 4
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.Tech. I Sem., I Mid-Term Examinations, September-2017
MICROPROCESSORS AND MICROCONTROLLERS
Objective Exam
Name: ______________________________ Hall Ticket No. A
Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10.

I. Choose the correct alternative:

1. Accumulator register consists of_______________8-bit registers


A) 1 B) 2 C) 3 D) 4 [ ]

2. ______________flag affects the direction of moving data blocks by such instructions as MOVS, CMPS
and SCAS.
A) Direction B) Interruption C) Carry D) Trap [ ]

3. The direct memory access DMA interface of the 8086 minimum mode consist of the __________signals.
A) HOLD and RST B) RST and HLDA
C) HOLD and HLDA D) WR and HLDA [ ]

4. The purpose of the microprocessor is to control ______


A) Memory B) Switches C) Processing D) Tasks [ ]

5. If MN/MX is low the 8086 operates in __________ mode


A) Minimum B) Maximum C) Both A)and B D) Medium [ ]

6. Status register is also called as ___________.


A) Accumulator B) Stack C) Counter D) Flags [ ]

7. In _________________ of addressing, immediate data is a part of instruction, and appears in the form of
successive byte or bytes.
A) Immediate B) Direct C) Register direct D) Register Indirect [ ]

8. JMP 5000H, 2000H; results in


A) Intrasegment direct B) Intrasegment indirect
C) Intersegment direct D) Intersegment indirect [ ]

9. A ___________is a call to a procedure which is in the same code segment as the CALL instruction
A) Far CALL B) Near CALL C) Both D) JMP [ ]

10. In ______________ technique, a CPU automatically executes one of a collection of special routines
whenever certain condition exists within a program or a processor system.
A) I/O B) Bypass C) Interrupt driven I/O D) All [ ]

Cont..2
Code No: 117FD :2: Set No. 4

II Fill in the Blanks

11. The time taken by the ADC from the active edge of SOC pulse till the active edge of EOC signal is called
as the ___________________delay of the ADC.

12. In the _____________mode, the 8086 is operated by strapping the MN/MX pin to ground.

13. __________________is responsible for displaying the message Divide Error on the screen.

14. The CS register stores instruction _____________ in code segment.

15. The address bits are sent out on lines through __________.

16. A 20-bit address bus can locate ________locations.

17. MOV [589H], BX; means ___________________________________________-

18. The ____________instruction decrements the stack pointer by two and copies the word from source to
the location where stack pointer now points.

19. ROL BL, 1; means_________________

20. In 8255 ______________________ are eight port A lines that acts as either latched output or buffered
input lines depending upon the control word loaded into the control word register.

-oOo-

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