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P O W E R to achieve full turn-on.

It is usually
specified in nanocoulombs (nC).

How does the gate driver affect


MOSFET switching speed?
The Miller effect produced by
MOSFET CGD is what predomi-
nantly limits switching speed. A
MOSFET responds instantaneously
to changes in gate voltage and begins
to conduct when the gate reaches the
Frequently Asked Questions: threshold voltage (VGS). To address
a wide range of applications, suppli-
ers offer a variety of power
MOSFETs that transition
POWER-MOSFET GATE DRIVERS at different gate thresholds,
such as logic-level
MOSFETs with
Sam Davis, Contributing Editor lower threshold
Drain
1. Simplified voltage. Gate
What is a power-MOSFET model of non-invert-
Power MOSFET
waveforms indi-
gate driver? ing gate-driver IC LD
cate a plateau at
It is a power amplifier that and power MOSFET a gate voltage
accepts a low-power input from a above the
controller IC and produces the CGD threshold volt-
CDS
appropriate high-current gate R
age. The time
Controller Gate Gate G
drive for a power MOSFET. A input
required to drive
driver
gate driver is used when a pulse- the gate through
width-modulation (PWM) con- CGS this plateau
troller cannot provide the output region depends
current required to drive the gate LS on the amount
capacitance of the associated MOSFET. Gate drivers of drive current
may be implemented as dedicated ICs, discrete transis- available, which
Source
tors, or transformers. They can also be integrated within determines the
a controller IC. Partitioning the gate-drive function off MOSFET’s
the PWM controller allows the controller to run cooler and be more stable drain-voltage rise and fall times.
by eliminating the high peak currents and heat dissipation needed to drive a
power MOSFET at very high frequencies. What about discrete drivers?
Discrete gate drivers constructed
What’s the circuit model for a gate driver and power MOSFET? with bipolar npn and pnp emitter-
Figure 1 shows the simplified model, including the parasitic components followers can achieve reasonable
that influence high-speed switching, gate-to-source capacitance (CGS), the drive capability, but they’re not as
gate-to-drain capacitance (CGD), and drain-to-source capacitance (CDS). space-efficient as gate-driver ICs.
Values of the source inductance (LS) and drain inductance (LD) depend on Implementing delay and other
the MOSFET’s package. The other parasitic housekeeping
component is RG, the resistance associated functions need-
with the gate signal distribution within the ed for safe oper-
MOSFET that affects switching times. ation is cumber-
some and costly
What are the primary gate-driver with a discrete
VGS, gate-to-source voltage (V)

design considerations? circuit. The


An important attribute for the gate driver is gate-driver IC
its ability to provide sufficient drive current to overcomes these
quickly pass through the Miller Plateau limitations.
Region of the power-MOSFET’s switching
transition. This interval occurs when the tran- What about
sistor is being driven on or off, and the volt- IC drivers?
age across its gate-to-drain parasitic capacitor Gate-driver ICs
(CGD) is being charged or discharged by the include a logic
gate driver. Figure 2 plots total gate charge as input buffer that
QG, total gate charge (nC)
a function of the gate-drive voltage of a power drives sufficient
MOSFET. Total gate charge (QG) is how current-gain
much must be supplied to the MOSFET gate 2. Power MOSFET gate-drive characteristics stages to pro-
Sponsored by National Semiconductor Corp.
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duce a high-current output. In addi-


tion, the dedicated gate-driver IC can
include the housekeeping functions
needed for safe operation. Also, it can
be easily placed closer to the power
MOSFET, thereby reducing noise
interference and voltage-distribution
drops across the pc-board trace.

Single versus dual channels? NATIONAL’S HIGH-VOLTAGE GATE DRIVER FAMILY


There are single gate-driver ICs
whose output is either inverting or LM5100/01 Gate Drivers
non-inverting with respect to the The LM5100/LM5101 are high-voltage gate drivers for the high-side
controller input. Some single-chan- and low-side n-channel MOSFETs in a synchronous buck or bridge con-
nel gate drivers provide both invert- figuration. The floating high-side driver can operate with supplies up to
ing and non-inverting inputs. In 100 V. Outputs are independently controlled with CMOS input thresh-
addition, there are dual gate-driver olds (LM5100) or TTL-input thresholds (LM5101). Both the low-side
ICs with either two inverting, two and the high-side power rails include undervoltage lockout. Turn-off
non-inverting, or one inverting and propagation delay is 25 ns (typical), and the ICs can drive 1000-pF loads
one non-inverting channel. with 15-ns rise and fall times.

What influences gate-driver-IC LM5102 With Programmable Delay


lifetime and performance? The LM5102 is similar to the LM5100 with the addition of a program-
Load power requirements, thermal mable delay for adjusting driver dead time. The LM5102 offers the flexi-
characteristics of the semiconductor bility of an independent programmable delay of the rising edge for both
package and its cooling method high- and low-side driver outputs. Delays are set with external resistors
determine the lifetime and perform- and can be adjusted from 100 ns to 600 ns. The wide delay program-
ance of a gate-driver IC. The device’s ming range provides the flexibility to optimize drive signal timing for a
junction temperature must be kept broad range of MOSFETs and applications. In addition, the timer can be
within the rated limit at all times. terminated midway through a sequence.

What about designing for syn- LM5104 With Adaptive Delay


chronous rectification? The LM5104 is similar to the LM5100 with the addition of an adaptive
Shoot-through current is a poten- delay to prevent shoot-through. The high-side and low-side gate drivers
tial problem for MOSFETs used in are controlled from a single input. Each change in state is controlled in
synchronous rectification. Because an adaptive manner to turn off one MOSFET before the other is turned
the gate driver must turn on and off on. Besides the adaptive transition timing, an additional delay time can
not only the power switch but also be added, inversely proportional to an external setting resistor. The adap-
the rectifier switch, a low impedance tive control and additional delay of the timer prevent lower and upper
may be presented to the input volt- MOSFETs from conducting simultaneously.
age source during switching transi-
tions. This low transition impedance LM5110 Dual-Gate Driver
can allow a shoot-through current The LM5110 replaces industry-standard
to be conducted through both the gate drivers with improved peak output
power-switching MOSFET and the current and efficiency. Each "compound"
synchronous-rectifier MOSFETs. output driver stage includes MOS and
High shoot-through currents result bipolar transistors operating in parallel
in greater electromagnetic interfer- that together sink more than 5-A peak
ence, more noise on the input volt- from capacitive loads. Combining the
age source, lower efficiency, and unique characteristics of MOS and bipo-
reduced reliability. lar devices reduces drive current variation
Some gate-driver ICs include a with voltage and temperature. Separate input and output ground pins
non-overlap circuit that prevents provide negative drive capability, allowing the user to drive MOSFET
shoot-through current. Other ICs gates with positive and negative VGS. The gate driver control inputs are
specify a minimum amount of non- referenced to a dedicated input ground.
overlap, or dead-time. That is, a
minimum time at the switching tran-
sitions (two per operating cycle) For free online design tools, samples,
where both MOSFETs are turned off.
Maintaining the dead-time prevents evaluation boards, datasheets and more,
the problem of shoot-through current BE SURE TO VISIT:
but reduces circuit efficiency from its
optimum value. ED Online 8415 power.national.com

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