Percobaan I

Parameter Gerbang Logika

Basry A Sihotang (14S16040)
Tanggal Percobaan : 5/10/2017
ELS2104 PRAKTIKUM SISTEM DIGITAL
Laboratorium Sistem Kendali Teknik Elektro
Institut Teknologi Del

input voltage of the logic gate. So can be mathematically

AbstrakThis practicum have purposed to known and to
understood some characteristic voltage trasnfer and also the
parameter of logic state, and at the last session is to build a
simple combinational circuit. In the first experiment, will find the
characteristic of voltage transfer from an inverter IC-74LS04
and CMOS 4007. It will find the noise margin as a characteristic
static. The second experiment is to know about propagation delay
by using state logic AND with 2 input from IC-7408. This
experiment is to verificate the function of logic to find the type of
IC logic that looking from the input and output was measurable.
The third experiment is to convert the logical equation into other
form that build from simple combination circuit. And for the last
experiment, is to observe the value of logic that produced from
NOR state logic with TTL.
termed by Vout = Vin.
A. Operating Point
Operating point is a value of outputs voltage that produced
from logic gate that identified as output with LOW value or
HIGH value. Because the outputs voltage is depending on its
input so we have the real HIGH value of operating point for
outputs inverter, the LOW value must be an inputs inverter.
Its also with the otherside. So it need a configuration to
feedback or the same.

Kata Kunci: Parameter of state logic, Voltage transfer, Noise

margin, propagationd delay.

I. INTRODUCTION

L ogic gate is an entity in electorinc and an idealized or

physical device implementing a Boolean function that can
convert one or more input logic into an output signal logic.
Usually it is implementation with diode or transistor, however
it also can build by a stucture from the components that using
its characteristic from electromagnetic (relay), a liquid, optic,
dan also mechanical material. A logic gate has a characteristic
static voltage transfer. That mean voltage input is equal to
output voltage. Characteristic static voltage transfer has 3
opponent, Operating Point, Noise Margin, and Gate Delay.
The objective of this practicum are :
1. To known and to understood some characteristic of
logic gate, among others voltage transfer, noise margin,
and propogation delay
2. To know and to understood the parameters of logic gate
that is operating point that represents the range of logic
on HIGH and LOW
3. Can make a simple combinational circuit using IC
CMOS logic.
II. TEORETICAL BASIS
Characteristic static voltage transfer from a logic gate is a
plot of the output voltage of the logic gate compared to the
Picture 1 (a) Voltage Transfer Characteristic (b) Operating
Points
B. Noise Margin
Noise is an effective voltage from one or more input logic
gate that adding or subtracting from normal voltage. The
normal voltage is a stable operating point voltage.
Noise margin is defined as a total of noise voltage that can
tolerated by input without convert the output logic gate. To get
the value of noise margin, it need two (2) inputs value that
have gradient equal to -1 as shown in picture 2. The lowest
voltage called V input LOW that written down as VIL and the
highest called V input HIGH that written down VIH. These
two voltages is an aproximation voltage that considered as a
limit voltage that know as HIGH or LOW input logic.
With using this voltage and also VOH and VOL can make a
static voltage noise margin to logic gate. For LOW noise
margin formulated as :
=
and for HIGH noise margin formulated as :
 = = ( , )
From all the above, can conclude what is the LOW logic
and HIGH logic either for input or output logic.
Picture 2 Noise Margin voltage transfer characteristic of logic
gate
C. Gate Delay
In the following explanation will be discussed about two
important gate delay parameters. To defined this parametes,
we use inverter as example. We assume that a pulse is given to
inverter VIN as picture 3. The response to this pulse at the
inverter output is VOUT which can be seen in Picture 3.
Picture 3 Definition of Gate Delay Parameters
The two parameters that would be explained are high to
low propogation time (tPHL) and low to high propogation time
(tPLH). The measurement of this both parameter is doing to
posistion 50% maximum voltage from waveform VIN and
VOUT as seen in picture 3. tPHL is the time of the voltage level
when falling input waveform until falling output waveform.
And tPLH is the time of voltage when rising input waveform to
rising output waveform.
Picture 4 Propagation Delay
From these tow value, we can find worst case
propagation delay that defined as :
And also we can find the mean (average) ,
( + )
() =
2
III. RESULTS AND ANALYSIS
After doing this experiment, we get the data experiment that
can explain the function of logic parameters. And from all the
experiment, we missed 2 experiment, there are Make a simple
combinational circuit and NOR TTL Logic gate, this happened
because there is no tools and materials to support our
experiment. So just only 4 experiment that we have the data.
However, on this forth experiment, we are not getting a good
data because the tools is not supported, there is some of the
tools begun to break down.
A. Experiment I : Voltage Transfer Characteristic and Noise
Margin from IC 74LS04
Picture 5 Voltage Transfer Characteristic
In this expriment, used inverter 74LS04 and inverter CMOS
4007. With maximum frequency 1 KHz, maximum voltage
5V, and offset DC. So in this experiment should get the
characteristic of voltage transfer such as noise and operating
point. But in this experiment, we did not get the result just like
in reference, caused by the tool is not supported. As shown in
picture 5
B. Experiment II : Find the Value of NML and NMH
In this experiment, used inverter 74LS04 and inverter
CMOS 4007. And from this experiment, will get the value of
VOL, VOH, VIL, VIH. So we will get NMH and NML based on
formula :
=
and
=
In this experiment, we use maximum voltage is 5V. Based
on picture 6, we have :
In CH 1 = 2 V
In CH 2 = 10 V
Time = 500 us
Based on the picture 6, we got the value of gradien.
1 2
=
1 2
 0,4 (1,25) 1 1 1 1
=
2,5 (2,5) And from the second experiment of this case, we dont
1,92 finish he experiment, because the time was done. So just only
=
5 one experiment in this case.
= 0,384 From this experiment, we can know the gate that given to us
Based on this result, we did not get m=-1. So, this data is even the gate is unknown.
not valid. Caused by the tool was not support so well.

Picture 6 Noise Margin

C. Experiment III : Propagation Delay

Based on the theory, we will get the tPLH and tPHL.Assume
that pulse that given as Vin Inverter and the response from this
Picture 8 Verification Logic Function
pulse we called Vout. The measurement of tPLH and tPHL is doing
with 50% of maximum voltage from waveform V IN and VOUT.
But From the picture 7, there is only tPLH . So the data is not
valid. This causes from the tool was not support. And from the
picture, every square in x coordinate, equals to 200ns. So the
tPHL is 200ns. And there is no value of tPLH.

Picture 7 Propagation Delay

D. Experiment IV: Verificate Function of Logic

With the gate is unknown, we can identified the gate based
on the input and output voltage. After the experiment, we get
that the gate is AND Gate, because it will give 1 value if all
the input give 1 value (HIGH). So we get the truth table :
INPUT 1 INPUT 2 INPUT 3 OUTPUT
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
 IV. CONCLUSION
In the real condition of each gate has is own [1].
characteristic that limit certain possibilities so that in its
[2].
usage we have to think about aspects, such as noise
margin and propagation delay. In the characteristic of
voltage transfer, we have to know that VIN = VOUT. And [3].
because of that we have operating point , noise margin,
and propagation delay
Operating point is a value of outputs voltage that [4].
produced from logic gate which identified by HIGH or
LOW value. Input voltage depending on output voltage,
so in inverter, to get the input with HIGH operating point
is low voltage, and the otherwise.
REFERECE
Pandapotan Siagian, Petunjuk Praktikum Sistem Digital,
Laboratorium Sistem Digital, Sitoluama, 2015
Frank Vahid, Digital Design, Page 50-62, John Wiley &
Sons Inc., California, 2007
Wikipedia, Logic Gate,
https://en.wikipedia.org/wiki/Logic_gate (accessed on
October 8th, 2017).
Learn about electronics, Digital Electronics, Module 3.3
Logic IC Parameters, http://www.learnabout-
electronics.org/Digital/dig33.php (accessed on October
9th, 2017).
 Lampiran
1. Screenshoot for the result of first experiment

2. Screenshot for the result of second experiment

3. Screenshoot for the result of third experiment

4. Screenshoot for the result of forth experiment