Experiment No.

6
Common Source Amplifier with Drain Feed Back

AIM:

i. To analyze the limitation of maximum output possible in a basic common source amplifier with
drain feedback
ii. To analyze the change in behavior when GATE-DRAIN SHORT is replaced by a large resistor
iii. To replace the constant current source with a resistor and observe the output and find the gain.
iv. To implement the same circuit (ii) and verify the gain and swing limits.

SPECIFICATIONS:

VDD = 12 V, IREF= 2 mA, VTN = 2 V, CoxW/L = 0.18 A / V2, RD=4.7 K, RL=10 K, R large=1 M, CC=10 F

CIRCUITS:
VDD

IREF
CC

+
M1 RL
CC

Fig. 1

1
 VDD

R large IREF
CC

+
M1 RL
CC

Fig. 2
VDD

RD

R large IREF
CC

+
M1 RL
CC

Fig. 3

DESIGN:

Using VTN = 2 V, IREF = 2 mA, VGSQ is given by

Circuit 1:
Calculate the maximum output of the amplifier?

2
Find the value from Simulation?
Why the gain is low?
Circuit 2:
Calculate the ideal gain of the circuit?
Calculate the input swing of the amplifier?
Find the value of Rlarge so that you get the gain as - gmRL ?
Find the gain from Simulation? Is the gain different from circuit 1?
Circuit 3:

Choose the value of RD such that M1 remains in saturation. i.e. VDSQ > VGSQ - VT
Calculate the gain and input swing of the amplifier?
Find the values from Simulation and Experiment?
Find the minimum value of input signal to limit triode region operation?
Find the minimum value of input signal to limit cut off region operation?
Therefore the minimum value of
Apply only input signal in the range corresponding to above answer.
PROCEDURE:
1. Implement circuit shown in Fig.1. Edit the NMOS model, make VTN=2 V and KP=0.18, and find the
maximum output voltage.
2. Implement circuit shown in Fig.2. Edit the NMOS model, make VTN=2 V and KP=0.18, and find the
maximum output voltage, gain and input swing.
3. Implement circuit shown in Fig.3. by replacing the constant current source with a resistor (4.7 K)
and repeat 2.
4. Connect the simulated circuit (3) on the breadboard and obtain the output.
RESULT:
1. Print out Circuit 1, Circuit 2 and Circuit 3 outputs.
2. Plot the experimental output of Circuit 3.