Electronics II CAD2 Fall 2017

CMOS Inverter

Due: 11/08
This assignment has been designed to run through all the steps involved in the design
and simulation of a CMOS inverter using CAD tools.

Setup
Our goal is to complete the schematic in Figure 1.

Note: Dont forget to connect the bulk of the NMOS to gnd and the bulk of the PMOS to vdd.

The first setup is to edit the property of each component. Later in analog
simulation, we will run the simulation by sweeping variables. The parameters we used
in this simulation are listed below:
Width of NMOS: 0.8m Length of NMOS: 0.35m
Width of PMOS: 2.0m Length of PMOS: 0.35m
Supply Voltage (@VDD): 3.3V
Pulse Width Voltage Source (@Input):
Min Voltage: 0V, Max Voltage: 3.3V, Delay time: 0ns, Rise Time: 0.1ns,
Fall Time: 0.1ns, On-Time: 2ns, Period: 4ns, Ncycles: 0
LTspiceHelp would help you setup the Pulse Width Source

Now, your schematic should look like Figure 1.

1
Electronics II CAD2 Fall 2016

Figure 1: Inverter schematic.

DC Simulation
Setup
Now we are going to setup the analysis for our first simulation. Figure 2 shows
the schematic of inverter applied in DC source. Please use a dc voltage source as
input instead of a pulse-width source. Next, use .DC analysis to sweep the input dc
voltage from 0 to 3.3V with an incremental of 0.01V.
Please plot the vin v.s. vout curve (DC transfer characteristic curve) and hand it
in. Your plot would looks like Figure 3.

Figure 2: Schematic of inverter applied in DC source

2
Electronics II CAD2 Fall 2016

Figure 3: Inverter DC transfer characteristics (DC Response).

Transient Simulation
Setup
Next, well run the transient analysis. Please change your input to a pulse-width
voltage source as given in the 1st page. Now use .tran analysis and set the stop time
as 10ns with a resolution step of 0.1ns.
Your output voltage curves should look like Figure 4

Figure 4: Transient Analysis of Inverter.

Additional Exercise
Add a shunt capacitor of 200fF at output node and run the transient simulation
again. You can see how powerful of capacitive loading.