DC DC Converter Reliability

October 17, 2005 11:25 WSPC/122-IJRQSE SPI-J072 00194
International Journal of Reliability, Quality and Safety Engineering

Vol. 12, No. 5 (2005) 459474
c World Scientic Publishing Company
by ADVANCED SYSTEMS LABORATORY TECHNICAL INFORMATION CENTRE on 10/20/17. For personal use only.
DC-DC CONVERTER RELIABILITY:

DESIGN, COMPONENTS AND QUALIFICATION
XIJIN TIAN
Int. J. Rel. Qual. Saf. Eng. 2005.12:459-474. Downloaded from www.worldscientific.com
Hewlett-Packard Company
3404 E. Harmony Road, MS B5, Ft. Collins, CO 80528, USA
bill.tian@hp.com
Received 10 September 2004

Revised 2 September 2005
This paper provides a comprehensive study on reliability issues related to DC-DC con-
verter design. First of all, some common reliability issues and DC-DC converter design
topologies are discussed. Then, a reliability sensitivity study results on an industry stan-
dard VRM is presented using a prediction-based design-for-reliability and sensitivity
analysis tool created by the author and colleagues at HP. The thermal design issues and
component derating in the converter design are discussed. Since electronic component
reliability has been a bottleneck in DC-DC converter reliability, the component relia-
bility issues are discussed and some reliability application guidelines are also provided
for the DC-DC converters reliability design. In the last part of the paper, an integrated
reliability testing, qualication, and quality control procedure is presented using highly
accelerated testing methodology. The use of this procedure by HP on DC-DC converter
reliability and quality control has shown promising results.
Keywords: Power converter; design for reliability; sensitivity analysis; component appli-
cation; accelerated testing; qualication.
1. Introduction
Ideally, a reliable product should have no early-life failures (infant mortality fail-
ures), nor any wear-out failures before its expected lifetime, and the failure rate
should be very low during its useful life. However, the reality is that many factors,
such as design, components, manufacturing, or simple mistakes or oversights, can
lead to unexpected failures of a product. Reliability cannot be solely tested-in. It
has to be designed-in and built-in. A reliable product requires a systematic, holistic
approach starting from product concept design to its applications at customers.
DC-DC converters include power bricks (fully-encapsulated, enclosed modules),
open frame converters, bare-board converters, and VRMs (Voltage Regulator Mod-
ules). Todays high availability computer and telecom systems have put great
pressure on the performance and reliability of these power converters. High-speed
microprocessors require fast delivery of enormous supply currents in microseconds,
459
460 X. Tian
tight supply-voltage tolerance, and intelligent voltage programming. Restrictive air-

ows caused by high component densities, rack form-factor height, and elevated
operating temperature in telecom and data center applications pose a big ther-
mal challenge for DC-DC converters. High availability computer systems require
DC-DC converters to meet the 99.999% system reliability goal. To meet high power
density, high eciency and other high performance goal, DC-DC converter designs
incorporate a wide variety of component-technology mixtures which in turns could

have various potential failure mechanisms.
This paper provides a comprehensive study on reliability issues related to
DC-DC converter design. First of all, some common reliability issues related to
various design topologies are discussed. Then, a design-for-reliability and sensitiv-

ity analysis tool is presented and a reliability sensitivity study result is provided for
an industry standard VRM design. The thermal design and component derating
issues are discussed. Since electronic component reliability has been a bottleneck
in DC-DC converter reliability, the component reliability issues are also discussed
and some reliability application guidelines are provided for the design of DC-DC
converters. In the last part of the paper, an integrated reliability testing, quali-
cation, and quality control procedure is presented using highly accelerated testing
methodology. The use of this procedure by HP on DC-DC converter reliability and
quality control has shown promising results.
2. DC-DC Converter Topology and Common Reliability Issues

Depending on the power level, output voltage, and input/output isolation, there
are a large variety of topologies available for a DC-DC converter design. Choose
a right, reliable topology is the rst and most important step in any DC-DC con-
verter design process. You could probably make many of the topologies work for
a given application. However, every topology has its limitations and disadvantages
and potential reliability issues. When design a DC-DC converter, these limitations
and concerns must be kept in mind. Table 1 lists some of the most often used
DC-DC converter topologies (power level from low to high) and their advantages,
disadvantages and potential reliability issues.
When choose a topology, the following factors and limitations need to be consid-
ered. These factors are duty cycle limits, isolation (isolated or non-isolated), EMI,
number of outputs, continuous or discontinuous operation, synchronous rectica-
tion or using Schottky diode, voltage mode or current mode, and soft-switching
verse hard-switching. The following are the trend in DC-DC converter design and
some common reliability issues:
With the sharp drop of application voltage (from 5 V to 3.3 V to 1.3 V) which
requires DC-DC converters to have higher output current, more and more DC-
DC converter vendors are using synchronous rectier (MOSFET) to replace the
conventional Schottky diodes in the design to obtain high eciency.
DC-DC Converter Reliability: Design, Components and Qualification 461
Table 1. DC-DC converter topology and reliability considerations.
Topology Advantages Disadvantages & Reliability Issues

Buck Converter Simple, cheap Single output, non-isolated,
discontinued input current,
larger lter, dicult gate drive
Flyback Converter Simple, low part count Low output current, low
eciency, unconstrained
drain-voltage, Vds = 1.5
Vin(max), large output Irms
Single Transistor Better transformer use More components,
Forward Converter Unconstrained drain-voltage,
Large voltage spikes,

Vds = 2.5 3.0 Vin, high voltage
FET
Two Transistor Higher eciency, More components
Forward Converter constrained drain-voltage,
no snubers needed,
Vds = Vin(max)
Push-Pull Double- Grounded-source switches Unconstrained drain-voltage,
Ended Converter Large voltage spikes,
Vds = 2.5 3.0 Vin
Full-Bridge High power, constrained High cost
Converter Vds w/o snubbers, high
eciency
Synchronous High eciency, more Complex drive and control
Rectication ecient at lower output circuitry, parasitic capacitance
Converter voltage loss, timing issue, cross
conduction, body diode reverse
recovery
When use synchronous rectication topology, the main switching MOSFET must
be o before the synchronous rectier is turned on, and vice versa. Otherwise,
there will be a shoot through, that is, the input (or output) voltage will have a
direct path to ground which will generate very high losses and potential failures.
Timing of the gate-drive to the synchronous rectier (MOSFET) could cause
cross conduction or reverse conduction. Incorrect delay can result in either
MOSFET body diode conduction, with losses even worse than a simple rectier,
or high shoot through current transients.
MOSFET was found to fail under low-load conditions due to the intrinsic body
diode of the MOSFET undergoes dynamic avalanching during its reverse recovery
with an associated high dv/dt in some phase-shifted, zero-voltage, full-bridge
converters.3
The forward topology requires a minimum load. A forward converter cannot
operate without load. This requires the inductor to be big enough to ensure that
its peak ripple current is less than the minimum load current. Otherwise it will
go discontinuous and the output voltage will rise, peak detecting.
462 X. Tian
Another trend in DC-DC converter design is to use soft-switching topolo-

gies in which switching is happening when the device (MOSFET) either passes
no current (zero-current switching) or has zero voltage across it (zero-voltage
switching).2 Compared to hard-switching topologies (the switching of a power
device on, when it blocks full voltage, and o, when it conducts rated cur-
rent), soft-switching converters eliminate the need for snubbers at high frequency
and high power applications which result in improved power density and high
eciency.
Wrongfully choose a component in DC-DC converter design or misapplications of
components have caused various reliability problems. Some of the examples are:
failure of MOSFET at low input voltage due to transient stress on the switching
parts exceed their safe-operating area (SOA) during turn-on and turn-o; out-
put voltage overshoots due to poor output lter selection and poor over voltage
protection; input capacitor failures due to cracking ceramic capacitors (MLCC,
multilayer ceramic capacitor) or poor quality electrolytic or tantalum capaci-
tors; and power MOSFET thermal runaway due to inadequate thermal design
due to the factor that the on-resistance of a power MOSFET is increasing with
temperature.
To make a DC-DC converter design reliable, designers should keep reliability in
mind during very early stage of their design. Reliability should be designed-in from
the beginning of the design. The major reliability factors that should bear in mind
during a DC-DC converter design are:
Thermal design and management
Component selection and derating design
Design layout and mechanical design
The following section provides a sensitivity study of these design factors on DC-DC
converter reliability.
3. Design-for-Reliability and Reliability Sensitivity Analysis

Reliability must be designed into a product from the very beginning of the product
development. In practice, engineers like to know what would be the impact of their
design choices on product reliability and to do a trade-o analysis in the early
design stage. Based on the principal of reliability prediction, a design-for-reliability
tool was created and implemented by the author and colleagues at HP.4 The design-
for-reliability tool provides an interactive procedure for design engineers to analyze
the impact of any design changes on system (product) reliability. The major design
factors included in the tool are thermal design, component derating, component
selection, and redundancy design.
No matter what topology is used in the design, a DC-DC converter is typi-
cally consisted of power switching components (MOSFET), controller (control cir-
cuitry, or PWM, pulse-width modulation), transformer isolation, rectier, lter,
gate driver, and input and output capacitors. Using an industry standard VRM
(buck topology design) as an example, the following are the analysis results of
these design factors on the VRM reliability.
The BOM (Built of Materials) of the VRM includes:
MOSFETs (3, switching devices)

ICs (2, PWM and gate driver)

Aluminum Electrolytic Capacitors (5, input capacitors)
Ceramic Capacitors (15, clamp circuitry, lter, and bypass)
Diodes (3, rectier and clamp)
Inductors (2, transformer and lter)

Resistors (14), and
Fuse (1)
Based on component vendors data or Telcordia reliability prediction data (when

vendor data are not available), the sensitivity and impact of the design parame-
ter changes on the VRM reliability (failure rate) are analyzed. In the analysis, if
Telcordia failure rate data are used, a corrective factor is typically applied for the
failure rate. Generally, a factor of 3 4 is used to divide the Telcordia default
failure rate to make it comparable to vendors testing or eld data. Figure 1 shows
the failure rate ranks of components in the VRM design. The failure rate data
for MOSFETs and ICs are from the component vendors, while the failure rates
for capacitors, resistors, diodes, and fuses are from Telcordia Reliability Prediction
Handbook SR-332.10
It is seen that the input aluminum electrolytic capacitor is the top one contribu-
tor to the failure rate of this specic VRM design followed by switching MOSFETs
(No. 2), ICs (No. 3), and ceramic capacitors.
140
Electrolytic
Caps
120
MOSFETs
Failure Rate (FIT)
100
80
ICs
60
40
Ceramic
Caps
20 Diodes Inductors Res.
0
1 2 3 4 5 6 7
Components
Fig. 1. Failure rate ranking.

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In the study, the thermal stress factor (temperature sensitivity) is implemented

as a function of the form:
1 1
T = emT ( T 0 T 1 )
where
mT is the slope parameter for that particular part,

T 0 is the reference temperature (313 K), and
T 1 is the operating ambient temperature (K)
The log-linear thermal stress model is equivalent to the Arrhenius model with
the substitution of Ea/k for mT
1 1 Ea
T = emT ( T 0 T 1 ) = e k ( T10 T11 )
where
Ea = activation energy
k = Boltzman constant = 8.62105
Figure 2 shows the impact of ambient temperature on the VRM reliability. It is

seen that as the ambient temperature of the VRM increases from 35 C to 45 C, the
failure rate increases from 130 FIT to 250 FIT; as the temperature increases from
45 C to 55 C, the failure rate increases from 250 FIT to 470 FIT. In the analysis,
the temperature rises from ambient to junction temperatures are included for each
component.
The derating sensitivity (impact of stress levels on reliability) is analyzed using
an inverse power law model as shown below:
mS
P1
S = = emS (ln P 1ln P 0)
P0
where
mS is the electrical stress slope parameter,
P 1 is the applied stress as a percent of rated,
P 0 is the reference stress (50% of rated)
The main derating parameters are voltage (peak or DC voltage), temperature

(junction or ambient temperature), power (peak and/or average), and current (rip-
ple, forward, or output current). The value of power m depends on the specic
component; it typically ranges from 3 to 8. For example, the value of m is 3 for a
typical ceramic capacitor while it could be 7 for a 1.3 m VLSI chip.
Figure 3 shows the failure rate with respect to the dierent levels of component
derating. It is seen that by using 50% derating across board the VRM failure rate
is cut by 60% from the failure rate at 80% rated stress level.
500
450
Failure Rate (FIT)

400
350
300
250
200
150
100
50
25 30 35 40 45 50 55 60
Temperature (C)
Fig. 2. Ambient temperature vs. failure rate.
350
300
Failure Rate (FIT)
250
200
150
100
50
50% 55% 60% 65% 70% 75% 80%
Derating Level
Fig. 3. Component derating vs. failure rate.
Thermal Design and Management

Thermal design and management is the top one most important factor in DC-DC
converter design and reliability. Thermal design is not just how to use heat sinks or
PCB to remove heat, it should start from the beginning of part selection, topology
design, circuit layout, and heat dissipation management. The general rule-of-thumb
includes: to choose component that generating less heat, to place thermal sensitive
parts away from heat source, to use packages with low thermal resistance, and to
use ecient heat sinks or PCB design. From reliability point of view, some parts are
more sensitive to temperature than others and the reliability of a DC-DC converter
could be dominated by dierent components under dierent temperature ranges. At
low temperature, the switching devices and rectiers (MOSFETs) would dominate
the failure rate of DC-DC converters; at mid-range of temperature, the failure rate
of ICs (PWM and gate drivers) becomes more important; and at high temperature,
the magnetic devices (transformer, inductors) could dominate the failure rate of
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a DC-DC converter. The following are some common reliability issues related to
thermal design and management.
Aluminum electrolytic capacitors (input capacitors and/or output lter capaci-

tors) could cause early eld failures of DC-DC converters due to increased tem-
perature. Increased temperature causes a gradual evaporation of the electrolyte
through the electrolytic capacitors seal. As the electrolyte boils away, the capac-
itance decreases and the eective series resistance (ESR) rises, causing increased
power dissipation. If this regenerative process continues, it can cause the capac-
itor to exceed its maximum thermal rating.5
Both switching and rectier MOSFETs could run very hot in a synchronous rec-
tication converter. It is essential to keep both the junction temperature of these
parts far below their maximum. To use packages with low thermal resistance
from junction-to-case and low thermal resistance from case-to-ambient are essen-
tial for a good thermal design. This is especially important in a bare-board DC-
DC converter design. The common used SO-8 package has a thermal resistance
of 20 25 C/W from junction-to-case and of 20 C/W from case-to-ambient.
This is much higher compared to some new designed MOSFET packages, such
as LFPak, I2 PAK, or DirectFET.9
In a DC-DC converter, the control components are sensitive to high temperature
and these parts account for a big part of the DC-DC converter failure rate. In
layout, the control components should be kept away from heat generating parts,
such as switching MOSFETs and magnetics.
Derating Design
Derating is the process of limiting electrical, thermal, and mechanical stresses on
electronic parts to levels below their specied ratings. In the component derating of
a DC-DC converter design, the stresses must take into account the stresses during
transient process, such as ripple current, AC peak voltage, and temperature rise due
to transients. For example, the derated voltage level of a capacitor should include
both applied DC voltage and AC peak voltage, that is
Voltage DC (derated) = Voltage DC (applied) + Peak AC Voltage (applied).
Since temperature rise of a component is caused by the applied electrical stress

level on the component, typically derating design should reduce the electrical
stresses and temperature simultaneously and to nd the optimum derating point
which has the most ecient impact on the failure rate of the component. For exam-
ple in the case of a ceramic capacitor, a derating of 60% rated voltage plus a 10 C
temperature derating (Td = Tmax 10 C) would be a good combination to reduce
the failure rate eciently. The following are some of the common issues and guide-
lines in DC-DC converter derating design.
Ripple and pulse currents cause temperature rise in a component and have
adverse inuence on the failure rate of the component. Therefore, the ripple
and pulse currents must be limited during DC-DC converter design.
Voltage derating factor of transistors should be applied to the worst case combi-
nation of DC, AC and transient voltages.
For tantalum and aluminum electrolytic capacitors, when ambient temperature
is greater than the maximum temperature minus 40 C (i.e., Ta > Tmax 40),
additional voltage derating has to be applied. In DC-DC converter application,
attention must be paid for the eect of temperature rise of nearby components.
4. Component Application and Reliability Issues

Components can fail catastrophically due to various causes. The components in a
power module probably face the most challenged and stressful application situation,
such as high temperature, high transient voltage, high ripple current, and high
component density, etc. This requires designers to have a thorough understanding of
component applications not only from electrical performance point of view but from
reliability perspective also. The following are some common component reliability
issues in DC-DC converter design.
Input Capacitor Selection and Application

Aluminum electrolytic capacitors, tantalum electrolytic capacitors and ceramic
capacitors can all be used as ltering input capacitors of a DC-DC converter. How-
ever, they all have their pros and cons. If used not correctly, these capacitors can
cause serious reliability problems.
Aluminum electrolytic capacitors can have large capacitance and high rated volt-
age and they are cheap. However, aluminum electrolytic capacitors typically have
limited operating life especially under high temperature. Increased temperature
causes the electrolyte to evaporate and boil away which in turn causes the capac-
itance decrease and the ESR (eective series resistance) increase. The power loss
of a capacitor is determined by Pcap = (Irms )2 ESR, where Irms is the ripple
current of the capacitor. It is seen that for reliable operation, the aluminum elec-
trolytic capacitor must operate below its maximum allowable ripple current and
the ESR should be kept low. The ESR of the capacitor is the main cause of its
internal temperature rise.
High temperature will reduce the operating life of an aluminum electrolytic capac-
itor dramatically. The capacitor will either fail catastrophically (blow open) or
parametrically (too little capacitance, too high ESR, or large leakage current).
To keep the aluminum electrolytic capacitor cool, the capacitor should be kept
away from heat generate components, such as large resistors, catch diodes, and
heat sinks.
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The quality and performance of aluminum electrolytic capacitors can vary signif-
icantly from one vendor to another. The most critical part inside an aluminum
electrolytic capacitor is its electrolyte used. The electrolyte determines the oper-
ating temperature range of a capacitor and has a major eect on dissipation fac-
tor, ripple current rating and the operating life of the capacitor.7 An electrolyte
is composed of an organic solvent and solutes that provide ionic conductivity.
Electrolytes typically contain small amount of water content. This sometimes

could cause catastrophic failures if the constitutes of the electrolytes are not well
controlled or not correctly formulated. Some water is needed to support oxide
formation, but too much water causes corrosion of the foil electrodes and more
seriously generate hydrogen gas. If the hydrogen gas is not absorbed inside the
capacitor, it will eventually blow o the capacitor seal and cause it fail. Cer-
tain chemicals, called depolarizers, can be added into the electrolytes to absorb
the generated gas. However, the chemicals of the depolarizer could go wrong
which can cause disaster failures.6 Currently, there is a new electrolyte, called
BL:EG (Butyrolactone:Ethylene), developed by NASA which generate much less
hydrogen gas than traditional EG electrolytes. Test shows that the new BL:EG
electrolytic capacitor have better ESR stability, less tendency for gas generation,
and better ability to withstand high temperature and trace chloride under severe
application conditions.7
Another option for input ltering capacitor is to use tantalum electrolytic capac-
itor. Tantalums have substantially better high frequency performance than alu-
minum, but cost more and are limited to about 100 V and a few hundred
microfarads.8
Solid tantalum (MnO2 ) capacitors should not generally be used for power supply
ltering unless specically made and tested for the application. This is because
solid tantalum capacitors cannot withstand high surge currents so must be cur-
rent limited with an external resistor for charging and discharging if the source
impedance is less than one ohm. In DC-DC converters, the input side is typ-
ically fed from voltage sources, which are not regulated and are of nominally
low impedance. This type of application severely stresses the capacitor. A higher
than normal failure rate level may be experienced. In our practice, solid tanta-
lum capacitors are not recommended for use in the input application. If used, a
voltage-derating factor of 50% or more is required for low impedance tantalum
capacitor applications. A protection resistor of 3 ohm/V or more is needed in
series to tantalum capacitors to limit the current to 300 mA or less.
Tantalum capacitors must not be operated and charged in reverse mode. Reverse
current causes loss of active power when passing through tantalum capacitors
and thereby causes the temperature of capacitor to rise.
Do not use silver-case tantalum capacitors. This kind of cheap wet tantalum
capacitor has always been problematical. They have almost zero tolerance of
reverse bias because the silver grows dendrites (silver migration) that cause rapid
damage.
Today, more and more DC-DC converter designs are using ceramic capacitors for
input ltering. Ceramic capacitor oers the advantages of small size, low ESR
and high Irms capability. However, using ceramic capacitors as input capacitors
has caused various reliability problems in DC-DC converters across industry.
Multilayer ceramic chip capacitor (MLCC) cracking has been a big reliability
problem across DC-DC converter industry. The crack in MLCC could be caused
by thermal shock during manufacturing process, mechanical stresses of handling,

and/or excessive exing of PCB board (depaneling, insertion, or attach to other
structures). The failure mode is that micro cracks form in the ceramic at the
edge of the termination cap and then propagate towards the near edge of the
package which will cause short circuit failure. One of the solutions is in the design
of MLCC capacitors the termination cap should not extend beyond the active
region of the package. This kind of MLCC structure is sometimes called fail-
safe construction where the active region does not extend to termination area.
TDK and Kemet have fail-safe MLCC capacitors available.
Input-voltage transients across input ceramic capacitors in a DC-DC converter
can easily exceed twice of that of the original voltage step. Choose correctly
rated ceramic capacitor and using a properly designed transient-snubber circuit
are essential to have a reliable operation.
Low stando height of MLCC can result in high halide ion concentration which
could cause migration of the silver-glass frit and lead to excessive current leakage.
Short circuits can occur due to silver migration when parts are subjected to THB
(Temperature-humidity-bias).
MOSFET Reliability and Application

High eciency has been the focus of DC-DC converter design for years. The losses of
a power MOSFET include static loss and dynamic losses. The static loss is typically
referred to as conduction loss that is the loss due to the resistance between drain
and source, Rds-on , when the MOSFET is fully on. The dynamic losses include
switching loss and gate drive (gate charge) loss. To select a right MOSFET for a
specic application, the designer must understand how these losses are dependent
on the switching frequency, current, duty cycle, and the switching rise and fall time
while to minimize the losses.
For switching MOSFETs, the dynamic or switching losses are the predominant
factor, and conduction losses play a secondary role. The dynamic loss is pro-
portional to the switching frequency. A switching MOSFET should have a gate
charge as low as possible to keep the dynamic losses small.
For synchronous rectier MOSFET, the static or conduction losses are the
dominant factor, and the gate charge losses play a secondary role. For syn-
chronous rectier MOSFET, it must have a suciently low Rds-on to meet the
eciency goal.
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It must be kept in mind that the Rds-on resistance is strongly dependent on

the junction temperature. The Rds-on value goes up with increasing junction
temperature. The temperature coecient factor of Rds-on must be included in
the calculation of losses and eciency.
Power MOSFET can fail due to thermal runaway. This is because the on-
resistance of a power MOSFET depends on its temperature, and the losses are
temperature dependent, and the temperature depends on losses. Therefore, a

MOSFET can produce enough heat to make its temperature rise, which causes
the on-resistance to rise, which then causes losses to rise, which soon could cause
the MOSFET to exceed its rated temperature. It is essential to use MOSFETs
that are rated for the temperature range they are going to see in applications.
The Safe Operating Area (SOA) of a power MOSFET shrinks with age (degrada-
tion with age). Depending on the stresses on the device, for long term operation,
both current and voltage could degrade up to the 50% of their values at time
zero which are the SOA values MOSFET vendors typically provided in the spec-
ication. The time dependent rate of SOA shrinking is a strong function of the
devices prolonged electrical and thermal cycling.2 To ensure the MOSFET have
long term reliability, it is desired to have MOSFET derated by 50% to take the
aging process into account.
MOSFET can fail at low input voltage due to transient stress on the switching
parts exceed their safe-operating-area (SOA) during turn-on and turn-o. It is
reported3 that the intrinsic body diode of power MOSFET undergoes dynamic
avalanching during its reverse recovery with an associated high dv/dt. This phe-
nomenon results in an excessive power loss in the circuit and increased switching
stress for the MOSFET. Even though the forward current is very small, there
is a destruction of the device due to the large reverse current. Under conditions
of high di/dt, dynamic avalanching is shown to occur even though the reverse
voltage is much smaller compared to the breakdown voltage.3
An individual gate resistor is needed for each MOSFET, regardless of whether
the MOSFETs are in parallel. This is because MOSFETs have both capacitance
(gate-source) and inductance (in the leads) which potentially forms an under-
damped resonant tank, and paralleled MOSFETs have been observed to oscillate
at 100 MHz.8 The gate resistor acts to limit the current the source has to source
or sink to the gate, but its real signicance is to damp the oscillations.8
Other Component Reliability and Application Issues

When look at vendors specications, it is essential to understand the conditions
under which a parameter is obtained. For example, the ESR of a capacitor can
have many times dierence under dierent temperatures and frequency. Use only
ESR that is specied at a high frequency, such as 100 KHz.
Schottky diodes can have very high leakage current at high temperatures and
with applied reverse voltage close to its rating. Do not use a Schottky diode at
more than 75% of its rated reverse voltage, nor with the junction temperature
above 110 C.
Do not use two rectier diodes in parallel. This is because when a diode gets
hotter, its forward voltage gets smaller. The one in the parallel that is conducting
more current at the beginning will get hotter, and have a lower forward voltage,
and as result it will conduct even more. The positive feedback process will nally
cause the diode fail.

Do not use two capacitors in series that will form a reactive voltage divider. If one
of the capacitors is smaller than the other one, it will carry more voltage (higher
percentage of the total) than the other one. The result would be a premature
failure.
There are a variety of factors that could cause a ceramic capacitor to crack. These
factors include manufacturing defects (ring crack, delamination, and voiding),
thermal shock (wave solder, solder reow), and handling (depaneling, insertion,
and attachment of heatsink). Use smaller, thinner capacitors with higher fracture
toughness dielectric materials. Do not put a ceramic capacitor near a board edge
or near a hole. Ceramic capacitors with a large thermal mass can also be problem
because they heat up slower than the board does.
5. Reliability Testing and Qualification

A comprehensive qualication process starts from the qualication of components
and vendors production quality, through DC-DC converter development, design
release qualication, full production qualication and manufacturing quality control
and screening testing. Choosing well-qualied component vendors and high quality
components is the fundamental factor to have a reliable product. To ensure DC-DC
converter quality and reliability, the author has created and implemented a com-
prehensive quality/reliability control program and a qualication testing matrix.
The strategy of this program is to use highly accelerated reliability testing methods
to uncover any potential reliability risk area and weakness in the early stages of
product development. The program includes:
Review the built-of-material (BOM) and component vendors of a DC-DC

converter design for any questionable components and unqualied component
vendors;
Review the design and stress analysis of a DC-DC converter for any overstressed
components (not enough derating), circuitry design problem (unproved new
topology), hot spots, layout problem, and potential component misapplications;
HALT (Highly Accelerated Life Testing) testing during early development stages
to test prototype samples into failures to nd weakness or susceptible design
areas;
Qualication testing for rst article production samples and full production sam-
ples using accelerated reliability tests;
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HASS (Highly Accelerated Stress Screening) testing during DC-DC manufactur-

ing using combined thermal shock and vibration testing;
Root cause analysis and corrective action track. Any failures during any stage
of the test or manufacturing must be analyzed to its root cause and corrective
action must be followed as appropriate.
HALT Testing
Temperature step tests which include low temperature step-stress testing and
high temperature step-stress testing. These tests are to discover any thermal
problems, such as circuit design issues and component failures, and to ensure
enough temperature margin of the product.
Rapid thermal cycling or thermal shock. The temperature ramp rate should be
no less than 30 C/min. The test is to discover any material incompatibility and
problems caused by dierent CTE, such as solder joint failure, crack components,
and intermittent component failures.
Six-axis step-stress random vibration test. The test starts at vibration level of
5 Grams and step up 35 Grams until failure. This is to uncover connector prob-
lems, broken leads, shorted components, and solder joints problems.
Combined thermal shock and random vibration. This test is to use rapid thermal
cycling with continuous step-stressed random vibration in the background. The
test should run until the unit-under-test (UUT) to fail. Failures uncovered in this
test include solder joint problem, interconnect failure, intermittent components,
circuit design issues, etc.
It is essential that the UUT be powered and monitored during all the tests above
to catch any intermittent failures.
HALT test is dierent than margin test or design evaluation test. Although the
temperature and other stress margins are observed during HALT testing, this is
only a by-product of HALT testing. The HALT testing must push the UUT into
failures to uncover any potential weakness or reliability problems. It is a reliability
testing not a margin testing or design evaluation test. HALT test should always
focus on failure mechanisms not stresses used.
Theoretically, HALT test could use any test stresses and stress combinations as
long as the test is ecient to uncover potential reliability issues and the failure
mechanism uncovered is practically reasonable. To have a HALT test plan to
be success, it is essential to analyze every failure into its root cause and to use
engineering judgment to come up with appropriate corrective actions.
Reliability Qualification Testing

In addition to the HALT testing above and standard electrical and mechanical
performance qualication tests for conformance to product specications, such
as power line variation test, short circuit test, margin test, ESD test, and drop
test, it is our practice to require DC-DC vendors to perform a series of rigorous

reliability qualication testing to verify the long term reliability of the products.
The reliability qualication testing typically include thermal shock (pre-condition
test), HTOL (high temperature operating life), and HTB (humidity-temperature-
bias test). The test samples (minimum 30 samples) are randomly selected from
at least three dierent manufacturing lots.
First all samples go through mechanical thermal shock test (minimum 300 cycles)
with temperature ramp rate in the range of 20 30 C/min. This is to uncover
any solder joint and other mechanical failures. Visual inspection of the solder
joints is performed of all modules via x-ray after 150 cycles and at 300 cycles.
Also, pick one random sample at 150 cycles and 300 cycles to de-capsulate, depot,
and visual inspect the solder joint integrity.
After thermal shock, the samples are divided into two groups. The rst group
will go through HTOL, and the other one goes to HTB.
HTOL will be running at a few degrees below the modules high operating temper-
ature limit as discovered in HALT test and with maximum load. Power cycling is
also desired during HTOL. HTOL typically last for 2,000 hours. Common failures
uncovered during HTOL include poor quality components, such as electrolytic
capacitors and electro-mechanical devices, poor solder joints, overstressed com-
ponents, and circuit design problems.
Humidity-Temperature-Bias (HTB) test is also called 85/85 test (that is 85 C
plus 85% relative humidity). HTB is important to uncover any corrosion failures,
ionic migration (such as silver migration), dendrite growth, and package failures.
The HTB test typically last for 2,000 hours and is running at minimum load level
to avoid self-heating eect.
After HTOL and HTB test, all samples will go through full function test and com-
pare the results to the full function test results before the test. Any performance
degradation will be analyzed to its root cause.
HASS Test
HASS stands for Highly Accelerated Stress Screening. It is a 100% screening test
in the manufacturing process. HP requires DC-DC converter vendors to do HASS
test on their new modules using combined rapid thermal cycling plus random
vibration.
Compared to traditional ESS or Burn-in (constant temperature test), HASS uses
high stresses and combined stresses and has shown to be more ecient to catch
any process problems and infant mortality failures.
6. Conclusions
Reliability is a complex task which needs an integrated teamwork to accomplish.
The reliability work of a DC-DC converter starts from topology design, component
selection and qualication, design, testing, manufacturing, and does not end with
474 X. Tian
the rst customer shipment. Reliability has to be designed in, tested in, and built
in. High Reliability = Failure-free Design + Failure-free Manufacturing. Design-for-
reliability is essential for a product to have high intrinsic reliability. Rigorous relia-
bility testing, qualication testing and manufacturing screening testing are a must
to uncover any potential reliability risk and weakness before the product shipped
to customers. Component reliability and application have been a bottleneck in DC-
DC converter reliability for years. To achieve high reliability, a DC-DC designer

must choose high quality components, understand limitations of these components,
and use the components correctly. It is also very important for component suppli-
ers, DC-DC converter vendors, and the converter customers to have a good work
partnership to work through the process to ensure high reliability. As industries

demand more power, higher eciency, smaller size, and lower cost, the reliability
of DC-DC converters will continue to be a big challenge.
References
1. C. Varga, Power converter topology and MOSFET selection for 48-V telecom appli-
cations, Application Note 7004, Fairchild Semiconductor (2001).
2. K. Shenai, Made-to-order Power Electronics, IEEE Spectrum 7 (2000) 5055.
3. K. Shenai, P. Singh and S. Rao, Power supply design for performance and reliability, in
IEEE Proc. National Aerospace and Electronics Conference (NAECON 2000) (2000)
(Oayton, OH, USA), pp. 524531.
4. X. Tian and B. Edson, Design-for-reliability and sensitivity analysis based on predic-
tion, ASQ Reliability Review 4 (2003) 1828.
5. B. Human, Build reliable power supplies by limiting capacitor dissipation, EDN 3
(1993) 9398.
6. D. Zogbi, Low-ESR aluminum electrolytic failures linked to Taiwanese raw material
problem, Passive Component Industry Magazine (2002).
7. R. Alwitt and Y. Liu, Electrolytes for high voltage aluminum electrolytic capacitors,
Passive Component Industry Magazine (2000).
8. R. Lenk, Practical Design of Power Supplies (IEEE Press: New York, 1998).
9. G. Prophet, Power FETs nd their place, EDN 4 (2003) 4350.
10. Telcordia Technologies, Reliability prediction procedure for electronic equipment,
SR-332, Issue 1 (2001).
About the Author

Dr. Xijin (Bill) Tian is a Reliability Expert at Hewlett-Packard Company. He is
a senior member of both IEEE and ASQ. Dr. Tian received his Ph. D. degree in
mechanical engineering from the University of Arizona and M.S in systems engi-
neering from Beijing University of Aeronautics and Astronautics. Dr. Tian has over
15 years experience in reliability engineering and teaching. He has co-authored two
books and published numerous papers on reliability testing, electronic component
reliability, and reliability prediction. His expertise is in accelerated reliability test-
ing, data analysis, reliability prediction, HALT testing, and systems reliability.

DC DC Converter Reliability

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DC DC Converter Reliability

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October 17, 2005 11:25 WSPC/122-IJRQSE SPI-J072 00194

International Journal of Reliability, Quality and Safety Engineering

DC-DC CONVERTER RELIABILITY:

Received 10 September 2004

tight supply-voltage tolerance, and intelligent voltage programming. Restrictive air-

incorporate a wide variety of component-technology mixtures which in turns could

various design topologies are discussed. Then, a design-for-reliability and sensitiv-

2. DC-DC Converter Topology and Common Reliability Issues

DC-DC Converter Reliability: Design, Components and Qualification 461

Table 1. DC-DC converter topology and reliability considerations.

Topology Advantages Disadvantages & Reliability Issues

Large voltage spikes,

Another trend in DC-DC converter design is to use soft-switching topolo-

3. Design-for-Reliability and Reliability Sensitivity Analysis

DC-DC Converter Reliability: Design, Components and Qualification 463

MOSFETs (3, switching devices)

ICs (2, PWM and gate driver)

Inductors (2, transformer and lter)

Based on component vendors data or Telcordia reliability prediction data (when

Fig. 1. Failure rate ranking.

In the study, the thermal stress factor (temperature sensitivity) is implemented

mT is the slope parameter for that particular part,

Figure 2 shows the impact of ambient temperature on the VRM reliability. It is

The main derating parameters are voltage (peak or DC voltage), temperature

DC-DC Converter Reliability: Design, Components and Qualification 465

Failure Rate (FIT)

Fig. 2. Ambient temperature vs. failure rate.

Fig. 3. Component derating vs. failure rate.

Thermal Design and Management

Aluminum electrolytic capacitors (input capacitors and/or output lter capaci-

Voltage DC (derated) = Voltage DC (applied) + Peak AC Voltage (applied).

Since temperature rise of a component is caused by the applied electrical stress

DC-DC Converter Reliability: Design, Components and Qualification 467

4. Component Application and Reliability Issues

Input Capacitor Selection and Application

Electrolytes typically contain small amount of water content. This sometimes

DC-DC Converter Reliability: Design, Components and Qualification 469

by thermal shock during manufacturing process, mechanical stresses of handling,

MOSFET Reliability and Application

It must be kept in mind that the Rds-on resistance is strongly dependent on

temperature dependent, and the temperature depends on losses. Therefore, a

Other Component Reliability and Application Issues

DC-DC Converter Reliability: Design, Components and Qualification 471

cause the diode fail.

5. Reliability Testing and Qualification

Review the built-of-material (BOM) and component vendors of a DC-DC

HASS (Highly Accelerated Stress Screening) testing during DC-DC manufactur-

Reliability Qualification Testing

DC-DC Converter Reliability: Design, Components and Qualification 473

test, it is our practice to require DC-DC vendors to perform a series of rigorous

DC converter reliability for years. To achieve high reliability, a DC-DC designer

partnership to work through the process to ensure high reliability. As industries

About the Author

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