UNIVERSITI MALAYSIA PERLIS

SCHOOL OF COMPUTER &

COMMUNICATIONS ENGINEERING

EKT 221 DIGITAL ELECTRONICS II

LABORATORY MODULE

LAB 3

REGISTER TRANSFER LEVEL

UniMAP DIGITAL ELECTRONICS II

LAB 3 : REGISTER TRANSFER LEVELE

LABORATORY OUTCOME

1. Ability to describe the functions of Register Transfer Level inside a digital system
design.
2. Ability to discuss the types of micro-operations inside the Register Transfer
Level.
3. Ability to transfer Algorithmic State Machines system flow onto registers or
register cell operations.
4. Ability to construct a simple digital system that includes a Control Unit and
Datapath Unit.

EQUIPMENTS/COMPONENTS

Computer Unit
Altera Quartus II software

INTRODUCTION

Register Transfer Level (RTL)

A digital system is a sequential logic system constructed using flip-flops and gates.
Sequential circuits can be specified by means of state tables and finite state diagrams as
done in the previous lab module. To specify larger digital systems using state tables may
be more difficult albeit possible because the number of states may be very large. To
overcome this difficulty, digital systems are usually designed in a modular approach and
partitioned into smaller subsystems that perform fundamental tasks. These modules are
constructed from simple digital devices such as registers, decoders, multiplexers,
arithmetic elements and control logics. Combining some or more of these devices and
interconnected with common control paths and data paths will lead to the development of
microprocessors and microcontrollers and other complex digital system controllers.

Digital systems are best defined by a set of registers and its operations like shift, count,
clear and load. The information flow and operations on the data stored inside the
registers are often referred to as Register Transfer Level or RTL in short. Three main
components are specified when dealing with digital systems at the register transfer level:

The set of registers in the system

- The hardware that will have the ability to perform the elementary operations
from the stored data such as shift, count, clear and load.

The operations that are performed on the data stored in the registers
- Elementary operations or better known as micro-operations such as
- R1 R1+R2

The control that supervises the sequence of operations in the systems

- The control that initiates the sequence of events to perform the micro-
operations in a prescribed manner

LAB 3 1
UniMAP DIGITAL ELECTRONICS II

Types of micro-operations

Micro-operation
operation Example
Transfer R0 R1
Arithmetic R0 R1 + 1
Logic R0 R1 ^ R2
Shift R0 sl R0

Multiplications and divisions are not listed as basic sets of micro

micro-operations
operations even though
they are represented by the symbols * for multiplications and / for divisions. They are
assumed to be implemented by the shift and add micro-operations.

The register
ister is usually represented by the variable R and may include multiple Rs
which signifies the usage of more than one sets of registers to meet the desired
specifications of a digital system. The controller section of a digital system is usually
represented
ented by the variable K to show the conditional statements of the system (control
signals). A system may have more than one K controller to meet the purpose of multiple
transfer operations.

An important note is that all registers have a load enable co

controller
ntroller (LE) to allow data to
be stored into the destination register. Example 3.0 shows a particular RTL micro micro-
operation and implementing the rules above.

Example 3.0

An RTL for an n-bit

bit adder/subtractor system can be represented as the following RTL
micro-operations :

The block diagram for the two statements above can be built as shown below :

R2

Adder - Subtractor
K2

R1 K1

Figure 3.0 : Block Diagram of an n-bit

n Adder/Subtractor
UniMAP DIGITAL ELECTRONICS II

The diagram shows that K2 is the selector for the add/subtract operation and K1 is the
load enable for register R1. When K2=0 and K1 = 1, then R2 will be added to the
contents of R1 and stored back into R1. When K2=1 and K1=1, then the R2 will be
subtracted from the contents of R1 and stored back into R1.

For this example, the carry bit and overflow operations are not represented and left out,
but can still be constructed
ted if desired.

Note that RTL operations are always based on the edge transitions of clock pulses as
registers are orignated from flip-flops.
flip

PRE-LAB ASSIGNMENT

You are advised to do read this chapter on RTL to fully understand the RTL micro
micro-
operations
ions before coming in for this lab. Try on any exercise related
elated to RTL as
preparation before coming in for the lab.

HOMEWORK EXERCISE

1. Show the diagram of the hardware that implements the register transfer statements
below :
a. A digital system with a controller function of

C3 : R2 R1, R1 R2

b. A digital system that implements a 4:1 MUX and with the RTL function
of

C0 : R4 R0,
C1 : R4 R1,
C2 : R4 R2,
C3 : R4 R3

2. A digital system has an n-bit

n bit register with S1 and S0 controls. Draw the RTL
block for a cell register with S1 and S0 input controllers that implement the
follwing function table :

S1 S0 Register Operation
0 0 Load parallel data
0 1 Clears register to 0
1 0 Complement output
1 1 No change

3. Using two 4-bit

bit registers R1 and R2, draw a bit slice of the logic diagram that
implements the following statements :
C0 : R2 0;
C1 : R2 ;
C2 : R2 R1;
UniMAP DIGITAL ELECTRONICS II

4. Using D flip-flops to implement this design, a register cell is to be used for an n-

bit register R0 that implements the register transfer functions of :

: R0 0;
: R0 R0 R1;
: R0 R0 R1;
: R0 R0 R1;

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