To Cover Page
SECTION 3 ELECTRONICS
3.1 Block Diagram..................................................................................1
3.2 PCB Layout......................................................................................2
3.3 PCB No.1273 (I/O Controller)...........................................................4
3.3.1 Functions (Scope)..............................................................................4
3.3.2 Power Supply I/O...............................................................................4
3.3.3 Connector Pin Assign ........................................................................5
3.3.4 PCB Assembly Drawing.....................................................................6
3.4 PCB No. 1274 (Driver Board)...........................................................7
3.4.1 Outline................................................................................................7
3.4.1.1 I/O with the CPU circuit board ....................................................7
3.4.1.2 I/O with the other actuators.........................................................7
3.4.1.3 Power supply input and output ...................................................7
3.4.2 Function .............................................................................................7
3.4.2.1 Stepping Motor Drive Circuit.......................................................7
3.4.2.2 Output signal circuit ....................................................................7
3.4.2.3 Sensor input circuit .....................................................................7
3.4.2.4 A/D Converter .............................................................................8
3.4.2.5 Heater control .............................................................................8
3.4.3 Circuit Description..............................................................................8
3.4.3.1 Stepping Motor Circuit ................................................................8
3.4.4 Block Diagram ...................................................................................9
3.5 PCB No.2159 .................................................................................10
3.5.1 I/O ....................................................................................................10
3.5.1.1 Signal I/O ..................................................................................10
UF-1000i S/M -i-
3.5.1.2 Function and Description.......................................................... 10
3.6 PCB No.2160................................................................................. 11
3.6.1 Outline ............................................................................................. 11
3.6.1.1 I/O ............................................................................................ 11
3.6.1.2 Function and Description.......................................................... 11
3.7 PCB No.2166 (Conductivity PCB) .................................................. 12
3.7.1 Outline .............................................................................................12
3.7.2 Block Diagram ................................................................................. 12
3.7.3 Connector Pin Assign ......................................................................13
3.7.4 Assembly Drawing ...........................................................................14
3.8 PCB No.2049 (Laser Diode) .......................................................... 15
3.9 PCB No.3060 (Waveform Processing) ........................................... 16
3.9.1 Outline .............................................................................................16
3.9.2 LEDs and Test Points ...................................................................... 18
3.9.3 Connector Pin Asign........................................................................19
3.9.4 Dip Switch Setting ........................................................................... 22
3.9.5 Power Supply .................................................................................. 22
3.9.6 Assembly Drawing ...........................................................................23
3.10 PCB No. 4085 (Photomultiplier Power Supply board)................... 24
3.10.1 Function .........................................................................................24
3.10.2 Description.....................................................................................24
3.10.3 Block Diagram ............................................................................... 24
3.10.4 Adjustment and Test point ............................................................. 24
3.10.5 Connector Pin Assign .................................................................... 24
3.10.6 Assembly Drawing.........................................................................25
3.11 PCB No. 6374 (CPU) ................................................................... 26
June 2006
 3.11.1 Function .........................................................................................26
3.11.2 Descriptions ...................................................................................26
3.11.3 Block Diagram................................................................................28
3.11.4 Cable Connection ..........................................................................29
3.11.5 Actions at PCB Replacement.........................................................29
3.11.6 Connector Pin Assign (PCB No.6374)...........................................31
3.12 PCB No. 9301 ..............................................................................36
3.12.1 Function .........................................................................................36
3.12.2 Descriptions ...................................................................................36
3.12.3 Cable Connection ..........................................................................36
3.12.4 Connector Pin Assign (PCB No. 9301) .........................................37

UF-1000i S/M - ii - June 2006

SECTION 3 ELECTRONICS

3.1 Block Diagram

AC
100-240V UF-1000i Main Unit
50/60Hz
LED
Power Supply
Solenoid valves

Motor

Microcomputer Fan
IPU Digital I/O Driver
(CPU)

Sensors

Switches
Buzzer Measurement Signal processing
Unit
Heaters

Thermisters
Laser

Photomultiplier
power supply DC/AC
converters
ID Barcode Reader (Option)

Printer

Host

FSC pre-amp SSC pre-amp SFL pre-amp Photomultiplier

Built-in
Barcode Pneuematic Unit
reader

Motor

UASU-3 Sensor
Main Unit

Figure 3-1-1: Electronic Block Diagram

UF-1000i S/M 3-1 June 2006

3.2 PCB Layout

PCB No.2166
PCB No. 2160
Optical Unit No.22
(Incl. PCB NO. 2159T1)
PCB No. 2161T1

PMT

Conductivity Board
No.1 Assy

Optical Unit No.23

(Incl. PCB NO.2159)

Laser Diode
Inverter Assy

Detection Unit No.41 Assy

PCB No.1273
PMT Power Supply Unit
U1K Power Supply Unit Assy No.1 (Incl. PCB NO.4085)
(Incl. Switching Power Supply
C6-2HHEC-00-XNIA )

PCB No.6374

PCB No. 3060 PMT Power Supply Unit PCB No.1274

UK1 Control Unit Assy PCB Layout Figure 3-2-1: UF-1000i PCB Layout

UF-1000i S/M 3-2 June 2006

 PCB No. Location Description
(1) PCB NO. 1273 U1K Control Unit Assy I/O Conroller
(2) PCB NO. 1274 Rear side Driver Board
(3) PCB NO. 2160 Detector Block No.41 Assy SFL Pre-amp
(4) PCB NO. 2161T Detector Block No.41 Assy Laser Diod Driver
(5) PCB NO. 2049 Detector Block No.41 Assy Laser Diod Driver Board
(6) PCB NO. 2159 Detector Block No.41 Assy FSC Pre-amp
(7) PCB NO. 2159T1 Detector Block No.41 Assy SSC Pre-amp
(8) PCB NO. 3960 U1K Control Unit Assy Waveform Processing
(9) PCB NO. 4085 PMT Power Supply Unit PMT Power Supply
(10) PCB NO. 6374T4 U1K Control Unit Assy CPU Board
(11) PCB NO. 2166 Conductiviy Board No.1 Assy Conducivity Measurement Board
(12) Invertor Invertor Assy Built-in Pnuematic Power Supply

UF-1000i S/M 3-3 June 2006

3.3 PCB No.1273 (I/O Controller) (5) PWM Controller (SP0307
The controller functions to send PWM signal to PPMC, mediating
3.3.1 Functions (Scope) between
Outline SM0006 and SM0010.
(1) CPU (SH-3) Bus Interface
(6) Stepping Motor Controller (SM0010
After receiving the Bus signal from CPU (SH-3), the decode and Up to 10 Stepping Motors can be controlled in this function.
control signals responding to the following devices are generated.
3.3.2 Power Supply I/O
Synchronized Serial Communications (SM0006)
(1) 5V
PPMC Controller (SM0006)
5 V is supplied from CPU Board (PCB NO.6374 through Extended Bus
PWM Controller (SP0307) Connector
New Waveform Processing FPGASP0352 to Waveform Processing Board PCB No.3060.
Waveform Processing Parameter Memory (2) 3.3V
Conductivity Data Memory 3 V is supplied from CPU Board PCB NO.6374 through Extended Bus
Connector.
(2) Synchronized Serial Communications (SM0006)
The following Synchronized Serial Communications are performed.
SV Actuator Drive Outputs
Sensor Signal Iuputs

(3) Unsynchronized Serial CommunicationsTL16C552A

There are Unsynchronized Serial Communications ports for the
following I/O..
Internal Barcode Reader
Conveyor Unit Connection (Not used)

(4) PPMC Controller (SM0006

Up to eight PPMCs can be controlled in this function..,.

UF-1000i S/M 3-4 June 2006

 J7: SP0307 JTAG Connector
3.3.3 Connector Pin Assign
65532-106
J1: JTAG Connector for Decoder CPLD 1 XTDI
65611-110 2 XTMS
ATCK 1 2 GND 3 XTDO
ATDO 3 4 +3.3V 4 GND
ATMS 5 6 N.C. 5 +5V
N.C. 7 8 N.C. 6 XTCK
ATDI 9 10 GND J8: Test Pin Header
J2: Unsynchronized Serial Communications CH0 Transporter 65611-124
Connection J9: Test Pin Header
3408-5002LCSC-U 65611-124
J3: Unsynchronized Serial Communications CH1 Internal Barcode J10: CPU (SH-3) bus for connection with PCB NO.6374
Reader J11: CPU (SH-3) bus for connection with PCB NO.3060
3429-5002LCSC-U
J4: Synchronized Serial Communications OutputDriver Board PCB
No.1274
3314-5002LCSC-U
J5: PPMC Signal OutputDriver Board PCB No.1274
FX2B-80PA-1_27DSL
J6: 5V Power Supply Connector
B3PS-VH

UF-1000i S/M 3-5 June 2006

3.3.4 PCB Assembly Drawing

Figure 3-3-1: PCB Assembly Drawing

UF-1000i S/M 3-6 June 2006

3.4 PCB No. 1274 (Driver Board) 3.4.2 Function
This PCB have following circuits
3.4.2.1 Stepping Motor Drive Circuit
3.4.1 Outline
(1) Control by the controller (Ten channels)
Ten channel stepping motor drive circuit from PPMC signal of the CPU
board. Eight constant current drives and two constant voltage drive are
3.4.1.1 I/O with the CPU circuit board
used.
(1) Input and output of stepping motor control signal
3.4.2.2 Output signal circuit
The input of the control signal from PPMC and motor limit signal
output (1) DC motor control (one channel)
(2) Input and output of the synchronous serial signal DC motor control for the reaction unit mixing.
The I/O communication of the sensor, the solenoid, LED and the Motor rotation speed can be adjusted by CPU.
analog to digital converter data Refer to section 4.2.4 Mixing Motor Adjustment for detail.
(2) Circuit for the solenoid valve drive
The circuit has 48 ports for driving solenoid valves.
3.4.1.2 I/O with the other actuators
(3) LED drive circuit (Four channels)
(1) Sensor signal inputs Used for the Ready LED. (Green and red)
(2) Stepping motor drive signal output
(3) DC motor drive signal output
3.4.2.3 Sensor input circuit
(4) Drive signal output to solenoid valve, Heaters, LED, Fans and etc
(1) Circuit for photo interrupter (14 channels)
One channel signal of the 14 channels.
3.4.1.3 Power supply input and output
(2) Micro switch circuit (5 channels)
Input of 5V, 12V and 24V (3) Float switch circuit (4 channels)
(4) Reagent sensor (4 channels)
Prism sensor is used as a reagent detection sensor.
FPGA has bubble detection circuit.
(5) Thermistor wire broken detection circuit 6 channels
Status is monitored with A/D converted values of connected
thermistors.
When error status is detected, corresponding heater is turned OFF.

UF-1000i S/M 3-7 June 2006

 3.4.3 Circuit Description
3.4.2.4 A/D Converter
3.4.3.1 Stepping Motor Circuit
Pressure sensor signal and thermistor signal are A/D converted, serial
parallel converted and sent to I/O PCB. 10 Channel motor control
(1) Pressure sensor
5 channels (1) Constant Voltage Drive
CH# Description This circuit receives A, A/, B, B/ from PPMC phase signal from CPU
CH1 0.22MPa and drives motor with constant voltage IC (TD62064AF). PPMC
CH2 Sheath Pressure enable signal controls phase signal input to TD62064AF.
CH3 0.05MPa (2) Constant Current Drive
CH4 Vacuum This circuit receives PPMC phase signal from CPU and drives motor
CH5 Reserved with constant current IC (STK672-600). PPMC enable signal controls
phase signal input to STK672-600.
(2) Temperature detection (thermistor) (3) Micro Step Drive
Thermistor detects 6-channel inputs. This circuit receives PPMC phase signal from CPU and drives motor
Thermistor wire broken is detected. with constant current IC (STK672-600). PPMC enable signal controls
CH# Description phase signal input to STK672-600.
CH1 BACT Reaction Chamber Rotation angle can be controlled using DIR signal from PPMC.
CH2 SED Reaction Chamber
Unit Drive Method
CH3 Sheath Block STM1 Reserved Constant Voltage
CH4 Optical Detector Unit STM2 Rotate Mechanism Constant Voltage
CH5 Environment temp STM3 Z Drive Mechanism Constant Current
CH6 Pneumatic Unit STM4 Y Drive Mechanism Constant Current
STM5 Feed-in (Sampler) Constant Current
3.4.2.5 Heater control STM6 Rack Shift (Sampler) Constant Current
STM7 Feed-out (Sampler) Constant Current
(1) 4-channel DC24V heater is controlled. STM8 Charging Pump Micro Step
(2) This circuit has maximum power of 60 W to drive by dividing heating STM9 Whole Urine Pump Micro Step
time among 60 W heater, 40 W heater and 20 W heater. STM10 Sheath Syringe Micro Step
(3) This circuit has a function to vary target temperature by depending on
the environment temperature. (1ch: for liquid heater)
CH# Description
CH1 BAC Reaction Chamber
CH2 SED Reaction Chamber
CH3 Sheath Block
CH4 Optical Detector Unit

UF-1000i S/M 3-8 June 2006

 June 2006

I/O PCB Driver Board

Serial-Parallel
Conversion
SV (47 Ports)
Motor Limit
FPGA Stepping Motor
4 Ports
Motor Driver
[Motor Enable Signal]
[Stepping Angle Signal]
Clock
Generation
[Stepping Angle Signal]
LED (4 Ports)
SOL (4 Ports)
Driver
Fan 3 Ports
Driver Inverter PCB
Automatic Shutdown Signal
Relay Controlled Data

Figure 3-4-1: Block Diagram

Power
Supply DC Motor
Control Circuit
+5V [Setting Data]
+12V
+24V
Stepdown Circuit DC Motor 1 Port
PWM Generation
Circuit
[Controlled DAta]
Temp.CTRL

3-9
Circout Heater Driver Heater 4 Ports
5V [Setting Data]
Generation
Circuit
3.3V
Generation
Circuit [Thermister Shutdown
Signal]
1.5V Thermistor Thermistor
Generation Amp. 6 Ports
Circuit
A/D C
Control Circuit A/D
Conversion [Temp. Analog Signal]
[Controlled Data] Conductivity Conductivity
Error Signal Sensor Circuit Sensor
Mechanical SW(9 Ports)
Pipette Crush Photo Sensor (14 Ports)
Buffer
Detection
Circuit Pipette Crush Sensor
(DC Motor rotating Number
Sensor)
Rotating Number
Monitoring
Circuit
Rack Shift
Monitoring
Circuit
[Pressure Analog
Signal)
Pressure Sensor 5
Ports
A/D C A/D
Control Circuit Conversion
Overflow Detection Conductivity Sensor
Circuit
Controlled Data
Reset
Circuit
CLK Standard Clock
10MHz Generation Circuit
3.4.4 Block Diagram

UF-1000i S/M
 3.5.1 I/O
3.5 PCB No.2159
3.5.1.1 Signal I/O
1 5

OS 3.3u/
(1) Signal output (J1-6: signal output; J1-5: ground) to wave form

C14

16V
Connector J1
M3 2 6
LTC1144
processing amplifier

OS 3.3u/
C17
(2) Power supply I/O

C18

16V
10u16V
L2 L1
12 V input (J1-2: 12 V input; J1-1: ground) from wave form
processing PCB

C10u16

C10u
16V
3.5.1.2 Function and Description

V
First stage
Photo Diode
amplifier (1) Current-Voltage Conversion Circuit
PD (Photo Diode) S1223 signal converts current-voltage and output
Active filter amplified signal from J1-6. Voltage is 12V. PCB No.2159 is for Front
Constant
voltage circuit Scattered light (FSC)

Amplifier PCB No.2159T1 is for Side Scattered Light (SSC)

PCB No.2159 for FSC

Figure 3-5-1: PCB Assembly Drawing Current Voltage Conversion Factor: 22.5K V/A
Reference Voltage: 3.55 V (when 12.0 V is supplied)
Frequency Response: 2.4 MHz or more
Noise characteristics: less than 0.20 mV
Maximum output voltage: 10.8 V (when 12.0 V is supplied), 9.8
(when 11.4 V is supplied)

PCB No.2159T1 for SSC

Current Voltage Conversion Factor: 1100K V/A
Reference Voltage: 3.55 V (when 12.0 V is supplied)

UF-1000i S/M 3-10 June 2006

 Frequency Response: 460kHz or more 3.6.1 Outline
Noise characteristics: less than 0.50 mV 3.6.1.1 I/O
Maximum output voltage: 10.8 V (when 12.0 V is supplied), 9.8 V (1) Signal I/O
(when 11.4 V is supplied) Signal input (J2) From Photo multiplier (SFL)
Signal output (J1-6:signal output; J1-5: ground) to wave form
3.6 PCB No.2160 processing amplifier
Power supply I/O
1 5 12 V input (J1-2: 12 V input; J1-1: ground) from wave form
L1 Connector
C10u16V processing PCB
2 6

3.6.1.2 Function and Description

(1) Current-Voltage Conversion Circuit
Signal input from Photo Multiplier is converted current-voltage and is
output amplified signal from J1-6. Voltage is 12V.
Amplifier Current Current Voltage Conversion Factor: 312.6K V/A
Active Filter Voltage
Reference Voltage: 3.61 V (when 12.0 V is supplied)
Conversion
Frequency Response: 2.5MHz or more
Noise characteristics: less than 1.50 mV
27DP-R-PC Maximum output voltage: 10.8 V (when 12.0 V is supplied), 9.8 V
J2
(when 11.4 V is supplied)

Figure 3-6-1: PCB Assembly Drawing

UF-1000i S/M 3-11 June 2006

3.7 PCB No.2166 (Conductivity PCB) 6) A/D Conversion Circuit

3.7.1 Outline
This Circuit converts Differential Amplifier Signal, converted into DC,
This PCB is intended for measuring Electric Conductivity Circuit of
into readable 12-bit digital value.
UF1000i. Impedance of sample between two electrodes are maesued,
and electrical conductivity is computed by sofftware processing
3.7.2 Block Diagram
afterward.

There are following functions and circuits in this PCB. Conductivity

Sensor
1) Sine wave Oscillator Circuit
This circuit generates sine wave at approx. 1KHz frequency.
Sine Wave Wave 12-bit
2) Wave Amplitude Equalization Circuit Oscillation Differential Rectification A/D
Circuit Amplification Amplification Conversion
The circuit equalizes the generated sine wave to constant amplitude. Smoothing
3) Voltage Divider Circuit
As an input source, equalized sine wave is applied to Voltage Divider Figure 3-7-1: PCB No.2166 Block Diagram

Circuit consisting of the sample between two electrodes and the

fixed resistance (470) of the board, and sine wave at the both ends
of fixed-resistance is taken as deferential reflecting sample
impedance.
4) Differential Amplifier Circuit
This circuit amplifies the detected Differential in voltage divider
circuit.
5) Rectification/Smoothing Circuit
The circuit rectifies and smoothes output signals from Differential
Amplifier for A/D conversion.

UF-1000i S/M 3-12 June 2006

3.7.3 Connector Pin Assign J3:
(Sampler Mixing Sensor Electrode Connection)
J1:
(Conductivity Measuring Terminal Connection) AC side 1
Analog GND 2
Analog GND 2 1 AC side
Analog GND 4 3 Analog GND
J4:
(Aspiration Sensor Electrode Connection)
J2:
(Power Supply & Digital Signal Outputs) AC side 1
Not Connected 2
(Not connected) 2 1 (Not connected)
Analog GND 3
Digital GND 4 3 Digital +5V
COND_CLK 6 5 COND_DI
COND_DORb 8 7 COND_DO
DPTCLK 10 9 SEL2
DPT2CSb 12 11 DPTDAT

UF-1000i S/M 3-13 June 2006

3.7.4 Assembly Drawing

Figure 3-7-2: PCB No. 2166 Assembly Drawing

UF-1000i S/M 3-14 June 2006

3.8 PCB No. 2049 (Laser Diode)
(1) Function
This unit is composed of the LD as the light source.
(2) Adjustment
None
(3) Block diagram
None
(4) Description
The oscillator itself is a Colpitts oscillator.
(5) Assembly drawing

Figure 3-8-1: PCB Assembly Drawing

UF-1000i S/M 3-15 June 2006

3.9 PCB No.3060 (Waveform Processing) Table 3 Variable Range of Amplification Ratio
- SED Measuring Mode
3.9.1 Outline CH1 Input : FSC Preamplifier
Range: X0.9 - X1.8
PCB No.3960 is the board loaded with Scattergram Waveform
Amplified after applying
Processing Circuit of UF1000i S_FSC value.
CH2 Input : SSC Preamplifier
RangeX49 X98
(1) Analog Signal Processing Circuit
Amplified after applying
The circuit performs processing of each preamplifier filtering, S_SSC value.
amplification, and DC restoration.
This circuit consists of four channels, CH1 through CH4.
CH3 Input : SFL Preamplifier
Amplification Ratio : X3.0
In UF-1000i, the amplification factor differs according to each channel
The factor is fixed in
in SED measuring mode, or BACT measuring mode, as shown in the
UF-1000i
following table.
CH4 Input : SFL Preamplifier
RangeX0.5 - X1.1
Amplified after applying
S_FLL value.
NOTE:
S_FSC, S_SSC, S_FLL, B_FSC are Sensitivity Setting values to
be set in adjusting Sensitivity from 0 to 255. (Refer to Section 4.3
Sensitivity Adjustment)
UF-1000i S/M 3-16
BACT Measuring Mode
Input : FSC Preamplifier
Variable RangeX20 - X40
Amplified after applying
B_FSC value.
Input : FSC Preamplifier
Amplification Factoreither of
the range,
X1.1-X2.2
The factor is fixed in
UF-1000i
Input : SFL Preamplifier
Amplification Factor : X2.0
The factor is fixed in
UF-1000i
Input : SFL Preamplifier
Amplification Factor : either
of the range, X1.4 2.8
The factor is fixed in
UF-1000i
June 2006
(2) AD Conversion Circuit
The circuit converts the processed analogue signal into Digital values.
Sampling with 40MHz and AD convert by full range 2V-4V.
Use 4 converters.
(3) Digital wave processing Circuit
Equipped with digital data processing FPGA. Perform digital
smoothing, characteristic parameter calculation and Log converting.
(4) Characteristic parameter Memory
Store Characteristic parameter in 1MB SRAM.
1 particle: 4 ch x 2 parameters + 2 parameters = 10 particles
The stock capacity is up to 65535 particles.
Functionally, the stock capacity is 16 parameters/particle x 65536
particles.
(5) Photomultiplier Voltage Adjustment Circuit
This circuit outputs the photomultiplier adjustment signal according
to the control signal form photomultiplier power supply board of
fluorescence channel.
Photomaltiplier voltage is valiable by 12 bits DA converter.
Valiable Range: 0-571V, in 4096 steps.
In SED mode, parameter S_FLH is reflected.
In BACT mode, parameter B_SLH is relfected.
NOTE:
S_FLH, B_FLH are set values of which range is [0]-[4095] and
these values are set at senditivity adjustment.
(Refer to Section 4.3 Sensitivity Adjustment)
(6) LD Driver Board Interface
Output singnal to Laser Diod(LD) Driver, and control LD emision
ON/OFF and radio-frequency wave overlap ON/OFF.
Monitor LD Drive Current by inputting drive current monitor voltage
and storing AD converting value.
UF-1000i S/M
(7) Conductivity Measure Board Interface
Output AD converter and control signal of digital potentiometer.
(8) Standard Voltage generating Circuit
Generate standard voltage using on PCB 3960.
(9) Power Input Circuit
Input power form SW regulator and reduce noize for analog circuitby
filter.
Gain digital +5V power form CPU (SH-3) bus.
(10) CPU (SH-3) Bus Interface
CPU(SH-3) bus to communicate with CPU Board.
(11) Free Dip Switch (S2)
This is free DIP switch (4-bit) for service use.
This switch can be accessible from CPU via CPU (SH-3) bus.
NOTE:
Since PCB No. 3060 is at most accessible location in Control Unit
consisted of three layer PCBs, Free DIP switch for service purpose is
placed on this board. Free DIP SW function depends on software,
of CPU board, but not related to PCBs original function directly.
In the UF-1000i program, S2-4 bit is assigned for initialization purpose
of BBU-RAM on CPU board.
CAUTION:
If S2 bit-4 is set ON, BBU-RAM of CPU board is initialized and all the
setting information stored in BBU-RAM is cleared at every power-on.
Therefore, be careful not to turn S2bit-4 ON except when BBU-RAM
initialization is needed.
3-17 June 2006
3.9.2 LEDs and Test Points Test Points
LEDs: No. Description
TP1 GND for Digital CircuitDGND
LED Status Use
TP2 +1.5V
D25 ON BACT Reactor Chamber Heater
TP3 GND for Digital CircuitDGND
Active
D28 ON SED Reactor Chamber Heater TP4 +3.3V
Active TP5 Sheath Heater Temp. Analogue Signal
D29 ON Sheath Block Heater Active (before A/D conversion)
D32 ON Optical Detector Block Heater TP6 Optical Detector Temp. Analogue Signalbefore
Active A/D conversion
D31 ON FPGA Configuration Error TP7 Pneumatic Unit Analogue Sig.
(Before A/D Conversion
TP8 Reference Voltage for temperature measurement
2.495V
TP 9 BAC Reaction Unit Temp Analogue Sig.
(Before A/D Conversion)
TP10 SED Reaction Unit Temp Analogue Sig.
(Before A/D Conversion)
TP 11 Environment Temp Analogue Sig.
(Before A/D Conversion)
TP 12 Ground for Analogue 5VAGND
TP 13 Ground for Digital CircuitDGND
TP 14 Ground for Digital CircuitDGND
To be continued

UF-1000i S/M 3-18 June 2006

Test Points (continue) 3.9.3 Connector Pin Asign
No. Description
J1: connectin with conductivity PCB
TP 15 5V for Digital CircuitD5V 2 - 1 -
TP 16 Ground for 24V (24V_GND) 4 GND 3 D5V
TP 17 +24V (for Heater Drive) 6 ADC2_CLK 5 ADC2_DI
TP 18 Ground for +12V12V_GND 8 ADC2_EOC 7 ADC2_DO
TP 19 +12V 10 ADC2_DORb 9 ADC2_CSb
TP 20 Electric Conduction Sensor 12 DPTCLK 11 COND_SEL2
(for monitoring Overflow Error) 14 DPT2CSb 13 DPTDAT
Analogue Sig.Before A/D Conversion
TP 21 DC Motor Dive Voltage J2: connectin with I/O conroller PCB extention bus
1 GND 2 -
3 GND 4 D0
5 D2 6 D4
7 D6 8 D8
9 D10 10 D12
11 D14 12 D5V
13 D5V 14 D5V
15 A0 16 A2
17 A4 18 A6
19 A8 20 A10
21 A12 22 A14
23 GND 24 A16
25 A18 26 A20
27 A22 28 A24

UF-1000i S/M 3-19 June 2006

J2: TX15-100P-9ST-MH1 J2: TX15-100P-9ST-MH1
29 - 30 - 77 A23 78 GND
31 GND 32 RWb 79 EX16CSb 80 -
33 RDb 34 - 81 GND 82 FPGAWAITb
35 - 36 - 83 - 84 READb
37 - 38 - 85 - 86 -
39 GND 40 - 87 FPGAINTb 88 GND
41 - 42 - 89 GND 90 -
43 D5V 44 FPGACSb 91 - 92 -
45 GND 46 SYSRSTb 93 D5V 94 PRMRAMCSb
47 GND 48 - 95 GND 96 GND
49 - 50 GND 97 GND 98 -
51 GND 52 GND 99 - 100 GND
53 GND 54 D1
55 D3 56 D5
57 D7 58 D9 J3: DF1B-8DP-2.5DSA
59 D11 60 D13 (output Photomauliplier 2 Power supply& Control
61 D15 62 D5V 2 AGND 1 +12V
63 D5V 64 D5V 4 AGND 3 -
65 A1 66 A3 6 Photomal 5 Control signal
67 A5 68 A7 power supply
69 A9 70 A11
71 A13 72 A15 8 - 7 -
73 GND 74 A17
75 A19 76 A21

UF-1000i S/M 3-20 June 2006

J4: DF1B-6DP-2.5DSA (output Photomuliplier 1 Power supply& Control J6: DF11-10DP-2DSA (LD Driver)
2 AGND 1 +12V 2 AGND 1 +12V
4 AGND 3 -
6 Photomal 5 Control signal 4 LDON 3 +12V
power supply 6 LDHFBON 5 +12V

8 GND 7 -
10 AGND 9 LD_I_MON
J5: 2.54mm Pitch 2 line 24 polepin header (tesat pin header)
1 DPMD0 2 DPMD8
J7: 2.54mm pitch 2 line 24 pole pinheader (test pin header)
3 DPMD1 4 DPMD9
1 EP1CCLK 2 EP1CDATA
5 DPMD2 6 DPMD10
3 CONF_DON 4 INIT_DONE
7 DPMD3 8 DPMD11
E
9 DPMD4 10 DPMD12
5 DPT1CSb 6 DPT2CSb
11 DPMD5 12 DPMD13
7 DPTCLK 8 DPTDAT
13 DPMD6 14 DPMD14
9 DACCSb 10 DACCLK
15 DPMD7 16 DPMD15
11 DACDAT 12 GND
17 RAMRW 18 RAMOEb
13 ADC1_EOC 14 ADC1_CLK
19 RAMCE1b 20 RAMCE2
15 ADC1_DI 16 ADC1_DO
21 RAMLBb 22 RAMUBb
17 ADC2_DOC 18 ADC2_CLK
23 RAMBYTEb 24 GND
19 ADC2_DI 20 ADC2_DO
21 PROCESS 22 USROUT1
23 USROUT2 24 GND

UF-1000i S/M 3-21 June 2006

J8: DF11-12DP-2DSA
3.9.4 Dip Switch Setting
(Input FS preamplifier/SS preamplifier/ FL preamplifier
2 FSC 1 AGND S2:
4 SSC 3 AGND Deafult setting for S2 is as blow;
6 +12V 5 AGND
(FSCpreamplifier) 4 3 2 1
8 +12V 7 AGND OFF OFF OFF OFF
(SSCpreamplifier)
10 +12V 9 AGND
(FLpreamplifier In UF-1000i program, the bit-4 is assigned for BBU-RAM initialization
12 SFL 11 AGND purpose of CPU board.

J9: B4PS-VH12V/5V power input

1 +12V 3.9.5 Power Supply
2 GND(12V) Digital+1.5V / Digital+3.3VDigital+5VAnalogue+5VAnalogue+12V
3 +5V
4 GND(5V) NOTE:
5V for this board is supplied from CPU board via CPU (SH-3) bus.
J10: Wave Processing FPGAROM In this PCB, GND for Analogue/Digital is separated.
1 EP1CCLK 2 GND
3 CONF_DONE 4 +3.3V
5 nCONFIG 6 nCE
7 EP1CDATA 8 DPCS_nCS
9 ASDO 10 GND

UF-1000i S/M 3-22 June 2006

3.9.6 Assembly Drawing

Figure 3-9-1: PCB Assembly Drawing

UF-1000i S/M 3-23 June 2006

3.10 PCB No. 4085 (Photomultiplier Power Supply board) 3.10.4 Adjustment and Test point

3.10.1 Function None.

This board has the Power Supply circuit for the photomultiplier
(OPTON-1NC-15). 3.10.5 Connector Pin Assign
Power source voltage for photmultiplier (PMT) can be controlled from
waveform procesing board (PCB No.3060). 1) J1 (PMT Power Source Voltage)
Refer to 3.10. PCB No.3060.
Pin I/O Signals Pin No. I/O Signals

3.10.2 Description No.

J1-1 Out GND J1-3 Out Photomul.
OPTON-1NC-15:
1) By the control signal from PCB No.3060, power source voltage can be Output Voltage
changed to -1000V. J1-2 Out GND ---- ---- -----

3.10.3 Block Diagram

2) J2 (Power Supply: +15V)
Pin I/O Signals Pin No. I/O Signals
No.
J2-1 In +15V J2-3 In GND

3) J3 (Adjustment for PMT Power Source voltage)

Pin I/O Signals Pin No. I/O Signals
No.
J3-1 AGND J3-3 N.C.
J3-2 PMT Power J3-4 PMT
Sourece (+) Control Signal

Figure 3-10-1: PCB No. 4085 Block Diagram

UF-1000i S/M 3-24 June 2006

3.10.6 Assembly Drawing

Figure 3-10-2: PCB No. 4085 Assembly Drawing

UF-1000i S/M 3-25 June 2006

3.11 PCB No. 6374 (CPU) (6) Calendar Clock
Epson RTC7301SF. For Year 2000 through 2099.

3.11.1 Function (7) LCD

This PCB has the SH-3RISC core CPU and Linux-OS with 16 MB work 320x240 pixels, 256 colors. Controller (SED1375) with 80 KB
memory (SDRAM) on board to cope with the Network communication VRAM
system.
(8) Buzzer Controller
3.11.2 Descriptions Buzzer is mounted on PCB No. 9301 (relay board).

(1) CPU (9) Serial Interface

The SH-3 core 32 bit RISC CPU and the 16 MB work memory RS232C port for host computer
(SDRAM) are packaged for UF-1000i use. Internal 133 MHz, *D-sub 9-pin (male) connector
External 33 MHz clock. RS232C port for bar code reader
*DIN 8-pin round connector. 5 V is supplied to pin No.8.

(2) BBURAM
(10) Parallel interface
512 KB (4 MB SRAM x 1)
Lithium battery 3.0 V, 1000m A is used. 15-year backup at power Centronics for built-in printer (not used)
OFF status is expected. 5V for logic and 8 V for head motor drive are supplied.
Centronics for external printer
*D-sub 25-pin (female) connector. (Pin No.26 is not used.)
(3) Work Memory
16 MB (64 MB SDRAM x 2)

(4) Program Memory

4MB (16 MB flash memory x 2)

(5) PCMCIA
1 slot of PCMCIA connector is provided.

UF-1000i S/M 3-26 June 2006

(11) TCP/IP
Ethernet (10BASE-T) x 1

(12) Power Supply

12 VDC is input from Switching Regulator. DC-DC converter
generates 5 VDC, 500 mA for logic, and 8 VDC for built-in printer.
From the 5 VDC, then 3.3 VDC (15 mA) is generated for pull up
purpose only, and also 1.9 VDC is generated for CPU internal
power supply. The power consumption is approx. 1 A.

UF-1000i S/M 3-27 June 2006

3.11.3 Block Diagram
12V
3.3V drive 5V drive
SYS_5V
(5V) PRT_8V CLK
33MHz
3.3V
Power REMOTE
1.9V SCI_2 33MHz
battery CONSOLE
RESET
CPU_AD
ICE Connector
VBK_5V
DEBUG_PORT
SYNC_SERIAL CPU SH7709 DIP SW
VBK_3.3V IN/OUT SDRAM
ICE
IrDA I/F SCI_1 16MByte ICE PINS
BBURAM
BBU RAM
256256KB
KB

SCI_0

LEVEL SHIFTER (from 3.3 V to 5 V)

PCMCIA I/F FLASH LCD Decoder
ISP Peripheral
FLASH CPLD
MEMORY Controller circuit
MEMORY
4MByte SED1375 CPLD
4Mbyte

BZ_SIG
MEMORY
CARD
4MB- INVERTER
PANEL control Built-in
Printer

DC-DC TOUCH
12V LCD BZ
convertor PANEL

VR
Operation Unit

EPROM
I/F
REMOTE Debug Extended Bus VBK_5V
CONSOLE CPU_AD RTC
Connector Connector Serial
Port Ethernet EEPROM
DEBUG_ SERIAL controller controller MAC
LOGGER, IN/OUT TL16C552
PORT address
MOTOR
12V/5V
EPROM CTRL,
ISP DBG PORT SV DRV,
JUMPPERi SENSOR, Pulse
ISP, etc. TEMP, H trans
PRESSURE B
O
, etc. C
S
R Ethernet
T

Figure 3-11-1: PCB No. 6374 Block Diagram

UF-1000i S/M 3-28 June 2006

3.11.4 Cable Connection 3.11.5 Actions at PCB Replacement

Built-in PCB No.9301 (1) Data Back-Up

Power Printer Built-in (Operation Before replacing PCB No. 6374, check if the setting backup (with
Supply Power Printer Panel Relay) extension .bak) is taken to the any appropriate media beforehand.
+12V Supply Signal IrDA In case there is no backup, perform the data backup referring Section
5.3.6 Service Settings.
J1 J2 J3 J4 J5
(2) Switch Setting
Check the state of DIP SW (S1) of a new PCB is as below and when
J6 Ethernet
it differs, change as follows.
Bar Code 8 7 6 5 4 3 2 1
J Reader
7 ON ON ON ON ON ON ON OFF

I/O PCB No.6374

Boards J HOST (3) Replace the old PCB No. 6374 with new one.
1 J J (4) Remove CF card from old PCB No. 6374 then set it into new PCB
3 9 8
No. 6374 slot.
External
Printer (5) Turn PCB No. 3060s DIP SW S2 bit-2 to ON.
(6) Start-up UF-1000i system in a hot start mode skipping all errors.
(7) Restore BBU-RAM data from backup file referring Section 5.3.6
PCMCIA Service Settings.
J10 (8) Turn the instrument power OFF.
(9) Turn PCB No. 3060s DIP SW S2 bit-2 to OFF.
CAUTION:
If PCB No. 3060s S2 bit-4 is left ON unchanged, BBU-RAM of CPU
J12 J11 board is initialized and all the setting information stored in BBU-RAM
is cleared again at the next power-on.

ICE Board Debug Board

UF-1000i S/M 3-29 June 2006

(10) Turn the system power on and check if all the setting values
including instrument serial number are reflected to the system
correctly.

UF-1000i S/M 3-30 June 2006

3.11.6 Connector Pin Assign (PCB No.6374) (3) J3: Built-in Printer Signal
Pin Function Pin Function

(1) J1: Power Supply 1 IP_STRBb 2 IP_AFb

Pin Function 3 IP_DATA0 4 IP_ERRb

1 12V 5 IP_DATA1 6 IP_RESETb

2 GND12 7 IP_DATA2 8 5V

3 (5V) 9 IP_DATA3 10 GND

4 (GND) 11 IP_DATA4 12 GND

13 IP_DATA5 14 GND

(2) J2: Built-in Printer Power 15 IP_DATA6 16 GND

17 IP_DATA7 18 GND
Pin Function
19 IP_ACKb 20 GND
1 PRT_8V
21 IP_BUSY 22 GND
2 PRT_8V
23 IP_PE 24 GND
3 PRT_GND
25 IP_COP 26 GND
4 PRT_GND
5 GND
6 5V

UF-1000i S/M 3-31 June 2006

(4) J4: Operation Panel (6) J6: Ethernet
Pin Function Pin Function Pin Function
1 GND 2 GND 1 TDP
3 5V 4 5V 2 TDM
5 FRAME 6 LOAD 3 RDP
7 CP 8 DISPOFFb 4 NC
9 D7 10 D6 5 NC
11 D5 12 D4 6 RDM
13 D3 14 D2 7 NC
15 D1 16 D0 8 NC
17 GND 18 GND
19 CFLDOWNb 20 BZSIG (7) J7: Bar Code Reader
21 BZCTR[1] 22 BZCTR[0] Pin Function
23 TP_TXD 24 TP_RXD 1 P_RXD1
25 RESETb 26 GND12 2 P_TXD1
27 12V 28 12V 3 P_CTS1
29 GND12 30 GND12 4 P_RTS1
5 Loop to PIN6
(5) J5: IrDA 6 Loop to PIN5
Pin Function 7 GND
1 3.3V 8 5V
2 RXD1
3 TXD1
4 GND

UF-1000i S/M 3-32 June 2006

(8) J8: HOST (9) J9: External Printer
Pin Function Pin Function Pin Function
1 NC 1 STRBb 2 AFb
2 P_RXD0 3 DATA0 4 ERRb
3 P_TXD0 5 DATA1 6 INITb
4 P_DTR0 7 DATA2 8 SLINb
5 GND 9 DATA3 10 GND
6 P_DSR0 11 DATA4 12 GND
7 P_RTS0 13 DATA5 14 GND
8 P_CTS0 15 DATA6 16 GND
9 NC 17 DATA7 18 GND
19 ACKb 20 GND
21 BUSY 22 GND
23 PE 24 GND
25 SLCT 26 GND

UF-1000i S/M 3-33 June 2006

(10) J10: PCMCIA (10) J10: PCMCIA (continue)
Pin Function Pin Function Pin Function Pin Function
1 GND 35 GND 22 P_A7 56 P_A25
2 P_D3 36 P_CD1b 23 P_A6 57 P_VS2b
3 P_D4 37 P_D11 24 P_A5 58 P_RESETb
4 P_D5 38 P_D12 25 P_A4 59 P_WAITb
5 P_D6 39 P_D13 26 P_A3 60 P_INPACKb
6 P_D7 40 P_D14 27 P_A2 61 P_REGb
7 P_CE1b 41 P_D15 28 P_A1 62 P_BVD2
8 P_A10 42 P_CE2b 29 P_A0 63 P_BVD1
9 P_OEb 43 P_VS1b 30 P_D0 64 P_D8
10 P_A11 44 P_IORDb 31 P_D1 65 P_D9
11 P_A9 45 P_IOWRb 32 P_D2 66 P_D10
12 P_A8 46 P_A17 33 P_IOIS16b 67 P_CD2b
13 P_A13 47 P_A18 34 GND 68 GND
14 P_A14 48 P_A19
15 P_WEb 49 P_A20
16 P_RDYb 50 P_A21
17 CARD_VCC 51 CARD_VCC
18 CARD_VPP 52 CARD_VPP
19 P_A16 53 P_A22
20 P_A15 54 P_A23
21 P_A12 55 P_A24
To be continued

UF-1000i S/M 3-34 June 2006

(11J13: Extended Bus (11) J13: Extended Bus (continue)
Pin Function Pin Function Pin Function Pin Function
1 GND 51 GND 27 A_A22 77 A_A23
2 A_CKIO 52 GND 28 A_A24 78 GND
3 GND 53 GND 29 EX8CSb 79 EX16CSb
4 A_D0 54 A_D1 30 (EXISACSb) 80 (EXIOCS16b)
5 A_D2 55 A_D3 31 GND 81 GND
6 A_D4 56 A_D5 32 A_RDWRb 82 EXWAITb
7 A_D6 57 A_D7 33 A_RDb 83 A_BSb
8 A_D8 58 A_D9 34 A_WE0b 84 A_WE1b
9 A_D10 59 A_D11 35 (IORDb) 85 (IOWRb)
10 A_D12 60 A_D13 36 EXIRQ0b 86 EXIRQ1b
11 A_D14 61 A_D15 37 EXIRQ2b 87 EXIRQ3b
12 5V 62 5V 38 EXIRQ4b 88 GND
13 5V 63 5V 39 GND 89 GND
14 5V 64 5V 40 SERCLK 90 SERSVLTCH
15 A_A0 65 A_A1 41 SERDIN 91 SERDOUT
16 A_A2 66 A_A3
42 SERSENSLTCHb 92 SERENb
17 A_A4 67 A_A5
43 5V 93 5V
18 A_A6 68 A_A7
44 3.3V 94 3.3V
19 A_A8 69 A_A9
45 GND 95 GND
20 A_A10 70 A_A11
46 RESET1b 96 GND
21 A_A12 71 A_A13
47 GND 97 GND
22 A_A14 72 A_A15
48 ANA0 98 ANA1
23 GND 73 GND
24 A_A16 74 A_A17 49 ANA2 99 ANA3
25 A_A18 75 A_A19 50 GND 100 GND
26 A_A20 76 A_A21
To be continued To be continued

UF-1000i S/M 3-35 June 2006

3.12 PCB No. 9301 3.12.3 Cable Connection

Inverter CPU
3.12.1 Function
This board is LCD relay board. Touch panel controller and buzzer are
mounted on this board.
J1 J2

3.12.2 Descriptions

(1) Touch Panel Control

Has the interface with the analog touch panel. Touch

J3

J4
Panel
(2) LCD Control Signal Relay
Relays the signal from the CPU board to LCD.
Buzzer
LCD

J5
(3) LCD Power Supply
DC-DC Converter generates the power for the LCD (VEE). The J7 J6
voltage can be adjusted by VR for contrast adjustment.

(4) Buzzer
Buzzer level is adjusted to 4 levels by digital signals from CPU. VR Buzzer (external)

(5) CFL
Supplies +12V to the inverter (for LCD backlight). Backlight amount
is adjusted by the signal from CPU.

UF-1000i S/M 3-36 June 2006

3.12.4 Connector Pin Assign (PCB No. 9301) (2) J2: CPU (Continue)
12 D4 27 12V

(1) J1: CFL 13 D3 28 12V

Pin Function 14 D2 29 GND (12V)

1 12V 15 D1 30 GND (12V)

2 GND (12V)
(3) J3: Touch Panel (Not Used)
3 12V
Pin Function
4 CFLDOWN
1 YL
5 GND (12V)
2 YLref

(2) J2: CPU 3 YUewd

Pin Function Pin Function 4 YU

1 GND (5V) 16 D0 5 XR

2 GND (5V) 17 GND (5V) 6 XL

3 5V 18 GND (5V) 7 Xlref

4 5V 19 CFLDOWNb 8 XRref

5 FRAME 20 BZSIG
(4) J4: Touch Panel
6 LOAD 21 BZCTR[1]
Pin Function
7 CP 22 BZCTR[0]
1 YU
8 DISPOFFb 23 TxD
2 XR
9 D7 24 RxD
3 YL
10 D6 25 RESETb
4 XL
11 D5 26 GND (12V)
To be continued

UF-1000i S/M 3-37 June 2006

(5) J5: LCD (6) J6: Buzzer (external)
Pin Function Pin Function
1 FRAME 1 12V
2 LOAD 2 BZ
3 CP 3 GND (12V)
4 DISPOFFb 4 GND (12V)
5 VCC
6 GND (7) J7: VR (Contrast Adjustment)
7 VEE Pin Function
8 D7 1 CONT-A
9 D6 2 GND
10 D5 3 CONT-B
11 D4 4 GND
12 D3
13 D2
14 D1
15 D0

UF-1000i S/M 3-38 June 2006