User's Guide

SLAU564A February 2014 Revised February 2014

TLV320AIC3268EVM-U Evaluation Module

This Users Guide describes the operation, use, and features of the TLV320AIC3268EVM-U. For
questions and support go to the E2E forums (e2e.ti.com).
The main contents of this document are:
Hardware descriptions and implementation
Start up procedure using PurePath Console 2 (PPC2) software with the AIC3268 plug-in

Table 1. Related Documents

Document Title Literature Number
TLV320AIC3268 Data Sheet SLAS953
PurePath Graphic Development Suite PurePath Console

Contents
1 Features ...................................................................................................................... 2
2 Introduction .................................................................................................................. 2
2.1 Electrostatic Discharge Warning ................................................................................. 2
2.2 Unpacking the EVM ................................................................................................ 3
3 Getting Started .............................................................................................................. 4
4 PurePath Console 2 Software ............................................................................................. 4
4.1 Installation ........................................................................................................... 4
4.2 Graphical User Interface (GUI) ................................................................................... 5
5 TLV320AIC3268EVM-U Default Jumper Locations .................................................................... 7
6 TLV320AIC3268EVM-U EVM Schematics .............................................................................. 8
7 TLV320AIC3268EVM-U EVM Board Layout ........................................................................... 17
8 TLV320AIC3268EVM-U Bill of Materials ............................................................................... 19
9 Writing Scripts .............................................................................................................. 22

List of Figures
1 TLV320AIC3268EVM-U Top Board Photo .............................................................................. 3
2 TLV320AIC3268EVM-U Bottom Board Photo ........................................................................... 3
3 Main Panel ................................................................................................................... 5
4 Register Inspector Window ................................................................................................ 6
5 TLV320AIC3268RGC Block Diagram .................................................................................... 8
6 TAS1020BPFB USB Controller ........................................................................................... 9
7 Sample Rate Converters for ASIs ....................................................................................... 10
8 GPIO and MCLK for AIC3268 ........................................................................................... 11
9 LDO Supplies and Analog Outputs ..................................................................................... 12
10 TLV320AIC3268 Schematic .............................................................................................. 13
11 Audio Connectors ......................................................................................................... 14
12 I2C Translation and Selection ............................................................................................ 15
13 Breakout Board Connections ............................................................................................ 16
14 Top Xray View ............................................................................................................. 17
PurePath is a trademark of Texas Instruments.
Windows is a registered trademark of Microsoft Corporation.

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Features www.ti.com

15 Silkscreen Top ............................................................................................................. 17

16 Silkscreen Bottom ......................................................................................................... 18

1 Features
Full featured EVM with the TLV320AIC3268 Audio Codec
USB connection to PC provides power, control and streaming audio for quick evaluation
Easy-to-use PurePath Console 2 software provides graphical user interface to configure and control
AIC3268

2 Introduction
This specific evaluation module (EVM) is a programmable USB audio device that features the
TLV320AIC3268 Audio Codec with miniDSP.

2.1 Electrostatic Discharge Warning

Many of the components on the EVM are susceptible to damage by electrostatic discharge (ESD). Users
are advised to observe proper ESD handling precautions when unpacking and handling the EVM,
including the use of a grounded wrist strap at an approved ESD workstation.

CAUTION
Failure to observe ESD handling procedures can result in damage to EVM
components.

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www.ti.com Introduction

2.2 Unpacking the EVM

On opening the TLV320AIC3268EVM-U package, ensure that the following item is included:
One TLV320AIC3268EVM-U board using one TLV320AIC3268 (Figure 1 and Figure 2)
If either of the board or the TLV320AIC3268 device is missing, contact the Texas Instruments Product
Information Center to inquire about a replacement.

Figure 1. TLV320AIC3268EVM-U Top Board Photo

Figure 2. TLV320AIC3268EVM-U Bottom Board Photo

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3 Getting Started
1. Request and download the PPC2 software located in the EVM product folder on the web.
2. Connect the EVM to USB port, LED lights LED1 and LED2 should illuminate once the EVM is detected
by Windows PC. Also, in the Windows Device Manager, the EVM should be recognized as a USB
composite device, a USB audio device and an HID-compliant device.
3. Connect headphones to jack J7, labeled HP OUT.
4. Open PPC2 and in the Command Buffer Interface select Open.
5. Download the most up-to-date scripts from the product folder. Navigate to that folder and select script
1.1 and click Execute.
6. Play audio through any media tool. Make sure that the playback (and recording) device is USB-
AudioEVM in the Windows control panel.
To adjust playback volume, open Sound in control panel, select the USB-AudioEVM device and
click Properties.
Similarly, the other example configurations can be tried and sound can be recorded using the
microphone available on the board.
7. Install jumpers on the EVM as per the requirements to make the right signal connections.

4 PurePath Console 2 Software

4.1 Installation
1. Request and download the PPC2 software located in the TLV320AIC3268 product folder.
2. Open the self-extracting installation file, and extract contents to a known folder.
3. Install the software by double clicking the setup executable and follow the directions.
4. Connect the EVM to a USB port using a micro-USB cable and open PurePath Console 2. If prompted,
select the appropriate EVM name.

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4.2 Graphical User Interface (GUI)

4.2.1 Main panel window

The main panel, shown in Figure 3, provides direct access to the I2C settings of the AIC3268. On the
main panel, users can configure the registers through the single byte write and read or through the
Command Buffer Interface. The analog setup, digital setup, audio inputs, audio outputs, DRC, AGC, SAR
and headset detection can be configured through this interface.
The EVM status, which reflects the hardware connection of the EVM, is shown on the bottom left of the
main panel.

Figure 3. Main Panel

4.2.2 Typical Configuration

In the product folder there are example scripts for typical playback and record applications. These
configurations are used through the Command Buffer Interface.

4.2.3 I2C Logger

The Command Buffer Interface communicates with the TLV320AIC3268 using a simple scripting language
(described in Section 9). The TAS1020B USB controller handles all communication between the PC and
the codec. A script is loaded into the command buffer, either by loading a script file using the Open button
or by pasting text from the clipboard. Click Run to execute the command buffer.
To record the I2C communication between the PC and the device, there is an I2C Logger in the bottom
right of the GUI. The I2C Logger records all register writes sent to the codec when the Logging box is
checked. The recorded register values along with their page numbers are displayed in the I2C Logger
Window. Pressing the Clear button clears the content of the logger.

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4.2.4 Register Inspector

Figure 4. Register Inspector Window

The contents of the TLV320AIC3268 register map can be accessed through the Registers tab in PPC2.
The Page number control selects the page to be displayed in the register table. The register table contains
information such as register name, current register value and the bit field of the current register value.
Specify the page number when using the register inspector table. Once the page is specified, the register
value can then be inspected or changed by either entering the hex value of the register or changing the
corresponding bits for that register.

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www.ti.com TLV320AIC3268EVM-U Default Jumper Locations

5 TLV320AIC3268EVM-U Default Jumper Locations

Table 2 displays the default jumper location information.

Table 2. Default Jumper Locations

Jumper Position Jumper Position
JP1 Shorted JP31 Shorted
JP2 Shorted JP32 Shorted
JP3 Open JP33 1-2
JP4 2-3 JP34 1-2
JP5 2-3 JP35 Shorted
JP6 2-3 JP36 Shorted
JP7 2-3 JP37 1-2
JP8 2-3 JP38 2-3
JP9 2-3 JP39 Shorted
JP10 2-3 JP40 2-3
JP11 2-3 JP41 Shorted
JP12 2-3 JP42 Open
JP13 2-3 JP43 Open
JP14 2-3 JP44 2-3
JP15 2-3 JP45 Shorted
JP16 2-3 JP46 Open
JP17 2-3 JP47 Open
JP18 2-3 JP48 Shorted
JP19 2-3 JP49 Shorted
JP20 1-2 JP50 1-2
JP21 1-2 JP51 1-2
JP22 1-2 JP52 Open
JP23 1-2 JP53 Open
JP24 Shorted JP54 Open
JP25 Shorted JP55 Open
JP26 Shorted JP56 Open
JP27 Open JP57 Open
JP28 Open JP58 Open
JP29 Shorted JP59 Open
JP30 Shorted

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6 TLV320AIC3268EVM-U EVM Schematics

The schematics for the TLV320AIC3268EVM-U are shown in Figure 5 through Figure 12.

TLV320AIC3268RGC EVALUATION BOARD

TAS1020B

USB CONTROLLER

AUDIO CONTROL

TLV320AIC3268 I2C & SPI

CONTROL INTERFACE
QFN, Top View I2C & SPI

HPVSS_SENSE

MICBIAS_EXT
RECVDD_33
CPVDD_18

AVDD2_18
HVDD_18
I2S #1

MICBIAS
CPFCM
CPFCP
AUDIO INTERFACE

RECM
VNEG

RECP
HPR
LOR

HPL
LOL

ASI#1

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

AVDD4_18 49 32 MICBIAS_VDD
OPTICAL
SPKP 50 31 I2C AUDIO INPUT
MICDET I2S #2 B
AUDIO INTERFACE SRC4392
SVDD 51 30 AVDD1_18
ASI#2 A OPTICAL
SPKM 52 29 IN4L SRC #1
AUDIO OUTPUT
SPK_V 53 28 IN4R
VBAT 54 27 VREF_SAR
DVDD_18 55 26 OPTICAL
VREF_AUDIO I2C
I2S #3 B AUDIO INPUT
DVSS 56 25 IN1L_AUX1 AUDIO INTERFACE
VSS SRC4392
DVSS 57 24 ASI#3 A
IN1R_AUX2 OPTICAL
SRC #2
AUDIO OUTPUT
DOUT2 58 23 IN3L
BCLK2 59 22 IN3R
6 WIRE
GPIO4 60 21 IN2R AUDIO I/F
DVDD_18 61 20 IN2L
IOVDD2_33 62 19 AVDD_18
DIN2 63 18 MCLK ANALOG
WCLK2 64 17 BCLK1
OUTPUTS

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SDA_MOSI
IOVDD1_33

DOUT1
DVDD_18

IOVDD1_33

WCLK1
I2C_ADDR/SCLK
SPI_SELECT

DIN1
SCL_SSZ
GPIO3

GPIO5

GPIO2

GPIO1
MISO

RESETZ

ANALOG

INPUTS

SCH REV C
PCB REV C
TI PAGE INFO: BLOCK DIAGRAM
DESIGN LEAD JOHN FEDAK IV
DATE JANUARY 31, 2014
FILENAME AIP013C_Schematic.sbk
SHEET 1 OF 11
DRAWN BY L;DN

Figure 5. TLV320AIC3268RGC Block Diagram

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www.ti.com TLV320AIC3268EVM-U EVM Schematics

TLV320AIC3268RGC EVALUATION BOARD

TAS1020B USB HOST ADAPTER

+3.3VIO Y1 +3.3VIO
1 4
OE Vcc
2
+3.3VIO GNDOUT 3 C6
C12 +3.3VIO
6.0MHz 0.1uF/16V
+3.3VIO GND
EE Program
GND 0.1uF/16V +3.3VIO
JP2 R13 R14 GND
R17 2.7k 2.7k
U5 R16 TAS_SCL
4.7k 1 8

1
2
4.7k TAS_SDA
2 7
JP1 GND +3.3VIO
2 3 6
4 5 +3.3VIO
1
24FC512-I/MF C7
U3
1 5 0.1uF/16V C13
GND GND OE VCC
U5 2 U4
A GND 0.1uF/16V
24FC512-I/MF 3 4 TAS_MCLK 1
GND Y 16
PowerPAD ASI_S1 2 15 GND
GND LVC1G126DBVR 3 14 ASI_S0
(DAC Data) TAS_DIN I2S3_DOUT_SRC
GND C14 C15 4 13
TAS_BCLK I2S2_DOUT_SRC 5 R15
1000pF/50V 100pF/50V GND 12
+3.3VIO TAS_DOUT I2S1_DOUT 10k
6 11
48 47 46 45 44 43 42 41 40 39 38 37
R11 1 36 (ADC Data) 7 10
USB INPUT C5 3.09k 2 35 TAS_WCLK 8 9 GND
R1 R12
0.1uF/16V 3 34 +3.3VIO 10k
J1 CBTLV3253DBQ
1.50k 4 33
GND GND GND
+5V R2
5 32 C8
FB5 27.4 TAS_MISO GND
1 6 U2 31
5v 0.1uF/16V
2 220ohms/2A R3 7 30 TAS_MOSI
Data- TAS1020BPFB
3 27.4 C1 C2 8 29 TAS_SSz
Data+ GND
4 +3.3VIO 9 28
ID_NC FB6 47pF/50V 47pF/50V
5 10 27 TAS_SCLK
GND
220ohms/2A C4 11 26
GND GND
GND 12 25 GND I2S_ENABLE
0.1uF/16V
13 14 15 16 17 18 19 20 21 22 23 24 R10
JP3 10k
GND
1
GND 2
GND
+3.3VIO GND
LED2 LED1
Yellow Yellow
R9 R8 R5 R6 R7
+3.3VIO +3.3VIO 649 649 10k 10k 10k
C10 DUT_RESETz
R4
100k 0.1uF/16V
USB RESET
RESETz
PATCH
GND
2

C3 1 2
S4 S1
1.0uF/16V
1

APP
1 2
S2
GND
DUT RESET
1 2
S3
C11 C9 C16
GND
0.1uF/50V 0.1uF/50V 0.1uF/50V

GND GND GND

SCH REV C
PCB REV C
TI PAGE INFO:
DESIGN LEAD
USB CONTROLLER
JOHN FEDAK IV
DATE
FILENAME
JANUARY 31, 2014
AIP013C_Schematic.sbk
SHEET
DRAWN BY
2 OF
L;DN
11

Figure 6. TAS1020BPFB USB Controller

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TLV320AIC3268RGC EVALUATION BOARD

+3.3VIO IOVD1
C43 C44 DATA, SAMPLE RATE CONVERTER

U14
0.1uF/16V 14 1 0.1uF/16V
VCCB VCCA GND
GND DOUT1
13 2
B1 A1
I2S1_DOUT 12 3 DIN1
B2 A2
11 4 WCLK1
B3 A3
10 5 BCLK1
B4 A4
9 6
NC NC
R29 8 7
+3.3VIO OE GND
10k Use same IOVD for IOVD1 and IOVD2.
TXS0104EPWR BCLK3 -> GPIO2 (IOVD1)
GND I2S3_DOUT_SRC
WCLK3 -> GPIO1 (IOVD1)
DIN3 -> GPIO3 (IOVD2)
DOUT3 -> GPIO4 (IOVD2)

+3.3VIO IOVD2
+3.3VIO IOVD1
C27 C28 C39 C40

0.1uF/16V U9 0.1uF/16V U13

GND 0.1uF/16V 14 1 0.1uF/16V
GND 14 1 GND VCCB VCCA GND
VCCB VCCA
13 2 DIN2 13 2 DIN3
B1 A1 B1 A1
12 3 DOUT2 12 3 DOUT3
I2S2_DOUT_SRC B2 A2 B2 A2
11 4 WCLK2 11 4 WCLK3
TAS_DIN (DAC Data) B3 A3 B3 A3
10 5 BCLK2 10 5 BCLK3
TAS_WCLK B4 A4 B4 A4
9 6 +3.3VIO 9 6
TAS_BCLK +3.3VIO +3.3VIO NC NC
NC NC +3.3VIO R21
C41 R18 8 7 8 7
OE GND OE GND
10k C42 10k
+3.3VIO TXS0104EPWR
+3.3VIO TXS0104EPWR
10uF/6.3V GND
GND
10uF/6.3V
C26
R22 C38
R19
0 SPDIF-IN2
0 SPDIF-IN1 0.1uF/16V 1
1 VCC 0.1uF/16V
VCC 2
2 GND
C31 C30
C19 C18 GND 3
3 Case OUT
Case OUT 0.1uF/16V
10uF/6.3V PLR135/T10
10uF/6.3V 0.1uF/16V
PLR135/T10 GND
48

47

46

45

44

43

42

41

40

39

38

37

48

47

46

45

44

43

42

41

40

39

38

37
GND
GND GND
GND GND
1 36 1 36
C17 C29
2 Connect Pin44 to Pin10, 35 2 35
Connect Pin44 to Pin10,
pin 10 to ground plane pin 10 to ground plane
0.1uF/16V 3 34 0.1uF/16V 3 34
GND +3.3VIO GND +3.3VIO
4 33 4 33

5 32 C25 +3.3VIO 5 32
+3.3VIO +3.3VIO U10 C37
+3.3VIO
6 U6 31 0.1uF/16V 6 SRC #2 31 0.1uF/16V
R20
SRC #1 C33 C32 R23
C21 C20 7 30 0 7 SRC4392IPFBR 30
SPDIF-OUT1 i2c: 1110 001 SPDIF-OUT2 0
GND GND
SRC4392IPFBR 2 10uF/6.3V 2
10uF/6.3V 0.1uF/16V 8 29 VCC 0.1uF/16V 8 29 VCC
i2c: 1110 000 GND 3 3
GND GND C36 C35
C24 C23 GND
9 28 1 GND GND 9 28 1
GND GND INPUT SHIELD INPUT SHIELD
10uF/6.3V 10uF/6.3V 0.1uF/16V
0.1uF/16V
10 27 PLT133/T10W 10 27 PLT133/T10W
GND GND GND
GND GND GND
SRC1_LOCKz 11 26 GND GND SRC2_LOCKz 11 26

SRC1_RXCXO 12 25 SRC1_MCLK SRC2_RXCXO 12 25 SRC2_MCLK

13

14

15

16

17

18

19

20

21

22

23

24
13

14

15

16

17

18

19

20

21

22

23

24

SRC2_MCLK +3.3VIO SRC1_MCLK +3.3VIO

R24 R26
GND GND GND GND GND GND GND
SRC1_RDYz 4.7k SRC2_RDYz
4.7k
R27 R25
1.00k +1.8VIO
+1.8VIO 10k
R28
C34 1.00k
C22

0.1uF/16V 0.1uF/16V

GND
GND
TAS_SCL
TAS_SDA
RESETz

SCH REV C

TI
PCB REV C
PAGE INFO: SAMPLE RATE CONVERTERS FOR ASIs DATE JANUARY 31, 2014 SHEET 3 OF 11
DESIGN LEAD JOHN FEDAK IV FILENAME AIP013C_Schematic.sbk DRAWN BY L;DN

Figure 7. Sample Rate Converters for ASIs

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DATA CLOCKS
TLV320AIC3268RGC EVALUATION BOARD
+3.3VIO
U19 C48
1 16
SRC1_MCLK_S1 2 15 GND
0.1uF16V
3 14 SRC1_MCLK_S0
4 13
TAS_MCLK 5 12
R42
6 11 10k
7 10
8 9
R43 CBTLV3253DBQ
10k
GND GND
+3.3VIO +3.3VIO
OSC2
R39 1 4 GND GND
OE Vcc U18
+3.3VIO 10k 2 3 1 8
LED6 +3.3VIO +3.3VIO GND OUT ICLK CLK
R30 LED4 R32 2 7
22.5792MHz VDD CLK/2
357 GND 3 6 +3.3VIO SRC1_MCLK
U15 U16 357 C47 GND OE
Green Green 4 5 R38
SRC1_LOCKz 1 1A 1Y
6 SRC2_LOCKz 1
1A
6 S0 S1
1Y 0.1uF/16V 10k
2 5 +3.3VIO 2 5 +3.3VIO GND ICS542MLFT
GND VCC +3.3VIO GND VCC LED5
SRC1_RDYz 3 4 LED3 R31 SRC2_RDYz 3 4 R33
2A 2Y 2A 2Y GND CLK1_DIV_S1
357 357 +3.3VIO
LVC2G17DBV C51 LVC2G17DBV R37
Green C52 Green
GND GND
0.1uF/16V 10k
0.1uF/16V
CLK1_DIV_S0

GND +3.3VIO
GND U20 C46
SRC2_MCLK_S1 1 16
2 15 0.1uF/16V GND
+3.3VIO +3.3VIO 3 14 SRC2_MCLK_S0
OSC1 4 13
R36 1 4 R45
OE Vcc 5 12 10k
10k 2 3
GND OUT 6 11
U17
24.576MHz 1 8 7 10
GND ICLK CLK
2 7 8 9 GND
VDD CLK/2
C45 3 6 +3.3VIO
GND OE R44 CBTLV3253DBQ
4 5 R35
0.1uF/16V S0 S1 10k
GND GND
GND 10k
ICS542MLFT
GND
GND CLK2_DIV_S1

CLK2_DIV_S0

+3.3VIO SRC2_MCLK
+3.3VIO R34
C53 U22
24 20 CLK2_DIV_S1 10k
19 CLK2_DIV_S0
0.1uF/16V
GND 18 CLK1_DIV_S1
17 CLK1_DIV_S0
i2c: 1110 100 16 I2C_ADDR_SEL
15 MCLK_SEL +3.3VIO
TAS_SCL 22 14 MCLK_S1 U21 C49
TAS_SDA 23 13 MCLK_S0 1 16
11 SPI_SELECT SPI_SELECT is only information, MCLK_S1 2 15 GND
0.1uF/16V
Never drive this pin. 3 14 MCLK_S0
1 10 6Wire1_EN
Use Jumper JP51 instead
RESETz 3 9 ASI_S1 SRC2_MCLK 4 13
8 ASI_S0 SRC1_MCLK 5 12 GND
7 SRC2_MCLK_S1 TAS_MCLK 6 11 SRC2_RXCXO
21 6 SRC2_MCLK_S0 7 10 SRC1_RXCXO
2 5 SRC1_MCLK_S1 8 9
12 4 SRC1_MCLK_S0 R41 R40
10k 10k
TCA9539PW
GND IOVD1
GND GND GND U11 C50
8
1 GND
5 MCLK 0.1uF/16V
2
7
MCLK_SEL 3
6
4
R46
10k GND
GND

GND

SCH REV C
PCB REV C

TI PAGE INFO:
DESIGN LEAD
BOARD GPIO & MCLK FOR AIC3268
JOHN FEDAK IV
DATE
FILENAME
JANUARY 31, 2014
AIP013C_Schematic.sbk
SHEET
DRAWN BY
4 OF
L;DN
11

Figure 8. GPIO and MCLK for AIC3268

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JP4

LDO SUPPLIES
TP6 TLV320AIC3268RGC EVALUATION BOARD

1
3

2
MCLK

MCLK_DUT GND
TP3 JP5 JP6 JP7 JP8
+5V +1.8VA
VR3
1 5 TP7 TP8 TP9 TP10

1
3 3 3 3

2
BCLK1
2
WCLK1
C55 R47 GND
BCLK1_DUT GND
C54 3 4 C66
DIN1
WCLK1_DUT GND
10uF/6.3V 0.1uF/16V 10k 47ufd/6.3V
TPS73618DBV DIN1_DUT GND DOUT1
1.8V/400mA
AV_ENABLE
DOUT1_DUT GND
GND GND GND

JP9 JP10 JP11 JP12

+5V TP5 +3.3VA

1
3 3 3 3

2
VR6 TP14 TP13 TP12 TP11 BCLK2
1 5
WCLK2
2
C65 BCLK2_DUT GND
C64 R52 GND C70 DIN2
3 4
WCLK2_DUT GND
10uF/6.3V 0.1uF/16V 10k 47ufd/6.3V DOUT2
TPS73633DBV DIN2_DUT GND
3.3V/400mA
AV_ENABLE DOUT2_DUT GND
GND GND GND

+5V TP4 +1.8V_CP

R54 J3
VR2
1 5 0 SLIMbus
SATA
2 R53 1
GND
C59 C58 R49 GND 3 4 C68 TP16 TP15 0 2
A+
J2
10uF/6.3V 0.1uF/16V 10k 47uF/6.3V TEST1 1 2 3
TPS73618DBV A-
1.8V/400mA TEST2 3 4 4
GND
AV_ENABLE
GND GND GND 5 6 5
B-
6
DNP B+
GND 7
GND
+5V TP69 +1.8VD
VR1 Case
1 5
DNP
2
GND
C57 C56 R48 GND 3 4 C67
10uF/6.3V 0.1uF/16V 10k 47uF/6.3V
TPS73618DBV JP13 JP14 JP15 JP16
1.8V/400mA IOVD1: GPIO1: Dig_Mic 1,2 Data and BCLK3
DV_ENABLE
GPIO2: ADC_MOD_CLK and WCLK3
GND GND GND GPIO5: Dig_Mic 3,4 Data

1
3 3 3 3

2
IOVD2: GPIO3: DIN3 TP20 TP19 TP18 TP17
GPIO4: DOUT3 gpio4/dout3 gpio3/din3 gpio2/wclk3 gpio1/bclk3 BCLK3

WCLK3
GPIO1 GND
+5V TP1 +3.3VIO DIN3
VR5 GPIO2 GND
DOUT3
1 5
Use same IOVD for IOVD1 and IOVD2. GPIO3 GND
2 BCLK3 -> GPIO2 (IOVD1) GPIO4 GND
C61 C60 R50 GND C69 WCLK3 -> GPIO1 (IOVD1)
3 4
DIN3 -> GPIO3 (IOVD2) GPIO5
10uF/6.3V 0.1uF/16V 10k 47uF/6.3V DOUT3 -> GPIO4 (IOVD2) IOVD2
TPS73633DBV C73
3.3V/400mA
DV_ENABLE
GND GND GND 0.1uF/16V GND
GND
TAS_WCLK
JP17 JP18 JP19

1
+5V TP2 +1.8VIO
VR4

VCCA

GND
A2

B2
1 5
1

1
3

2
2

1
3

2
2
1

3
C63 C62 R51 GND U23
3 4 C71 VDD GND GND GND
6
SELECT JP20 JP21 TXB0102DCU
10uF/6.3V 0.1uF/16V 10k 47uF/6.3V C90 2
TPS73618DBV MIC3 4 CLOCK GND GND
DATA

VCCB
1.8V/400mA 0.1uF/16V
5

OE
A1

B1
GND GND DV_ENABLE GND 1 3
IOVD1 GND GND GND

8
TAS_BCLK
6 VDD
2 SELECT GPIO3 6Wire1_EN +3.3VIO
4 CLOCK
C91 MIC2 GPIO4
5 DATA

0.1uF/16V R55 C72

1 3
+1.8VIO IOVD2 +3.3VIO 10k
JP23 0.1uF/16V
+1.8VIO IOVD1 +3.3VIO 1 GND GND
JP22 GND GND
1 2 GND GND
6
VDD
2 3 2 SELECT
C75
4 CLOCK
3 MIC5
5 DATA
0.1uF/16V
1 3
IOVD1
GND GND GND

6
VDD
C74 2 SELECT
MIC4
4 CLOCK
5 DATA
0.1uF/16V
1 3

GND GND
TP62 TP63 TP64 TP65 TP66 TP67 TP68 GND GND

GND

SCH REV C
PCB REV C
TI PAGE INFO: LDOs & AIC3268 ANALOG OUTPUTS
DESIGN LEAD JOHN FEDAK IV
DATE JANUARY 31, 2014
FILENAME AIP013C_Schematic.sbk
SHEET 5 OF 11
DRAWN BY L;DN

Figure 9. LDO Supplies and Analog Outputs

12 TLV320AIC3268EVM-U Evaluation Module SLAU564A February 2014 Revised February 2014

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JP47 JP44
VSYS_EXT
+1.8VIO +1.8VD

1
3

2
TLV320AIC3268RGC EVALUATION BOARD +5V
FB4

1
3

2
VSYS_EXT
2 1
JP46 C112
2 C110 220ohms/2A C111 J6
1 1.0uF/16V 0.1uF/16V 10uF/10V + 1
C115 C116
0.1uF/16V 1.0uF/16V R65
200 GND GND GND 2
JP48
C99 SPKM
IOVD2 GND GND GND 6A/125V
SPKP

2
0.1uF/16V GND

C113 TP41
C114 spkp
FB1
0.1uF/16V 1.0uF/16V J5
1 2
+ 1
GND GND TP40 120 OHMS/1.5A
spkm
+1.8VD FB2
2
1 2

C84 C83 JP45 +1.8VA 120 OHMS/1.5A 6A/125V

C106 C107

2
1
JP43
10uF/10V 0.1uF/16V U1 1 1 DNP DNP
R66 R67

BCLK2_DUT
WCLK2_DUT

GPIO4

TEST1

TEST2
DIN2_DUT

DOUT2_DUT

1
2
PowerPAD JP42
JP24 2 2
TP38 TP39
GND GND 1.00k 1.00K
C108 GND GND
C79 C109
GND 2200pfd/50V
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
0.1uF/16V 2200pfd/50V

GND JP41
GPIO3 1 48 RLOUT
GND
GND
2 47 LLOUT +1.8V_CP

1
2
MISO_GPO1 3 46
C140
AIC_SPI_SELECT 4 45 C105 C104
0.1uF/16V C100
SDA_MOSI 5 44 0.1uF/16V 10uF/10V
2.2ufd/10V JP40
GPIO5 6 43
GND TP37 +1.8VA
ADDR_SCLK 7 42 HPVSS_SENSE C101 Vneg GND GND
U1

1
3

2
SCL_SSZ 8 41 HPL 2.2uF/10V
9 40 GND
IOVD1
10 39 HPR C102 C103
JP39
AIC_RESETZ 11 38 2 0.1uF/16V 10uF/10V
C81 C80
2
1

WCLK1_DUT 12 37 RECM C77 +1.8VA 1

1.0uF/16V 0.1uF/16V
GPIO2 13 36 0.1uF/16V GND GND
JP25
DOUT1_DUT 14 35 RECP
GND GND GND
DIN1_DUT 15 34 MICBIAS_DUT

GPIO1 16 33 MICBIAS_EXT_DUT JP38

+1.8VA +3.3VA

1
3

2
BCLK1_DUT 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
TP35
MCLK_DUT vref_sar
+1.8VA
C118 C117
2
1

10uF/10V 0.1uF/16V
C96 C97 C98
IN2L
LEFT 2
TP34
1.0uF/16V 0.1uF/16V 1.0uF/16V
JP26 GND GND
5 C95
GND GND
Shield

J4 6
in2l GND CP90
RIGHT 3 C94 1.0uF/16V TP28
in4l
1.0ufd/10V
4
1.0uF/10V in2r IN4L JP37
1
R63 R64 TP33 CP91
GND 2.10k 2.10k TP29

1
3

2
IN2R +3.3VA
in4r
TP30 JP27 JP28 1.0ufd/10V
IN4R
R61 JP29
MICBIAS_DUT MICBIAS
IN3R C78
1

1
2

100 TP32
C93 0.1uF/16V
1

VSYS_EXT
2

2 in3r
1
GND TP36
1.0uF/16V MICBIAS_EXT R58 MICBIAS_EXT_DUT
R62 JP31
1.00k TP31 100
in3l TP22
micdet JP36
C92 2 1
1
MIC1 2
2
1
1.0uF/16V TP21 JP33 JP34
2
1

R60 JP35
1.10k IN3L vref TP25 R59
2.10k

1
3 3

2
JP30 IN1L
in1l C89
C85
TP27
GND 1.0uF/16V Ext_In1R
C86 1.0uF/16V
HS_MIC

GND TP26 1.0uF/16V R57

TP24
in1r IN1R 200 Ext_Aux2

R56
JP32 TP23
2 200 Ext_Aux1

1 +1.8VA C87 C88

C76
0.1uF/16V 0.1uF/16V
0.1uF/16V

GND GND SCH REV C

GND
PCB REV C
TI PAGE INFO: TLV320AIC3268
DESIGN LEAD JOHN FEDAK IV
DATE JANUARY 31, 2014
FILENAME AIP013C_Schematic.sbk
SHEET 6 OF 11
DRAWN BY L;DN

Figure 10. TLV320AIC3268 Schematic

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TLV320AIC3268RGC EVALUATION BOARD

5

Shield
3

1
J8
GND

TP42
hpl
HPL
2 LEFT
TP43 5
hpr

Shield
6
HPR
3 RIGHT
TP44 JP49
4
vss_sns

1
2
HPVSS_SENSE 1
J7
R73 HS_MIC

DNP

2
1

3
FB3
1 2 Configuration JP50 JP51

220ohms/2A JP50 JP51

GND L-R-M-G 1-2 1-2

R68 L-R-G-M 2-3 2-3

TP46
1.00k R69
HPR
TP45
HPL C122 1.00k
C121

1
3

2
2200pF/50V R70 R71 R90 R72

1
3

2
16.0 32.4 2200pF/50V 16.0 32.4

GND JP52
JP53
GND GND GND GND GND

J9

1
TP53 2
recp R78
RECP 1
JP56 2
32.4
TP54 GND 3

recm
RECM 6A/125V
RECP

R76 R77
RECM TP51 TP52
1.00k 1.00k
C128
2

2
1

1
C127
2200pF/50V 2200pF/50V
JP54 JP55

GND GND

TP47
llout
C123
LLOUT
2 LEFT
1.0ufF16V
5
TP48

Shield
rlout C124 6
RLOUT
3 RIGHT
1.0uF/16V R74 R75
TP49 TP50 4
RLOUT 1.00k 1.00k
1
2

2
1

C125 C126 J10

LLOUT GND
2200pF/50V 2200pF/50V
JP57 JP58

GND
GND

SCH REV C
PCB REV C
TI PAGE INFO: AUDIO CONNECTORS
DESIGN LEAD JOHN FEDAK IV
DATE JANUARY 31, 2014
FILENAME AIP013C_Schematic.sbk
SHEET 7 OF 11
DRAWN BY L;DN

Figure 11. Audio Connectors

14 TLV320AIC3268EVM-U Evaluation Module SLAU564A February 2014 Revised February 2014

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TLV320AIC3268RGC EVALUATION BOARD

IOVD1
C129
TP55 TP56 TP57 U24
ad/sclk scl/ssz sda/mosi 8
0.1uF/16V 1 AIC_ADDRESS
ADDR_SCLK GND 5
2 AIC_SCLK
SCL_SSZ
7
SDA_MOSI 3
6
GND

4
IOVD1 +3.3VIO
GND LVC2G157DCT

C130 C131
0.1uF/16V 0.1uF/16V

6
GND GND

8 5 TAS_SSz

9 4 TAS_MOSI

10 3

U25 GND

2
AVC2T245RSW

GND GND

+3.3VIO

C134
JP59 +3.3VIO
0.1uF/16V Install this jumper to 2
use DUT in SPI
1 +3.3VIO IOVD1
mode
GND U7 C119 C120 TP60 TP59 TP58
6 1 SPI_SELECT reset~ spi_sel gpo1/miso
U8
5 2 14 1
GND 0.1uF/16V VCCB VCCA 0.1uF/16V GND
4 3 R86 13 2 AIC_SPI_SELECT AIC_SPI_SELECT
B1 A1
1.00k
DUT_RESETz 12 3 AIC_RESETZ AIC_RESETZ
LVC2G04DBV B2 A2
R85 GND I2C_ADDR_SEL 11 4 AIC_ADDRESS MISO_GPO1
+3.3VIO +5V IOVD1 B3 A3
357 R84 R88
GND R89 10 5
C135 U27 C136 TP61 B4 A4
1 6 10k 1.00k 9 6 10k
VCCA VCCB C133 +3.3VIO NC NC
2 5 R83 R87 8 7 GND
LED7 0.1uF/16V GND OE 0.1uF/16V GND U28 OE GND
GND 3 4 10k 5 1 10k
A B GND 0.1uF/16V GND TXS0104EPW
2 GND
TXB0101DBV R81
Green GND U26 4 3
200k 8 1
EN GND R79 R80
7 2 2.7k 2.7k LVC1G126DBV GND
VREF2 VREF1
TAS_SCL 6 3 +3.3VIO IOVD1
SCL2 SCL1
TAS_SDA 5 4 C139 C138
SDA2 SDA1

C132 PCA9306DCT
R82 GND C137 0.1uF/16V 0.1uF/16V GND

7
806k GND
0.1uF/16V 0.1uF/16V
TAS_MISO 5 8

TAS_SCLK 4 9 AIC_SCLK
GND GND GND
3 10 +3.3VIO

GND

1
U12
AVC2T245RSW
GND

SCH REV C
PCB REV C
TI PAGE INFO: I2C TRANSLATION AND SELECTION
DESIGN LEAD JOHN FEDAK IV
DATE JANUARY 31, 2014
FILENAME AIP013C_Schematic.sbk
SHEET 8 OF 11
DRAWN BY L;DN

Figure 12. I2C Translation and Selection

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TLV320AIC3268RGC EVALUATION BOARD

STANDOFFS
S03 S02 S05 S04 S07 S01 S06 S08 ANALOG INTERFACE CONNECTOR DIGITAL INTERFACE CONNECTOR
mfg: JST mfg: JST
BREAK-OUT CONNECTIONS p/n: 100P-JMDSS-G-1-TF(LF)(SN) BREAK-OUT CONNECTIONS BREAK-OUT CONNECTIONS p/n: 100P-JMDSS-G-1-TF(LF)(SN) BREAK-OUT CONNECTIONS
J11 +5V J12 +5V
IN1L 1 2 IN1R 1 2
0.5in 0.5in 0.5in 0.5in 0.5in 0.5in 0.5in 0.5in IN1+ IN1- +5VD +5VD
0.5in 0.5in 0.5in 0.5in 0.5in 0.5in 0.5in 0.5in GND 3 4 +3.3VD 3 4 +3.3VD
AGND AGND DGND DGND
IN2L 5 6 IN2R 5 6
IN2+ IN2- +3.3IO +3.0IO
7 8 +1.8V 7 8 +1.8V
AGND AGND DGND DGND
IN3L 9 10 IN3R 9 10
IN3+ IN3- +1.8VD +1.8IO
11 12 VARVD 11 12 VARVD
AGND AGND DGND DGND
IN4L 13 14 IN4R 13 14
IN4+ IN4- VARVD VARVD
15 16 15 16
AGND AGND DGND DGND
17 18 DV_ENABLE 17 18
IN5+ IN5- DV_ENABLE
19 20 19 20
AGND AGND
21 22 21 22 RESERVED
IN6+ IN6- RESERVED
23 24 23 24
AGND AGND
25 26 25 26 TAS_SCL
IN7+ IN7-
27 28 DGND 27 28 TAS_SDA I2C
AGND AGND
MICBIAS 29 30 29 30 MCLK
IN8+ IN8- MCLK MCLK
31 32 31 32 BCLK1
AGND AGND
MICBIAS_EXT 33 34 HS_MIC 33 34 WCLK1
MICBIAS MICDET
35 36 35 36 DIN1 I2S1
AGND AGND
SPKP 37 38 SPKP 37 38 DOUT1
SPK1+ SPK1+
CLASS-D SPKM 39 40 SPKM CLASS-D 39 40 TAS_MISO
SPK1- SPK1-
SPEAKER 41 42 SPEAKER 41 42 TAS_MOSI
SPK2+ SPK2+ DGND
OUTPUT 43 44 OUTPUT 43 44 TAS_SSz SPI
SPK2- SPK2-
RECP 45 46 RECM 45 46 TAS_SCLK
OUT1+ OUT1-
47 48 47 48 I2S_ENABLE
OUT1GND OUT1GND I2S_ENABLE
LLOUT 49 50 49 50 RESETz
OUT2+ OUT2- RESET
51 52 51 52
LINE OUT2GND OUT2GND LINE
RLOUT 53 54 53 54 DGND
OUTPUTS OUT3+ OUT3- OUTPUTS
55 56 55 56
OUT3GND OUT3GND GND GND
57 58 57 58 BCLK2
OUT4+ OUT4-
59 60 59 60 WCLK2
OUT4GND OUT4GND
61 62 61 62 DIN2 I2S_2
AGND AGND
63 64 HPL 63 64 DOUT2
HPGND HP1L
65 66 HPR 65 66
HEADSET HPGND HP1R HEADSET
67 68 67 68
GROUND HPGND HP2L OUTPUTS RESERVED
69 70 69 70
HPGND HP2R
71 72 71 72 BCLK2

SPKGND 73 74 SPKGND RESERVED 73 74 WCLK2

75 76 75 76 DIN2 I2S_3
SPKVDD 77 78 SPKVDD 77 78 DOUT2

79 80 79 80
HPGND HPGND
81 82 81 82
HPVDD HPVDD RESERVED
AV_ENABLE 83 84 83 84
AV_ENABLE RESERVED
85 86 85 86 TAS_BCLK
AGND AGND
87 88 87 88 TAS_WCLK
VARVA VARVA
89 90 GPIO1 89 90 TAS_DIN I2S_4
AGND +1.8V_CP +3.3VD AGND
91 92 GPIO2 91 92 TAS_DOUT
+1.8V_CP +1.8VA
93 94 GPIO3 93 94
AGND AGND
95 96 GPIO4 95 96
+3.3VA +3.3VA
97 98 GPIO GPIO5 97 98 RESERVED
AGND AGND
99 100 99 100
+5VA +5VA
GND GND
J12 J11
Anchor Anchor

GND GND

SCH REV C
PCB REV C
TI PAGE INFO: BREAKOUT BOARD CONNECTIONS
DESIGN LEAD JOHN FEDAK IV
DATE JANUARY 31, 2014
FILENAME AIP013C_Schematic.sbk
SHEET 9 OF 11
DRAWN BY L;DN

Figure 13. Breakout Board Connections

16 TLV320AIC3268EVM-U Evaluation Module SLAU564A February 2014 Revised February 2014

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7 TLV320AIC3268EVM-U EVM Board Layout

Figure 14 through Figure 16 illustrate the TLV320AIC3268EVM-U EVM board layouts.

Figure 14. Top Xray View

Figure 15. Silkscreen Top

SLAU564A February 2014 Revised February 2014 TLV320AIC3268EVM-U Evaluation Module 17

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Figure 16. Silkscreen Bottom

18 TLV320AIC3268EVM-U Evaluation Module SLAU564A February 2014 Revised February 2014

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www.ti.com TLV320AIC3268EVM-U Bill of Materials

8 TLV320AIC3268EVM-U Bill of Materials

Table 3 contains the BOM for the TLV320AIC3268EVM-U.

Table 3. TLV320AIC3268EVM-U Bill of Materials

Item MANU PART NUM MFG QTY REF DESIGNATORS DESCRIPTION
1 TLV320AIC3268IRGC TEXAS INSTRUMENTS 1 U1 STEREO AUDIO CODEC WITH DIRECT PATH HEADPHONE AND CLASS-D
2 TAS1020BPFB TEXAS INSTRUMENTS 1 U2 USB STREAMING CONTROLLER TQFP48-PFB ROHS
3 SN74LVC1G126DBVR TEXAS INSTRUMENTS 2 U3, U28 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SOT23-DBV5 ROHS
4 SN74CBTLV3253DBQR TEXAS INSTRUMENTS 4 U4, U19, U20, U21 LO VOLT DUAL 1OF4 FET MUX/DEMUX SSOP16-DB ROHS
5 24FC512-I/MF MICROCHIP 1 U5 512K I2C SERIAL EEPROM DFN8-MF ROHS
6 SRC4392IPFBR BURR-BROWN 2 U6, U10 2 CHAN,ASYNC,SAMPLE RATE CONV W/DIG AUDIO REC/XMTR ROHS
7 SN74LVC2G04DBVR TEXAS INSTRUMENTS 1 U7 DUAL INVERTER GATE SOT23-DBV6 ROHS
8 TXS0104EPWR TEXAS INSTRUMENTS 4 U8, U9, U13, U14 4-BIT BIDIR LEVEL TRANSLATOR TSSOP14-PW ROHS
9 SN74LVC2G157DCTR TEXAS INSTRUMENTS 2 U11, U24, MUX/DATA SELECTOR 2 TO 1 SSOP8-DCT ROHS
10 SN74AVC2T245RSWR TEXAS INSTRUMENTS 2 U12, U25 2BIT XCVR CONFIGURABLE TRANSLATION 3-STATE OUTS QFN10-RSW ROHS
11 SN74LVC2G17DBVR TEXAS INSTRUMENTS 2 U15, U16 DUAL SCHMITT-TRIGGER BUFFER SOT23-DBV6 ROHS
12 ICS542MLFT IDT 2 U17, U18 CLOCK DIVIDER,SOP8-D,ROHS
13 TCA9539PWR TEXAS INSTRUMENTS 1 U22 REMOTE 16B I2C SMBUS LO PWR IO EXPNDR INT OUT TSSOP24-PW ROHS
14 TXB0102DCUR TEXAS INSTRUMENTS 1 U23 2-BIT BIDIR LEVEL TRANSLATOR VSSOP8-DCU ROHS
15 PCA9306DCTR TEXAS INSTRUMENTS 1 U26 DUAL BIDIR I2C BUS AND SMBUS VOLT LEVEL TRANS SSOP8-DCT ROHS
16 TXB0101DBVR TEXAS INSTRUMENTS 1 U27 1-BIT BIDIR LEVEL TRANSLATOR SOT23-DBV6 ROHS
17 TPS73618DBVT TEXAS INSTRUMENTS 4 VR1, VR2, VR3, VR4 VOLT REG 1.8V 400MA LDO CAP FREE NMOS SOT23-DBV5 ROHS
18 TPS73633DBVT TEXAS INSTRUMENTS 2 VR5, VR6 VOLT REG 3.3V 400MA LDO CAP FREE NMOS SOT23-DBV5 ROHS
19 PLR135/T10 EVERLIGHT ELECTRONICS 2 SPDIF-IN1, SPDIF-IN2 PHOTOLINK FIBER OPTIC RECEIVER 2.4-5.5V 15MB PCB-RA SHUTTER ROHS
20 PLT133/T10W EVERLIGHT ELECTRONICS 2 SPDIF-OUT1, SPDIF-OUT2 PHOTOLINK FIBER OPTIC TRANSMITTER 2.4-5.5V 15MB PCB-RA SHUTTER
ROHS
21 SML-LXT0805YW-TR LUMEX OPTO 2 LED1, LED2 LED, YELLOW 2.0V SMD0805 ROHS
22 SML-LXT0805GW-TR LUMEX OPTO 5 LED3, LED4, LED5, LED6, LED7 LED, GREEN 2.0V SMD0805 ROHS
23 FXO-HC736R-22.5792 FOX ELECTRONICS 1 OSC1 OSCILLATOR SMT 3.3V 24.576MHz ROHS
24 625L3C024M57600 CTS FREQUENCY CONTROLS 1 OSC2 OSCILLATOR SMT 3.3V 22.5792MHz ROHS
25 625L3I006M00000 CTS FREQUENCY CONTROLS 1 Y1 OSCILLATOR SMT 6.0MHz 3.3V OUT-ENABLE ROHS
26 GRM1885C1H470JA01D MURATA 2 C1, C2 CAP SMD0603 CERM 47PFD 50V 5% COG ROHS
27 C1608X7R1C105K TDK 3 C3, C123, C124 CAP SMD0603 CERM 1.0UFD 16V 10% X7R ROHS
28 GRM155R71C104KA88D MURATA 77 C4, C5, C6, C7, C8, C10, C12, C13, C17, C18, C20, C22, C23, C25, C26, C27, CAP SMD0402 CERM 0.1UFD 16V X7R 10% ROHS
C28, C29, C30, C32, C34, C35, C37, C38, C39, C40, C43, C44, C45, C46, C47,
C48, C49, C50, C51, C52, C53, C54, C56, C58, C60, C62, C64, C72, C73, C74,
C75, C76, C77, C79, C80, C83, C87, C88, C90, C91, C97, C99, C102, C112,
C113, C115, C117, C119, C120, C129, C130, C131, C132, C133, C134, C135,
C136, C137, C138, C139, C140
29 C1608X7R1H104K TDK 3 C9, C11, C16 CAP SMD0603 CERM 0.1UFD 50V 10% X7R ROHS
30 C1608C0G1H102J TDK CORP. 1 C14 CAP SMD0603 CERM 1000PFD 50V 5% COG ROHS
31 GRM1885C1H101JA01D MURATA 1 C15 CAP SMD0603 CERM 100PFD 50V 5% COG ROHS
32 GRM188R60J106ME47D MURATA 14 C19, C21, C24, C31, C33, C36, C41, C42, C55, C57, C59, C61, C63, C65 CAP SMD0603 CERM 10UFD 6.3V 20% X5R ROHS
33 JMK212BJ476MG-T TAIYO YUDEN 6 C66, C67, C68, C69, C70, C71 CAP SMD0805 CERM 47UFD 6.3V 20% X5R ROHS

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Table 3. TLV320AIC3268EVM-U Bill of Materials (continued)

Item MANU PART NUM MFG QTY REF DESIGNATORS DESCRIPTION
34 GRM188R71C104KA01D MURATA 2 C78, C105 CAP SMD0603 CERM 0.1UFD 16V 10% X7R ROHS
35 EMK107B7105KA-T TAIYO YUDEN 6 C81, C96, C98, C110, C114, C116 CAP SMD0603 CERM 1.0UFD 16V 10% X7R ROHS
36 GRM21BR71A106KE51L MURATA 5 C84, C103, C104, C111, C118 CAP SMD0805 CERM 10UFD 10V10% X7R ROHS
37 GRM188R71A105KA61D MURATA 9 C85, C86, C89, C92, C93, C94, C95, CP90, CP91 CAP SMD0603 CERM 1.0UFD 10V 10% X7R ROHS
38 GRM188R71A225KE15D MURATA 2 C100, C101 CAP SMD0603 CERM 2.2UFD 10V 10% X7R ROHS
39 NA NA 0 C106, C107 CAP SMD1206 VALUE TBD
40 GRM188R71H222KA01D MURATA 8 C108, C109, C121, C122, C125, C126, C127, C128 CAP SMD0603 CERM 2200PFD 50V 10% X7R ROHS
41 ERJ-3EKF1501V PANASONIC 1 R1 RESISTOR SMD0603 1.50K OHM 1% THICK FILM 1/10W ROHS
42 ERJ-3EKF27R4V PANASONIC 2 R2, R3 RESISTOR SMD0603 27.4 OHMS 1% 1/10W ROHS
43 ERJ-3EKF1003V PANASONIC 1 R4 RESISTOR SMD0603 100K OHM 1% THICK FILM 1/10W ROHS
44 ERJ-3GEYJ103V PANASONIC 34 R5, R6, R7, R10, R12, R15, R18, R21, R25, R29, R34, R35, R36, R37, R38, RESISTOR SMD0603 10K 5% 1/10W ROHS
R39, R40, R41, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R55,
R83, R84, R87, R88
45 RC0603FR-07649RL YAGEO 2 R8, R9 RESISTOR SMD0603 THICK FILM 649 OHMS 1% 1/10W ROHS
46 ERJ-3EKF3091V PANASONIC 1 R11 RESISTOR SMD0603 3.09K OHM 1% THICK FILM 1/10W ROHS
47 ERJ-3GEYJ272V PANASONIC 4 R13, R14, R79, R80 RESISTOR SMD0603 2.7K OHMS 5% 1/10W ROHS
48 ERJ-3GEYJ472V PANASONIC 4 R16, R17, R24, R26 RESISTOR SMD0603 4.7K OHMS 5% 1/10W ROHS
49 ERJ-3GEY0R00V PANASONIC 6 R19, R20, R22, R23, R53, R54 RESISTOR,SMT,0603,ZERO OHM,5%,,1/10W,ROHS
50 RC0603FR-071KL YAGEO 13 R27, R28, R62, R66, R67, R68, R69, R74, R75, R76, R77, R86, R89 RESISTOR SMD0603 THICK FILM 1.00K OHM 1% 1/10W ROHS
51 ERJ-3EKF3570V PANASONIC 5 R30, R31, R32, R33, R85 RESISTOR SMD0603 357 OHM 1% THICK FILM 1/10W ROHS
52 CRCW0603200RFKEA VISHAY 3 R56, R57, R65 RESISTOR SMD0603 200 OHMS 1% 1/10W ROHS
53 ERJ-3EKF1000V PANASONIC 2 R58, R61 RESISTOR SMD0603 100 1% THICK FILM 1/10W ROHS
54 ERJ-3EKF2101V PANASONIC 3 R59, R63, R64 RESISTOR SMD0603 2.10K OHMS 1% THICK FILM 1/10W ROHS
55 ERJ-3EKF1101V PANASONIC 1 R60 RESISTOR SMD0603 1.10K OHMS 1% THICK FILM 1/10W ROHS
56 CRCW120616R0JNEA VISHAY 2 R70, R90 RESISTOR,SMT,1206,16.0 OHM,5%,1/4W,ROHS
57 RC1206FR-0732R4L YAGEO 3 R71, R72, R78 RESISTOR SMD1206 32.4 OHMS 1% 1/4W ROHS
58 ERJ-3GEY0R00V PANASONIC 0 R73 RESISTOR,SMT,0603,ZERO OHM,5%,,1/10W,ROHS
59 ERJ-3GEYJ204V PANASONIC 1 R81 RESISTOR SMD0603 200K OHMS 5% 1/10W ROHS
60 ERJ-2RKF8063X PANASONIC 1 R82 RESISTOR SMD0402 THICK FILM 806K OHMS 1/10W 1% ROHS
61 BLM15EG121SN1D MURATA 2 FB1, FB2 FERRITE BEAD SMD0402 120 OHMS 1.5A ROHS
62 MPZ1608S221A TDK 4 FB3, FB4, FB5, FB6 FERRITE CHIP, 220 OHMS 2A 100MHZ SMD 0603 ROHS
63 ZX62WD1-B-5PC HIROSE 1 J1 JACK USB FEMALE TYPEB MICRO SMT-RA 5PIN ROHS
64 75869-131LF FCI 0 J2 HEADER SHROUDED 100LS MALE GOLD 2x3 PINS ROHS
65 5607-4200-SH 3M 0 J3 CONNECTOR-SATA 7 PIN SMT-RA SERIES 5607 ROHS
66 SJ-43516-SMT CUI STACK 3 J4, J7, J10 JACK AUDIO-STEREO MINI(3.5MM ,4-COND SMT-RA ROHS
67 ED555/2DS ON SHORE TECHNOLOGY 2 J5, J6 TERMINAL BLOCK 2PIN 6A/125V GRAY 3.5mm PITCH 16-28AWG ROHS
68 SJ-435105 CUI STACK 1 J8 JACK AUDIO MINI(3.5MM ,4-COND SMT-RA ROHS
69 ED555/3DS ON SHORE TECHNOLOGY 1 J9 TERMINAL BLOCK 3PIN 6A/125V GRAY 3.5mm PITCH 16-28AWG ROHS
70 100P-JMDSS-G-1- JST 2 J11, J12 PLUG SMD 2x50 FEMALE JMDSERIES 0.5MM LS GOLD ROHS
TF(LF)(SN)

20 TLV320AIC3268EVM-U Evaluation Module SLAU564A February 2014 Revised February 2014

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www.ti.com TLV320AIC3268EVM-U Bill of Materials

Table 3. TLV320AIC3268EVM-U Bill of Materials (continued)

Item MANU PART NUM MFG QTY REF DESIGNATORS DESCRIPTION
71 PBC02SAAN SULLINS 28 JP1, JP2, JP3, JP24, JP25, JP26, JP27, JP28, JP29, JP30, JP31, JP32, JP35, HEADER THRU MALE 2 PIN 100LS 120 TAIL GOLD ROHS
JP36, JP39, JP41, JP42, JP43, JP45, JP46, JP48, JP49, JP54, JP55, JP56,
JP57, JP58, JP59
72 PBC03SAAN SULLINS 31 JP4, JP5, JP6, JP7, JP8, JP9, JP10, JP11, JP12, JP13, JP14, JP15, JP16, JP17, HEADER THRU MALE 3 PIN 100LS 120 TAIL GOLD ROHS
JP18, JP19, JP20, JP21, JP22, JP23, JP33, JP34, JP37, JP38, JP40, JP44,
JP47, JP50, JP51, JP52, JP53
73 WM-63PRT PANASONIC 1 MIC1 MICROPHONE ELECTRET OMNIDIRECTIONAL DUAL BAND 2PIN ROHS
74 SPM0423HD4H-WB KNOWLES 4 MIC2, MIC3, MIC4, MIC5 MIC DIGITAL MIMI-SISONIC HALOGEN FREE 6PIN ROHS
75 5000 KEYSTONE ELECTRONICS 11 TP1, TP2, TP3, TP4, TP5, TP21, TP30, TP35, TP36, TP37, TP69 PC TESTPOINT, RED, ROHS
76 5002 KEYSTONE ELECTRONICS 30 TP22, TP23, TP24, TP25, TP26, TP27, TP28, TP29, TP31, TP32, TP33, TP34, PC TESTPOINT, WHITE, ROHS
TP38, TP39, TP40, TP41, TP42, TP43, TP44, TP45, TP46, TP47, TP48, TP49,
TP50, TP51, TP52, TP53, TP54, TP61
77 5004 KEYSTONE ELECTRONICS 21 TP6, TP7, TP8, TP9, TP10, TP11, TP12, TP13, TP14, TP15, TP16, TP17, TP18, PC TESTPOINT, YELLOW, ROHS
TP19, TP20, TP55, TP56, TP57, TP58, TP59, TP60
78 5011 KEYSTONE ELECTRONICS 7 TP62, TP63, TP64, TP65, TP66, TP67, TP68 PC TESTPOINT BLACK 063 HOLE ROHS
79 TL1015AF160QG E-SWITCH 4 S1, S2, S3, S4 SWITCH, MOM, 160G SMT 4X3MM ROHS
80 3480 KEYSTONE ELECTRONICS 8 STANDOFFS STANDOFF 4-40 0.5IN 0.220 DIA ALUM RND F-F ROHS
81 4862 KEYSTONE ELECTRONICS 8 STANDOFF SCREWS MACHINE SCREW 4-40 PHILIPS 0.25 LENGTH ROHS
82 INTLWSS 004 KEYSTONE ELECTRONICS 8 STANDOFF WASHERS WASHER INTERNAL TOOTH #4 STAINLESS STEEL ROHS
83 969102-0000-DA 3M 38 JP1, JP2, JP4, JP5, JP6, JP7, JP8, JP17, JP18, JP19, JP22, JP23, JP24, JP25, SHUNT BLACK AU FLASH 0.100LS OPEN TOP ROHS
JP26, JP29, JP30, JP31, JP32, JP33, JP34, JP35, JP36, JP37, JP38, JP39,
JP40, JP41, JP44, JP45, JP46, JP47, JP48, JP49, JP50, JP51, JP52, JP53
TOTAL 491
SPECIAL NOTES TO THIS BILL OF MATERIALS
SN1 These assemblies are ESD sensitive, ESD precautions shall be observed.
SN2 These assemblies must be clean and free from flux and all contaminants. Use of no clean flux is not acceptable.
SN3 These assemblies must comply with workmanship standards IPC-A-610 Class 2.
SN4 Ref designators marked with an asterisk ('**') cannot be substituted. All other components can be substituted with equivalent MFG's components.

SLAU564A February 2014 Revised February 2014 TLV320AIC3268EVM-U Evaluation Module 21

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Writing Scripts www.ti.com

9 Writing Scripts
A script is simply a text file that contains data to send to the serial control buses.
Each line in a script file is one command. No provision is made for extending lines beyond one line, except
for the > command. A line is terminated by a carriage return.
The first character of a line is the command. Commands are:
I Set interface bus to use
r Read from the serial control bus
w Write to the serial control bus
> Extend repeated write commands to lines below a w
# Comment
b Break
d Delay
f Wait for Flag
The first command, I, sets the interface to use for the commands to follow. This command must be
followed by one of the following parameters:
i2cstd Standard mode I2C bus
i2cfast Fast mode I2C bus
spi8 SPI bus with 8-bit register addressing
spi16 SPI bus with 16-bit register addressing
For example, if a fast mode I2C bus is to be used, the script begins with:
I i2cfast A double-quoted string of characters following the b command can be added to provide
information to the user about each breakpoint. When the script is executed, the software's
command handler halts as soon as a breakpoint is detected and displays the string of characters
within the double quotes.
The Wait for Flag command, f, reads a specified register and verifies if the bitmap provided with the
command matches the data being read. If the data does not match, the command handler retries for up to
200 times. This feature is useful when switching buffers in parts that support the adaptive filtering mode.
The command f syntax follows:
f [i2c address] [register] [D7][D6][D5][D4][D3][D2][D1][D0]

where 'i2c address' and 'register' are in hexadecimal format

and 'D7' through 'D0' are in binary format with values of 0,

1 or X for don't care.8

Anything following a comment command # is ignored by the parser, provided that it is on the same line.
The delay command d allows the user to specify a time, in milliseconds, that the script pauses before
proceeding. Note: The delay time is entered in decimal format.
A series of byte values follows either a read or write command. Each byte value is expressed in
hexadecimal, and each byte must be separated by a space. Commands are interpreted and sent to the
TAS1020B by the program.

22 TLV320AIC3268EVM-U Evaluation Module SLAU564A February 2014 Revised February 2014

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www.ti.com Writing Scripts

The first byte following an r (read) or w (write) command is the I2C slave address of the device (if I2C is
used) or the first data byte to write. (If SPI is used, note that SPI interfaces are not standardized on
protocols, so the meaning of this byte varies with the device being addressed on the SPI bus.) The
second byte is the starting register address that data will be written to (again, with I2C; SPI varies).
Following these two bytes are data, if writing; if reading, the third byte value is the number of bytes to
read, (expressed in hexadecimal).
For example, to write the values 0xAA 0x55 to an I2C device with a slave address of 0x30, starting at a
register address of 0x03, the user writes:
#example script

I i2cfast

w 30 03 AA 55

r 30 03 02e

This script begins with a comment, specifies that a fast I2C bus is used, then writes 0xAA 0x55 to the I2C
slave device at address 0x30, writing the values into registers 0x03 and 0x04. The script then reads back
two bytes from the same device starting at register address 0x03. Note that the slave device value does
not change. It is unnecessary to set the R/W bit for I2C devices in the script; the read or write commands
does that.
If extensive repeated write commands are sent and commenting is desired for a group of bytes, the >
command can be used to extend the bytes to other lines that follow. A usage example for the > command
follows:
#example script for '>' command

I i2cfast

# Write AA and BB to registers 3 and 4, respectively

w 30 03 AA BB

# Write CC, DD, EE and FF to registers 5, 6, 7 and 8, respectively

> CC DD EE FF

# Place a commented breakpoint

b "AA BB CC DD EE FF was written, starting at register 3"

# Read back all six registers, starting at register 3

r 30 03 06b

The following example demonstrates usage of the Wait for Flag command, f:
#example script for 'wait for flag' command

I i2cfast

# Switch to Page 44

w 30 00 2C

# Switch buffer

w 30 01 05

# Wait for bit D0 to clear. 'x' denotes a don't care.

f 30 01 xxxxxxx0

Any text editor can be used to write these scripts; jEdit is an editor that is highly recommended for general
usage. For more information, go to: www.jedit.org.

SLAU564A February 2014 Revised February 2014 TLV320AIC3268EVM-U Evaluation Module 23

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Writing Scripts www.ti.com

Once the script is written, it can be used in the command window by running the program, and then
selecting Open Script File... from the File menu. Locate the script and open it. The script then is displayed
in the command buffer. The user also can edit the script once it is in the buffer and save it by selecting
Save Script File... from the File menu.
Once the script is in the command buffer, it can be executed by pressing the Execute Command Buffer
button. If breakpoints are in the script, the script executes to that point, and the user is presented with a
dialog box with a button to press to continue executing the script. When ready to proceed, the user
pushes that button and the script continues.

24 TLV320AIC3268EVM-U Evaluation Module SLAU564A February 2014 Revised February 2014

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www.ti.com Revision History

Revision History

Changes from Original (February 2014) to A Revision .................................................................................................. Page

Deleted link to the Application Reference Guide from the Related Documents table. .......................................... 1
Deleted section titled Operation. ....................................................................................................... 4

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

SLAU564A February 2014 Revised February 2014 Revision History 25

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 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an EVM or EVMs) to the User (User) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (Software) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.

2 Limited Warranty and Related Remedies/Disclaimers:

2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.

3 Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:

CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.

FCC Interference Statement for Class A EVM devices

NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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 FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.

3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.

Concernant les EVMs avec appareils radio:

Le prsent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorise aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement.

Concerning EVMs Including Detachable Antennas:

Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.

Concernant les EVMs avec antennes dtachables

Conformment la rglementation d'Industrie Canada, le prsent metteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou infrieur) approuv pour l'metteur par Industrie Canada. Dans le but de rduire les risques de brouillage
radiolectrique l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonne quivalente (p.i.r.e.) ne dpasse pas l'intensit ncessaire l'tablissement d'une communication satisfaisante. Le
prsent metteur radio a t approuv par Industrie Canada pour fonctionner avec les types d'antenne numrs dans le
manuel dusage et ayant un gain admissible maximal et l'impdance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est suprieur au gain maximal indiqu, sont strictement interdits pour l'exploitation de
l'metteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page

http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page

3.3.2 Notice for Users of EVMs Considered Radio Frequency Products in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministrys Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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1. 61118328173

2.
3.

3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page

http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4 EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TIs recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to Users handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.

5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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 SPACER
6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.

7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.

8. Limitations on Damages and Liability:

8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.

9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.

10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright 2015, Texas Instruments Incorporated

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