Q - 1.1 List and briefly define the four main elements of a computer.

ANS -

(1) Processor

- Controls the operation of computer & performs its data processing function.

- when their one processor called as CPU.

(2) Main Memory

- store data & programs.

- memory is volatile data will be lost when computer shut down.

- contents of disk memory are same even shut down called real or primary memory.

(3) I/0 modules

- move data between computer and its external environment.

- external environment consists of devices including secondary memory devices & terminals.

(4) System bus

-Provides for communication among processors, main memory & I/O modules.

Q 1.2 Define the two main categories of processor registers.

ANS -

(1) User Visible Registers

- Enable the machine or assembly language programmer to minimize main memory references by

optimizing register use and for high level languages compiler will do this task.

- ex. Data and address registers, index registers, segment pointer, stack pointer.

(2) Control & Status registers

- used by the processor to control the operation of processor & by privileged as routines to control the

execution of programs.

- ex. Program counter, instruction register, flags register

Q 1.3 In general terms, what are the four distinct actions that a machine instruction can specify?

ANS -

(1) processor memory

- data may be transfer from processor to memory or memory to processor.

(2) processor I/O

- data may be transferred between peripheral devise (I/O) to processor.

(3) data processing

- perform arithmetic or logic operation on data.

(4) control

- An instruction may specify that the sequence of execution be altered called control.
- suppose processor fetch instruction from location 149, it specify that next instruction from location

182. so processor sets pc to 182 so next instruction fetch from 182 instead 150.

Q 1.4 What is an interrupt?

ANS -

- A mechanism by which other modules (i/o,memory) may interrupt the normal sequence of the

program to improve processor utilization.

Class of interrupts -

(1) programme ex. division by zero.

(2) timer generated by timer for perform certain function on regular basis.

(3) I/O generated by i/o controller, to signal normal completion of an operation or variety of

signal error condition. ex. In Printer page empty load trey.

(4) hardware failure such as power failure or memory parity error.

Q 1.5 How are multiple interrupts dealt with?

ANS -

When at running of a single interrupt execution the other one interrupt is occur at same time called

multiple interrupts.

For dealing with it there are two approaches -

(1) disable interrupts while an interrupts is being processed.

- Its called sequential interrupt processing.

- It means that processor ignores any any of new interrupt request signal. In generally new interrupt is

pending and processor will check after completion of running interrupt.

- drawback the first batch of input has not been proceed before the second batch arrives, data will be

lost because of overflow of buffer.

(2) allow an higher priority interrupt during the time of lower priority interrupt execution.

- it called nested interrupt processing.

- ex. System with 3 i/o devices printer, disk, communication line. Priorities are 2, 4, 5 respectively so

when any interrupt are arrived at interrupt execution then as per its priority it can be executed.

Q 1.6 What characteristics distinguish the various elements of a memory hierarchy?

ANS -

there are three characteristics of memory are Namely, Capacity, Access time and Cost.

The various characteristics which distinguish in between of memory hierarchy elements are:

(1) Faster access time, greater cost per bit

eg. registers & cache memory

They have faster access time so higher cost per bit & low capacity

(2) Greater capacity, smaller cost per bit

eg. main memory or RAM

They have moderate access time, moderate cost per bit &

(3) Greater capacity, slower access speed

eg. magnetic disk & magnetic tape

They have high capacity, low cost per bit & slower access.

Q 1.7 What is cache memory?

ANS -

cache memory - The part of Random Access Memory or Main Memory that is easily accessible to the

processor is called as cache memory.

- As the microprocessor processes data, it looks first in the cache memory and if it finds the data in

cache memory, then in main memory, it takes less time for that compare with RAM.

- The cache contains a copy of a portion of random access memory.

- Cache memory is intended to provide memory access time approaching that of the fastest memories

available.

- As compare with registers memory, cache memory is low cost per bit and has faster access time.

Q 1.8 List and briefly define three techniques for I/O operations.

ANS -

Programmed I/O -

- Programmed input/output is a method of transferring data between the CPU and Input/Output

peripherals.

- the processor is responsible for extracting data from main memory for output and storing data in main

memory for input.

- The CPU issues a command then waits for I/O operations to be complete.

the instruction set includes I/O instructions in the following categories:

- Control: Used to activate an external device and tell it what to do.

For example, a magnetic-tape unit may be instructed to rewind or to move forward one record.

- Status: Used to test various status conditions associated with an I/O module and its peripherals.

- Transfer: Used to read and/or write data between processor registers and external devices.

Interrupt-driven I/O

- in programmed I/O The processor, while waiting, must repeatedly interrogate the status of the I/O

module. As a result, the performance level of the entire system is severely degraded.

- I/O command to a module and then go on to do some other useful work.

- The I/O module will then interrupt the processor to request service when it is ready to exchange data

with the processor.

- The processor then executes the data transfer, as before, and then resumes its former processing.

Direct Memory Access

- Thus both of the above forms of I/O suffer from two inherent drawbacks:

1. The I/O transfer rate is limited by the speed with which the processor can test and service a device.

2. The processor is tied up in managing an I/O transfer; a number of instructions must be executed for

each I/O transfer.

- The DMA function can be performed by a separate module on the system bus or it can be

incorporated into an I/O module.

- the processor wishes to read or write a block of data, it issues a command to the DMA module, by

sending to the DMA module the following information:

Whether a read or write is requested

The address of the I/O device involved

The starting location in memory to read data from or write data to

The number of words to be read or written

DMA is far more efficient than interrupt- driven or programmed I/O.

Q 1.9 What is the distinction between spatial locality and temporal locality?

ANS -

- The concept that a resource that is referenced at one point in time will be referenced again sometime

in the near future is called as temporal locality.

- If a particular memory location is referenced at a particular time, then it is likely that nearby

memory locations will be referenced in the near future is called as spatial locality.

Q 1.10 In general, what are the strategies for exploiting spatial locality and temporal locality?

ANS -

- Temporal locality is exploited by keeping recently used instruction and data values in

cache memory and by exploiting a cache hierarchy.

- Spatial locality is generally exploited by using larger cache blocks and by

incorporating pre-fetching mechanisms into the cache control logic.

4. Answer the following Problems: 1.1, 1.3, 1.5, 1.7, 1.9

1.1 Suppose the hypothetical processor of Figure 1.3 also has two I/O instructions:

0011 . Load AC from I/O

0111 . Store AC to I/O

In these cases, the 12-bit address identifies a particular external device. Show the program
execution (using format of Figure 1.4) for the following program:

1. Load AC from device 5.

2. Add contents of memory location 940.

3. Store AC to device 6.

Assume that the next value retrieved from device 5 is 3 and that location 940 contains

a value of 2.

Memory (contents in hex):

300: 3000

301: 6000

302: 9000

1: 3000 . IR

2: 3 . AC

3: 6000 . IR

4: 3 + 2 = 5 . AC

5: 9000 . IR

6: AC . Device 6

1.3 Consider a hypothetical 32-bit microprocessor having 32-bit instructions composed of

two fields. The first byte contains the opcode and the remainder an immediate operand

or an operand address.38

CHAPTER 1 / COMPUTER SYSTEM OVERVIEW

a. What is the maximum directly addressable memory capacity (in bytes)?

b. Discuss the impact on the system speed if the microprocessor bus has

1. a 32-bit local address bus and a 16-bit local data bus, or

2. a 16-bit local address bus and a 16-bit local data bus.

c. How many bits are needed for the program counter and the instruction register?

Ans:

a. 2^24 = 16 MBytes

b. (1) If the address bus is 32 bits, the whole address can be transferred at once and decoded in

memory. But the data bus is only 16 bits, so it will require 2 cycles to fetch a 32-bit instruction or

operand.

(2) The 16 bits of the address placed on the address bus can't access the whole memory. Thus a more

complex memory interface control is needed to latch the first part of the address and then the second

part (since the microprocessor will -2-end in two steps). For a 32-bit address, one may assume the first

half will decode to access a "row" in memory, while the second half is sent later to access a "column"

in memory. In addition to the two-step address operation, the microprocessor will need 2 cycles to fetch
the 32 bit instruction/operand.

c. The program counter must be at least 24 bits.

1.5 Consider a 32-bit microprocessor, with a 16-bit external data bus, driven by an 8-MHz input

clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four

input clock cycles. What is the maximum data transfer rate across the bus that this

microprocessor can sustain in bytes/s? To increase its performance, would it be better to make its

external data bus 32 bits or to double the external clock frequency supplied to the

microprocessor? State any other assumptions you make and explain. Hint: Determine the

number of bytes that can be transferred per bus cycle.

1/8 10^6 = 125 ns

4 clk cycles of 8 MHz Bus cycle = 4 125 ns = 500 ns

2 bytes transferred every 500 ns; thus transfer rate = 4 MBytes/sec

Clock cycle = Doubling the frequency may mean adopting a new chip manufacturing technology;

doubling the external data bus means wider on-chip data bus drivers/latches and modifications to the

bus control logic. In the first case, the speed of the memory chips will also need to double not to slow

down the microprocessor; in the second case, the "wordlength" of the memory will have to double to be

able to send/receive 32-bit quantities.

1.7 In virtually all systems that include DMA modules, DMA access to main memory is

given higher priority than processor access to main memory. Why?

If a processor is held up in attempting to read or write memory, usually no damage occurs except a

slight loss of time. However, a DMA transfer may be to or from a device that is receiving or sending

data in a stream (e.g., disk or tape), and cannot be stopped. Thus, if the DMA module is held up (denied

continuing access to main memory), data will be lost.

1.9 A computer consists of a CPU and an I/O device D connected to main memory M via a shared

bus with a data bus width of one word. The CPU can execute a maximum of 106 instructions per

second. An average instruction requires five processor cycles, three of which use the memory bus.

A memory read or write operation uses one processor cycle. Suppose that the CPU is

continuously executing background programs that require 95% of its instruction execution

rate but not any I/O instructions.APPENDIX 1A / PERFORMANCE CHARACTERISTICS OF

TWO-LEVEL MEMORIES

Assume that one processor cycle equals one bus cycle. Now suppose that very large blocks of data

are to be transferred between M and D.

a. If programmed I/O is used and each one-word I/O transfer requires the CPU to execute two

instructions, estimate the maximum I/O data transfer rate, in words per second, possible through
D.

b. Estimate the same rate if DMA transfer is used.

a. The processor can only devote 5% of its time to I/O. Thus the maximum I/O instruction execution

rate is 106 0.05 = 50,000 instructions/second. The I/O transfer rate is therefore 25,000 words/second.

b. The number of machine cycles available for DMA control is 10^6 (0.05 5 +

0.95 2) = 2.15 10^6

2.1. What are three objectives of an OS design?

2.1 Convenience: An operating system makes a computer more convenient to use.

Efficiency: An operating system allows the computer system resources to be used

in an efficient manner. Ability to evolve: An operating system should be

constructed in such a way as to permit the effective development, testing, and

introduction of new system functions without interfering with service.

2.2. What is the kernel of an OS?

2.2 The kernel is a portion of the operating system that includes the most heavily used

portions of software. Generally, the kernel is maintained permanently in main

memory. The kernel runs in a privileged mode and responds to calls from processes

and interrupts from devices.

2.3. What is multiprogramming?

2.3 Multiprogramming is a mode of operation that provides for the interleaved

execution of two or more computer programs by a single processor.

2.4. What is a process?

2.4 A process is a program in execution. A process is controlled and scheduled by the

operating system.

2.5. How is the execution context of a process used by the OS?

2.5 The execution context, or process state, is the internal data by which the operating

system is able to supervise and control the process. This internal information is

separated from the process, because the operating system has information not

permitted to the process. The context includes all of the information that the

operating system needs to manage the process and that the processor needs to

execute the process properly. The context includes the contents of the various

processor registers, such as the program counter and data registers. It also includes

information of use to the operating system, such as the priority of the process and

whether the process is waiting for the completion of a particular I/O event.

2.6. List and briefly explain five storage management responsibilities of a typical OS.

2.6 Process isolation: The operating system must prevent independent processes from

interfering with each other's memory, both data and instructions. Automatic
allocation and management: Programs should be dynamically allocated across the

memory hierarchy as required. Allocation should be transparent to the

programmer. Thus, the programmer is relieved of concerns relating to memory

limitations, and the operating system can achieve efficiency by assigning memory

to jobs only as needed. Support of modular programming: Programmers should be

able to define program modules, and to create, destroy, and alter the size of

modules dynamically. Protection and access control: Sharing of memory, at any

level of the memory hierarchy, creates the potential for one program to address the

memory space of another. This is desirable when sharing is needed by particular

applications. At other times, it threatens the integrity of programs and even of the

operating system itself. The operating system must allow portions of memory to be

accessible in various ways by various users. Long-term storage: Many application

programs require means for storing information for extended periods of time, after

the computer has been powered down.

2.7. Explain the distinction between a real address and a virtual address.

2.7 A virtual address refers to a memory location in virtual memory. That location is

on disk and at some times in main memory. A real address is an address in main

memory.

2.8. Describe the round-robin scheduling technique.

2.8 Round robin is a scheduling algorithm in which processes are activated in a fixed

cyclic order; that is, all processes are in a circular queue. A process that cannot

proceed because it is waiting for some event (e.g. termination of a child process or

an input/output operation) returns control to the scheduler.

2.9. Explain the difference between a monolithic kernel and a microkernel.

2.9 A monolithic kernel is a large kernel containing virtually the complete operating

system, including scheduling, file system, device drivers, and memory

management. All the functional components of the kernel have access to all of its

internal data structures and routines. Typically, a monolithic kernel is implemented

as a single process, with all elements sharing the same address space. A

microkernel is a small privileged operating system core that provides process

scheduling, memory management, and communication services and relies on other

processes to perform some of the functions traditionally associated with the

operating system kernel.

2.10. What is multithreading?

2.10 Multithreading is a technique in which a process, executing an application, is

divided into threads that can run concurrently.

3.1 What is an instruction trace?

3.1 An instruction trace for a program is the sequence of instructions that execute for

that process.

3.2 What common events lead to the creation of a process?

3.2 New batch job; interactive logon; created by OS to provide a service; spawned by

existing process. See Table 3.1 for details.

3.3 For the processing model of Figure 3.6, briefly define each state.

3.3 Running: The process that is currently being executed. Ready: A process that is

prepared to execute when given the opportunity. Blocked: A process that cannot

execute until some event occurs, such as the completion of an I/O operation. New:

A process that has just been created but has not yet been admitted to the pool of

executable processes by the operating system. Exit: A process that has been released

from the pool of executable processes by the operating system, either because it

halted or because it aborted for some reason.

3.4 What does it mean to preempt a process?

3.4 Process preemption occurs when an executing process is interrupted by the

processor so that another process can be executed.

3.5 What is swapping and what is its purpose?

3.5 Swapping involves moving part or all of a process from main memory to disk.

When none of the processes in main memory is in the Ready state, the operating

system swaps one of the blocked processes out onto disk into a suspend queue, so

that another process may be brought into main memory to execute.

3.6 Why does Figure 3.9b have two blocked states?

3.6 There are two independent concepts: whether a process is waiting on an event

(blocked or not), and whether a process has been swapped out of main memory

(suspended or not). To accommodate this 2 2 combination, we need two Ready

states and two Blocked states.

3.7 List four characteristics of a suspended process.

3.7 1. The process is not immediately available for execution.

2. The process may or may not be waiting on an event. If it is, this blocked condition is independent of the suspend condition, and
occurrence of the blocking event does not enable the process to be executed.

3. The process was placed in a suspended state by an agent; either itself, a parent process, or the operating system, for the
purpose of preventing its execution.

4. The process may not be removed from this state until the agent explicitly orders the removal.

3.8 For what types of entities does the OS maintain tables of information for management purposes?

3.8 The OS maintains tables for entities related to memory, I/O, files, and processes.

See Table 3.10 for details.

3.9 List three general categories of information in a process control block.

3.9 Process identification, processor state information, and process control information.

3.10 Why are two modes (user and kernel) needed?

3.10 The user mode has restrictions on the instructions that can be executed and the

memory areas that can be accessed. This is to protect the operating system from

damage or alteration. In kernel mode, the operating system does not have these

restrictions, so that it can perform its tasks.

3.11 What are the steps performed by an OS to create a new process?

3.11 1. Assign a unique process identifier to the new process. 2. Allocate space for the

process. 3. Initialize the process control block. 4. Set the appropriate linkages. 5.

Create or expand other data structures.

3.12 What is the difference between an interrupt and a trap?

3.12 An interrupt is due to some sort of event that is external to and independent of the

currently running process, such as the completion of an I/O operation. A trap

relates to an error or exception condition generated within the currently running

process, such as an illegal file access attempt.

3.13 Give three examples of an interrupt.

3.13 Clock interrupt, I/O interrupt, memory fault.

3.14 What is the difference between a mode switch and a process switch?

3.14 A mode switch may occur without changing the state of the process that is currently in the Running state. A process switch
involves taking the currently executing process out of the Running state in favor of another process. The process switch involves
saving more state information.