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Experiment 6: Amplifier Design Using an Active Load

Date: 3/1/2017 Section: 4

Zichao Zhang

Introduction:

In this lab experiment we investigated the use of an NMOS amplifying transistor with PMOS

devices configured as a current mirror/active load. An active load is a circuit component made

up with active device, such as MOSFET, intended to present a high small signal impedance

without a large DC voltage drop. Such high AC load impedance is used to increase the AC gain

of some types of amplifiers. We chose a resistor value to design a PMOS current mirror circuit

which would provide a 100A bias current. We then used the NMOS to create different

amplifiers and investigated the characteristics.

For this lab, the IC we used is CD4007 which is the same as the one we investigated in

Experiment 4. The following table summary the parameters we measured from Experiment 4.

Table 1: Parameters of IC CD4007

Name VTN /VTP [V] kn / kp [mA/V2] n /p VA

Q1(NMOS) 1.13 1.0667

Q2(PMOS) 0.0054565

Q3(PMOS) 0.0054565
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CIRCUIT SCHEMATICS:

Task 1 Current Mirror with Active Load:

A Current Mirror is a circuit designed to copy a current through one active device by controlling

the current in another active device of a circuit, keeping the output current constant regardless of

loading. A Current Mirror can be designed from bipolar junction transistors (BJT) or field-effect

transistors (FET), which are extremely useful in biasing other transistors to carry out several

analog circuit functions.

Task 2 Common-Source Amplifier Circuit:


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The common-source (CS) amplifier can be viewed as a transconductance amplifier or as a

voltage amplifier. As a transconductance amplifier, the input voltage is seen as adjusting the

current going to the load. As a voltage amplifier, input voltage adjusts the amount of current

flowing through the Field-Effect Transistor, changing the voltage across the output resistance in

accordance to Ohm's law.

Task 5 Common-Gate Amplifier Circuit:

The common-gate amplifier circuit is most commonly used as a current buffer or voltage

amplifier. It name comes from the fact that the source terminal of the transistor serves as the

input, the drain is the output and the gate is common to both.
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Task 7 Directly Measuring the Body Effect:

Task 7, we deduced that the body effect could be measured if we subtracted the voltage gain of

the common-gate with the voltage gain of the common-source. To take this mathematical

equation and use it in a practical environment, one must first notice that in the common-gate

apparatus the source was the input while in the common-source apparatus the gate was the input.

By making these both the input it is assumed that result will match the mathematical model

theorized.

DATA AND GRAPHS:

Task 1 Calculate VGS2 and R3 & Then Measure R3:

The PMOS is in saturation so we could use the according equations. Also, the current source is

supplying 100A to the system.

According to equation:

ID3 = Kn/2 (VSG + VTP)2 * (1 + * VSD)


100A =
We got:
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VGS2 = (VSG2 =
Plug in the value of VSG2, we got:
R3 = (10V- VSG2)/ID3 = 73.9k

After we got the theoretical value, we then attached a potentiometer and adjust the resistor in

order to get the desire current(100A). We the measure the actual resistance:

R3(measured) = 92.3 k

Task 2 Theoretical Calculations for VGS1, R1, and R2:

The NMOS is in saturation so we could use the according equations. Also, the current source is

supplying 100A to the system.

According to the equation:

ID3 = (KN/2) * (VGS - VTN)2

100 A = 1.0667 mA/V2 (VGS 1.13 V)2

We got:

VGs1 = 1.56301V

form

R1 + R2 = 1 M(we chose large value to limit power drawn)

R2/( R1 + R2) = 1.56/(10)

We got:

R1= 844 k; R2 = 156 k

The Measured values of the resistance used in the circuits are:


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R1(measured) = 866 k

R2(measured) = 134 k

Task 3 Record Method for Resistance Adjusting, Actual Values (R1, R2, and VO), and

Measured Values (VGS1, VGS2, and ID1)

We changed the R2 to 100 k and put a potentiometer in series with it. Then, we adjusted the

potentiometer so that the DC drain voltage for the NMOS device was at a value equal to half the

supply voltage. Finally, we used the 10X probe to measure the Vo. The final value we got are:

R1 = 910 k

R2(with pot) = 151 k

VO = 5.1 V

we used the multimeter to measure the values for VGS1, VGS2, and ID1 and got the following

values:

VGS1 = 1.43 V

VGS2 = 2.35 V

ID1 = 99.83 A

Task 4 Small Signal Equivalent Circuit, Calculations (Av, Rin, and Rout), Plot of Vi and

VO, and Measurement of Av

The following are the small signal equivalent for the circuit in Task 4
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This circuit is obtained by shutting down the DC source and using the technique as we discussed

in class. This small signal model is formed about the DC bias point of the device and can be

accurate for small excursions about this point. To perform this technique, we begin with the AC

small signal model and then add components according to the original circuit. Note, since Q3

and Q2 are all in DC, so the small signal equivalent simply becomes ro2 as we discussed in class.

Calculated values:

AV = VO / Vi=-37.7V/V

RIN= 129.5 k

ROUT = rO1 || rO2 || 51 k= 48.5 k

Sample Calculations:

rO1 =1 / ( * IDQ) =1 / (0.013001 *99.83 A)= 0.77 M

rO2 = 1 / ( * IDQ)= 1 / (0.054565 * 99.83 A)= 0.18 M

= (1 + ) = 0.3159 /

AV = VO / Vi

VO= -gm * (rO1 || rO2) * vgs & Vi= vgs

We got the value of the voltage gain to be:

AV = VO / Vi=-gm * (rO1 || rO2) = -46.09 V/V

To find the Rin and Rout we first remove all the sources, then the Rin and Rout Simply becomes:

RIN = R1 || R2 = (910 k * 151 k) / (910 k + 151 k)

= 129.5 k
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ROUT = rO1 || rO2 = 145.8 k

Figure1: Plot of Vi and VO in Task 4

Using the value in Figure1 we found out the measurement for Av to be:

Av(measured)= Vo/Vi = -1.684V/29.27 mV = -57.533 V/V

%difference = (-46.09-57.5)/57.5 = 20%

The difference here is rather large, such difference could due to the accuracy of the devices we

used in the experiment as well as the parameter we used in our calculation.


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Task 5 - Small Signal Equivalent Circuit, Calculations (Av, Rin, and Rout), Plot of Vi and VO, and

Measurement of Av

The following are the small signal equivalent for the circuit in Task 5

This circuit is obtained by shutting down the DC source and using the technique as we discussed

in class. This small signal model is formed about the DC bias point of the device and can be

accurate for small excursions about this point. To perform this technique, one must begin with

the AC small signal model and then add components according to the original circuit. Note, since

Q3 and Q2 are all in DC, so the small signal equivalent simply becomes ro2 as we discussed in

class.

Calculated values:
AV = 63.3 V/V
RIN = 50.2
ROUT = 145.8
Sample calcualtion:
(Note we assume = 0.25 in our calculation)
Recall from the smaple calculation from task 4
ro1= 0.77 M , rO2 = 0.18 M , = 0.3159 /
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To find voltage gain Av, we have:

We get:

= 63.3 /
To find the input resistance Rin, we supply a test voltage Vx:

We get:


= = 50.2

Shut down the independent source, Rout is simply equal to:

Rout = ro1//ro2 = 145.8 K


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Figure2: Plot of Vi and VO in Task 5

Using the values form the plot we found the voltage gain to be:

Av(measured)= 86.27 V/V

Sample calculations:

Compared the result we found the %diff in the theoratical and experimatl value to be

%diff = ((86.27-63.3)/63.3)*100% = 37%

The difference here is rather large, such difference could due to the accuracy of the devices we

used in the experiment as well as the parameter we used in our calculation. We also assumed =

0.25 in the calculation.


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Task 6 Calculate gmb and (ETA) from the measurements


In task 6, we used the gain equations that we found and values that we measured in the previous
two tasks to calculate values for the body transconductance (gmb ) and the body effect parameter
() of the NMOS amplifying device at the bias conditions we established in tasks 1-3.

Results:

= 0.49

= 0.1546 /

Sample calculations:

To find the value for body effect parameter (), we use the retial of the experimental value of the
voltage gain of CS and CG amplifier as follows:


=
(1 + )gmR

Plug in the values, we get:

= 0.49

Then use the equation, we get:

= = 0.1546 /

Task 7 Small Signal Analysis of Test Circuit & Results

In task 7, we are asked to develop an alternative test circuit for directly measuring the body effect,
without changing the DC bias conditions. In order to accomplish this, we will use basically the same
circuit that we already had and again only change the ac signals. The only change that we made to the
circuit from task 4 and 5 was that we connected the input to both the gate and the source of the amplifying
device. The schematic for this common-gate amplifying circuit can be found below.
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Small signal equivalent circuit:

This circuit is obtained by shutting down the DC source and using the technique as we discussed
in class. This small signal model is formed about the DC bias point of the device and can be
accurate for small excursions about this point. To perform this technique, one must begin with
the AC small signal model and then add components according to the original circuit.
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Figure3: Plot of Vi and VO in Task 7

Using the peak to peak amplitude measurements from the oscilloscope capture, we can calculate
the ac small signal gain for this amplifier configuration.

Result:

= 0.55

= 0.1737/

Sample calculation:

We first need to find the voltage gain:

We then use the equation:


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Plug in the value, we get:

= 0.55

Then use the equation, we get:

= = 0.1737 /

MULTISIM

Multisim Schematic of Figure 3

Using figure 3 from the lab guide, I was able to recreate the circuit in Multisim. The
following is the result.

Figure4: Multisim Schematic of Figure 3

910k

151k

This schematic is simply constructed by copying the circuit design in figure 3 and building it in

the multisim.
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Measure voltage gain of the amplifier:

From the oscilloscope capture from multisim, we can calculate the simulated ac small signal

gain.

We find the following result:

Av(simulated)= -56.6 V/V

Sample calculations:

2.83
= = = 56.6 /
0.05

The comparison of the result is in the following section.

DISCUSSION

Reasoning Behind Task 7 Test Circuit


The purpose for this test circuit is to be able to directly measure the body effect. Using the same

DC bias conditions. In order to do this, we need to rearrange the ac configuration such that the

output voltage is directly proportional to the small signal body transconductance of the NMOS

device. This test circuit therefore needs to have an ac configuration such that vgs=0 and vbs0 at

the same time. This results in only one dependent current source in the small signal model, which

will mean that our small signal voltage gain will be directly proportional to . This condition that

vgs=0 and vbs0 can be achieved by connecting both the gate and the source terminals of the

NMOS amplifying device to the same small signal voltage input and keeping the output at the

drain terminal.
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Compare Theoretical values to Measured values:

The discussion of the theoretical values and measured values is done at the bottom of each task

section, please refer back for the information. In general, we have some differences in the

measured and theoretical values, such difference could be due to the accuracy of our ability to

perform the experiment, the device we used as well as the parameter given.

Compare Measurements to Simulated Values

Av(measured) = -57.533 V/V

Av(simulated)= -56.6 V/V


%difference = (-56.6-57.5)/57.5 = 1.6%

The %difference here is rather small so we are confident about our result.

VGS1 (measured)= 1.43 V

VGS1 (measured)= 1.69V

%difference= 18.3%

VGS2 (measured)= 2.35 V

VGS2 (simulated)= 2.67 V

%difference = 13.6%

ID1 (measured)= 99.83 A

ID1 (simulated)= 101 A

%difference = 1.1%

All the set of simulated and measured value are close to each other with reasonable differences.
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Such difference could be due to the accuracy of our ability to perform the experiment and device

we used.

Amount of Errors and Reasons for Errors

When comparing the measured values with the theoretical values, all of the numbers seem to be

pretty reasonable. However, in task 5, we find %diff between theoratical and measured value for

vlotage gain to be 37%.The difference here is rather large, such difference could due to the

accuracy of the devices we used in the experiment as well as the parameter we used in our

calculation. We also assumed = 0.25 in the calculation.

When comparing the measurements with the simulated values I notice that all of the values are

reasonable. Please refer to the previous section for the exact %difference in each set of values.

Overall, we are confident about the result we get from this experiment.

Answer Questions Concerned with Different Configurations

All the question has been asked in each task section, except Why is the voltage gain for the

common gate larger than the voltage gain for the common source?. The reason for this is purely

due to how the two circuits look as AC small signal equivalents. Depending on the set up of the

dependent voltage source and where the resistors fall into place, it is clear (by inspection) that

the voltage gain for the common gate would be larger than the voltage gain for the common

source. We also discussed in the class that the common source amplifier is also called source

follower.
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SUMMARY, CONCLUSION, AND ATTACHMENTS

Summary and Conclusions

Overall, this two-week lab is successful. We found in the experimental results that the

configuration characteristics do in fact agree with what we learned in class. We found from the

characteristics of both the calculations and the measurements that the common-source small

signal gain is negative, while the common-gate small signal gain is positive. We also found that

the magnitudes of the small signal voltage gains were both greater than 1, the gain of the

common-gate configuration being slightly larger than that of the common-source configuration

due to the body effect. We also saw that relative to that of the CS configuration, the Rin for the

CG configuration is much smaller. The neat part of this experiment was getting to physically see

all the aspects of the different amplifier configurations that we were simply told about in lecture.

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