ELEC244 Lab 7 -- PWM Class D amplifier

In this lab we will build a PWM circuit that drives a relatively small power resistor. It will
generate a digital pulse train at a fixed frequency whose duty cycle is controlled by a
time-varying analog control voltage.
You will use the final circuit from last week and add on to it.

1. Testing the constant current source

Using the same techniques from HW6 Problem 3, calculate what R1, R2, and
RE should be to bias the transistor circuit to deliver about 1mA, with VB
about 1.7V below VDD (VDD = 6V).
See the figure on right. C2 is a bypass
cap; its value is not critical. Assume
beta is infinity and current through R1
and R2 is IE/10.
The next step is to measure the
current out of the transistor and verify
that it gives about 1 mA and behaves
approximately as a current source: use
a few values of load resistor RL and
verify that the voltage across the load
resistor scales linearly with value of RL.
Choose values of RL such that the
collector voltage goes up to about
VDD - 2V so that the PNP is always in active mode.
Labbie checkpoint: Demonstrate that the transistor is biased in active mode
and that it behaves approximately like a current source over a wide range
of collector voltages.
2. Measure the linearity of the new timer circuit
Hook up the transistor current source into your PWM circuit from last week.
Choose a value of C such that it can charge up to its full value (about VDD -
 2.0V), given the current from the current source above, in slightly less than
the full period of 10 us.

Use a variable voltage supply (or a pot) on the Modulation input and
measure the duty cycle of the Out node vs. the modulation input voltage.
Estimate the linear range of operation.
Labbie Checkpoint: Show that the PWM circuit works as last week and
show that the output duty cycle is approximately linear over a range of
modulation voltages.
You have two options for the next step:
o Option 1: Use a pot to bias the DC operating point of the Modulation
input at the midpoint of its linear range and use a capacitor to couple
in an AC sinewave signal of f=1 kHz from the function generator.
Choose a value of Cin such that (R_pot_a || R_pot_b) Cin >> ( 1/ 2 f) .
See figure below:

o Option 2: Instead of R_pot and Cin, use the DC offset capability of

your FGEN to set your DC operating point at the midpoint of PWMs
linear range of operation. Apply a f=1kHz sinewave signal.
Show on the scope that the duty cycle is getting modulated by the function
generator. Take a screenshot of the Out node.
 Labbie Checkpoint: demonstrate that the function generator is modulating
the duty cycle of the output.
3. Hook up power output stage. In this section we will put in a stand-in for a later
high-power H-bridge circuit -- we will just use a simple CMOS inverter from 2 weeks ago.
If your H-bridge is still set up from that lab you can optionally use that instead.
Connect the Output of the circuit to the input of the inverter, and use a load
resistor RLoad of about 150 ohms (for average-power reasons).
Set up a low-pass filter at the load resistor such that the 1 kHz input passes
the low pass filter but the 100 kHz PWM carrier frequency is attenuated by at
least 20 dB. (Choose Rfilt and Cfilt appropriately such that Rfilt >> RLoad).
Measure the output on the scope and compare vs. the input sinewave.
Determine if the output amplitude increases linearly with input. Determine
the maximum amplitude sinewave that you can supply to the input while the
output looks reasonably un-distorted.

Labbie Checkpoint: Show that the circuit works qualitatively as expected.

Lab Report Contents
Title page with lab #, group members.
Current source
o Describe the theory of operation of the transistor current source
and explain the values for bias components chosen
o Show the graph of output current vs. collector voltage including a
linear fit.
o Compare results to expected results and discuss possible reasons
for error.
PWM linearity
o Describe the theory of operation of the PWM generator, including
why the duty cycle is expected to be approximately linear in the
control voltage.
o Show duty cycle vs. modulation voltage from this week and from
last weeks lab.
o Compare results to expected results and discuss possible reasons
for error.
Loaded output stage
o Describe theory and selection of passive components for input AC
coupling (if you chose Option 1) and output low pass filter.
o Show scope screen trace(s) demonstrating output being
modulated by input sinewave (out node before output power
stage)
o Compare results to expected results and discuss possible reasons
for error.
ELEC244 Lab 7 Checklist page

Group member names:

Labbie initials below

_____ Demonstrate that the transistor is biased in active mode and that it
behaves approximately like a current source over a wide range of collector
voltages.
_____ Show that the PWM circuit works as last week and show that the output
duty cycle is approximately linear over a range of modulation voltages.
_____ Demonstrate that the function generator is modulating the duty cycle of
the output.
_____ Show that the circuit works qualitatively as expected.