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AMPS
SYLLABUS
Adder
Subtractor
Voltage follower
Current to voltage converter
Voltage to current converter
Integrator
Differentiator
Active filters
Non-linear applications
Comparators
Logarithmic amplifiers
Exponential amplifiers
Peak detectors
Precision rectifiers
Waveform generators
Clippers & clampers
If Rf = R, then Vout = v1+v2+v3
Non-inverting
Summing
Amplifier
If RF=2R1, 1+RF/R1=3
Vo= Va+Vb+Vc
Determine the output voltage
=12
Averaging Amplifier
A summing amplifier can be made to produce the
mathematical average of the input voltages. The
amplifier has a gain of Rf/R, where R is the value of
each input resistor. The general expression for the
output of an averaging amplifier is
VOUT=-(Rf /R)(VIN1+VIN2++VINn)
Vi
iL = vi /R
A voltage-to-current converter with grounded load is shown in Fig. 4.8 (b). Let vi
be the voltage at node 'a'. Writing KVL, we get
Since the op-amp is used in non-inverting
mode, the gain of the circuit is 1 + R/R= 2. The
output voltage is,
vo = 2v1 = vi + vo iLR
Vi = iLR
iL = vi /R
As the input impedance of a non-inverting amplifier is very high, this circuit has the
advantage of drawing very little current from the source.
A voltage to current converter is used for low voltage dc and ac voltmeter, LED and
zenar diode tester.
Current to Voltage Converter (Trans-resistance Amplifier)
Photocell, photodiode and photovoltaic cell give an output
current that is proportional to an incident radiant energy or light.
The current through these devices can be converted to voltage by
using a current-to-voltage converter and thereby the amount of
light or radiant energy incident on the photo-device can be
measured.
Figure 4.9. shows an op-amp used as I to V converter. Since the
(-) input terminal is at virtual ground, current ii flows through the
feedback resistor Rf. Thus the output voltage v0 = - iiRf. It may be
pointed out that the lowest current that this circuit can measure
will depend upon the bias current of the op-amp. This means that
for 741 (bias current is 3 nA) can be used to detect lower
currents. The resistor Rf is sometimes shunted with a capacitor Cf
to reduce high frequency noise and the possibility of oscillations.
Inverting Current to Voltage Converter
Non-inverting Current to Voltage Converter.
INTEGRATORS AND
Integrators produce output
DIFFERENTIATORS voltages that are
proportional to the running time integral of the input
voltages. In a running time integral, the upper limit of
integration is t. Passive Integrator Gain is Less than
Unity. Attenuation is more. For perfect integration,
large values of RC are required.
For example, if the input is a sine wave, the output will be a cosine
wave.
If the input is a square wave, the output will be a triangular wave,
as shown in Figure 7-23(c) and (b), respectively.
When vin = 0, the integrator of Figure 7-23(a)
works as an open-loop amplifier. This is because
the capacitor CF acts as an open circuit (XCF = )
to the input offset voltage Vio. In other words, the
input offset voltage Vio and the part of the input
current charging capacitor CF produce the error
voltage at the output of the integrator. Therefore, in
the practical integrator shown in Figure 7-25, to
reduce the error voltage at the output,
a resistor RF is connected across the feedback
capacitor CF. Thus, RF limits the low-frequency
gain and hence minimizes the variations in the
output voltage.
A practical Integrator
Frequency Response
The frequency response of the basic integrator is shown in
Figure 7-24. In this figure, fb, is the frequency at which the
gain is 0 dB and is given by
If the op-amp was ideal, an integrator as shown in above Figure would require just one
resistor, R, and one capacitor, C, and the relation between the output and input voltages
would be given by
fa < fb. If fa = fb/10, then RF = 10R1. The input signal will be integrated properly, if
time period T of the input signal
Integrating Range
=fa =fb
fc = Unity Gain BW
Ideal
Figure 7-27b
Figure 7-27 Basic
differentiator, (a) Circuit, Gain increases with frequency
Practical
Figure 7-28 fc = Unity Gain BW
Since IB = 0,
i c = iF
Since v1= v2 = 0 V,
fa is the frequency at which the gain is 0db and is given by
At fa gain is 0db
Both the stability and the high-frequency noise problems can be corrected by
the addition of two components: R1 and CF, as shown in Figure 7-28(a), This
circuit is a practical differentiator, the frequency response of which is shown in
Figure 7-27(b) by a dashed line. From frequency f to fb, the gain increases at 20
dB/decade. However, after fb the gain decreases at 20 dB/decade. This 40-dB/
decade change in gain is caused by the R1C1 and RFCF combinations. The gain-
limiting frequency fb is given by (7-29)
where R1C1= RFCF , help to reduce significantly the effect of high-frequency
input, amplifier noise, and offsets. Above all, it makes the circuit more stable by
preventing the increase in gain with frequency. Generally, the value of fb and in
turn R1C1 and RFCF values should be selected such that
fa< fb< f c (7-30)
But v1= v2 = 0 V, because A is very large. Therefore,
Thus the output v0 is equal to the RFC times the negative
instantaneous rate of change of the input voltage vin with time.
Since the differentiator performs the reverse of the integrator's
function, a cosine wave input will produce a sine wave output, or a
triangular input will produce a square wave output. However, the
differentiator of Figure 7-27(a) will not do this because it has some
practical problems. The gain of the circuit
(RF /XC1) increases with increase in frequency at a rate of 20
dB/decade. This makes the circuit unstable. Also, the input
impedance XC decreases with increase in frequency, which makes
the circuit very susceptible to high-frequency noise. When
amplified, this noise can completely override the differentiated
output signal. The frequency response of the basic differentiator is
shown in Figure 7-27(b). In this figure, fa is the frequency at which
the gain is 0 dB and is given by
Figure 7-28 Practical differentiator, (a) Circuit, (b) Sine wave input and resulting cosine
wave output, (c) Square wave input and resulting spike output.
Steps For the Design of Practical Differentiator:
The input, output waveforms are shown in Fig. 4.11 (b). The op-amp in the circuit
of Fig. 4.11 (a) must be a high speed op-amp since it alternates between open
loop and closed loop operations. The principal limitation of this circuit is the slew
rate of the op-amp. As the input passes through zero, the op-amp output voA must
change from 0.6 V to - 0.6 V or vice-versa as quickly as possible in order to
switch over the conduction from one diode to the other. The circuit of Fig. 4.11(a)
provides a positive output. However, if both the diodes are reversed, then only
positive input signal is transmitted and gets inverted. The circuit, then provides a
negative output.
Full-wave Rectifier
Fig. 4.12 (a) Precision full wave rectifier, (b) Equivalent circuit for vi > 0; D1 is on
and D2 is OFF; op-amp A1 and A2 operate as inverting amplifier
A full wave rectifier or absolute value circuit is shown in Fig. 4.12 (a). For positive
input, i.e. vi > 0, diode D1 is on and D2 is off. Both the op-amps A1 and A2 act as
inverter as shown in equivalent circuit in Fig. 4.12 (b). It can be seen that v0 = vi
For negative input, i.e. vi< 0, diode D1 is off and D2 is on. The equivalent circuit
is shown in Fig. 4.12 (c). Let the output voltage of op-amp A1 be v. Since the
differential input to A2 is zero, the inverting input terminal is also at voltage v.
KCL at node 'a' gives
(4.31)
(4.32)
Hence for vi < 0, the output is positive. The input and output waveforms are
shown in Fig. 4.12 (e). The circuit is also called an absolute value circuit as
output is positive even when input is negative. For example, the absolute
value of | +2 | and | -2 | is +2 only. It is possible to obtain negative outputs for
either polarity of input simply by reversing the diodes.
Fig. 4.12 (c) Equivalent circuit for v, < 0, (d) Equivalent circuit of (c)
Since IE = IC
From Fig.4.18(a)
V2 Thermistor
Assume, Is1 = Is2 = Is (4.39)
and then, V1
=
4.41
4.42
4.43
Thus reference level is now set with a single external voltage source. Its dependence on
device and temperature has been removed. The voltage Vo is still dependent upon
temperature and is directly proportional to T. This is compensated by the last op-amp
stage A4 which provides a non-inverting gain of (1 + R2/RTC ). NOW, the output voltage is,
(b)
Fig. 5.5 (a) Zero crossing detector and (b) Input and output waveforms
INVERTING SCHMITT TRIGGER
(a) Inverting Schmitt Trigger circuit (b)} (c) and (d) Transfer Characteristics of
Schmitt Trigger
The input is applied to the non-inverting input terminal of the op-amp. To understand the
working of the circuit, let us assume that the output is positively saturated i.e. at +Vsat.
This is fedback to the non-inverting input through R1. This is a positive feedback.
Now though Vin is decreased, the output Continues its positive saturation level unless and
until the input becomes more negative than VLT. At lower threshold, the output changes
its state from positive saturation + Vsat to negative saturation - Vsat. It remains in negative
saturation till Vin increases beyond its upper threshold level VUT.
Now VA = voltage at point A =IinR2 = VUT
As op-amp input current is zero, I in entirely passes through R1.
Eliminates Comparator Chatter.
Chattering can be defined as production of multiple output transitions the input
signal swings through the threshold region of a comparator. This is because of
the noise.
Comparison.
+ _
VSat
Operation of the Circuit
Let the output of the Schmitt trigger is + Vsat. This forces current + Vsat/R1
through C1, charging C1 with polarity positive to left and negative to right.
This produces negative going ramp at its output, for the time interval t1 to t2.
At t2 when ramp voltage attains a value equal to LTP of Schmitt trigger, the
output of Schmitt trigger changes its stage from
+ Vsat to -Vsat,
Now direction of current through C reverses. It discharges and recharges in
opposite direction with polarity positive to right and negative to left. This
produces positive going ramp at its output, for the time interval t2 to t3. At t3
when ramp voltage attains a value equal to UTP of Schmitt trigger, the
output of Schmitt trigger changes its state from - Vsat to + Vsat and cycle
continues.
0V
-Vramp
Vo(PP) = 2Vramp
Vin = VSat