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1 2 3 4 5 6 7 8

R18D INTEL UMA/DISCRETE SYSTEM DIAGRAM


+3V/+5V
A A

PG.34

+1.05VTT/+1.8V SODIMM1 DDR3 INTEL 14.318MHz


Max. 4GB
PG.35
PG.15
Channel A Arrandale Nvidia CLOCK GEN
PG.2
CPU Core 34mm X 28mm PCI-E x8 N12P-GV
PG.36 SODIMM2 DDR3 1288pin BGA PP;PP
VGACore/+1.1V Max. 4GB TDP 35W
PG.16
Channel B 7'3
PG.37
PG.3~9 PG.17~21
+1.5VSUS DDR3 900MHz
FDI DMI
B
PG.38 VRAM B

64Mx16x4,64bit PG.21
Charger SATA0
PG.39 HDD PG.26 HDMI
Discharger Level
SATA1 Shifter HDMI PG.24
PG.40
ODD PG.26
INTEL PCH DP Port B PG.24
UMA VGACORE CRT
PG.41
Ibex Peak-m CRT PG.25

LVDS LVDS PG.23


3&,([
27mm X 25mm
LAN3 LAN2 LAN1
C
1071pin FCBGA USB2.0 Ports Webcam BT C

Card reader LAN WLAN USB 2.0 TDP 5W X2 PG.29 PG.23 Softbreeze
PG.29
RTS5219-GR RTS8165EH BT COMBO PORT10 PORT0,1 PORT4 PORT13
10/100 PG.27 10/100 PG.30 PG.33 USB 2.0

Stackup
KBC LPC PG.10~14 TOP
EnE KB3930QF D2 PG.32 GND
Azalia
IN1
KB TP ROM FAN IN2
Speaker
AUDIO PG.28 VCC
D

CODEC BOT D

HP/MIC
PG.29
IDT92HD80B1 352-(&75'
Analog MIC 4XDQWD&RPSXWHU,QF
PG.28 PG.28
Size Document Number Rev
Custom BLOCK DIAGRAM 1A

Date: Thursday, January 13, 2011 Sheet 1 of 42


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

25mA 150mA 150mA


02
+3V +VDDCORE_CLK Y6
+1.05V +VDDIO_CLK +3V +VDDSE_CLK L53 XTAL_IN 1 2XTAL_OUT +3V
L56 L57 1 2 C733 4.7U/6.3V_6
1 2 C742 0.1U/10V_4 1 2 C704 4.7U/6.3V_6 *HCB1608KF-181T15/1.5A_6

1
HCB1608KF-181T15/1.5A_6 C723 0.1U/10V_4 HCB1608KF-181T15/1.5A_6 C731 0.1U/10V_4 +1.5V C729 0.1U/10V_4 14.318MHZ
C747 10U/6.3VS_6 C705 0.1U/10V_4 L54 C711 0.1U/10V_4 C702 C703 R474
A A
C746 *10U/6.3V_8 1 2 C716 0.1U/10V_4 33P/50V_4 33P/50V_4 *10K_4

2
HCB1608KF-181T15/1.5A_6

Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin CPU_SEL

R476
0510 add for WiMAX 10K_4
close to U13

C714 *3.3P/50V_4
CLK_BUF_BCLK_P CLK_BUF_BCLK_N 0 1

CPU_SEL CPU0/1=133MHz CPU0/1=100MHz


(default)
U29

5 23 CLK_BUF_BCLK_P
+VDDSE_CLK VDD_LCD CPU-0 CLK_BUF_BCLK_P <11>
29 22 CLK_BUF_BCLK_N CLK_BUF_BCLK_N <11>
VDD_REF CPU-0#

+VDDCORE_CLK 1 VDD_USB CPU-1 20


2 1 17 19
C722 *0.047U/10V_4 VDD_SRC CPU-1#
24 VDD_CPU
18 3 CLK_BUF_DREFCLK +3V
+VDDIO_CLK VDD_CPU_IO DOT96T_LPR CLK_BUF_DREFCLK <11>
B 2 1 15 4 CLK_BUF_DREFCLK# B
VDD_SRC_IO DOT96C_LPR CLK_BUF_DREFCLK# <11>
C737 *0.047U/10V_4
31 13 CLK_BUF_PCIE_3GPLL
<11,15,16> CGDAT_SMB
<11,15,16> CGCLK_SMB 32
SDATA
SCLK
RTM890N-632 SRC-1
SRC-1#
14 CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL <11>
CLK_BUF_PCIE_3GPLL# <11> R493
1K_4
R494 10K_4 16 10 CLK_BUF_DREFSSCLK
+3V CPU_STOP# SATA CLK_BUF_DREFSSCLK <11>
<11> CLK_ICH_14M CLK_ICH_14M R478 33_4 CPU_SEL 30 11 CLK_BUF_DREFSSCLK# CLK_BUF_DREFSSCLK# <11>
C708 *10P/50V_4 REF_0/CPU_SEL SATA# CK_PWRGD_R
CK_PWRGD_R 25 6 CLK_VGA_27M_NOSS T47
CK_PWRGD/PD#_3.3 27MHz_nonSS CLK_VGA_27M_SS
Place R8044 within 0.5" of C/G 27MHz_SS 7 T46

3
XTAL_OUT 27 Q39
XTAL_IN XOUT 2N7002E
28 33
9
XIN
VSS_SATA
QFN32 GND
VSS_REF 26 R495
2 21 <35> VR_PWRGD_CLKEN# 2 100K_4
VSS_USB VSS_CPU
8 VSS_LCD VSS_SRC 12

RTM890N-632

1
AL000890000
IC OTHER(32P) RTM890N-632-GRT(QFN)

Vender Part Part Number Part Description


ICS ICS9LVS3197 AL003197001 IC OTHER(32P) ICS9LVS3197AKLFT(MLF)
Realtek RTM890N-632 AL000890000 IC OTHER(32P) RTM890N-632-GRT(QFN)
Silego SLG8LV595VTR AL000595000 IC OTHER(32P)SLG8LV595VTR(QFN)
C C

+1.05V <10,11,12,14,41>
+1.5V <6,32>
+3V <3,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>

D D

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom Clock Gen(9LRS3197) 1A

Date: Tuesday, February 15, 2011 Sheet 2 of 42


1 2 3 4 5 6 7 8
5 4 3 2 1

<10,11,12,13,14,17,28,33,34,36,38,40> +3VS5 <5,6,13,14,31,34,35,36,40> +1.05V_VTT

03
<5,6> +1.5V_CPU <6,15,16,36,37,38> +1.5VSUS
<2,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V

U3018A U3018B DIS UMA


B12 PEG_COMP R3062 49.9/F_4 R3152 20/F_4 H_COMP3 AD71
PEG_ICOMPI
A13
COMP3
AK7 CLK_CPU_BCLK <13>
Ra NA 0 ohm
PEG_ICOMPO BCLK

Misc
F7 D12 R3151 20/F_4 H_COMP2 AC70 AK8
D
<12> DMI_TXN0
J8
DMI_RX#[0] PEG_RCOMPO
B11 PEG_RBIAS R3060 750/F_4 COMP2 BCLK# CLK_CPU_BCLK# <13> Rb 0 ohm NA D
<12> DMI_TXN1 DMI_RX#[1] PEG_RBIAS
K8 R3150 49.9/F_4 H_COMP1 AD69 K71
<12> DMI_TXN2 DMI_RX#[2] PEG_RX#[0..7] <17> COMP1 BCLK_ITP Rc 0 ohm NA

Clocks
J4 G40 PEG_RX#0 J70 CLK_PCIE_3GPLL <11>
<12> DMI_TXN3 DMI_RX#[3] PEG_RX#[0] BCLK_ITP#
G38 PEG_RX#1 R3149 49.9/F_4 H_COMP0 AE66 CLK_PCIE_3GPLL# <11>
PEG_RX#[1] PEG_RX#2
COMP0
<12> DMI_TXP0 F9 DMI_RX[0] PEG_RX#[2] H34
PEG_RX#3 PEG_CLK L21 Rc
<12> DMI_TXP1 J6 P34 J21
DMI_RX[1] PEG_RX#[3] PEG_CLK#

DMI
K9 G28 PEG_RX#4 M71 Ra
<12> DMI_TXP2 DMI_RX[2] PEG_RX#[4] PROC_DETECT
J2 H25 PEG_RX#5 Y2 DREFSSCLK DREFSSCLK <11>
<12> DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_SSCLK
H24 PEG_RX#6 W4 DREFSSCLK# DREFSSCLK# <11>
PEG_RX#[6] PEG_RX#7 H_CATERR# DPLL_REF_SSCLK#
<12> DMI_RXN0 H17 DMI_TX#[0] PEG_RX#[7] D29 N61 CATERR# Rb
<12> DMI_RXN1 K15 DMI_TX#[1] PEG_RX#[8] B26
<12> DMI_RXN2 J13 DMI_TX#[2] PEG_RX#[9] D26

Thermal
F10 B23 BJ12 DDR3_DRAMRST#_C
<12> DMI_RXN3 DMI_TX#[3] PEG_RX#[10] SM_DRAMRST#
PEG_RX#[11] D22 <13> H_PECI N19 PECI
G17 A20 BV33 SM_RCOMP_0 R3393 100/F_4
<12> DMI_RXP0 DMI_TX[0] PEG_RX#[12] SM_RCOMP[0]
<12> DMI_RXP1 M15 D19 BP39 SM_RCOMP_1 R3401 24.9/F_4
DMI_TX[1] PEG_RX#[13] SM_RCOMP[1]
<12> DMI_RXP2 G13 A17 BV40 SM_RCOMP_2 R3403 130/F_4
DMI_TX[2] PEG_RX#[14] SM_RCOMP[2]

DDR3
Misc
J11 B14 N67 R3181 10K/F_4 +1.05V_VTT
<12> DMI_RXP3 DMI_TX[3] PEG_RX#[15] <31,35> H_PROCHOT# PROCHOT#
PEG_RX[0..7] <17> AV66 PM_EXT_TS#0 R3177 *0_4/S PM_EXTTS#0 <15,16>
PEG_RX0 PM_EXT_TS#[0] R3175 *0_4/S
2.7GT/s data rate F40 AV64 PM_EXT_TS#1 PM_EXTTS#1 <16>
PEG_RX[0] PEG_RX1 PM_EXT_TS#[1] R3188 10K/F_4
J38 +1.05V_VTT
PEG_RX[1] PEG_RX2
<12> FDI_TXN[7:0] PEG_RX[2] G34 <13,31> PM_THRMTRIP# N17 THERMTRIP#
FDI_TXN0 L2 M34 PEG_RX3
FDI_TXN1 FDI_TX#[0] PEG_RX[3] PEG_RX4
N7 J28
FDI_TXN2 FDI_TX#[1] PEG_RX[4] PEG_RX5 XDP_PRDY#
M4 G25 U71 T3052
FDI_TXN3 FDI_TX#[2] PEG_RX[5] PEG_RX6 PRDY# XDP_PREQ#
P1 FDI_TX#[3] PEG_RX[6] K24 PREQ# U69
FDI_TXN4 N10 B28 PEG_RX7
FDI_TX#[4] PEG_RX[7]
Intel(R) FDI

FDI_TXN5 R7 A27 T3055 H_CPURST# N70 T67 XDP_TCLK T3028


FDI_TXN6 FDI_TX#[5] PEG_RX[8] RESET_OBS# TCK XDP_TMS
U7 B25 N65 T3027
FDI_TX#[6] PEG_RX[9] TMS

Power Management
C FDI_TXN7 W8 A24 M17 P69 XDP_TRST# T3030 C
FDI_TX#[7] PEG_RX[10] <12> PM_SYNC PM_SYNC TRST#
B21
PEG_RX[11] XDP_TDI_R
B19 T69 T3031
<12> FDI_TXP[7:0]
FDI_TXP0 K1 PEG_RX[12]
B18
TDI
T71 XDP_TDO_R 11/6
FDI_TX[0] PEG_RX[13] TDO T3029
FDI_TXP1 N5 B16 P71 XDP_TDI_M T3054 must add

JTAG & MBP


FDI_TXP2 N2 FDI_TX[1] PEG_RX[14] TDI_M XDP_TDO_M
FDI_TX[2] PEG_RX[15] D15 AM7 VCCPWRGOOD_1 TDO_M T70 T3056 test point.
FDI_TXP3 R2 PEG_TX#[0..7] <17>
FDI_TX[3]
PCI EXPRESS -- GRAPHICS

FDI_TXP4 N9 N40 C_PEG_TX#0 C3751 0.1U/10V_4 PEG_TX#0 W71


FDI_TX[4] PEG_TX#[0] DBR# XDP_DBRESET# <12>
FDI_TXP5 R8 L38 C_PEG_TX#1 C3744 0.1U/10V_4 PEG_TX#1 Y67
FDI_TX[5] PEG_TX#[1] <13> H_PWRGOOD VCCPWRGOOD_0
FDI_TXP6 U6 M32 C_PEG_TX#2 C3740 0.1U/10V_4 PEG_TX#2
FDI_TXP7 W10 FDI_TX[6] PEG_TX#[2] C_PEG_TX#3 C3733 0.1U/10V_4 PEG_TX#3
D40 J69
FDI_TX[7] PEG_TX#[3] C_PEG_TX#4 C3728 0.1U/10V_4 PEG_TX#4 PM_DRAM_PWRGD BPM#[0]
PEG_TX#[4] A38 <12> PM_DRAM_PWRGD AM5 SM_DRAMPWROK BPM#[1] J67
AC7 G32 C_PEG_TX#5 C3724 0.1U/10V_4 PEG_TX#5 J62
<12> FDI_FSYNC0 FDI_FSYNC[0] PEG_TX#[5] BPM#[2]
AC9 B33 C_PEG_TX#6 C3722 0.1U/10V_4 PEG_TX#6 K65
<12> FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6] BPM#[3]
B35 C_PEG_TX#7 C3717 0.1U/10V_4 PEG_TX#7 H_VTTPWRGD H15 K62
PEG_TX#[7] VTTPWRGOOD BPM#[4]
<12> FDI_INT AB5 FDI_INT PEG_TX#[8] L30 BPM#[5] J64
A31 K69
PEG_TX#[9] T3057 BPM#[6]
<12> FDI_LSYNC0 AA1 B32 Y70 M69
FDI_LSYNC[0] PEG_TX#[10] TAPPWRGOOD BPM#[7]
<12> FDI_LSYNC1 AB2 FDI_LSYNC[1] PEG_TX#[11] L28
N26 <11,17,26,29,31,32> PLTRST# CPU_PLTRST# G3
PEG_TX#[12] R3140 1.5K/F_4 RSTIN#
PEG_TX#[13] M24
G21
PEG_TX#[14] R3144 750/F_4
PEG_TX#[15] J20
PEG_TX[0..7] <17>
L40 C_PEG_TX0 C3747 0.1U/10V_4 PEG_TX0 IC,ARD_BGA,R1P0
PEG_TX[0] C_PEG_TX1 C3741 0.1U/10V_4 PEG_TX1
N38
PEG_TX[1] C_PEG_TX2 C3735 0.1U/10V_4 PEG_TX2
N32
PEG_TX[2] C_PEG_TX3 C3729 0.1U/10V_4 PEG_TX3
B39
PEG_TX[3] C_PEG_TX4 C3725 0.1U/10V_4 PEG_TX4 +1.05V_VTT
B37
PEG_TX[4] C_PEG_TX5 C3723 0.1U/10V_4 PEG_TX5
H32
B PEG_TX[5]
A34 C_PEG_TX6 C3718 0.1U/10V_4 PEG_TX6 XDP_TDO_R R3155 51/J_4 JTAG MAPPING B
PEG_TX[6] C_PEG_TX7 C3715 0.1U/10V_4 PEG_TX7
D36
PEG_TX[7] H_CATERR# R3142 49.9/F_4 XDP_TDI_R Ra
J30
PEG_TX[8] +3V U3010 XDP_TDO_M Rb
B30
PEG_TX[9] H_PROCHOT# R3138 68_4
D33
PEG_TX[10] MC74VHC1G08DFT2G Rc
PEG_TX[11] N28

5
M25 CPU_PLTRST# R3135 *68/J_4 R3176
PEG_TX[12] R3187
N24 2 *0_4/S
PEG_TX[13] HWPG_1 H_VTTPWRGD XDP_TMS R3146 *51/J_4
F21 <20,31,33,34,37,40,41> HWPG 4
PEG_TX[14] 2K/F_4
L20 1
PEG_TX[15] XDP_TDI_R R3162 *51/J_4 XDP_TDI_M Rd
R3180 XDP_TDO_R Re

3
1K/F_4 XDP_PREQ# R3153 *51/J_4
IC,ARD_BGA,R1P0
XDP_TCLK R3145 *51/J_4
Discrete Only
R3361 *1K/F_4 FDI_INT +3VS5 +1.5VSUS XDP_TRST# R3161 51/J_4
R3355 *0_4 FDI_FSYNC0 For S3 leakage issue
R3350 *0_4 FDI_FSYNC1
R3356 *0_4 FDI_LSYNC0
R3351 *1K/F_4 FDI_LSYNC1 R3178 Scan Chain STUFF -> Ra, Rc, Re
*0_4 (Default) NO STUFF -> Rb, Rd
R3206 R3215
*10K/F_4 *8.25K/F_4
FDI_FSYNC can DDR3_DRAMRST# <15,16> CPU Only STUFF -> Ra, Rb
5

gang all these For S3 leakage issue R3212 *0_4 R3213 *0_4/S HWPG_1
NO STUFF -> Rc, Rd, Re
4 signals 2
3

A
Q3006 4 A
together and DMN601K-7 1 GMCH Only STUFF -> Rd, Re
<34> STAT_1.1
tie them with R3211
PCIE_CLK_REQ7# 1.5K/F_4
NO STUFF -> Ra, Rb, Rc
only one 1K <13> PCIE_CLK_REQ7# 2
3

resistor to GND U3012 PM_DRAM_PWRGD


*MC74VHC1G08DFT2G
352-(&75'
( Check list
1.0 ). 10K/F_4 R3469 R3147
4XDQWD&RPSXWHU,QF
1

+3VS5 1 2 C3037 750/F_4


0.047U 10V_4 DDR3_DRAMRST#_C Use a voltage divider with VDDQ (1.5 V) rail
ON in S3) and resistor combination of 1.5K 1%
R3047 100K/F_4 Size Document Number Rev
(to VDDQ)/7501% (to GND) to convert to Custom
PROCESSER 1/7(HOST&PEX) 1A
processor VTT level.
Date: Tuesday, February 15, 2011 Sheet 3 of 42
5 4 3 2 1
5 4 3 2 1

U3018C
ARRANDALE/CLARKSFIELD PROCESSOR (DDR3)
U3018D
04
BM34 M_A_CLK0 <15> <16> M_B_DQ[63:0] BU33 M_B_CLK0 <16>
SA_CK[0] SB_CK[0]
D BP35 M_A_CLK0# <15> BV34 M_B_CLK0# <16> D
SA_CK#[0] M_B_DQ0 SB_CK#[0]
<15> M_A_DQ[63:0] BF20 M_A_CKE0 <15> BA2 BT26 M_B_CKE0 <16>
M_A_DQ0 SA_CKE[0] M_B_DQ1 SB_DQ[0] SB_CKE[0]
AT8 AW2
M_A_DQ1 SA_DQ[0] M_B_DQ2 SB_DQ[1]
AT6 BD1
M_A_DQ2 SA_DQ[1] M_B_DQ3 SB_DQ[2]
BB5 BE4 BV38 M_B_CLK1 <16>
M_A_DQ3 SA_DQ[2] M_B_DQ4 SB_DQ[3] SB_CK[1]
BB9 BK36 M_A_CLK1 <15> AY1 BU39 M_B_CLK1# <16>
M_A_DQ4 SA_DQ[3] SA_CK[1] M_B_DQ5 SB_DQ[4] SB_CK#[1]
AV7 BH36 M_A_CLK1# <15> BC2 BT24 M_B_CKE1 <16>
M_A_DQ5 SA_DQ[4] SA_CK#[1] M_B_DQ6 SB_DQ[5] SB_CKE[1]
AV6 BK24 M_A_CKE1 <15> BF2
M_A_DQ6 SA_DQ[5] SA_CKE[1] M_B_DQ7 SB_DQ[6]
BE6 BH2
M_A_DQ7 SA_DQ[6] M_B_DQ8 SB_DQ[7]
BE8 BG4
M_A_DQ8 SA_DQ[7] M_B_DQ9 SB_DQ[8]
BF11 BG1
M_A_DQ9 SA_DQ[8] M_B_DQ10 SB_DQ[9]
BE11 BH40 M_A_CS#0 <15> BR6 BP46 M_B_CS#0 <16>
M_A_DQ10 SA_DQ[9] SA_CS#[0] M_B_DQ11 SB_DQ[10] SB_CS#[0]
BK5 BJ47 M_A_CS#1 <15> BR8 BT43 M_B_CS#1 <16>
M_A_DQ11 SA_DQ[10] SA_CS#[1] M_B_DQ12 SB_DQ[11] SB_CS#[1]
BH13 BJ4
M_A_DQ12 SA_DQ[11] M_B_DQ13 SB_DQ[12]
BF9 BK2
M_A_DQ13 SA_DQ[12] M_B_DQ14 SB_DQ[13]
BF6 BU9
M_A_DQ14 SA_DQ[13] M_B_DQ15 SB_DQ[14]
BK7 BF43 M_A_ODT0 <15> BV10 BV45 M_B_ODT0 <16>
M_A_DQ15 SA_DQ[14] SA_ODT[0] M_B_DQ16 SB_DQ[15] SB_ODT[0]
BN8 BL47 M_A_ODT1 <15> BR10 BU49 M_B_ODT1 <16>
M_A_DQ16 SA_DQ[15] SA_ODT[1] M_B_DQ17 SB_DQ[16] SB_ODT[1]
BN11 BT12
M_A_DQ17 SA_DQ[16] M_B_DQ18 SB_DQ[17]
BN9 BT15
M_A_DQ18 SA_DQ[17] M_B_DQ19 SB_DQ[18]
BG17 BV15
M_A_DQ19 SA_DQ[18] M_B_DQ20 SB_DQ[19]
BK15 BV12 M_B_DM[7:0] <16>
M_A_DQ20 SA_DQ[19] M_B_DQ21 SB_DQ[20]
BK9 BP12 BB4 M_B_DM0
M_A_DQ21 SA_DQ[20] M_B_DQ22 SB_DQ[21] SB_DM[0]
BG15 M_A_DM[7:0] <15> BV17 BL4 M_B_DM1 DM signals are not present on Clarkfield
M_A_DQ22 SA_DQ[21] M_A_DM0 M_B_DQ23 SB_DQ[22] SB_DM[1]
BH17 BB10 BU16 BT13 M_B_DM2 processor. All DM signal can br left as
M_A_DQ23 SA_DQ[22] SA_DM[0] M_A_DM1 M_B_DQ24 SB_DQ[23] SB_DM[2]
BK17 BJ10 BP15 BP22 M_B_DM3 NC on Clarkfield and connect directly to
M_A_DQ24 SA_DQ[23] SA_DM[1] M_A_DM2 M_B_DQ25 SB_DQ[24] SB_DM[3]
BN20 BM15 BU19 BV47 M_B_DM4 GND on So-DIMM side for Clarkfield
M_A_DQ25 SA_DQ[24] SA_DM[2] M_A_DM3 M_B_DQ26 SB_DQ[25] SB_DM[4]
BN17 BN24 BV22 BV57 M_B_DM5
M_A_DQ26 BK25
SA_DQ[25] SA_DM[3]
BG44 M_A_DM4 M_B_DQ27 BT22
SB_DQ[26] SB_DM[5]
BU65 M_B_DM6
design only
M_A_DQ27 SA_DQ[26] SA_DM[4] M_A_DM5 M_B_DQ28 SB_DQ[27] SB_DM[6]
C BH25 BG53 BP19 BF67 M_B_DM7 C
M_A_DQ28 SA_DQ[27] SA_DM[5] M_A_DM6 M_B_DQ29 SB_DQ[28] SB_DM[7]
BJ20 BN62 BV19
M_A_DQ29 SA_DQ[28] SA_DM[6] M_A_DM7 M_B_DQ30 SB_DQ[29]
BH21 BH59 BV20
M_A_DQ30 SA_DQ[29] SA_DM[7] M_B_DQ31 SB_DQ[30]
BG24 BT20
M_A_DQ31 SA_DQ[30] M_B_DQ32 SB_DQ[31]
BG25 BT48
DDR SYSTEM MEMORY A

M_A_DQ32 SA_DQ[31] M_B_DQ33 SB_DQ[32]


BJ40 BV48 M_B_DQS#[7:0] <16>
M_A_DQ33 SA_DQ[32] M_B_DQ34 SB_DQ[33]
BM43 M_A_DQS#[7:0] <15> BV50 BE2 M_B_DQS#0
M_A_DQ34 SA_DQ[33] SB_DQ[34] SB_DQS#[0]
BF47 AY5 M_A_DQS#0 M_B_DQ35 BP49 BM3 M_B_DQS#1
M_A_DQ35 SA_DQ[34] SA_DQS#[0] SB_DQ[35] SB_DQS#[1]
BF48 BJ7 M_A_DQS#1 M_B_DQ36 BT47 BU12 M_B_DQS#2
M_A_DQ36 SA_DQ[35] SA_DQS#[1] SB_DQ[36] SB_DQS#[2]
BN40 BN13 M_A_DQS#2 M_B_DQ37 BV52 BT19 M_B_DQS#3
M_A_DQ37 SA_DQ[36] SA_DQS#[2] SB_DQ[37] SB_DQS#[3]
BH43 BL21 M_A_DQS#3 M_B_DQ38 BV54 BT52 M_B_DQS#4
M_A_DQ38 SA_DQ[37] SA_DQS#[3] SB_DQ[38] SB_DQS#[4]
BN44 BH44 M_A_DQS#4 M_B_DQ39 BT54 BV55 M_B_DQS#5
M_A_DQ39 SA_DQ[38] SA_DQS#[4] SB_DQ[39] SB_DQS#[5]
BN47 BK51 M_A_DQS#5 M_B_DQ40 BP53 BU63 M_B_DQS#6
M_A_DQ40 SA_DQ[39] SA_DQS#[5] SB_DQ[40] SB_DQS#[6]
BN48 BP58 M_A_DQS#6 M_B_DQ41 BU53 BG69 M_B_DQS#7
M_A_DQ41 SA_DQ[40] SA_DQS#[6] SB_DQ[41] SB_DQS#[7]
BN51 BE62 M_A_DQS#7 M_B_DQ42 BT59
M_A_DQ42 SA_DQ[41] SA_DQS#[7] M_B_DQ43 SB_DQ[42]

DDR SYSTEM MEMORY - B


BH53 BT57
M_A_DQ43 SA_DQ[42] M_B_DQ44 SB_DQ[43]
BJ55 BP56
M_A_DQ44 SA_DQ[43] M_B_DQ45 SB_DQ[44]
BH48 BT55
M_A_DQ45 SA_DQ[44] M_B_DQ46 SB_DQ[45]
BJ48 M_A_DQS[7:0] <15> BU60
M_A_DQ46 SA_DQ[45] SB_DQ[46]
BM53 AY7 M_A_DQS0 M_B_DQ47 BV59 M_B_DQS[7:0] <16>
M_A_DQ47 SA_DQ[46] SA_DQS[0] SB_DQ[47]
BN55 BJ5 M_A_DQS1 M_B_DQ48 BV61 BD4 M_B_DQS0
M_A_DQ48 SA_DQ[47] SA_DQS[1] SB_DQ[48] SB_DQS[0]
BF55 BL13 M_A_DQS2 M_B_DQ49 BP60 BN4 M_B_DQS1
M_A_DQ49 SA_DQ[48] SA_DQS[2] SB_DQ[49] SB_DQS[1]
BN57 BN21 M_A_DQS3 M_B_DQ50 BR66 BV13 M_B_DQS2
M_A_DQ50 SA_DQ[49] SA_DQS[3] SB_DQ[50] SB_DQS[2]
BN65 BK44 M_A_DQS4 M_B_DQ51 BR64 BT17 M_B_DQS3
M_A_DQ51 SA_DQ[50] SA_DQS[4] SB_DQ[51] SB_DQS[3]
BJ61 BH51 M_A_DQS5 M_B_DQ52 BR62 BT50 M_B_DQS4
M_A_DQ52 SA_DQ[51] SA_DQS[5] SB_DQ[52] SB_DQS[4]
BF57 BM60M_A_DQS6 M_B_DQ53 BT61 BU56 M_B_DQS5
M_A_DQ53 SA_DQ[52] SA_DQS[6] SB_DQ[53] SB_DQS[5]
BJ57 BE64 M_A_DQS7 M_B_DQ54 BN68 BV62 M_B_DQS6
M_A_DQ54 SA_DQ[53] SA_DQS[7] M_B_DQ55 SB_DQ[54] SB_DQS[6]
BK64 BL69 BJ69 M_B_DQS7
M_A_DQ55 SA_DQ[54] M_B_DQ56 SB_DQ[55] SB_DQS[7]
BK61 BJ71
M_A_DQ56 SA_DQ[55] M_B_DQ57 SB_DQ[56]
B BJ63 BF70 B
M_A_DQ57 SA_DQ[56] M_B_DQ58 SB_DQ[57]
BF64 M_A_A[15:0] <15> BG71
M_A_DQ58 SA_DQ[57] M_A_A0 M_B_DQ59 SB_DQ[58]
BB64 BT36 BC67
M_A_DQ59 SA_DQ[58] SA_MA[0] M_A_A1 M_B_DQ60 SB_DQ[59]
BB66 BP33 BK70
M_A_DQ60 SA_DQ[59] SA_MA[1] M_A_A2 M_B_DQ61 SB_DQ[60]
BJ66 BV36 BK67
M_A_DQ61 SA_DQ[60] SA_MA[2] M_A_A3 M_B_DQ62 SB_DQ[61]
BF65 BG34 BD71 M_B_A[15:0] <16>
M_A_DQ62 SA_DQ[61] SA_MA[3] M_A_A4 M_B_DQ63 SB_DQ[62]
AY64 BG32 BD69 BT34 M_B_A0
M_A_DQ63 SA_DQ[62] SA_MA[4] M_A_A5 SB_DQ[63] SB_MA[0]
BC70 BN32 BP30 M_B_A1
SA_DQ[63] SA_MA[5] M_A_A6 SB_MA[1]
BK32 BV29 M_B_A2
SA_MA[6] M_A_A7 SB_MA[2]
BJ30 BU30 M_B_A3
SA_MA[7] M_A_A8 SB_MA[3]
BN30 BV31 M_B_A4
SA_MA[8] M_A_A9 SB_MA[4]
<15> M_A_BS#0 BT38 BF28 <16> M_B_BS#0 BV43 BT33 M_B_A5
SA_BS[0] SA_MA[9] M_A_A10 SB_BS[0] SB_MA[5]
<15> M_A_BS#1 BH38 BH34 <16> M_B_BS#1 BV41 BT31 M_B_A6
SA_BS[1] SA_MA[10] M_A_A11 SB_BS[1] SB_MA[6]
<15> M_A_BS#2 BF21 BH30 <16> M_B_BS#2 BV24 BP26 M_B_A7
SA_BS[2] SA_MA[11] M_A_A12 SB_BS[2] SB_MA[7]
BJ28 BV27 M_B_A8
SA_MA[12] M_A_A13 SB_MA[8]
BF40 BT27 M_B_A9
SA_MA[13] M_A_A14 SB_MA[9]
BN28 <16> M_B_CAS# BU46 BU42 M_B_A10
SA_MA[14] M_A_A15 SB_CAS# SB_MA[10]
<15> M_A_CAS# BK43 BN25 <16> M_B_RAS# BT40 BU26 M_B_A11
SA_CAS# SA_MA[15] SB_RAS# SB_MA[11]
<15> M_A_RAS# BL38 <16> M_B_WE# BT41 BT29 M_B_A12
SA_RAS# SB_WE# SB_MA[12]
<15> M_A_WE# BF38 BT45 M_B_A13
SA_WE# SB_MA[13]
BV26 M_B_A14
SB_MA[14]
BU23 M_B_A15
SB_MA[15]

IC,ARD_BGA,R1P0
A A

IC,ARD_BGA,R1P0
352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
PROCESSER 2/7(DDR3)
Date: Tuesday, February 15, 2011 Sheet 4 of 42
5 4 3 2 1
5 4 3 2 1

05
<14,34> +1.8V
<6> +1.5V_CPU
<3,6,13,14,31,34,35,36,40> +1.05V_VTT
<7,35> +VCORE

+1.05V_VTT
D
+1.05V_VTT *1K/F_4 R3449 H_PSI# U3018F $ D

1K/F_4 R3446
3ODFHXQGHU&38
AW14
1K/F_4 R3431 CPU_VID0 VTT0_11
AW12
*1K/F_4 R3422 VTT0_12
AU60
VTT0_13 C3239 C3228 C3240 C3217
AU59
1K/F_4 R3430 CPU_VID1 VTT0_14 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
<35> H_PSI# F68 AU12
*1K/F_4 R3421 PSI# VTT0_15
AR60
VTT0_16
<35> CPU_VID0 A61 AR59
VID[0] VTT0_17

CPU VIDS
1K/F_4 R3436 CPU_VID2 <35> CPU_VID1 D61 AR12
*1K/F_4 R3438 VID[1] VTT0_18
<35> CPU_VID2 D62 AN60
VID[2] VTT0_19
<35> CPU_VID3 A62 AN59
*1K/F_4 R3437 CPU_VID3 VID[3] VTT0_20
<35> CPU_VID4 B63 AN35
1K/F_4 R3439 VID[4] VTT0_21
<35> CPU_VID5 D64 AN33
VID[5] VTT0_22
<35> CPU_VID6 D66 AN17
*1K/F_4 R3440 CPU_VID4 VID[6] VTT0_23 C3238 C3129 C3136 C3227
AN15
1K/F_4 R3442 H_VTTVID1 VTT0_24 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
<34> H_VTTVID1 AN1 AN14
VTT_SELECT[1] VTT0_25
AN12
1K/F_4 R3448 CPU_VID5 VTT0_26
<35> DPRSLPVR F66 AM10
*1K/F_4 R3445 +VCORE PROC_DPRSLPVR VTT0_27
AL60
VTT0_28
AL59
*1K/F_4 R3441 CPU_VID6 VTT0_29
AL17
VTT0_30

1.1V RAIL POWER


1K/F_4 R3443 AL15
VTT0_31
AL14
1K/F_4 R3452 DPRSLPVR VTT0_32
<35> I_MON A41 AL12
*1K/F_4 R3450 R3129 ISENSE VTT0_33 C3223 C3135 C3162 C3149
AK35
VTT0_34 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
100/F_4 AK33
VTT0_35

SENSE LINES
AF39
VTT0_36
C HFM_VID : Max 1.4V VTT0_37
AF37 C
AF35
LFM_VID : Min 0.65V Zo=27.4/Space=50mil F64
VTT0_38
AF33
<35> VCCSENSE VCC_SENSE VTT0_39
<35> VSSSENSE F63 AF32
Zo=27.4/Space=50mil VSS_SENSE VTT0_40
AF30
VTT0_41
AD39
VTT_SENSE VTT0_42
<34> VTT_SENSE N13 BF60
R3134 VTT_SENSE VTT0_1 C3198 C3171 C3185 C3208
BF59
VSS_SENSE_VTT R12 VTT0_2 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
100/F_4
<34> VSS_SENSE_VTT BD60
VSS_SENSE_VTT VTT0_3
BD59
VTT0_4
BB60
VTT0_5
BB59
VTT0_6
AY60
VTT0_7
AW60
VTT0_8
AW35
VTT0_9
AW33
VTT0_10
AD37
VTT0_43 C3218 C3202 C3242 C3216
AD35
VTT0_44 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AD33
VTT0_45
AD32
VTT0_46
$ VTT0_47
AD30

POWER
W35
VTT0_48
W33
VTT0_49
+1.8V W39 W32
VCCPLL1 VTT0_50

1.8V
10U/6.3V_6 C3368 W37 W30
4.7U/6.3V_6 C3369 VCCPLL2 VTT0_51
U37 W28
2.2U/6.3V_6 C3366 VCCPLL3 VTT0_52
R39 W26
1U/6.3V_4 C3271 VCCPLL4 VTT0_53
R37 W24
1U/6.3V_4 C3257 VCCPLL5 VTT0_54
W23
VTT0_55
B U35 B
VTT0_56
U33
VTT0_57
U32
VTT0_58
U30
VTT0_59
$ VTT0_60
VTT0_61
U28
U26
U24
VTT0_62
U23
VTT0_63
R35
VTT0_64
R33
MPZ2012S221A_8 VTT0_65
R32
L3017 VTT0_66
R30
VTT0_67
+1.5V_CPU BB14 R28
VDDQ_CK[1] VTT0_68
BB12 R26
VDDQ_CK[2] VTT0_69
R24
C3122 VTT0_70
R23
1U/6.3V_4 VTT0_71
AY10
VTT0_72
AN9
VTT0_73

IC,ARD_BGA,R1P0

A A

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
PROCESSER 3/7(POWER1)
Date: Tuesday, February 15, 2011 Sheet 5 of 42
5 4 3 2 1
5 4 3 2 1

<5,7,35> +VCORE

06
<3,5,13,14,31,34,35,36,40> +1.05V_VTT
DIS UMA DIS UMA <3,15,16,36,37,38> +1.5VSUS
<5,14,34> +1.8V

VTT Rail Values are


Ra 0 ohm NA Rc NA 4.7K <40> +VGACORE_IGPU
<5> +1.5V_CPU
Max 22A Auburndal VTT=1.05V *0_8 R3032 Rd NA 0 ohm +VCCTTG

Clarksfield VTT=1.1V Ra Re NA 0 ohm


+VGACORE_IGPU
Please note that +VCC_GFX_CORE U3018G Rf NA NA
should be 1.05V in Arrandale
D AN32 D
VAXG1
AN30 AF12 VCC_AXG_SENSE <40>
VAXG2 VAXG_SENSE
AN28 AF10

SENSE
LINES
VAXG3 VSSAXG_SENSE VSS_AXG_SENSE <40>
AN26
C3191 C3190 C3151 VAXG4
AN24
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 VAXG5
AN23
VAXG6
AN21
VAXG7
AN19 AF71 GFXVR_VID_0 <40>
VAXG8 GFX_VID[0]
AL32 AG67 GFXVR_VID_1 <40>
VAXG9 GFX_VID[1]
AL30 AG70

GRAPHICS VIDs
VAXG10 GFX_VID[2] GFXVR_VID_2 <40>
AL28 AH71 GFXVR_VID_3 <40>
VAXG11 GFX_VID[3]
AL26 AN71 GFXVR_VID_4 <40>
C3169 C3157 C3200 C3056 VAXG12 GFX_VID[4]
AL24 AM67 GFXVR_VID_5 <40>
VAXG13 GFX_VID[5]

GRAPHICS
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AL23 AM70 GFXVR_VID_6 <40>
VAXG14 GFX_VID[6]
AL21
VAXG15 GFX_VR_EN
AL19
VAXG16 Rc R3451 4.7K_4
AK14 AH69 GFXVR_EN <40>
VAXG17 GFX_VR_EN
AK12
VAXG18 GFX_DPRSLPVR
AL71 Rd GFXVR_DPRSLPVR <40> +1.5V_CPU
AJ10 AL69 Re GFXVR_IMON <40>
VAXG19 GFX_IMON R3182 *1K/J_4
C3201 C3215 C3138 C3213
AH14
VAXG20 Rf
AH12
VAXG21
$
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF28 BU40
VAXG22 VDDQ1
AF26 BU35
VAXG23 VDDQ2
AF24 BU28
VAXG24 VDDQ3
AF23 BN38
VAXG25 VDDQ4
AF21 BM25
VAXG26 VDDQ5 C3153 C3127 C3119 C3139 C3172 for S3 power reduction
AF19 BL30
VAXG27 VDDQ6 +1.5VSUS

- 1.5V RAILS
AF17 BJ38 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
C3131 C3123 C3199 C3049 VAXG28 VDDQ7
AF15 BH32
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VAXG29 VDDQ8
C AF14 BH28 C
VAXG30 VDDQ9 Q3010
AD28 BG43

5
VAXG31 VDDQ10 AON6718L R3097
AD26 BF16
VAXG32 VDDQ11 D
AD24 BF15
VAXG33 VDDQ12
AD23 BD35 G
VAXG34 VDDQ13
AD21 BD33 <38> MAIND 4

1
VAXG35 VDDQ14 S
AD19 BD32
C3163 C3124 C3168 C3137 VAXG36 VDDQ15 C3345 C3344 C3186 C3211 *0/F_2512
AD17 BD30 +

1
2
3
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VAXG37 VDDQ16 *10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 *330U/2.5V_3528
BD28
VDDQ17
BD26

2
VDDQ18 <15,38> MAINON_G
W21 BD24

2
VTT1_1 VDDQ19
W19 BD23

DDR3
+1.05V_VTT VTT1_2 VDDQ20

PEG & DMI


U21 BD21
VTT1_3 VDDQ21
U19 BD19 1 3
VTT1_4 VDDQ22 R3127 220/F_4
U17 BD17
VTT1_5 VDDQ23

POWER
U15 BD15
VTT1_6 VDDQ24 Q3011 2N7002E
U14 BB35
VTT1_7 VDDQ25
U12 BB33
VTT1_8 VDDQ26
R21 BB32
VTT1_9 VDDQ27 C3116 0.1U/10V_4 +1.5V_CPU
R19 BB30 +1.5VSUS
VTT1_10 VDDQ28
R17 BB28
VTT1_11 VDDQ29
R15 BB26
VTT1_21 VDDQ30 C3113 0.1U/10V_4
BB24
VDDQ31
BB23
C3130 C3154 VDDQ32
BB21
1U/6.3V_4 1U/6.3V_4 VDDQ33
BB19
VDDQ34 +1.05V_VTT
BB17
VDDQ35
AK62 BB15
VCAP2_1 VDDQ36
$
AK60 +1.5V_CPU R394 *0_8/S +1.5V
VCAP2_2
B AK59 B
VCAP2_3
AH60
VCAP2_4 VTT0_DDR
AW32 40mile routing
AH59 AW30
VCAP2_5 VTT0_DDR[1]
AF60 AW28
VCAP2_6 VTT0_DDR[2] C3206 C3212 C3181
AF59 AW26
VCAP2_7 VTT0_DDR[3] 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AD60 AW24
VCAP2_8 VTT0_DDR[4]
AD59 AW23
VCAP2_9 VTT0_DDR[5]
AB60 AW21
VCAP2_10 VTT0_DDR[6]
AB59 AW19
VCAP2_11 VTT0_DDR[7] +1.05V_VTT
AA60 AW17
VCAP2_12 VTT0_DDR[8]
AA59 AW15
VCAP2_13 VTT0_DDR[9]
W60
VCAP2_14
W59 AD15
+VCCTTG VCAP2_15 VTT1_12
U60 AD14
VCAP2_16 VTT1_13
U59 AD12
VCAP2_17 VTT1_14 C3121
R60 AB12
VCAP2_18 VTT1_15 10U/6.3V_6 C3214 C3141
R59 AA12
VCAP2_19 VTT1_16 1U/6.3V_4 1U/6.3V_4
W17
VTT1_17
W15
VTT1_18
W14
C3422 C3424 C3421 C3420 C3423 VTT1_19
W12
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VTT1_20

IC,ARD_BGA,R1P0

9&$3
9&$3
A 9&$3 A

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
PROCESSER 4/7(POWER2)
Date: Tuesday, February 15, 2011 Sheet 6 of 42
5 4 3 2 1
5 4 3 2 1

<5,35> +VCORE

07
+VCC2
+VCC0

+VCORE

+VCC0 +VCC0 U3018H

AF57
VCC_1
AF55
VCC_2
AF53
VCC_3
XI  VCC_4
AF51 C3267
C3297
10U/6.3V_6
10U/6.3V_6
D BD55 AF50 D
VCAP0_1 VCC_5 C3330 10U/6.3V_6
BD51 AF48
VCAP0_2 VCC_6 C3296 10U/6.3V_6
BD48 AF46
C3339 C3314 C3312 C3338 C3290 VCAP0_3 VCC_7 C3266 10U/6.3V_6
BB55 AF44
VCAP0_4 VCC_8 C3331 10U/6.3V_6
BB51 AF42
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VCAP0_5 VCC_9 C3268 10U/6.3V_6
BB48 AF41
VCAP0_6 VCC_10 C3298 10U/6.3V_6
AY57 AD55
VCAP0_7 VCC_11 C3332 10U/6.3V_6
AY53 AD51
VCAP0_8 VCC_12 C3333 10U/6.3V_6
AY50 AD48
VCAP0_9 VCC_13 C3099 10U/6.3V_6
AW57 AD44
VCAP0_10 VCC_14 C3106 10U/6.3V_6
AW53 AD41
VCAP0_11 VCC_15 C3336 10U/6.3V_6
AW50 AB55
VCAP0_12 VCC_16 C3048 10U/6.3V_6
AU55 AB51
C3286 C3313 C3341 C3342 C3315 VCAP0_13 VCC_17 C3094 10U/6.3V_6
AU51 AB48
VCAP0_14 VCC_18 C3104 10U/6.3V_6
AU48 AB44
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VCAP0_15 VCC_19 C3044 10U/6.3V_6
AR55 AB41
VCAP0_16 VCC_20 C3351 10U/6.3V_6
AR51 AA55
VCAP0_17 VCC_21 C3334 10U/6.3V_6
AR48 AA51
VCAP0_18 VCC_22 C3335 10U/6.3V_6
AN57 AA48
VCAP0_19 VCC_23 C3299 10U/6.3V_6
AN53 AA44
AN50
AL57
AL53
VCAP0_20
VCAP0_21
VCAP0_22
POWER VCC_24
VCC_25
VCC_26
AA41
W55
W51
C3301
C3300
C3111
10U/6.3V_6
10U/6.3V_6
0.1U/10V_4
VCAP0_23 VCC_27 C3108 0.1U/10V_4
AL50 W48
C3310 C3340 VCAP0_24 VCC_28
AK57 W44
VCAP0_25 VCC_29
AK53 W41
1U/6.3V_4 1U/6.3V_4 VCAP0_26 VCC_30
AK50 U55
VCAP0_27 VCC_31
U51
VCC_32
U48
VCC_33
C U44 C
VCC_34
CPU CORE SUPPLY VCC_35
U41
R55
VCC_36
R51
VCC_37
R48
VCC_38 +VCORE
R44
VCC_39
R41
VCC_40
P60
+VCC2 VCC_41
N55
+VCC2 VCC_42
N51
VCC_43
XI  VCC_44
N48
C3065 C3068 C3067 C3774 C3771
BD44 N44
VCAP1_1 VCC_45
BD41 N42
VCAP1_2 VCC_46 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
BD37 M60
C3236 C3283 C3273 C3261 C3263 VCAP1_3 VCC_47
BB44 M51
VCAP1_4 VCC_48
BB41 M44
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VCAP1_5 VCC_49
BB37 L55
VCAP1_6 VCC_50
AY46 K60
VCAP1_7 VCC_51
AY42 K51
VCAP1_8 VCC_52
AY39 K44
VCAP1_9 VCC_53
AW46 J55
VCAP1_10 VCC_54 C3061 C3060 C3064 C3075 C3036
AW42 H60
VCAP1_11 VCC_55
AW39 H51
VCAP1_12 VCC_56 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AU44 H44
C3235 C3262 C3284 C3246 C3247 VCAP1_13 VCC_57
AU41 G60
VCAP1_14 VCC_58
AU37 G55
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VCAP1_15 VCC_59
AR44 G51
VCAP1_16 VCC_60
AR41 G44
VCAP1_17 VCC_61
AR37 F55
VCAP1_18 VCC_62
B AN46 E60 B
VCAP1_19 VCC_63
AN42 E57
VCAP1_20 VCC_64 C3270 C3772 C3063 C3081 C3092
AN39 E53
VCAP1_21 VCC_65
AL46 E50
VCAP1_22 VCC_66 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AL42 E46
C3237 C3274 VCAP1_23 VCC_67
AL39 E42
VCAP1_24 VCC_68
AK46 D59
1U/6.3V_4 1U/6.3V_4 VCAP1_25 VCC_69
AK42 D57
VCAP1_26 VCC_70
AK39 D55
VCAP1_27 VCC_71
D54
VCC_72
D52
VCC_73
D50
VCC_74 C3039 C3035 C3059 C3078 C3066
D48
VCC_75
D47
VCC_76 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
D45
VCC_77
D43
VCC_78
B60
VCC_79
B56
VCC_80
B53
VCC_81
B49
VCC_82
B46
VCC_83
B42
VCC_84 C3071 C3776 C3780 C3087 C3750
A57
VCC_85
A54
VCC_86 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
A50
VCC_87
A47
VCC_88
A43
VCC_89

A A
IC,ARD_BGA,R1P0

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
PROCESSER 5/7(POWER3)
Date: Tuesday, February 15, 2011 Sheet 7 of 42
5 4 3 2 1
5 4 3 2 1

U3018E VCAP0 Voltage Sense Rails


08
W66 CPU_RSVD32 T3049
RSVD32 CPU_RSVD33
W64 T3050
RSVD33
D D
AC69
RSVD34
AC71
RSVD35
AA71
RSVD36
AA69
RSVD37
CFG0 AL4 R66
CFG[0] RSVD38
AM2 R64
CFG[1] RSVD39
AK1
CFG3 CFG[2] CFG0 R3349 3.01K/F_4
AK2
CFG4 CFG[3]
AK4
CFG[4] VSS_NCTF3 CFG3 R3354 *3.01K/F_4
AJ2
CFG[5] RSVD_NCTF[3]
BT5 T3041 CFG[ 1:0 ] - PCI_Epress Configuration Select
AT2 BR5 VSS_NCTF4
CFG7 CFG[6] RSVD_NCTF[4] T3040
CFG4 R3346 *3.01K/F_4
* 11= 1 x 16 PEG
AG7
CFG[7] VSS_NCTF2 * 10= 2 x 8 PEG
AF4 BV6 T3043
CFG[8] RSVD_NCTF[2] VSS_NCTF1 CFG7 R3347 *3.01K/F_4
AG2 BV8 T3044
CFG[9] RSVD_NCTF[1]
AH1
CFG[10]
AC2 AV69
CFG[11] RSVD45
AC4 AK71
CFG[12] RSVD46
AE2 AN69
CFG[13] RSVD47 RSVD64_R R3160 *0_4
AD1 AP66
CFG[14] RSVD48
AF8 AH66
CFG[15] RSVD49 RSVD65_R R3159 *0_4
AF6 AK66
CFG[16] RSVD50
AB7 AR71
CFG[17] RSVD51 TP_RSVD17_R R3358 *0_4
AM66
RSVD52
AK69
RSVD53 TP_RSVD18_R R3357 *0_4
AU71
RSVD54
AT70
RSVD55
C AR69 C
RSVD56
AU69
RSVD57

RESERVED
AT67
RSVD58
AU1 AP2 RSVD_TP2 T3038
RSVD_TP[0] RSVD_TP[2]
AN7
RSVD_TP[1]
T4 AV4
RSVD15 RSVD62
T2 AU2
RSVD16 RSVD63
TP_RSVD17_R U1 BE69 RSVD64_R 1 0
TP_RSVD18_R RSVD17 RSVD64
V2 BE71 RSVD65_R
RSVD18 RSVD65
AV71 CFG4 Disabled; No Physical Display Port Enabled; An external Display port device is
RSVD19
AW70 (Display Port Presence) attached to Embedded Diplay Port connected to the Embedded Display port
RSVD20
BV71
DC_TEST_BV71
AY69 BV69
RSVD21 DC_TEST_BV69 Single PEG Bifurcation enabled
BB69 BV68 T3047 CFG0
RSVD22 DC_TEST_BV68
BV5 T3042 (PCI-Epress Configuration Select)
DC_TEST_BV5
D8 BV3
RSVD23 DC_TEST_BV3
B7 BV1
RSVD24 DC_TEST_BV1 Normal Operation Lane Numbers Reversed
BT71 CFG3
DC_TEST_BT71
A10
RSVD26 DC_TEST_BT69
BT69 (PCI-Epress Static Lane Reversal) 15 -> 0 , 14 -> 1
B9 BT3
RSVD27 DC_TEST_BT3
BT1
VSS_NCTF7 DC_TEST_BT1
T3002 C5 BR71 T3051
VSS_NCTF8 RSVD_NCTF[7] DC_TEST_BR71
T3003 A6 BR1 T3039
RSVD_NCTF[8] DC_TEST_BR1
E71 T3053
VSS_NCTF6 DC_TEST_E71
T3004 E3
RSVD_NCTF[6] DC_TEST_E1
E1 The Clarkfield processor's PCI Express interface may
VSS_NCTF5 F1 C71
B T3036 RSVD_NCTF[5] DC_TEST_C71 not meet PCI Express 2.0 jitter specifications. Intel B
C69
DC_TEST_C69
C3 T3001
recommends placing a 3.01K +/- 5% pull down resistor to
DC_TEST_C3 VSS on CFG[7] pin for both rPGA and BGA components.
A71
DC_TEST_A71
A69 This pull down resistor should be removed when this
DC_TEST_A69
A68 T3025 issue is fixed.
DC_TEST_A68
A5 T3005
DC_TEST_A5

IC,ARD_BGA,R1P0
Add for Daisy Chain function support

A A

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
PROCESSER 6/7(CFG)
Date: Friday, January 14, 2011 Sheet 8 of 42
5 4 3 2 1
5 4 3 2 1

U3018I U3018J
AY24
VSS90
BU62 AY23 AH53 A40
ARRANDALE PROCESSOR (GND) VSS1 VSS91 VSS202 VSS404

09
BU58 AY21 AH51 A36
VSS2 VSS92 VSS203 VSS405
BU55 AY19 AH50 A33
VSS3 VSS93 VSS204 VSS406
BU51 AY17 AH48 A29
VSS4 VSS94 VSS205 VSS407
BU48 AY15 AH46 A26
VSS5 VSS95 VSS206 VSS408
BU44 AY14 AH44 A22
VSS6 VSS96 VSS207 VSS409
BU37 AY12 AH42 A19
VSS7 VSS97 VSS208 VSS410
BU32 AY8 AH41 A15
VSS8 VSS98 VSS209 VSS411
BU25 AY4 AH39 A12
VSS9 VSS99 VSS210 VSS412
BU21 AW67 AH37 A8
VSS10 VSS100 VSS211 VSS413
BU18 AW62 AH35 B62
VSS11 VSS101 VSS212 VSS393
D BU14 AW59 AH33 B58 D
VSS12 VSS102 VSS213 VSS394
BU11 AW55 AH32 B55
VSS13 VSS103 VSS214 VSS395
BU7 AW51 AH30 B51
VSS14 VSS104 VSS215 VSS396
BP42 AW48 AH28 B48
VSS15 VSS105 VSS216 VSS397
BN64 AW44 AH26 B44
VSS16 VSS106 VSS217 VSS398
BN6 AW41 AH24 A59
VSS17 VSS107 VSS218 VSS399
BM70 AW37 AH23 A55
VSS18 VSS108 VSS219 VSS400
BM51 AV9 AH21 A52
VSS19 VSS109 VSS220 VSS401
BM44 AV1 AH19 A48
VSS20 VSS110 VSS221 VSS402
BM32 AU70 AH17 A45
VSS21 VSS111 VSS222 VSS403
BM24 AU62 AH15 AA17
VSS22 VSS112 VSS223 VSS288
BM17 AU57 AH4 AA15
VSS23 VSS113 VSS224 VSS289
BL57 AU53 AG64 AA14
VSS24 VSS114 VSS225 VSS290
BL55 AU50 AG9 AA4
VSS25 VSS115 VSS226 VSS291
BL48 AU46 AG6 W69
VSS26 VSS116 VSS227 VSS292
BL40 AU42 AF69 W62
VSS27 VSS117 VSS228 VSS293
BL28 AU39 AF62 W57
VSS28 VSS118 VSS229 VSS294
BL20 AU35 AF1 W53
VSS29 VSS119 VSS230 VSS295
BK63 AU33 AE70 W50
VSS30 VSS120 VSS231 VSS296
BK60 AU32 AE64 W46
VSS31 VSS121 VSS232 VSS297
BK53 AU30 AD62 W42
VSS32 VSS122 VSS233 VSS298
BK34 AU28 AD57 W6
VSS33 VSS123 VSS234 VSS299
BK10 AU26 AD53 W1
VSS34 VSS124 VSS235 VSS300
BJ64 AU24 AD50 V70
VSS35 VSS125 VSS236 VSS301
BJ21 AU23 AD46 U64
BJ9
BJ1
VSS36
VSS37
VSS38 VSS
VSS126
VSS127
VSS128
AU21
AU19
AD42
AD4
VSS237
VSS238
VSS239
VSS VSS302
VSS303
VSS304
U62
U57
BH70 AU17 AC67 U53
VSS39 VSS129 VSS240 VSS305
BH57 AU15 AC64 U50
VSS40 VSS130 VSS241 VSS306
C BH55 AU14 AC10 U46 C
VSS41 VSS131 VSS242 VSS307
BH47 AU4 AC5 U42
VSS42 VSS132 VSS243 VSS308
BH24 AT64 AC1 U39
VSS43 VSS133 VSS244 VSS309
BH20 AT10 AB70 U9
VSS44 VSS134 VSS245 VSS310
BH15 AR62 AB62 U4
VSS45 VSS135 VSS246 VSS311
BG51 AR57 AB57 T1
VSS46 VSS136 VSS247 VSS312
BG36 AR53 AB53 R70
VSS47 VSS137 VSS248 VSS313
BF62 AR50 AB50 R62
VSS48 VSS138 VSS249 VSS314
BF30 AR46 AB46 R57
VSS49 VSS139 VSS250 VSS315
BF13 AN51 AB42 R53
VSS50 VSS161 VSS251 VSS316
BF8 AN48 AB39 R50
VSS51 VSS162 VSS252 VSS317
BE70 AN44 AB37 R46
VSS52 VSS163 VSS253 VSS318
BE65 AN41 AB35 R42
VSS53 VSS164 VSS254 VSS319
BE9 AN37 AB33 R5
VSS54 VSS165 VSS255 VSS320
BE1 AN5 AB32 P4
VSS55 VSS166 VSS256 VSS321
BD57 AN4 AB30 N63
VSS56 VSS167 VSS257 VSS322
BD53 AM64 AB28 N57
VSS57 VSS168 VSS258 VSS323
BD50 AM8 AB26 N53
VSS58 VSS169 VSS259 VSS324
BD46 AL62 AB24 N50
VSS59 VSS170 VSS260 VSS325
BD42 AL55 AB23 N46
VSS60 VSS171 VSS261 VSS326
BD39 AL51 AB21 N30
VSS61 VSS172 VSS262 VSS327
BD14 AL48 AB19 N21
VSS62 VSS173 VSS263 VSS328
BB71 AL44 AB17 N15
VSS63 VSS174 VSS264 VSS329
BB62 AL41 AB15 M53
VSS64 VSS175 VSS265 VSS330
BB57 AL37 AB14 M42
VSS65 VSS176 VSS266 VSS331
BB53 AL35 AB9 M36
VSS66 VSS177 VSS267 VSS332
BB50 AL33 AA66 M1
VSS67 VSS178 VSS268 VSS333
BB46 AL1 AA64 L70
VSS68 VSS179 VSS269 VSS334
BB42 AK70 AA62 L57
VSS69 VSS180 VSS270 VSS335
B BB39 AK64 AA57 L48 B
VSS70 VSS181 VSS271 VSS336
BB7 AK55 AA53 L47
VSS71 VSS182 VSS272 VSS337
BB1 AK51 AA50 L13
VSS72 VSS183 VSS273 VSS338
BA70 AK48 AA46 K64
VSS73 VSS184 VSS274 VSS339
AY71 AK44 AA42 K53
VSS74 VSS185 VSS275 VSS340
AY66 AK41 AA39 K43
VSS75 VSS186 VSS276 VSS341
AY62 AK37 AA37 K36
VSS76 VSS187 VSS277 VSS342
AY59 AK32 AA35 K34
VSS77 VSS188 VSS278 VSS343
AY55 AK30 AA33 K32
VSS78 VSS189 VSS279 VSS344
AY51 AK28 AA32 K25
VSS79 VSS190 VSS280 VSS345
AY48 AK26 AA30 K17
VSS80 VSS191 VSS281 VSS346
AR42 AK24 AA28 K11
VSS140 VSS192 VSS282 VSS347
AR39 AK23 AA26 K6
VSS141 VSS193 VSS283 VSS348
AR35 AK21 AA24 K4
VSS142 VSS194 VSS284 VSS349
AR33 AK19 AA23 J65
VSS143 VSS195 VSS285 VSS350
AR32 AK17 AA21 J57
VSS144 VSS196 VSS286 VSS351
AR30 AK15 AA19 J48
VSS145 VSS197 VSS287 VSS352
AR28 AJ70 F20 J47
VSS146 VSS198 VSS374 VSS353
AR26 AH62 F4 J40
VSS147 VSS199 VSS375 VSS354
AR24 AH57 E37 J9
VSS148 VSS200 VSS376 VSS355
AR23 AH55 E33 H53
VSS149 VSS201 VSS377 VSS356
AR21 BV66 E30 H43
VSS150 VSS202 VSS378 VSS357
AR19 BV64 E16 H36
VSS151 VSS203 VSS379 VSS358
AR17 BT68 E12 H1
VSS152 VSS204 VSS380 VSS359
AR15 BR69 D41 G70
VSS153 VSS205 VSS381 VSS360
AR14 BR68 D38 G57
VSS154 VSS206 VSS382 VSS361
AR4 BR3 D34 G53
VSS155 VSS207 VSS383 VSS362
AR1 BN71 D31 G48
VSS156 VSS208 VSS384 VSS363
AP70 BN1 D27 G47
VSS157 VSS209 VSS385 VSS364
A AP64 BL71 D24 G43 A
VSS158 VSS210 VSS386 VSS365
AN62 BL1 D20 G30
VSS159 VSS211 VSS387 VSS366
AN55 R14 D17 G24
VSS160 VSS212 VSS388 VSS367
AY44 H71 D13 G20
VSS81 VSS213 VSS389 VSS368
AY41 F71 D10 G15
VSS82 VSS214 VSS390 VSS369
AY37 E69 D6 F61
AY35
VSS83
VSS84
VSS215
VSS216
E68 B65
VSS391
VSS392
VSS370
VSS371
F48 352-(&75'
4XDQWD&RPSXWHU,QF
AY33 A66 B40 F47
VSS85 VSS217 VSS415 VSS372
AY32 A64 F28
VSS86 VSS218 VSS373
AY30 E5
VSS87 VSS219
AY28 C68
VSS88 VSS220 IC,ARD_BGA,R1P0 Size Document Number Rev
AY26
VSS89 Custom 1A
IC,ARD_BGA,R1P0
PROCESSER 7/7(GND)
Date: Thursday, January 13, 2011 Sheet 9 of 42
5 4 3 2 1
1 2 3 4 5 6 7 8

INTVRMEN - Integrated SUS 1.1V VRM Enable


High - Enable Internal VRs
10
C663 18P/50V_4 UMA CRT,LVDS&HDMI signals
IBEX PEAK-M (HDA,JTAG,SATA) IBEX PEAK-M (LVDS,DDI)
2
1
Y4 R444 U24D
A A
32.768KHZ 10M_4 U24A
<22> LVDS_BLON T48 L_BKLTEN Ibex-M SDVO_TVCLKINN BJ46
<22> DISP_ON T47 4 OF 10 BG46
3
4 L_VDD_EN SDVO_TVCLKINP
RTC_X1 B13 Ibex-M D33
RTCX1 FWH0 / LAD0 LAD0 <31,32>
C665 18P/50V_4 RTC_X2 D13 1 OF 10 B33 <22> DPST_PWM Y48 BJ48
RTCX2 FWH1 / LAD1 LAD1 <31,32> L_BKLTCTL SDVO_STALLN
C32 BG48
LPC FWH2 / LAD2
FWH3 / LAD3
A32
LAD2
LAD3
<31,32>
<31,32> <22> EDIDCLK AB48
L_DDC_CLK
SDVO_STALLP
RTC_RST# C14 C34 <22> EDIDDATA Y45 BF45
RTCRST# FWH4 / LFRAME# LFRAME# <31,32> L_DDC_DATA SDVO_INTN
LDRQ0# A34 SDVO SDVO_INTP BH45
SRTC_RST# D17 F34 R230 10K_4 R266 10K_4 L_CTRL_CLK AB46
SRTCRST# RTC (+3V) LDRQ1# / GPIO23
SERIRQ
AB9
+3V
SERIRQ <31> +3V R269 10K_4 L_CTRL_DATA V48
L_CTRL_CLK
L_CTRL_DATA SDVO_CTRLCLK
T51 DPB_CTRL_CLK
SM_INTRUDER# A16 T53 DPB_CTRL_DATA
INTRUDER# R259 2.37K/F_4 LVDS_IBG SDVO_CTRLDATA
SATA0RXN AK7 SATA_RXN0 <25> HDD AP39 LVD_IBG
+RTC_CELL R445 330K_6 PCH_INVRMEN A14 AK6 SATA_RXP0 <25> LVDS_VBG AP41 BG44 TP16
INTVRMEN SATA0RXP TP7 LVD_VBG DDPB_AUXN TP15
AK11 SATA_TXN0 <25> BJ44

DISPLAY PORT B
SATA0TXN DDPB_AUXP DPB_HPD_Q
AK9 SATA_TXP0 <25> AT43 AU38
SATA0TXP LVD_VREFH DDPB_HPD
AT42
ACZ_BCLK HDD0 (SATA3 6.0Gb/s) LVD_VREFL DPB_LANE0_N
ACZ_SYNC
A30
D29
HDA_BCLK SATA1RXN
AH6
AH5
SATA_RXN4 <25> ODD DDPB_0N
BD42
BC42 DPB_LANE0_P
SATA_RXP4 <25> LVDS--A

Digital Display Interface


HDA_SYNC SATA1RXP DDPB_0P DPB_LANE1_N
<13,27> ACZ_SPKR P1 AH9 SATA_TXN4 <25> <22> TXLCLKOUT- AV53 BJ42
ACZ_RST# SPKR SATA1TXN LVDSA_CLK# DDPB_1N DPB_LANE1_P
C30 AH8 SATA_TXP4 <25> <22> TXLCLKOUT+ AV51 BG42
HDA_RST# SATA1TXP LVDSA_CLK DDPB_1P DPB_LANE2_N
<27> ACZ_SDIN0 G30 BB40
HDA_SDIN0 DDPB_2N DPB_LANE2_P
F30 AF11 BB47 BA40
MV add for connect EC to PCH (GPIO33_E) E32
HDA_SDIN1
HDA_SDIN2
IHDA SATA2RXN
SATA2RXP AF9
<22> TXLOUT0-
<22> TXLOUT1- BA52
LVDSA_DATA#0
LVDSA_DATA#1
DDPB_2P
DDPB_3N AW38 DPB_LANE3_N
F32 AF7 <22> TXLOUT2- AY48 BA38 DPB_LANE3_P
ACZ_SDOUT HDA_SDIN3 SATA2TXN LVDSA_DATA#2 DDPB_3P
B29 HDA_SDO SATA2TXP AF6 AV47 LVDSA_DATA#3
<13,31> GPIO33_E R249 0_4 PCH_GPIO33_R H32 Y49
J30
HDA_DOCK_EN# / GPIO33 (+3V) AH3 BB48
DDPC_CTRLCLK
AB49
HDA_DOCK_RST# / GPIO13 (+3V_S5) SATA3RXN <22> TXLOUT0+ LVDSA_DATA0 DDPC_CTRLDATA
AH1 BA50
SATA SATA3RXP <22> TXLOUT1+

DISPLAY PORT C
LVDSA_DATA1
SATA3TXN AF3 <22> TXLOUT2+ AY49 LVDSA_DATA2 DDPC_AUXN BE44
AF1 AV48 BD44
PCH_JTAG_TCK SATA3TXP LVDSA_DATA3 DDPC_AUXP
TP12 M3 AV40
JTAG_TCK DDPC_HPD
PCH_JTAG_TMS K3
SATA4RXN AD9
AD8 AP48
LVDS--B BE40
TP10 JTAG_TMS SATA4RXP <22> TXUCLKOUT- LVDSB_CLK# DDPC_0N
AD6 <22> TXUCLKOUT+ AP47 BD40
B
PCH_JTAG_TDI SATA4TXN LVDSB_CLK DDPC_0P B
K1 AD5 BF41
TP9 JTAG_TDI JTAG SATA4TXP
<22> TXUOUT0- AY53
LVDSB_DATA#0
DDPC_1N
DDPC_1P
BH41
PCH_JTAG_TDO J2 AD3 <22> TXUOUT1- AT49 BD38
TP8 JTAG_TDO SATA5RXN LVDSB_DATA#1 DDPC_2N
SATA5RXP AD1 <22> TXUOUT2- AU52 LVDSB_DATA#2 DDPC_2P BC38
PCH_JTAG_RST# J4 AB3 <22> TXUOUT0+ AT53 BB36
TP1 TRST# SATA5TXN LVDSB_DATA#3 DDPC_3N
SATA5TXP AB1 <22> TXUOUT1+ DDPC_3P BA36
must add test point. <22> TXUOUT2+ AY51 LVDSB_DATA0
AT48 U50
SPI_CLK_R LVDSB_DATA1 DDPD_CTRLCLK
BA2 AF16 AU50 U52
SPI_CLK SATAICOMPO LVDSB_DATA2 DDPD_CTRLDATA
<24> CRT_B AT51

DISPLAY PORT D
SPI_CS0#_R SATA_COMP R237 37.4/F_4 R455 150/F_4 LVDSB_DATA3
AV3 AF15 +1.05V BC46
SPI_CS0# SATAICOMPI DDPD_AUXN
<24> CRT_G AA52 BD46
SPI_CS1# SATA_LED# R457 150/F_4 CRT_BLUE DDPD_AUXP
AY3 T3 AB53 AT38
TP13 SPI_CS1# SPI SATALED# SATA_LED# <30>
<24> CRT_R AD53
CRT_GREEN
CRT_RED
DDPD_HPD
R456 150/F_4 BJ40
SPI_SI_R AY1 V51
CRT DDPD_0N
BG40
SPI_MOSI <24> DDCCLK CRT_DDC_CLK DDPD_0P
Y9 SATA_DET0# <24> DDCDATA V53 BJ38
SPI_SO (+3V) SATA0GP / GPIO21 SATA_DET1# R409 *0_4 CRT_DDC_DATA DDPD_1N
AV1 (+3V_S5) V1 ODD_PRSNT# <25> BG38
SPI_MISO SATA1GP / GPIO19 DDPD_1P
<24> HSYNC_COM Y53 BF37
IbexPeak-M_Rev1_0 CRT_HSYNC DDPD_2N
<24> VSYNC_COM Y51 CRT_VSYNC DDPD_2P BH37
BE36
R272 1K/F_4 DAC_IREF AD48 DDPD_3N
BD36
DAC_IREF DDPD_3P
AB51
CRT_IRTN
IbexPeak-M_Rev1_0
1205 The SATALED# signal is
open-collector and requires a
weak external pull-up (8.2 k
to 10 k ) to +V3.3.
+3VS5
R411 10K_4 SATA_LED#
R223 10K_4 SATA_DET0# R433 51_4 PCH_JTAG_TCK
+3V R410 10K_4 SATA_DET1#
C R415 R413 R416 R192 C
R251 *10K_4 GPIO33_E For ES1 ONLY.NI for ES2.
200_4 20K/F_4
200_4 200_4
+3V PCH_JTAG_RST#
UMA HDMI signals Q18
PCH_JTAG_TDO
PCH_JTAG_TDI
2

10/25 PV modify *2N7002K PCH_JTAG_TMS


DPB_CTRL_CLK R459 *0_4/S SDVO_CLK <23>
DPB_CTRL_DATA R458 *0_4/S SDVO_DATA <23> DPB_HPD_Q 1 3 HDMI_HPD_CON <23> R414 R412 R436 R197
DPB_LANE0_N C474 0.1U/10V_4 IN_D2# <23>
DPB_LANE0_P C478 0.1U/10V_4 IN_D2 <23> For ES1 ONLY.NI for ES2.
DPB_LANE1_N C471 0.1U/10V_4 IN_D1# <23> 100_4 10K_4
DPB_LANE1_P C472 0.1U/10V_4 IN_D1 <23> R287 100_4 100_4
DPB_LANE2_N C480 0.1U/10V_4 IN_D0# <23> 100K_4 R286 *0_4/S
DPB_LANE2_P C482 0.1U/10V_4 IN_D0 <23>
DPB_LANE3_N C465 0.1U/10V_4 IN_CLK# <23> 10/25 PV modify Part
DPB_LANE3_P C467 0.1U/10V_4 IN_CLK <23>
Part Number
Part Description

For AUDIO
<27> ACZ_RST#_AUDIO
<27> ACZ_SDOUT_AUDIO
R452
R450
C666
33_4 ACZ_RST#
33_4 ACZ_SDOUT
*10P/50V_4
RTC +RTC_CELL
1mA
4M byte SPI ROM Vender
<27> ACZ_SYNC_AUDIO R451 33_4 ACZ_SYNC Socket DG008000031
C667 *10P/50V_4
+3VPCU RB500V-40 CR1 C438 1U/6.3V_4 EON - EN25F32-100HIP
<27> BIT_CLK_AUDIO R453 33_4 ACZ_BCLK U22
C464 *10P/50V_4 +3VRTC_2 R242 20K/F_4 RTC_RST# +3V 8 1 SPI_CS0#_R AKE39FN0Q00 IC FLASH(8P) EN25F32-100HIP (SOIC)
RB500V-40 CR2 C428 1U/6.3V_4 VDD CE# SPI_CLK_R
D SCK 6 D
5 SPI_SI_R W INBOND - W 25Q32BVSSIG
SPI_HOLD# SI SPI_SO
7 HOLD# SO 2
R241 20K/F_4 SRTC_RST# R422 10K_4 AKE391P0N00 IC FLASH(8P) W 25Q32BVSSIG(SOIC)
C429 1U/6.3V_4 C659 0.1U/10V_4 4 3 SPI_WP# R440 10K_4 +3V
VSS WP#
For MDC W25Q32BVSSIG
R243 1M_4 SM_INTRUDER# AKE391P0N00
IC FLASH(8P) W25Q32BVSSIG(SOIC)
352-(&75'
CN24
R254 1K_4 +3VRTC_1
4XDQWD&RPSXWHU,QF
1 2

BAT_CONN <2,11,12,14,41> +1.05V


8/25 SI for M/E. <2,3,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V
DFWF02MS022 <22,30,31,33,39> +3VPCU Size Document Number Rev
50273-0027N-001-2P-L Custom 1A
PCH 1/5 (SATA,HDA,LPC)
Date: Tuesday, February 15, 2011 Sheet 10 of 42
1 2 3 4 5 6 7 8
5 4 3 2 1

IBEX PEAK-M (GND)


AY7
B11
U24I
VSS[159] VSS[259]
VSS[160] VSS[260]
H49
H5 IBEX PEAK-M (PCI-E,SMBUS,CLK)
11
B15 J24
VSS[161] VSS[261] U24B
B19 K11
VSS[162] VSS[262] +3VS5
B23 K43
VSS[163] VSS[263]
B31 K47 Ibex-M
B35
VSS[164] VSS[264]
VSS[165] VSS[265]
K7 <32> PCIE_RXN1 PCIE_RXN1 BG30
PERN1 2 OF 10 SMBus
B39 L14 <32> PCIE_RXP1 PCIE_RXP1 BJ30 B9 SMBALERT# 10K_4 R442
D VSS[166] VSS[266] C450 0.1U/10V_4 PCIE_TXN1_C PERP1 (+3V_S5) SMBALERT# / GPIO11 PCLK_SMB 2.2K_4 R189
D
B43
VSS[167] VSS[267]
L18 [WLAN] <32> PCIE_TXN1
C449 0.1U/10V_4 PCIE_TXP1_C
BF29
PETN1 SMBCLK
H14
PDAT_SMB 2.2K_4 R208
B47 L2 <32> PCIE_TXP1 BH29 C8
VSS[168] VSS[268] PETP1 SMBDATA SMBL0ALERT# 10K_4 R238
B7 L22 (+3V_S5) SML0ALERT# / GPIO60 J14
VSS[169] VSS[269] PCIE_RXN2_LAN AW30
BG12 L32 <29> PCIE_RXN2_LAN C6 SMB_CLK_ME0 2.2K_4 R229
VSS[170] VSS[270] PCIE_RXP2_LAN BA30 PERN2 SML0CLK SMB_DATA_ME0 2.2K_4 R212
BB12 L36 <29> PCIE_RXP2_LAN G8
VSS[171] VSS[271] C458 0.1U/10V_4 PCIE_TXN2_C BC30 PERP2 SML0DATA SML1ALERT# 10K_4 R239
BB16
VSS[172] VSS[272]
L40 [LAN] <29> PCIE_TXN2_LAN
C459 0.1U/10V_4 PCIE_TXP2_C BD30 PETN2 (+3V_S5) SML1ALERT# / GPIO74 M14
BB20 L52 <29> PCIE_TXP2_LAN (+3V_S5) E10 SMB_CLK_ME1 4.7K_4 R216
VSS[173] VSS[273] PETP2 SML1CLK / GPIO58
BB24 M12 G12 SMB_DATA_ME1 4.7K_4 R227
VSS[174] VSS[274] (+3V_S5) SML1DATA / GPIO75
BB30 M16 <26> PCIE_RXN3_CARD AU30
VSS[175] VSS[275] PERN3
BB34
VSS[176] VSS[276]
M20 Cardreader <26> PCIE_RXP3_CARD
C460 0.1U/10V_4 PCIE_TXN3_CARD_C
AT30
PERP3
BB38 N38 <26> PCIE_TXN3_CARD AU32
VSS[177] VSS[277] C461 0.1U/10V_4 PCIE_TXP3_CARD_C PETN3
BB42 M34 <26> PCIE_TXP3_CARD AV32
VSS[178] VSS[278] PETP3
BB49 M38 T13
VSS[179] VSS[279] CL_CLK1
BB5 M42 BA32 Controller
VSS[180] VSS[280] PERN4
BC10 M46 BB32 T11
VSS[181] VSS[281] PERP4 CL_DATA1
BC14
BC18
VSS[182] VSS[282]
M49
M5
BD32
BE32
PETN4 Link T9
VSS[183] VSS[283] PETP4 CL_RST1#
BC2 M8
VSS[184] VSS[284]
BC22 N24 BF33
VSS[185] VSS[285] PERN5
BC32 P11 BH33
VSS[186] VSS[286] PERP5
BC36 AD15 BG32
VSS[187] VSS[287] PETN5
BC40 P22 BJ32
VSS[188] VSS[288] PETP5
BC44
VSS[189] VSS[289]
P30
PCI-E* PEG
BC52 P32 BA34
VSS[190] VSS[290] PERN6
BH9 P34 AW34 H1 PEG_CLKREQ# PEG_CLKREQ# <17>
BD48
VSS[191] VSS[291]
P42 BC34
PERP6 (+3V_S5)PEG_A_CLKRQ# / GPIO47 AD43
VSS[192] VSS[292] PETN6 CLKOUT_PEG_A_N CLK_PCIE_VGA# <17>
BD49 P45 BD34 AD45 CLK_PCIE_VGA <17>
VSS[193] VSS[293] +3V PETP6 CLKOUT_PEG_A_P
BD5 P47 AN4 CLK_PCIE_3GPLL# <3>
VSS[194] VSS[294] PCIE_CLKREQ_WLAN# R429 10K_4 CLKOUT_DMI_N
C BE12 R2 AT34 AN2 CLK_PCIE_3GPLL <3> C
VSS[195] VSS[295] CLK_PCIE_REQ2# R198 10K_4 PERN7 CLKOUT_DMI_P
BE16 R52 AU34
VSS[196] VSS[296] PERP7
BE20 T12 AU36
VSS[197] VSS[297] +3VS5 PETN7
BE24 T41 AV36 AT1 DREFSSCLK# <3>
VSS[198] VSS[298] PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N
BE30 T46 AT3 DREFSSCLK <3>
VSS[199] VSS[299] PCIE_CLK_REQ0# R231 10K_4 CLKOUT_DP_P / CLKOUT_BCLK1_P
BE34 T49 BG34
VSS[200] VSS[300] PCIE_CLKREQ_LAN# R215 10K_4 PERN8
BE38 T5 BJ34
VSS[201] VSS[301] PCIE_CLK_REQ4# R193 10K_4 PERP8
BE42 T8 BG36 AW24 CLK_BUF_PCIE_3GPLL# <2>
VSS[202] VSS[302] PCIE_CLK_REQB#_R R240 10K_4 PETN8 CLKIN_DMI_N
BE46 U30 BJ36 BA24 CLK_BUF_PCIE_3GPLL <2>
VSS[203] VSS[303] PETP8 CLKIN_DMI_P
BE48 U31 AK48
VSS[204] VSS[304] PCIE_CLK_REQ5# R217 10K_4 CLKOUT_PCIE0N
BE50 U32 AK47
VSS[205] VSS[305] CLKOUT_PCIE0P
BE6 U34 AP3 CLK_BUF_BCLK_N <2>
VSS[206] VSS[306] CLKIN_BCLK_N
BE8
VSS[207] VSS[307]
P38 Ra R417 *10K_4 PCIE_CLK_REQ0# P9
PCIECLKRQ0# / GPIO73(+3V_S5) CLKIN_BCLK_P
AP1 CLK_BUF_BCLK_P <2>
BF3 V11 AM43

From CLK BUFFER


VSS[208] VSS[308] <32> CLK_PCIE_WLANN CLKOUT_PCIE1N
PEG_CLKREQ#
BF49
VSS[209] VSS[309]
P16 Rb R418 *10K_4 <32> CLK_PCIE_WLANP AM45
CLKOUT_PCIE1P
BF51
VSS[210] VSS[310]
V19 MiniWLAN CLKIN_DOT_96N
F18 CLK_BUF_DREFCLK# <2>
BG18
VSS[211] VSS[311]
V20 Ra: UMA <32> PCIE_CLKREQ_WLAN# U4
PCIECLKRQ1# / GPIO18(+3V) CLKIN_DOT_96P
E18 CLK_BUF_DREFCLK <2>
BG24 V22 Rb: Muxless
VSS[212] VSS[312]
BG4 V30 <26> CLK_PCIE_CARDN AM47
VSS[213] VSS[313] CLKOUT_PCIE2N
BG50 V31 <26> CLK_PCIE_CARDP AM48 AH13 CLK_BUF_DREFSSCLK# <2>
VSS[214] VSS[314] CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N
BH11 V32 AH12 CLK_BUF_DREFSSCLK <2>
VSS[215] VSS[315] CLKIN_SATA_P / CKSSCD_P
BH15 V34 <26> CLK_PCIE_REQ2# N4
VSS[216] VSS[316] PCIECLKRQ2# / GPIO20(+3V)
BH19 V35
VSS[217] VSS[317]
BH23 V38 <29> CLK_PCIE_LANN AH42 P41 CLK_ICH_14M <2>
VSS[218] VSS[318] CLKOUT_PCIE3N REFCLK14IN
BH31 V43 <29> CLK_PCIE_LANP AH41
VSS[219] VSS[319] CLKOUT_PCIE3P C473 *5.6P/50V_4
BH35
VSS[220] VSS[320]
V45 LAN
BH39 V46 <29> PCIE_CLKREQ_LAN# A8 J42 CLK_PCI_FB CLK_PCI_FB <12>
VSS[221] VSS[321] PCIECLKRQ3# / GPIO25(+3V_S5) CLKIN_PCILOOPBACK
BH43 V47
VSS[222] VSS[322] Q36 2N7002E
BH47 V49 AM51
VSS[223] VSS[323] SMB_CLK_ME1 CLKOUT_PCIE4N
B BH7 V5 3 1 MBCLK2 <16,31> AM53 AH51 XTAL25_IN DIS only B
VSS[224] VSS[324] CLKOUT_PCIE4P XTAL25_IN
C12 V7 AH53 XTAL25_OUT
VSS[225] VSS[325] PCIE_CLK_REQ4# XTAL25_OUT
C50 V8 M9
VSS[226] VSS[326] R446 PCIECLKRQ4# / GPIO26(+3V_S5)
D51 W2 AF38 XCLK_RCOMP +1.05V
2

VSS[227] VSS[327] XCLK_RCOMP R262 90.9/F_4


E12 W52 2.2K_4
VSS[228] VSS[328]
E16 Y11 AJ50
VSS[229] VSS[329] CLKOUT_PCIE5N CLK_FLEX0 T36
E20 Y12 AJ52 T45
E24
VSS[230] VSS[330]
Y15
CLKOUT_PCIE5P (+3V)CLKOUTFLEX0 / GPIO64 P43 CLK_FLEX1 T35
VSS[231] VSS[331] +3V (+3V_S5) (+3V)CLKOUTFLEX1 / GPIO65
E30 Y19 PCIE_CLK_REQ5# H6 T42 CLK_FLEX2 T34
E34
VSS[232] VSS[332]
Y23
PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66 N50 CLK_FLEX3 T37
VSS[233] VSS[333] R448
(+3V) CLKOUTFLEX3 / GPIO67
E38 Y28
VSS[234] VSS[334]
E42 Y30 2.2K_4 AK53
2

VSS[235] VSS[335] CLKOUT_PEG_B_N


E46
E48
VSS[236] VSS[336]
Y31
Y32 Q37
AK51
CLKOUT_PEG_B_P Clock Flex
VSS[237] VSS[337] SMB_DATA_ME1 3 PCIE_CLK_REQB#_R P13
E6 Y38 1 MBDATA2 <16,31>
E8
VSS[238] VSS[338]
Y43 (+3V_S5)
PEG_B_CLKRQ# / GPIO56
VSS[239] VSS[339] 2N7002E
F49 Y46
VSS[240] VSS[340] IbexPeak-M_Rev1_0
F5 P49
VSS[241] VSS[341]
G10 Y5
VSS[242] VSS[342]
G14 Y6
VSS[243] VSS[343] +3VS5
G18
VSS[244] VSS[344]
Y8 UMA only
G2 P24
VSS[245] VSS[345] Q12 2N7002E
G22 T43
VSS[246] VSS[346] PDAT_SMB XTAL25_IN C668 27P/50V_4
G32 AD51 3 1 CGDAT_SMB <2,15,16>
VSS[247] VSS[347] U21 C658
G36 AT8
VSS[248] VSS[348] *MC74VHC1G08DFT2G
G40 AD47 *0.1U/10V_4

5
VSS[249] VSS[349] R191
G44 Y47 8/25 SI for TXC.
2

VSS[250] VSS[350] PLT_RST-R# R454 Y5


G52 AT12 10K_4 <12> PLT_RST-R# 2
VSS[251] VSS[351] 1M_4
AF39 AM6 4 PLTRST# <3,17,26,29,31,32> 25MHZ
VSS[252] VSS[352]
A H16 AT13 1 A
VSS[253] VSS[353] XTAL25_OUT C669 33P/50V_4
H20 AM5 +3V
VSS[254] VSS[354] R439 R421
H30 AK45
3
VSS[255] VSS[355]
H34 AK39 100K_4 *100K_4
VSS[256] VSS[356]
H38 AV14
VSS[257] VSS[366] R190 R423 *0_4/S
H42
VSS[258] 10K_4
352-(&75'
2

IbexPeak-M_Rev1_0 10/25 PV modify


PCLK_SMB
Q13
3
2N7002E
1
4XDQWD&RPSXWHU,QF
CGCLK_SMB <2,15,16>

<2,10,12,14,41> +1.05V Size Document Number Rev


Custom 1A
<2,3,10,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V PCH 2/5 (PCIE, SMBUS, CK)
Date: Tuesday, February 15, 2011 Sheet 11 of 42
5 4 3 2 1
1 2 3 4 5 6 7 8

IBEX PEAK-M (DMI,FDI,GPIO)


12
U24C
BA18 FDI_TXN0 <3>
FDI_RXN0
BC24 Ibex-M BH17

A
IBEX PEAK-M (PCI,USB,NVRAM) <3>
<3>
<3>
DMI_RXN0
DMI_RXN1
DMI_RXN2
BJ22
AW20
DMI0RXN
DMI1RXN 3 OF 10 FDI_RXN1
FDI_RXN2
BD16
BJ16
FDI_TXN1
FDI_TXN2
FDI_TXN3
<3>
<3>
<3> A
DMI2RXN FDI_RXN3
<3> DMI_RXN3 BJ20 BA16 FDI_TXN4 <3>
U24E DMI3RXN FDI_RXN4
BE14 FDI_TXN5 <3>
FDI_RXN5
H40
AD0 Ibex-M NV_CE#0
AY9 <3> DMI_RXP0 BD24
DMI0RXP FDI_RXN6
BA14 FDI_TXN6 <3>
+3V N34 5 OF 10 BD1 <3> DMI_RXP1 BG22 BC12 FDI_TXN7 <3>
RP5 AD1 NV_CE#1 DMI1RXP FDI_RXN7
C44 AP15 <3> DMI_RXP2 BA20
PCI_PIRQD# AD2 NV_CE#2 DMI2RXP
5 6 A38 BD8 <3> DMI_RXP3 BG20 BB18 FDI_TXP0 <3>
PCI_STOP# REQ1# AD3 NV_CE#3 DMI3RXP FDI_RXP0
4 7 C36 BF17 FDI_TXP1 <3>
PCI_IRDY# PCI_SERR# AD4 FDI_RXP1
3 8 J34 AV9 <3> DMI_TXN0 BE22 BC16 FDI_TXP2 <3>
PCI_PIRQA# PCI_FRAME# AD5 NV_DQS0 DMI0TXN FDI_RXP2
2 9 A40 BG8 BF21 BG16
PCI_PIRQC# 1 10 +3V D45
AD6
AD7
NVRAM NV_DQS1 <3>
<3>
DMI_TXN1
DMI_TXN2 BD20
DMI1TXN
DMI2TXN
DMI FDI FDI_RXP3
FDI_RXP4
AW16
FDI_TXP3
FDI_TXP4
<3>
<3>
E36 AP7 <3> DMI_TXN3 BE18 BD14 FDI_TXP5 <3>
10P8R-8.2K AD8 NV_DQ0 / NV_IO0 DMI3TXN FDI_RXP5
H48 AP6 BB14 FDI_TXP6 <3>
AD9 NV_DQ1 / NV_IO1 FDI_RXP6
E40 AT6 <3> DMI_TXP0 BD22 BD12 FDI_TXP7 <3>
+3VS5 AD10 NV_DQ2 / NV_IO2 DMI0TXP FDI_RXP7
C40 AT9 <3> DMI_TXP1 BH21
RP2 AD11 NV_DQ3 / NV_IO3 DMI1TXP
M48 BB1 <3> DMI_TXP2 BC20
USB_OC0# AD12 NV_DQ4 / NV_IO4 DMI2TXP
5 6 M45 AV6 <3> DMI_TXP3 BD18 BJ14 FDI_INT <3>
USB_OC4# USB_OC1# AD13 NV_DQ5 / NV_IO5 DMI3TXP FDI_INT
4 7 F53 BB3 BF13 FDI_FSYNC0 <3>
USB_OC5# USB_OC2# AD14 NV_DQ6 / NV_IO6 FDI_FSYNC0
3 8 M40 BA4 BH13 FDI_FSYNC1 <3>
USB_OC6# USB_OC3# AD15 NV_DQ7 / NV_IO7 FDI_FSYNC1
2 9 M43 BE4 BH25 BJ12 FDI_LSYNC0 <3>
USB_OC7# AD16 NV_DQ8 / NV_IO8 DMI_COMP DMI_ZCOMP FDI_LSYNC0
1 10 +3VS5 J36 BB6 +1.05V BF25 BG14 FDI_LSYNC1 <3>
AD17 NV_DQ9 / NV_IO9 R247 49.9/F_4 DMI_IRCOMP FDI_LSYNC1
K48 BD6
10P8R-8.2K AD18 NV_DQ10 / NV_IO10
F40 BB7
AD19 NV_DQ11 / NV_IO11
C42
AD20 NV_DQ12 / NV_IO12
BC8 10/25 PV modify System Power Management
+3V K46 BJ8 T6 P12
AD21 NV_DQ13 / NV_IO13 <3> XDP_DBRESET# SYS_RESET# SLP_S3# SUSB# <31>
RP6 M51 BJ6 M6 H7 SUSC# <31>
PCI_PLOCK# AD22 NV_DQ14 / NV_IO14 R200 *0_4/S SYS_PWROK SLP_S4#
5 6 J52 BG6 <35> IMVP_PWRGD B17
REQ3# PCI_PERR# AD23 NV_DQ15 / NV_IO15 R199 *0_4 PCH_PWROK PWROK SLP_M#
4 7 K51 <31> EC_PWROK K5 K8 TP4
PCI_DEVSEL# 3 REQ0# AD24 MEPWROK SLP_M#
8 L34 BD3 N2
PCI_TRDY# PCI_PIRQB# AD25 NV_ALE RSV_ICH_LAN_RST# TP23
B 2 9 F42 AY6 A10 B
INTH# AD26 NV_CLE LAN_RST#
1 10 +3V J40 <3> PM_DRAM_PWRGD D9 M1 SUS_PWR_ACK <31>
G46
AD27
C16
DRAMPWROK (+3V_S5) SUS_PWR_DN_ACK / GPIO30 P7 AC_PRESENT_R
AD28 <31> RSMRST# RSMRST# (+3V_S5) ACPRESENT / GPIO31
10P8R-8.2K F44 AU2 Y1 CLKRUN# <31>
M47
AD29 NV_RCOMP R194 *0_4/S P5
(+3V) CLKRUN# / GPIO32 P8
H36
AD30
AD31
PCI NV_RB#
AV7
<31> DNBSWON# PWRBTN# (+3V_S5) SUS_STAT# / GPIO61
(+3V_S5) SUSCLK / GPIO62
F3
E4
PCH_SUSCLK_L
SLP_S5#
PM_RI#
(+3V_S5) SLP_S5# / GPIO63 PM_BATLOW#
SLP_S5 <31>
J50 AY8 F14 (+3V_S5) BATLOW# / GPIO72 A6
C/BE0# NV_WR#0_RE# RI#
G42 AY5 <29,32> PCIE_WAKE# J12
C/BE1# NV_WR#1_RE# WAKE#
H47 <3> PM_SYNC BJ10 F6
G34
C/BE2#
AV11
PMSYNCH (+3V_S5) SLP_LAN# / GPIO29
C/BE3# NV_WE#_CK0
BF5
PCI_PIRQA# NV_WE#_CK1 IbexPeak-M_Rev1_0
G38
PCI_PIRQB# PIRQA#
H51
PCI_PIRQC# PIRQB#
B37 H18
PCI_PIRQD# A44
PIRQC# USBP0N
J18
USBP0-
USBP0+
<28>
<28>
>&d^/h^
PIRQD# USBP0P
USBP1N
A18 USBP1- <28> >&d^/h^ 10/25 PV modify
REQ0# F51 C18
REQ0# USBP1P USBP1+ <28>
REQ1# A46 N20 PCH_SUSCLK_L R438 *0_4/S
REQ1# / GPIO50(+5V) USBP2N PCH_SUSCLK <31>
REQ2# B45 P20
REQ3# REQ2# / GPIO52(+5V) USBP2P
M53 J20
REQ3# / GPIO54(+5V) USBP3N
L20
USBP3P
<13>
<13>
GNT0#
GNT1#
F48
K45
GNT0# USBP4N
F20
G20
USBP4-
USBP4+
<22>
<22>
t +3V
GNT1# / GPIO51(+3V) USBP4P
<32> BT_COMBO_EN# F36 A20
GNT2# / GPIO53(+3V) USBP5N +3V REQ2# R268 8.2K_4
<13> GNT3# H53 C20
GNT3# / GPIO55(+3V) USBP5P PIRQE# R267 8.2K_4
M22
PIRQE# USBP6N CLKRUN# R425 8.2K_4 PIRQF# R461 8.2K_4
B41 N22
PIRQF# PIRQE# / GPIO2 (+5V) USBP6P XDP_DBRESET# R220 1K_4 PIRQG# R257 8.2K_4
K53
PIRQF# / GPIO3 (+5V) USBP7N
B21 SI Modify
PIRQG# A36 D21
C PIRQG# / GPIO4(+5V) USBP7P C
INTH# A48 H22
PIRQH# / GPIO5 (+5V) USBP8N USBP8- <28>
8/25 SI for H/W. USBP8P
J22 USBP8+ <28> ydh^ Change Port2 to Port4
K6 E22 Change Port4 to Port12
PCIRST# USBP9N
F22
PCI_SERR# USBP9P change Port5 to Port13 +3VS5
E44 A22
<31> PCI_SERR#
PCI_PERR# E50
SERR#
PERR# USB USBP10N
USBP10P
C22
G24
USBP10-
USBP10+
<32>
<32> t>E RSMRST# R236 10K_4 PM_RI# R233 10K_4
USBP11N RSV_ICH_LAN_RST# R443 10K_4 PM_BATLOW# R441 10K_4
H24
PCI_IRDY# USBP11P PCH_PWROK R447 10K_4 PCIE_WAKE# R211 1K_4
A42 L24
IRDY# USBP12N
H44 M24
PCI_DEVSEL# F46
PAR USBP12P
A24 USBP2- <28>
Z
PCI_FRAME# DEVSEL# USBP13N SUS_PWR_ACK R209 10K_4
C46
FRAME# USBP13P
C24 USBP2+ <28>  BT_COMBO_EN# R260 *1K_4 AC_PRESENT_R R210 10K_4
PCI_PLOCK# D49
PLOCK#
B25 USB_BIAS R449 22.6/F_4
PCI_STOP# USBRBIAS#
D41
PCI_TRDY# STOP#
C48 D25
TRDY# USBRBIAS
TP2 PME# M7
PME# USB_OC0#
N16
PLT_RST-R# D5
(+3V_S5)OC0# / GPIO59 J16 USB_OC1#
<11> PLT_RST-R# PLTRST# (+3V_S5)OC1# / GPIO40 F16 USB_OC2#
R460 33_4 CLK_33M_DEBUG_R N52 (+3V_S5)OC2# / GPIO41 L16 USB_OC3#
<32> CLK_33M_DEBUG CLKOUT_PCI0 (+3V_S5)OC3# / GPIO42
<31> CLK_33M_KBC R462 33_4 CLK_33M_KBC_R P53 E14 USB_OC4# AC_PRESENT_R R201 *0_4 AC_PRESENT <31>
P46
CLKOUT_PCI1 (+3V_S5)OC4# / GPIO43 G16 USB_OC5#
CLK_PCI_FB_C CLKOUT_PCI2 (+3V_S5)OC5# / GPIO9 USB_OC6#
<11> CLK_PCI_FB P51 F12
R274 22_4 P48
CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10 T15 USB_OC7#
CLKOUT_PCI4 (+3V_S5)OC7# / GPIO14
D D
IbexPeak-M_Rev1_0

CLK_33M_KBC
352-(&75'
C673
4XDQWD&RPSXWHU,QF
*5.6P/50V_4 <2,10,11,14,41> +1.05V
<2,3,10,11,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V Size Document Number Rev
Custom 1A
<3,10,11,13,14,17,28,33,34,36,38,40> +3VS5 PCH 3/5 (PCI,ONFI,USB,DMI)
Date: Tuesday, February 15, 2011 Sheet 12 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

IBEX PEAK-M (GND)


BMBUSY#
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
Y3
U24F

BMBUSY# / GPIO0(+3V)
Ibex-M
6 OF 10 CLKOUT_PCIE6N
CLKOUT_PCIE6P
AH45
AH46
AB16
AA19
U24H

VSS[0]
VSS[1]
VSS[80]
VSS[81]
AK30
AK31 <12> GNT3# R464 *10K_4
13
<31> SIO_EXT_SMI# C38 AA20 AK32
TACH1 / GPIO1 (+3V) VSS[2] VSS[82]
AA22 AK34
VSS[3] VSS[83] A16 swap override Strap/Top-Block
D37 AM19 AK35
<31> SIO_EXT_SCI# TACH2 / GPIO6 (+3V) VSS[4] VSS[84]
AF48 AA24 AK38 Swap Override jumper
TP3 PCH_GPIO7 CLKOUT_PCIE7N VSS[5] VSS[85]
J32 AF47 AA26 AK43
TACH3 / GPIO7(+3V) GPIO CLKOUT_PCIE7P
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87]
AK46
F10 AA30 AK49 Low = A16 swap
<28,32> BT_OFF# GPIO8(+3V_S5) MISC AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89]
AK5 override/Top-Block
LAN_DISABLE_R# K9 U2 AA32 AK8 GNT3# Swap Override enabled
LAN_PHY_PWR_CTRL / GPIO12(+3V_S5) A20GATE EC_A20GATE <31> VSS[10] VSS[90]
A AB11 AL2 High = Default A
VSS[11] VSS[91]
<32> RF_OFF# T7 AB15 AL52
GPIO15(+3V_S5) VSS[12] VSS[92]
AB23 AM11
VSS[13] VSS[93]
AM3 CLK_CPU_BCLK# <3> AB30 BB44
CLKOUT_BCLK0_N/CLKOUT_PCIE8N VSS[14] VSS[94]
AB31 AD24
R264 0_4 PCH_GPIO17 VSS[15] VSS[95]
<17,19,31> DGPU_PWROK F38 AM1 CLK_CPU_BCLK <3> AB32 AM20
(+3V)
TACH0 / GPIO17 CLKOUT_BCLK0_P/CLKOUT_PCIE8P
AB39
VSS[16] VSS[96]
AM22 SV_SET_UP R219 10K_4
VSS[17] VSS[97] +3V
UMA remove BIOS_REC Y7 BG10 PCH_PECI_R AB43 AM24
SCLOCK / GPIO22(+3V) PECI H_PECI <3> VSS[18] VSS[98]
GPIO27 left NC for AB47
VSS[19] VSS[99]
AM26
TP6 GPIO27 AB12 T1 AB5 AM28
internal VR. GPIO27(+3V_S5) RCIN# EC_RCIN# <31> VSS[20] VSS[100]
AB8 BA42
10/25 PV modify TP_PCH_GPIO28 V13
GPIO28 (+3V_S5)
CPU PROCPWRGD
BE10 H_PWRGOOD <3> AC2
VSS[21]
VSS[22]
VSS[101]
VSS[102]
AM30 SV_SET_UP 1-X High = Strong (Default)
AC52 AM31
R420 *0_4/SSATA2GP VSS[23] VSS[103]
<36> DGPU_PWR_EN AB7 BD10 PCH_THRMTRIP#_R PM_THRMTRIP# <3,31> AD11 AM32
SATA2GP / GPIO36 (+3V) THRMTRIP# R232 56.2/F_4 VSS[24] VSS[104]
AD12 AM34
SATA3GP VSS[25] VSS[105]
UMA remove AB13
SATA3GP / GPIO37 (+3V) TP1
BA22 +1.05V_VTT AD16
VSS[26] VSS[106]
AM35
AW22 R228 56.2/F_4 AD23 AM38
LCD_BK TP2 VSS[27] VSS[107] GNT0# R271 *1K_4
<22> LCD_BK P3 BB22 AD30 AM39 <12> GNT0#
SDATAOUT0 / GPIO39(+3V) TP3 VSS[28] VSS[108] GNT1# R463 *1K_4
AY45 AD31 AM42 <12> GNT1#
TP4 VSS[29] VSS[109]
AY46 AD32 AU20
PCIE_CLK_REQ7# TP5 VSS[30] VSS[110]
<3> PCIE_CLK_REQ7# F1 AV43 AD34 AM46
PCIECLKRQ7# / GPIO46(+3V_S5) TP6 VSS[31] VSS[111]
AV45 AU22 AV22
SV_SET_UP TP7 VSS[32] VSS[112]
10/25 PV modify AB6
SDATAOUT1 / GPIO48 (+3V) TP8
AF13 AD42
VSS[33] VSS[113]
AM49
TP9
M18 AD46
VSS[34] VSS[114]
AM7 Boot BIOS Strap
<26> GPIO49 R434 *0_4/SSATA5GP AA4 N18 AD49 AA50
SATA5GP / GPIO49 (+3V) TP10 VSS[35] VSS[115] PCI_GNT0# GNT#1 Boot BIOS Location
10/25 PV modify
RSVD TP11
AJ24
AK41
AD7
AE2
VSS[36] VSS[116]
BB10
AN32
TP12 VSS[37] VSS[117] LPC
TP13
AK42 AE4
VSS[38] VSS[118]
AN50 0 0
<17> DGPU_HOLD_RST# R258 *0_4/S PCH_GPIO35 V6 (+3V) M32 AF12 AN52
SATACLKREQ# / GPIO35 TP14 VSS[39] VSS[119] Reserved (NAND)
TP15
N32 Y13
VSS[40] VSS[120]
AP12 0 1
UMA remove TP16
M30 AH49
VSS[41] VSS[121]
AP42
BOARD_ID0 H10 (+3V_S5) N30 AU4 AP46 1 0 PCI
BOARD_ID1 GPIO24 TP17 VSS[42] VSS[122]
H3 (+3V_S5)
PCIECLKRQ6# / GPIO45 TP18
H12 AF35
VSS[43] VSS[123]
AP49
8/25 SI for H/W. BOARD_ID2 F8 (+3V_S5) AA23 AP13 AP5 1 1 SPI
BOARD_ID3 GPIO57 TP19 VSS[44] VSS[124]
M11
STP_PCI# / GPIO34
(+3V) NC_1
AB45 AN34
VSS[45] VSS[125]
AP8
BOARD_ID4 AA2 (+3V) AB38 AF45 AR2
BOARD_ID5 SATA4GP / GPIO16 NC_2 VSS[46] VSS[126]
V3
SLOAD / GPIO38
(+3V) NC_3
AB42 AF46
VSS[47] VSS[127]
AR52
B AB41 AF49 AT11 B
NC_4 VSS[48] VSS[128]
T39 AF5 BA12
NC_5 VSS[49] VSS[129]
P6 AF8 AH48
+3VS5 INIT3_3V# +3V VSS[50] VSS[130]
C10 AG2 AT32
TP24 VSS[51] VSS[131]
8/25 SI for H/W. AG52
VSS[52] VSS[132]
AT36
A4 BH2 EC_RCIN# R203 10K_4 AH11 AT41
R235 10K_4 TP_PCH_GPIO28 VSS_NCTF_1 VSS_NCTF_16 EC_A20GATE R426 10K_4 VSS[53] VSS[133]
A49 BH52 AH15 AT47
VSS_NCTF_2 VSS_NCTF_17 VSS[54] VSS[134]
A5 BH53 AH16 AT7
VSS_NCTF_3 VSS_NCTF_18 SATA2GP R224 *10K_4 VSS[55] VSS[135]
A50
A52
VSS_NCTF_4 NCTF VSS_NCTF_19
BJ1
BJ2 PCH_GPIO35 R205 10K_4
AH24
AH32
VSS[56] VSS[136]
AV12
AV16 Danbury Technology Enabled
VSS_NCTF_5 VSS_NCTF_20 VSS[57] VSS[137]
A53 BJ4 AV18 AV20
VSS_NCTF_6 VSS_NCTF_21 SATA3GP R234 10K_4 VSS[58] VSS[138] High = Enable
B2 BJ49 AH43 AV24
VSS_NCTF_7 VSS_NCTF_22 SATA5GP R435 10K_4 VSS[59] VSS[139] NV_ALE
B4 BJ5 AH47 AV30
VSS_NCTF_8 VSS_NCTF_23 BMBUSY# R427 10K_4 VSS[60] VSS[140] Low = Disable
B52 BJ50 AH7 AV34
VSS_NCTF_9 VSS_NCTF_24 SIO_EXT_SMI# R261 10K_4 VSS[61] VSS[141]
B53 BJ52 AJ19 AV38
VSS_NCTF_10 VSS_NCTF_25 SIO_EXT_SCI# R263 10K_4 VSS[62] VSS[142]
BE1 BJ53 AJ2 AV42
VSS_NCTF_11 VSS_NCTF_26 BT_OFF# R255 10K_4 VSS[63] VSS[143]
BE53 D1 AJ20 AV46
VSS_NCTF_12 VSS_NCTF_27 LCD_BK R432 10K_4 VSS[64] VSS[144] DMI Termination Voltage
BF1 D2 AJ22 AV49
VSS_NCTF_13 VSS_NCTF_28 VSS[65] VSS[145]
BF53 D53 AJ23 AV5
VSS_NCTF_14 VSS_NCTF_29 VSS[66] VSS[146]
BH1 E1 AJ26 AV8
VSS_NCTF_15 VSS_NCTF_30 PCH_GPIO17 R265 10K_4 VSS[67] VSS[147] Set to Vcc when LOW
E53 AJ28 AW14
VSS_NCTF_31 VSS[68] VSS[148] NV_CLE
AJ32 AW18
IbexPeak-M_Rev1_0 VSS[69] VSS[149] Set to Vcc/2 when HIGH
AJ34 AW2
VSS[70] VSS[150]
AT5 BF9
VSS[71] VSS[151]
AJ4 AW32
VSS[72] VSS[152]
AK12 AW36
+3V +3VS5 VSS[73] VSS[153]
AM41 AW40
VSS[74] VSS[154]
AN19 AW52
VSS[75] VSS[155]
AK26 AY11
BIOS_REC R222 10K_4 RF_OFF# R221 1K_4 VSS[76] VSS[156]
BIOS RECOVERY
AK22
AK23
VSS[77] VSS[157]
AY43
AY47
No Reboot Strap
VSS[78] VSS[158]
HIGH : DISABLE AK28
VSS[79]
LOW : ENABLE LAN_DISABLE_R# R196 10K_4
IbexPeak-M_Rev1_0

<10,27> ACZ_SPKR +3V


C *1K_4 R430 C

50%31 ,' ,' ,' ,' ,' ,' %RDUG,' ,' ,' ,' ,' ,' ,'
+3VS5

58 5' <10,31> GPIO33_E R253 *100K_4


80$ *3,2 *3,2 *3,2 *3,2 *3,2 *3,2
R207 10K_4 BOARD_ID0 R206 *10K_4
31R12MB0000 (PIM) 0 0 0 0 0 0  80$ 58 5'
31R12MB0010 (PDT) 0 0 0 0 0 0 80$',6  'LV
R419 10K_4 BOARD_ID1 R437 *10K_4
6H\PRXU;7   58 5' <3,5,6,14,31,34,35,36,40> +1.05V_VTT
+\QL[   
R214 *10K_4 BOARD_ID2 R213 10K_4
<5,14,34> +1.8V
<2,3,10,11,12,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V
 1R 58 5'
+3V
31R12MB0020 (PIM) 1 0 0 0 0 0 <3,10,11,12,14,17,28,33,34,36,38,40> +3VS5
31R12MB0030 (PDT) 1 0 0 0 0 0 5HVHUYH  <HV
R202 *10K_4 BOARD_ID3 R218 10K_4
6DPVXQJ  1R 58 5'
31R12MB0040 (PIM) 1 0 0 0 0 0
5HVHUYH  <HV
R424 *10K_4 BOARD_ID4 R204 10K_4
31R12MB0050 (PDT) 1 0 0 0 0 0  1R 58 5'
5HVHUYH  <HV
+\QL[* R428 *10K_4 BOARD_ID5 R431 10K_4
 1R
31R12MB0060 (PIM)
31R12MB0070 (PDT)
1
1
0
0
0
0
0
0
0
0
0
0
5HVHUYH  <HV 8/25 SI for H/W.

6DPVXQJ*
31R12MB0080 (PIM) 1 0 0 0 0 0 BOARD_ID1HIGHRockey 1.1
31R12MB0090 (PDT) 1 0 0 0 0 0

D D

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
PCH 4/5 (GPIO & Strap)
Date: Tuesday, February 15, 2011 Sheet 13 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

14
8/25 SI modify
Uninstall on UMA
Install on DIS

R466 *0_6 +3V


U24G POWER +3V_LDO
DIS UMA U24J POWER
+1.05V 1.524A
C4631U/6.3V_4
AB24
VCCCORE[1] VCCADAC[1]
AE50 C683
C671
10U/6.3V_8
0.1U/10V_4 TP17 VCCACLK
Ibex-M
10 OF 10VCCIO[5] 3.208A
VCCCORE[2] Ibex-M
AB26 AP51 V24
A
C453 10U/6.3VS_6 AB28 7 OF 10 AE52 C670 0.01U/25V_4 Ra 0 ohm NA VCCACLK[1]
V26
+1.05V A
VCCCORE[3] VCCADAC[2] VCCIO[6] C452 1U/6.3V_4
AD26 AP53 Y24
AD28
VCCCORE[4]
AF53 Rb NA 0 ohm DCPSUSBYP Y20
VCCACLK[2] VCCIO[7]
Y26
VCCCORE[5] CRT VSSA_DAC[1] C431 0.1U/10V_4 DCPSUSBYP VCCIO[8]
AF26
AF28
VCCCORE[6]
AF51
Rc 0 ohm NA USB V28 0.163A
VCCCORE[7] VSSA_DAC[2] VCCSUS3_3[1] +3VS5
AF30 U28
AF31
VCCCORE[8]
Ra
Rd NA 0 ohm VCCSUS3_3[2]
U26 C439 0.1U/10V_4
VCCCORE[9] VCCSUS3_3[3] C454 0.1U/10V_4
AH26 AH38 Rb +3V +1.05V AF23 U24
VCCCORE[10] VCCALVDS VCCLAN[1] VCCSUS3_3[4] C445 *0.033U/10V_4
AH28 AH39 P28
VCCCORE[11] VSSA_LVDS VCCSUS3_3[5]
AH30
VCCCORE[12] LVDS Rc AF24
VCCLAN[2] VCCSUS3_3[6]
P26
AH31
VCCCORE[13] VCCTX_LVDS[1]
AP43
C412 10U/6.3V_8
Rd +1.8V VCCSUS3_3[7]
N28
AJ30 AP45 N26
VCCCORE[14] VCCTX_LVDS[2] C477 0.1U/10V_4 C470 22U/6.3VS_8 VCCSUS3_3[8]
AJ31 AT46 AD38 M28
VCCCORE[15] VCCTX_LVDS[3] C479 0.01U/25V_4 VCCME[1] VCCSUS3_3[9]
AT45 M26
VCCTX_LVDS[4] C432 22U/6.3VS_8 VCCSUS3_3[10]
VCC CORE AD39
VCCME[2] VCCSUS3_3[11]
L28
L26
+1.05V 3.208A AK24
VCCIO[24] VCC3_3[2]
AB34 0.357A +3V C466 1U/6.3V_4 AD41
VCCME[3]
VCCSUS3_3[12]
VCCSUS3_3[13]
J28
J26
+V1.1LAN_VCCAPLL_EXP C469 1U/6.3V_4 VCCSUS3_3[14]
TP14 BJ24 AB35 AF43 H28
VCCAPLLEXP VCC3_3[3] C475 0.1U/10V_4 VCCME[4] VCCSUS3_3[15]
AN20
HVCMOS AD35 C440 1U/6.3V_4 AF41
VCCSUS3_3[16]
H26
G28
+1.05V 3.208A
C451 10U/6.3VS_6
AN22
VCCIO[25]
VCCIO[26]
VCC3_3[4]
C435 *0.1U/25V_4
VCCME[5] VCCSUS3_3[17]
VCCSUS3_3[18]
G26
AN23 AF42 F28

Clock and Miscellaneous


C448 1U/6.3V_4 VCCIO[27] VCCME[6] VCCSUS3_3[19]
AN24
VCCIO[28] SI EMI request VCCSUS3_3[20]
F26
C441 1U/6.3V_4 AN26 V39 E28
C437
C426
1U/6.3V_4
1U/6.3V_4
AN28
VCCIO[29]
VCCIO[30] VCCVRM[2]
AT24 0.035A +1.8V
VCCME[7] VCCSUS3_3[21]
VCCSUS3_3[22]
E26
BJ26 V41 C28
C425
C446
0.1U/10V_4
0.1U/10V_4
BJ28
VCCIO[31]
VCCIO[32] VCCDMI[1]
AT16 0.061A +1.05V_VTT
VCCME[8] VCCSUS3_3[23]
VCCSUS3_3[24]
C26
B
C443 0.1U/10V_4
AT26
AT28
VCCIO[33] DMI AU16
V42
VCCME[9] VCCSUS3_3[25]
B27
A28
B
VCCIO[34] VCCDMI[2] C430 1U/6.3V_4 VCCSUS3_3[26]
AU26 Y39 A26
VCCIO[35] VCCME[10] VCCSUS3_3[27]
AU28
VCCIO[36]
AV26 Y41 U23
VCCIO[37] VCCME[11] VCCSUS3_3[28]
AV28
AW26
VCCIO[38] PCI E* VCCPNAND[1]
AM16
AK16 Y42 V23 3.208A
VCCIO[39] VCCPNAND[2] VCCME[12] VCCIO[56] +1.05V
AW28 AK20
BA26
VCCIO[40] VCCPNAND[3]
AK19 0.156A +1.8V +VCCRTCEXT V9 F24 R244 >1mA
100_4 +5VS5
VCCIO[41] VCCPNAND[4] C415 0.1U/10V_4 DCPRTC V5REF_SUS
BA28 AK15
VCCIO[42] VCCPNAND[5] D4 RB500V-40 +3VS5
BB26 AK13
BB28
VCCIO[43]
VCCIO[44]
VCCPNAND[6]
VCCPNAND[7]
AM12 C422 0.1U/10V_4
0.073A +1.8V 0.072A AU24
VCCVRM[3] C447 1U/6.3V_4
BC26
VCCIO[45] VCCPNAND[8]
AM13 10/25 PV modify
BC28 AM15 C420 0.1U/10V_4
VCCIO[46] VCCPNAND[9] L40 *0_6/S +VCCADPLLA +V5REF_SUS
BD26 EMI request BB51
BD28
VCCIO[47]
VCCIO[48]
+1.05V
C487 1U/6.3V_4 BB53
VCCADPLLA[1]
VCCADPLLA[2]
>1mA
BE26 NAND / SPI K49 R273 100_4 +5V
VCCIO[49] V5REF
BE28
VCCIO[50] L41 *0_6/S +VCCADPLLB D5 RB500V-40
BG26 AM8 BD51
BG28
BH27
VCCIO[51]
VCCIO[52]
VCCME3_3[1]
VCCME3_3[2]
AM9
AP11
0.085A +3V 3.208A C486 1U/6.3V_4 BD53
VCCADPLLB[1]
VCCADPLLB[2] PCI/GPIO/LPC
C484 1U/6.3V_4
+3V

VCCIO[53] VCCME3_3[3] R245 *0_4/S +1.05V_HDMI1 +V5REF


AN30 AP9 +1.05V AH23
VCCIO[54] VCCME3_3[4] C417 0.1U/10V_4 C433 1U/6.3V_4 VCCIO[21]
AN31 AJ35 J38

0.357A
VCCIO[55] C434 1U/6.3V_4 AH35
VCCIO[22]
VCCIO[23]
VCC3_3[8]
VCC3_3[9]
L38
+3V
0.357A
+3V AN35 AF34 M36
VCC3_3[1] PV modify R252 *0_4/S +1.05V_HDMI2 VCCIO[2] VCC3_3[10] C462 0.1U/10V_4
AH34 N36
C457 1U/6.3V_4 VCCIO[3] VCC3_3[11] C468 0.1U/10V_4
AF32 P36
+1.8V 0.035A AT22
VCCVRM[1]
VCCIO[4] VCC3_3[12]
VCC3_3[13]
U35
FDI AD13
+V1.1LAN_VCCAPLL_FDI C419 0.1U/10V_4 +VCCSST VCC3_3[14]
C TP5 BJ18 V12 C
VCCFDIPLL DCPSST
+1.05V 3.208A AM23
VCCIO[1] C427
+V1.1LAN_INT_VCCSUS Y22
0.1U/10V_4 DCPSUS
IbexPeak-M_Rev1_0
P18
PCI/GPIO/LPC VCCSATAPLL[1]
AK3
AK1
3.208A
+V1.1LAN_VCCAPLL
+3VS5 0.163A U19
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSATAPLL[2] TP11

U20
C442 0.1U/10V_4 VCCSUS3_3[31]
U22 AT20 +1.8V
VCCSUS3_3[32] VCCVRM[4]

UMA Only, If have power noise issue then stuff it. V15
V16
VCC3_3[5] VCCIO[9]
AH22
AH19
0.035A +1.05V
+5V
U26
+3V_LDO
+3V 0.357A
C424 0.1U/10V_4
Y16
VCC3_3[6]
VCC3_3[7]
VCCIO[10]
VCCIO[11]
AD20 C421 1U/6.3V_4
AF22
G910T21U VCCIO[12]
AD19
3
Vin Vout
1 +1.05V_VTT >1mA
C416 4.7U/6.3V_6
AT18
V_CPU_IO[1]
VCCIO[13]
VCCIO[14]
AF20
AU18 SATA AF19
GND

C418 0.1U/10V_4 V_CPU_IO[2] VCCIO[15]


C423 0.1U/10V_4
CPU VCCIO[16]
AH20
AB19
C692 VCCIO[17]
AB20
2mA
2

1U/6.3V_4 VCCIO[18]
+RTC_CELL A12 AB22
C661 0.1U/10V_4 VCCRTC VCCIO[19]
RTC VCCIO[20]
AD22
C662 0.1U/10V_4
8/25 SI modify
Install LDO when UMA +3VS5 6mA L30
VCCSUSHDA VCCME[13]
AA34 1.998A +1.05V
Y34
C444 1U/6.3V_4 VCCME[14]
HDA VCCME[15]
Y35
AA35
VCCME[16]

D D
IbexPeak-M_Rev1_0

<2,10,11,12,41> +1.05V 352-(&75'


4XDQWD&RPSXWHU,QF
<3,5,6,13,31,34,35,36,40> +1.05V_VTT
<5,34> +1.8V
<2,3,10,11,12,13,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V
<3,10,11,12,13,17,28,33,34,36,38,40> +3VS5
<23,24,25,27,30,32,38> +5V Size Document Number Rev
Custom 1A
<22,28,33,34,35,36,37,38,40,41> +5VS5 PCH 5/5 (POWER)
Date: Tuesday, February 15, 2011 Sheet 14 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

15
JDIM1A M_A_DQ[63:0] <4>
<4> M_A_A[15:0]
A
M_A_A0 98 5 M_A_DQ0 A
M_A_A1 A0 DQ0 M_A_DQ1 +1.5VSUS
97 7
M_A_A2 A1 DQ1 M_A_DQ2
96 15
M_A_A3 A2 DQ2 M_A_DQ3
95 17
M_A_A4 A3 DQ3 M_A_DQ4
92 4
M_A_A5 A4 DQ4 M_A_DQ5 JDIM1B
91 6
M_A_A6 A5 DQ5 M_A_DQ6
90 16 75 44
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16
86 18 76 48
M_A_A8 A7 DQ7 M_A_DQ8 VDD2 VSS17
89 21 81 49
M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18
85 23 82 54
M_A_A10 A9 DQ9 M_A_DQ10 VDD4 VSS19
107 33 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20
84 35 88 60
M_A_A12 A11 DQ11 M_A_DQ12 VDD6 VSS21
83 22 93 61
SO-DIMMA SPD Address is 0XA0 M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD7 VSS22
119 24 94 65
M_A_A14 A13 DQ13 M_A_DQ14 VDD8 VSS23
SO-DIMMA TS Address is 0X30 80 34 99 66
M_A_A15 A14 DQ14 M_A_DQ15 VDD9 VSS24
78 36 100 71
A15 DQ15 M_A_DQ16 VDD10 VSS25
39 105 72
DQ16 M_A_DQ17 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


<4> M_A_BS#0 109 41 106 127
BA0 DQ17 M_A_DQ18 VDD12 VSS27
108 51 111 128

PC2100 DDR3 SDRAM SO-DIMM


<4> M_A_BS#1 BA1 DQ18 VDD13 VSS28
79 53 M_A_DQ19 112 133
<4> M_A_BS#2 BA2 DQ19 VDD14 VSS29
114 40 M_A_DQ20 117 134
<4> M_A_CS#0 S0# DQ20 VDD15 VSS30
<4> M_A_CS#1 121 42 M_A_DQ21 118 138
S1# DQ21 M_A_DQ22 VDD16 VSS31 +0.75V_DDR_VTT
<4> M_A_CLK0 101 50 123 139
CK0 DQ22 M_A_DQ23 VDD17 VSS32
<4> M_A_CLK0# 103 52 124 144
CK0# DQ23 M_A_DQ24 VDD18 VSS33
<4> M_A_CLK1 102 57 145
CK1 DQ24 M_A_DQ25 VSS34
<4> M_A_CLK1# 104 59 +3V 199 150
CK1# DQ25 M_A_DQ26 VDDSPD VSS35 R157
<4> M_A_CKE0 73 67 151
CKE0 DQ26 M_A_DQ27 VSS36
<4> M_A_CKE1 74 69 77 155 22_4
CKE1 DQ27 M_A_DQ28 for S3 power reduction NC1 VSS37
<4> M_A_CAS# 115 56 122 156
CAS# DQ28 M_A_DQ29 NC2 VSS38
B <4> M_A_RAS# 110 58 125 161 B
RAS# DQ29 M_A_DQ30 NCTEST VSS39
<4> M_A_WE# 113 68 162

3
R375 10K_4 DIMM0_SA0 WE# DQ30 M_A_DQ31 PM_EXTTS#0 VSS40
197
SA0 DQ31
70 <3,16> PM_EXTTS#0 198
EVENT# VSS41
167 SI modify
R380 10K_4 DIMM0_SA1 201 129 M_A_DQ32 <3,16> DDR3_DRAMRST# 30 168
SA1 DQ32 M_A_DQ33 R48 1K_4 RESET# VSS42
<2,11,16> CGCLK_SMB 202 131 +1.5VSUS 172
SCL DQ33 M_A_DQ34 VSS43
<2,11,16> CGDAT_SMB 200 141 173 <6,38> MAINON_G 2
SDA DQ34 M_A_DQ35 SMDDR_VREF_DQ0 VSS44
143 1 178
DQ35 M_A_DQ36 SMDDR_VREF_DIMM VREF_DQ VSS45
<4> M_A_ODT0 116 130 126 179
ODT0 DQ36 M_A_DQ37 VREF_CA VSS46 Q11
<4> M_A_ODT1 120 132 184
ODT1 DQ37 M_A_DQ38 VSS47 2N7002E
<4> M_A_DM[7:0] 140 185

1
M_A_DM0 DQ38 M_A_DQ39 VSS48
11 142 2 189
M_A_DM1 DM0 DQ39 M_A_DQ40 VSS1 VSS49
28 147 3 190
M_A_DM2 DM1 DQ40 M_A_DQ41 VSS2 VSS50
46 149 8 195
M_A_DM3 DM2 DQ41 M_A_DQ42 VSS3 VSS51

(204P)
63 157 9 196
(204P)

M_A_DM4 DM3 DQ42 M_A_DQ43 VSS4 VSS52 for S3 power reduction


136 159 13
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS5
153 146 14
M_A_DM6 DM5 DQ44 M_A_DQ45 VSS6
170 148 19
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS7
187 158 20
DM7 DQ46 M_A_DQ47 VSS8
<4> M_A_DQS[7:0] 160 25
M_A_DQS0 DQ47 M_A_DQ48 VSS9
12 163 26 203 +0.75V_DDR_VTT
M_A_DQS1 DQS0 DQ48 M_A_DQ49 VSS10 VTT1
29 165 31 204
M_A_DQS2 DQS1 DQ49 M_A_DQ50 VSS11 VTT2
47 175 32
M_A_DQS3 DQS2 DQ50 M_A_DQ51 VSS12
64 177 37
DQS3 DQ51 VSS13

C378

C379
M_A_DQS4 137 164 M_A_DQ52 38
M_A_DQS5 DQS4 DQ52 M_A_DQ53 VSS14
154 166 43

GND

GND
M_A_DQS6 DQS5 DQ53 M_A_DQ54 VSS15 0510 add for WiMAX
171 174
M_A_DQS7 DQS6 DQ54 M_A_DQ55

*15P/50V_4

*15P/50V_4
<4> M_A_DQS#[7:0] 188 176
M_A_DQS#0 DQS7 DQ55 M_A_DQ56 DDR3-DIMM0
10 181

205

206
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57
27 183
M_A_DQS#2 DQS#1 DQ57 M_A_DQ58
C 45 191 C
M_A_DQS#3 DQS#2 DQ58 M_A_DQ59
62 193
M_A_DQS#4 DQS#3 DQ59 M_A_DQ60
135 180
M_A_DQS#5 DQS#4 DQ60 M_A_DQ61
152 182
M_A_DQS#6 DQS#5 DQ61 M_A_DQ62
169 192
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63
186 194
DQS#7 DQ63

DDR3-DIMM0 +1.5VSUS

Place these Caps near So-Dimm0. 0511 add for WiMAX


Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30% +1.5VSUS R35
1K/F_4
+1.5VSUS
+0.75V_DDR_VTT SMDDR_VREF_DQ0
C210 10U/6.3VS_6
C185 10U/6.3VS_6 C365 1U/6.3V_4
C234 *100P/50V_4

C222 *100P/50V_4
*6.8P/50V_4

*6.8P/50V_4

2
C166 10U/6.3VS_6 C381 1U/6.3V_4 C296 470P/50V_4
SMDDR_VREF_DIMM <16>
C221 10U/6.3VS_6 C380 1U/6.3V_4 R40 C34 C46 R111 *0_4/S DDR_VTTREF <37>
C254 10U/6.3VS_6 C366 1U/6.3V_4 1K/F_4 0.1U/10V_4 *0.047U/10V_4 R105 *10K/F_4 +1.5VSUS

1
C232 10U/6.3VS_6 C360 *10U/6.3V_8 R109 *10K/F_4
C156 0.1U/10V_4 C387 *10U/6.3V_8
C253

C173

C197 0.1U/10V_4 C370 10U/6.3VS_6


C172 0.1U/10V_4 C367 1 2 *0.047U/10V_4
C192 0.1U/10V_4 C382 1 2*0.047U/10V_4
C267 0.1U/10V_4 <16,37,38> +0.75V_DDR_VTT
C152 2 1 *0.047U/10V_4 <3,6,16,36,37,38> +1.5VSUS
C244 2 1 *0.047U/10V_4 <2,3,10,11,12,13,14,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V
D D

SMDDR_VREF_DQ0 <31,33,39> +5VPCU

C33 0.1U/10V_4
C29 2.2U/6.3V_6
352-(&75'
+3V SMDDR_VREF_DIMM
4XDQWD&RPSXWHU,QF
C352 2.2U/6.3V_6 C308 0.1U/10V_4
C368 *0.1U/10V_4 C334 2.2U/6.3V_6 Size Document Number Rev
C358 2 1 *0.047U/10V_4 C324 1 2*0.047U/10V_4 Custom 1A
DDR3 DIMM-0
Date: Tuesday, February 15, 2011 Sheet 15 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

16
JDIM2A M_B_DQ[63:0] <4>
<4> M_B_A[15:0] +1.5VSUS
M_B_A0 98 5 M_B_DQ0
M_B_A1 A0 DQ0 M_B_DQ1
A 97 7 A
M_B_A2 A1 DQ1 M_B_DQ2
96 15
M_B_A3 A2 DQ2 M_B_DQ3
95 17 JDIM2B
M_B_A4 A3 DQ3 M_B_DQ4
92 4
M_B_A5 A4 DQ4 M_B_DQ5
91 6 75 44
M_B_A6 A5 DQ5 M_B_DQ6 VDD1 VSS16
90 16 76 48
M_B_A7 A6 DQ6 M_B_DQ7 VDD2 VSS17
86 18 81 49
M_B_A8 A7 DQ7 M_B_DQ8 VDD3 VSS18
89 21 82 54
M_B_A9 A8 DQ8 M_B_DQ9 VDD4 VSS19
85 23 87 55
M_B_A10 A9 DQ9 M_B_DQ10 VDD5 VSS20
107 33 88 60
M_B_A11 A10/AP DQ10 M_B_DQ11 VDD6 VSS21
84 35 93 61
M_B_A12 A11 DQ11 M_B_DQ12 VDD7 VSS22
83 22 94 65
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD8 VSS23
119 24 99 66
M_B_A14 A13 DQ13 M_B_DQ14 VDD9 VSS24
80 34 100 71
M_B_A15 A14 DQ14 M_B_DQ15 VDD10 VSS25
78 36 105 72
A15 DQ15 M_B_DQ16 VDD11 VSS26
39 106 127
DQ16 M_B_DQ17 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


109 41 111 128

PC2100 DDR3 SDRAM SO-DIMM


<4> M_B_BS#0 BA0 DQ17 VDD13 VSS28
<4> M_B_BS#1 108 51 M_B_DQ18 112 133
BA1 DQ18 M_B_DQ19 VDD14 VSS29
<4> M_B_BS#2 79 53 117 134
BA2 DQ19 M_B_DQ20 VDD15 VSS30
<4> M_B_CS#0 114 40 118 138
S0# DQ20 M_B_DQ21 VDD16 VSS31
<4> M_B_CS#1 121 42 123 139
S1# DQ21 M_B_DQ22 VDD17 VSS32
<4> M_B_CLK0 101 50 124 144
CK0 DQ22 M_B_DQ23 VDD18 VSS33
<4> M_B_CLK0# 103 52 145
CK0# DQ23 M_B_DQ24 VSS34
<4> M_B_CLK1 102 57 +3V 199 150
CK1 DQ24 M_B_DQ25 VDDSPD VSS35
<4> M_B_CLK1# 104 59 151
CK1# DQ25 M_B_DQ26 VSS36
<4> M_B_CKE0 73 67 77 155
CKE0 DQ26 M_B_DQ27 NC1 VSS37
<4> M_B_CKE1 74 69 122 156
CKE1 DQ27 M_B_DQ28 NC2 VSS38
<4> M_B_CAS# 115 56 125 161
CAS# DQ28 M_B_DQ29 NCTEST VSS39
<4> M_B_RAS# 110 58 162
RAS# DQ29 M_B_DQ30 VSS40
B <4> M_B_WE# 113 68 <3> PM_EXTTS#1 198 167 B
R162 10K_4 DIMM1_SA0 197 WE# DQ30 M_B_DQ31 EVENT# VSS41
70 <3,15> DDR3_DRAMRST# 30 168
SA0 DQ31 RESET# VSS42
+3V R171 10K_4 DIMM1_SA1 201
SA1 DQ32
129 M_B_DQ32
VSS43
172
<2,11,15> CGCLK_SMB 202 131 M_B_DQ33 173
SCL DQ33 M_B_DQ34 SMDDR_VREF_DQ1 VSS44
<2,11,15> CGDAT_SMB 200 141 1 178
SDA DQ34 M_B_DQ35 VREF_DQ VSS45
143 <15> SMDDR_VREF_DIMM 126 179
DQ35 M_B_DQ36 VREF_CA VSS46
<4> M_B_ODT0 116 130 184
ODT0 DQ36 M_B_DQ37 VSS47
<4> M_B_ODT1 120 132 185
ODT1 DQ37 M_B_DQ38 VSS48
<4> M_B_DM[7:0] 140 2 189
M_B_DM0 DQ38 M_B_DQ39 VSS1 VSS49
11 142 3 190
SO-DIMMB SPD Address is 0XA4 M_B_DM1 DM0 DQ39 M_B_DQ40 VSS2 VSS50
28 147 8 195
M_B_DM2 DM1 DQ40 M_B_DQ41 VSS3 VSS51
SO-DIMMB TS Address is 0X34 46 149 9 196

(204P)
M_B_DM3 DM2 DQ41 M_B_DQ42 VSS4 VSS52
63 157 13
(204P)

M_B_DM4 DM3 DQ42 M_B_DQ43 VSS5


136 159 14
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS6
153 146 19
M_B_DM6 DM5 DQ44 M_B_DQ45 +1.5VSUS VSS7
170 148 20
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS8
187 158 25
DM7 DQ46 M_B_DQ47 VSS9
<4> M_B_DQS[7:0] 160 26 203 +0.75V_DDR_VTT
M_B_DQS0 DQ47 M_B_DQ48 VSS10 VTT1
12 163 31 204
M_B_DQS1 DQS0 DQ48 M_B_DQ49 VSS11 VTT2
29 165 32
M_B_DQS2 DQS1 DQ49 M_B_DQ50 R39 VSS12
47 175 37
M_B_DQS3 DQS2 DQ50 M_B_DQ51 1K/F_4 VSS13
64 177 38
M_B_DQS4 DQS3 DQ51 M_B_DQ52 VSS14

GND

GND
137 164 43
M_B_DQS5 DQS4 DQ52 M_B_DQ53 SMDDR_VREF_DQ1 VSS15
154 166
M_B_DQS6 DQS5 DQ53 M_B_DQ54
171 174
M_B_DQS7 DQS6 DQ54 M_B_DQ55 DDR3-DIMM1
<4> M_B_DQS#[7:0] 188 176

205

206
2
M_B_DQS#0 DQS7 DQ55 M_B_DQ56
10 181
M_B_DQS#1 DQS#0 DQ56 M_B_DQ57 R41 C35 C51
27 183
M_B_DQS#2 DQS#1 DQ57 M_B_DQ58 1K/F_4 0.1U/10V_4
45 191 *0.047U/10V_4

1
M_B_DQS#3 DQS#2 DQ58 M_B_DQ59
C 62 193 C
M_B_DQS#4 DQS#3 DQ59 M_B_DQ60
135 180
M_B_DQS#5 DQS#4 DQ60 M_B_DQ61
152 182
M_B_DQS#6 DQS#5 DQ61 M_B_DQ62
169 192
M_B_DQS#7 DQS#6 DQ62 M_B_DQ63
186 194
DQS#7 DQ63
U14
DDR3-DIMM1 C559 *0.01U/25V_4
SI modify MBCLK2 8 1
<11,31> MBCLK2 SCLK VCC +3V
DDR_THERMDA
Place these Caps near So-Dimm1. <11,31> MBDATA2 MBDATA2 7 2

3
SDA DXP Q23
Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30% PM_EXTTS#0_Q 6 3 C558 2
ALERT# DXN *MMBT3904-7-F
PM_EXTTS#1_Q 4 5 *2200P/50V_4

1
+1.5VSUS +0.75V_DDR_VTT +3V OVERT# GND
DDR_THERMDC
C273 10U/6.3VS_6 C364 1U/6.3V_4 *G780P81U
C208 10U/6.3VS_6 C363 1U/6.3V_4 8/25 SI for H/W.
C170 10U/6.3VS_6 C621 1U/6.3V_4 $''5(66+

2
C263 10U/6.3VS_6 C362 1U/6.3V_4 SMDDR_VREF_DIMM
C231 10U/6.3VS_6 C359 *10U/6.3V_8 8/25 SI for H/W.
C191 10U/6.3VS_6 C635 10U/6.3VS_6 C343 0.1U/10V_4 1 3 PM_EXTTS#0_Q
C196 0.1U/10V_4 C384 10U/6.3VS_6 C342 2.2U/6.3V_6 <3,15> PM_EXTTS#0
C218 0.1U/10V_4 C376 1 2*0.047U/10V_4 C344 1 2*0.047U/10V_4
C184 0.1U/10V_4 C377 1 2*0.047U/10V_4 8/25 SI for H/W. Q19 *BSS138_NL
C246 0.1U/10V_4
C161 0.1U/10V_4 SMDDR_VREF_DQ1 8/25 SI for H/W.
C375 0.1U/10V_4
+3V <15,37,38> +0.75V_DDR_VTT
C289 1 2 *0.047U/10V_4 C32 0.1U/10V_4 <3,6,15,36,37,38> +1.5VSUS
D D
C155 1 2 *0.047U/10V_4 C625 0.1U/10V_4 C28 2.2U/6.3V_6 <2,3,10,11,12,13,14,15,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V
C288 0.1U/10V_4 <31,33,39> +5VPCU

2
EMI request
<3> PM_EXTTS#1
1 3 PM_EXTTS#1_Q
352-(&75'
+3V
Q20 *BSS138_NL
4XDQWD&RPSXWHU,QF
C350 2.2U/6.3V_6
C354 *0.1U/10V_4 8/25 SI for H/W. Size Document Number Rev
C353 1 2*0.047U/10V_4 Custom 1A
DDR3 DIMM-1
Date: Tuesday, February 15, 2011 Sheet 16 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+1.05V_GFX ~C5007
500mA AC9
U5001A

PBGA533-NVIDIA-GEFORCE6250
N10M

1/13 PCI_EXPRESS
AE9 PEX_CLKREQ# R5001 10K/F_4 +3V_GFX

0.1U/10V_4 PEX_IOVDD_01 PEX_CLKREQ R5002 100/F_4
AD7 AD9 VGA_RST# PEGX_RST#
C5008 0.1U/10V_4 PEX_IOVDD_02 PEX_RST*
AD8
C5009
C5001
C5002
1U/6.3V_4
1U/6.3V_4
4.7U/6.3V_6
AE7
AF7
PEX_IOVDD_03
PEX_IOVDD_04
PEX_IOVDD_05 PEX_REFCLK
AB10
C5000 *0.1U/10V_4
CLK_PCIE_VGA <11>
power up sequence
AG7 PEX_IOVDD_06 PEX_REFCLK* AC10 CLK_PCIE_VGA# <11>
C5003 22U/6.3V_8
A A
C5010 10U/6.3V_8 AD10 C_PEG_RX0 C5151 0.1U/10V_4
PEX_TX0 PEG_RX0 <3>
AB13 AD11 C_PEG_RX#0 C5156 0.1U/10V_4
PEX_IOVDDQ_01 PEX_TX0* PEG_RX#0 <3>
AB16 AD12 C_PEG_RX1 C5155 0.1U/10V_4
+1.05V_GFX 1600mA
C5014 0.1U/10V_4
AB17
PEX_IOVDDQ_02
PEX_IOVDDQ_03
PEX_TX1
PEX_TX1* AC12 C_PEG_RX#1
C_PEG_RX2
C5157
C5159
0.1U/10V_4
0.1U/10V_4
PEG_RX1
PEG_RX#1
<3>
<3>
AB7 AB11 PEG_RX2 <3>
C5016 0.1U/10V_4 PEX_IOVDDQ_04 PEX_TX2 C_PEG_RX#2 C5161 0.1U/10V_4
AB8 PEX_IOVDDQ_05 PEX_TX2* AB12 PEG_RX#2 <3>
C5018 1U/6.3V_4 AB9 AD13 C_PEG_RX3 C5154 0.1U/10V_4
PEX_IOVDDQ_06 PEX_TX3 PEG_RX3 <3>
C5005 1U/6.3V_4 AC13 AD14 C_PEG_RX#3 C5162 0.1U/10V_4
PEX_IOVDDQ_07 PEX_TX3* PEG_RX#3 <3>
C5006 22U/6.3V_8 AC7 AD15 C_PEG_RX4 C5158 0.1U/10V_4
PEX_IOVDDQ_08 PEX_TX4 PEG_RX4 <3>
C5022 4.7U/6.3V_6 AD6 AC15 C_PEG_RX#4 C5163 0.1U/10V_4
PEX_IOVDDQ_09 PEX_TX4* PEG_RX#4 <3>
C5024 10U/6.3V_8 AE6 AB14 C_PEG_RX5 C5152 0.1U/10V_4
PEX_IOVDDQ_10 PEX_TX5 PEG_RX5 <3>
AF6 AB15 C_PEG_RX#5 C5150 0.1U/10V_4
PEX_IOVDDQ_11 PEX_TX5* PEG_RX#5 <3>
AG6 AC16 C_PEG_RX6 C5153 0.1U/10V_4
PEX_IOVDDQ_12 PEX_TX6 PEG_RX6 <3>
AD16 C_PEG_RX#6 C5148 0.1U/10V_4
PEX_TX6* PEG_RX#6 <3>
AD17 C_PEG_RX7 C5160 0.1U/10V_4
+VGA_CORE PEX_TX7 PEG_RX7 <3>
AD18 C_PEG_RX#7 C5149 0.1U/10V_4
PEX_TX7* PEG_RX#7 <3>
AC18
PLACE UNDER BALLS
C5033 0.01U/25V_4
18.19A J10 PEX_TX8
PEX_TX8*
AB18
AB19
C5035 0.01U/25V_4 VDD_01 PEX_TX9
J12 AB20
C5037 0.01U/25V_4 VDD_02 PEX_TX9*
J13 AD19
C5039 0.01U/25V_4 VDD_03 PEX_TX10
J9 AD20
C5041 0.01U/25V_4 VDD_04 PEX_TX10*
L9 AD21
C5043 0.01U/25V_4 VDD_05 PEX_TX11
M11 AC21
C5045 .047U/25V_4 VDD_06 PEX_TX11*
M17 VDD_07 PEX_TX12 AB21
C5047 .047U/25V_4 M9 AB22
C5049 .047U/25V_4 VDD_08 PEX_TX12*
N11 AC22
C5051 0.1U/10V_4 VDD_09 PEX_TX13
N12 VDD_10 PEX_TX13* AD22
C5053 4.7U/6.3V_6 N13 AD23
C5055 4.7U/6.3V_6 VDD_11 PEX_TX14
B N14 AD24 B
C5057 4.7U/6.3V_6 VDD_12 PEX_TX14*
N15 VDD_13 PEX_TX15 AE25
C5059 4.7U/6.3V_6 N16 AE26
C5061 4.7U/6.3V_6 VDD_14 PEX_TX15*
N17
C5062 10U/6.3V_8 VDD_15
N19
C5063 10U/6.3V_8 VDD_16
N9 VDD_17
P11
VDD_18
2 1 P12
VDD_19
+

P13 VDD_20
C5064 P14
*330u_2.5V_3528 VDD_21
P15 VDD_22
PLACE NEAR BALLS P16 AE12 PEG_TX0
VDD_23 PEX_RX0 PEG_TX0 <3>
P17 AF12 PEG_TX#0
VDD_24 PEX_RX0* PEG_TX#0 <3>
R11 AG12 PEG_TX1
VDD_25 PEX_RX1 PEG_TX1 <3>
R12
R13
VDD_26 PEX_RX1* AG13
AF13
PEG_TX#1
PEG_TX2
PEG_TX#1
PEG_TX2
<3>
<3>
3(;B567WLPLQJ
VDD_27 PEX_RX2 PEG_TX#2
R14 AE13 PEG_TX#2 <3>
VDD_28 PEX_RX2* PEG_TX3
R15 VDD_29 PEX_RX3 AE15 PEG_TX3 <3>
R16 AF15 PEG_TX#3
VDD_30 PEX_RX3* PEG_TX#3 <3>
R17 AG15 PEG_TX4
VDD_31 PEX_RX4 PEG_TX4 <3>
R9 AG16 PEG_TX#4 I/O 3.3V
VDD_32 PEX_RX4* PEG_TX#4 <3>
T11 AF16 PEG_TX5
VDD_33 PEX_RX5 PEG_TX5 <3>
T17 AE16 PEG_TX#5
VDD_34 PEX_RX5* PEG_TX#5 <3> +3V
T9 AE18 PEG_TX6 PEX_RST
VDD_35 PEX_RX6 PEG_TX6 <3>
U19 AF18 PEG_TX#6
VDD_36 PEX_RX6* PEG_TX#6 <3>
U9 AG18 PEG_TX7 C5065 0.1U/10V_4
W10
W12
VDD_37
VDD_38
VDD_39
PEX_RX7
PEX_RX7*
PEX_RX8
AG19
AF19
PEG_TX#7
PEG_TX7
PEG_TX#7
<3>
<3> For DIS

5
W13
VDD_40 PEX_RX8*
AE19 Trise >= 1uS Tfail <=500nS
W18 AE21 <3,11,26,29,31,32> PLTRST# 2
C VDD_41 PEX_RX9 PEGX_RST# C
W19 AF21 4
VDD_42 PEX_RX9*
W9 AG21 <13> DGPU_HOLD_RST# 1
VDD_43 PEX_RX10
AG22
GPU_VDD_SENSE PEX_RX10* U5002 R5003
W15 AF22

3
<36> GPU_VDD_SENSE VDD_SENSE PEX_RX11 MC74VHC1G08DFT2G
W16 AE22
GND_SENSE PEX_RX11* 100K/F_4
E15 AE24
VDD_SENSE PEX_RX12
E14 GND_SENSE PEX_RX12* AF24
AG24
+3V_GFX 120mA
C5066 4.7U/6.3V_6
A12 VDD33_01
PEX_RX13
PEX_RX13* AF25
B12 VDD33_02 PEX_RX14 AG25
+1.05V_GFX C5067 1U/6.3V_4 C12 AG26
C5068 0.1U/10V_4 VDD33_03 PEX_RX14*
D12 VDD33_04 PEX_RX15 AF27
C5069 0.1U/10V_4 E12 AE27
L5001 C5070 0.1U/10V_4 VDD33_05 PEX_RX15*
F12 VDD33_06
12/28 Nvidia to suggest R5009 not stuff and R5008 and Q5002 stuff.
BLM18PG121SN 120/2000mA
C5071
C5072
0.1U/10V_4
1U/6.3V_4
+PEX_PLLVDD 120mA AF9 PEX_PLLVDD
C5073 4.7U/6.3V_8 12~16
R5004
mils
*200_4 AE10
R5060 0_6 PEX_TSTCLK_OUT*
+3V_GFX AF10
PEX_TSTCLK_OUT +3VS5
C5075 0.1U/10V_4 +PEX_SVDD_3V3 AG9

12/28 for Nvidia suggest AG10


PEG_SVDD

PEX_TERMP
For DIS R5005
10K/F_4
R5006 +3V_GFX
+3V_GFX
<3,10,11,12,13,14,28,33,34,36,38,40> +3VS5
D R5007 <19,20,36> +3V_GFX D
PEG_CLKREQ# <11>
2.49K/F_4 *10K/F_4 R5008 <18,19,36> +1.05V_GFX

3
10K/F_4 <36> +VGA_CORE
<2,3,10,11,12,13,14,15,16,19,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V
<13,19,31> DGPU_PWROK R5009 CLKREQ_C1 2 Q5001
*0_4 DTC144EUA
352-(&75'
3

4XDQWD&RPSXWHU,QF

1
PEX_CLKREQ# 2 Q5002
DTC144EUA

Size Document Number Rev


1

Custom 1A
N11M-GE2(PCIEI/F)
Date: Tuesday, February 15, 2011 Sheet 17 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

2.16A
C5076
+1.5V_GFX

.047U/25V_4 A13
U5001B

PBGA533-NVIDIA-GEFORCE6250
N10M

2/13 FRAME_BUFFER
<21> VMA_DQ[63..0]
<21> VMA_DM[7..0]
<21> VMA_WDQS[7..0]
<21> VMA_RDQS[7..0]

U5001I

C5077 .047U/25V_4 FBVDDQ_01 VMA_DQ0
B13 D22
C5083 .047U/25V_4 FBVDDQ_02 FBA_D0 VMA_DQ1 N10M
PBGA533-NVIDIA-GEFORCE6250
C13 E24
C5078 0.01U/25V_4 FBVDDQ_03 FBA_D1 VMA_DQ2
D13 E22 13/13 GND_NC
C5079 0.01U/25V_4 FBVDDQ_04 FBA_D2 VMA_DQ3
D14 D24 C15
C5080 0.01U/25V_4 FBVDDQ_05 FBA_D3 VMA_DQ4 NC_01
E13 FBVDDQ_06 FBA_D4 D26 AC11 GND_01 NC_02 D15
C5082 4.7U/6.3V_6 F13 D27 VMA_DQ5 AC14 J5 R5011 10K/F_4
A
C5081 4.7U/6.3V_6 FBVDDQ_07 FBA_D5 VMA_DQ6 GND_02 (NC_03)PGOOD A
F14 FBVDDQ_08 FBA_D6 C27 AC17 GND_03
F15 B27 VMA_DQ7 AC2 nVIDIA comment 8/18
FBVDDQ_09 FBA_D7 VMA_DQ8 GND_04
F16 A21 AC20
FBVDDQ_10 FBA_D8 VMA_DQ9 GND_05
F17 FBVDDQ_11 FBA_D9 B21 AC23 GND_06
F19 C21 VMA_DQ10 AC26
FBVDDQ_12 FBA_D10 VMA_DQ11 GND_07
F22 FBVDDQ_13 FBA_D11 C19 AC5 GND_08
H23 C18 VMA_DQ12 AC8
FBVDDQ_14 FBA_D14 VMA_DQ13 GND_09
H26 FBVDDQ_15 FBA_D14 D18 AF11 GND_10
J15 B18 VMA_DQ14 AF14
FBVDDQ_16 FBA_D14 VMA_DQ15 GND_11
J16 C16 AF17
FBVDDQ_17 FBA_D15 VMA_DQ16 GND_12
J18 FBVDDQ_18 FBA_D16 E21 AF2 GND_13
J19 F21 VMA_DQ17 AF20
FBVDDQ_19 FBA_D17 VMA_DQ18 GND_14
L19 D20 AF23
FBVDDQ_20 FBA_D18 VMA_DQ19 GND_15
L23 F20 AF26
FBVDDQ_21 FBA_D19 VMA_DQ20 GND_16
L26 FBVDDQ_22 FBA_D20 D17 AF5 GND_17
M19 F18 VMA_DQ21 AF8
FBVDDQ_23 FBA_D21 VMA_DQ22 GND_18
N22 FBVDDQ_24 FBA_D22 D16 B11 GND_19
U22 E16 VMA_DQ23 FBA_CMD0 R5012 10K/F_4 B14
FBVDDQ_25 FBA_D23 VMA_DQ24 GND_20
Y22 FBVDDQ_26 FBA_D24 A22
C24 VMA_DQ25 FBA_CMD3 R5010 10K/F_4 B17
FBA_D25 VMA_DQ26 GND_21
D21 B2
FBA_D26 VMA_DQ27 FBA_CMD16 R5013 10K/F_4 GND_22
B22 B20
FBA_D27 VMA_DQ28 GND_23
<21> FBA_CMD0 G24 C22 B23
TP20 FBA_CMD1 (FBA_CMD25)FBA_CMD0 FBA_D28 VMA_DQ29 FBA_CMD19 R5014 10K/F_4 GND_24
F27 A25 B26
(FBA_CMD23)FBA_CMD1 FBA_D29 VMA_DQ30 GND_25
<21> FBA_CMD2 F25 FBA_CMD2 FBA_D30 B25 B5 GND_26
<21> FBA_CMD3 F26 A26 VMA_DQ31 FBA_CMD20 R5015 10K/F_4 B8
(FBA_CMD0)FBA_CMD3 FBA_D31 VMA_DQ32 GND_27
<21> FBA_CMD4 G26 U24 E11
(FBA_CMD10)FBA_CMD4 FBA_D32 VMA_DQ33 GND_28
<21> FBA_CMD5 G27 (FBA_CMD26)FBA_CMD5 FBA_D33 V24
<21> FBA_CMD6 G25 V23 VMA_DQ34 E17
(FBA_CMD14)FBA_CMD6 FBA_D35 VMA_DQ35 GND_30
B <21> FBA_CMD7 J25 R24 E2 B
FBA_CMD7 FBA_D35 VMA_DQ36 GND_31
<21> FBA_CMD8 J24 (FBA_CMD1)FBA_CMD8 FBA_D36 T23 E20 GND_32
<21> FBA_CMD9 H24 R23 VMA_DQ37 E23
(FBA_CMD22)FBA_CMD9 FBA_D37 VMA_DQ38 GND_33
<21> FBA_CMD10 H22 P24 E26
(FBA_CMD20)FBA_CMD10 FBA_D38 VMA_DQ39 GND_34
<21> FBA_CMD11 J26 P22 E5
(FBA_CMD24)FBA_CMD11 FBA_D39 VMA_DQ40 GND_35
<21> FBA_CMD12 G22 (FBA_CMD18)FBA_CMD12 FBA_D40 AC24 E8 GND_36
<21> FBA_CMD13 G23 AB23 VMA_DQ41 H2
(FBA_CMD9)FBA_CMD13 FBA_D41 VMA_DQ42 GND_37
<21> FBA_CMD14 J22 AB24 H5
(FBA_CMD29)FBA_CMD14 FBA_D42 VMA_DQ43 GND_38
<21> FBA_CMD15 J27 (FBA_CMD8)FBA_CMD15 FBA_D43 W24 J11 GND_39
<21> FBA_CMD16 M24 AA22 VMA_DQ44 J14
TP19 FBA_CMD17 (FBA_CMD27)FBA_CMD16 FBA_D44 VMA_DQ45 GND_40
L24 (FBA_CMD15)FBA_CMD17 FBA_D45 W23
<21> FBA_CMD18 J23 W22 VMA_DQ46 J17
(FBA_CMD11)FBA_CMD18 FBA_D46 VMA_DQ47 GND_41
<21> FBA_CMD19 K23 (FBA_CMD16)FBA_CMD19 FBA_D47 V22 K19 GND_42
<21> FBA_CMD20 K22 AA25 VMA_DQ48 K9
(FBA_CMD28)FBA_CMD20 FBA_D48 VMA_DQ49 GND_43
<21> FBA_CMD21 M23 (FBA_CMD3)FBA_CMD21 FBA_D49 W27 L11 GND_44
<21> FBA_CMD22 K24 W26 VMA_DQ50 L12
(FBA_CMD17)FBA_CMD22 FBA_D50 VMA_DQ51 GND_45
<21> FBA_CMD23 M27 W25 L13
(FBA_CMD5)FBA_CMD23 FBA_D51 VMA_DQ52 GND_46
<21> FBA_CMD24 N27 (FBA_CMD4)FBA_CMD24 FBA_D52 AB25 L14 GND_47
<21> FBA_CMD25 M26 AB26 VMA_DQ53 L15
(FBA_CMD21)FBA_CMD25 FBA_D53 VMA_DQ54 GND_48
<21> FBA_CMD26 K26 AD26 L16
(FBA_CMD6)FBA_CMD26 FBA_D54 VMA_DQ55 GND_49
<21> FBA_CMD27 K27 (FBA_CMD13)FBA_CMD27 FBA_D55 AD27 L17 GND_50
<21> FBA_CMD28 K25 V25 VMA_DQ56 L2
(FBA_CMD19)FBA_CMD28 FBA_D56 VMA_DQ57 GND_51
<21> FBA_CMD29 M25 R25 L5
(FBA_CMD12)FBA_CMD29 FBA_D57 VMA_DQ58 GND_52
<21> FBA_CMD30 L22 FBA_CMD30 FBA_D58 V26 M12 GND_53
V27 VMA_DQ59 M13
FBA_D59 VMA_DQ60 GND_54
R26 M14
FBA_D60 VMA_DQ61 GND_55
T25 M15
FBA_D61 VMA_DQ62 GND_56
FBA_D62 N25 M16 GND_57
VMA_CLK0 F24 N26 VMA_DQ63 P19
<21> VMA_CLK0 FBA_CLK0 FBA_D63 GND_58
VMA_CLK0# F23 P2
C <21> VMA_CLK0# FBA_CLK0* GND_59 C
VMA_CLK1 N24 P23
<21> VMA_CLK1 FBA_CLK1 GND_60
VMA_CLK1# N23 C26 VMA_DM0
<21> VMA_CLK1# FBA_CLK1* FBA_DQM0
B19 VMA_DM1 P26
FBA_DQM1 VMA_DM2 GND_61
D19 P5
FBA_DQM2 VMA_DM3 GND_62
D23 P9
FBA_DQM3 VMA_DM4 GND_63
T24 T12
R5016 40.2/F_4 FB_CAL_PD_VDDQ FBA_DQM4 VMA_DM5 GND_64
+1.5V_GFX B15 FB_CAL_PD_VDDQ FBA_DQM5 AA23 T13 GND_65
AB27 VMA_DM6 T14
R5017 40.2/F_4 FB_CAL_PU_GND FBA_DQM6 VMA_DM7 GND_66
A15 FB_CAL_PU_GND FBA_DQM7 T26 T15 GND_67
T16 GND_68
R5018 60.4/F_4 FB_CAL_TERM_GND B16 U11
FB_CAL_TERM_GND VMA_WDQS0 GND_69
FBA_DQS_WP0 C25 U12 GND_70
A19 VMA_WDQS1 U13
R5019 10K/F_4 FBA_DEBUG FBA_DQS_WP1 VMA_WDQS2 GND_71
+1.5V_GFX M22 (FBA_DEBUG)FBA_DEBUG0 FBA_DQS_WP2 E19 U14 GND_72
P$ FBA_DQS_WP3
A24 VMA_WDQS3
VMA_WDQS4
U15
GND_73
For debug only FBA_DQS_WP4
T22
VMA_WDQS5
U16
GND_74
FBA_DQS_WP5 AA24 U17 GND_75
AA26 VMA_WDQS6 U2
+1.05V_GFX FBA_DQS_WP5 GND_76
15mils width P$ FBA_DQS_WP7 T27 VMA_WDQS7 U23 GND_77
U26 GND_78
L5003 PBY160808T-300Y-N +FB_PLLAVDD R19 U5
FB_PLLAVDD VMA_RDQS0 GND_79
D25 V19
C5085 1U/6.3V_4 FBA_DQS_RN0 VMA_RDQS1 GND_80
30 ohm/100MHz T19
FB_DLLAVDD FBA_DQS_RN1
A18
ESR=0.03ohm E18 VMA_RDQS2 V9
C5086 0.1U/10V_4 FBA_DQS_RN2 VMA_RDQS3 GND_81
AC19 B24 W11
FB_PLLAVDD FBA_DQS_RN3 VMA_RDQS4 GND_82
FBA_DQS_RN4 R22 W14 GND_83
C5087 10U/6.3V_8 Y24 VMA_RDQS5 W17
FBA_DQS_RN5 VMA_RDQS6 GND_84
FBA_DQS_RN6 AA27 Y2 GND_85
R27 VMA_RDQS7 Y23
FBA_DQS_RN7 GND_86
D Y26 GND_87
D
Y5 GND_88
A16 +FB_VREF1 TP18
FB_VREF
12/28 Nvidia recommend
1.L5003 change to bead 30ohm (ESR=0.01) 0603. 352-(&75'
4XDQWD&RPSXWHU,QF
2.C5085 change to 1uF_X7R_0603
3.Delete C5084.

<17,19,36> +1.05V_GFX Size Document Number Rev


Custom 1A
<19,21,36> +1.5V_GFX N11M-GE2(MEMORY/GND)
Date: Tuesday, February 15, 2011 Sheet 18 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8


U5001F

PBGA533-NVIDIA-GEFORCE6250
N10M
U5001D
Optimus: 6/13 IFPAB V4 PBGA533-NVIDIA-GEFORCE6250
All unstuff , one Cap stuff 10K ohm IFPA_TXD0*
V5
N10M
IFPA_TXD0
5/13 DACC
+DACB_VDD W5 U6
DACB_VDD DACB_HSYNC
R5020 AA4 U4
IFPA_TXD1* DACB_VSYNC
AA5 T5001 R6
+IFPAB_PLLVDDAD5 IFPA_TXD1 DACB_VREF
IFPAB_PLLVDD R5021
AB6
IFPAB_RSET A T5002 V6 DACB_RSET
10K/F_4 IFPA_TXD2* Y4 DACB_RED T5
W4 10K/F_4 T4
A IFPA_TXD2 DACB_GREEN A
DACB_BLUE R4

R5022 *1K/F_4 AB5


IFPA_TXD3*
IFPA_TXD3 AB4
U5001G U5001E
N10M N10M
DATA PBGA533-NVIDIA-GEFORCE6250

Optimus: V1 PBGA533-NVIDIA-GEFORCE6250
IFPB_TXD4* 8/13 IFPE 8/13 IFPE
W1
All unstuff , one Cap stuff 10K ohm IFPB_TXD4 DVI DP DVI DP
+IFPD_PLLVDD N6 IFPE_PLLVDD D7
IFPD_PLLVDD IFPE_PLLVDD(DACB_VDD)
IFPB_TXD5* W2 T5004 M6 IFPD_RSET T5000 F8 IFPD_RSET(DACB_RSET) IFPE_AUX* G6 T5003
W3 R5024 F7
IFPB_TXD5 R5023 IFPE_AUX
R5025
B D4 10K/F_4
+IFPAB_IOVDD 10K/F_4 IFPD_AUX*
V3 IFPA_IOVDD IFPB_TXD6* AA3 IFPD_AUX D3
AA2
IFPB_TXD6
10K/F_4 V2 IFPB_IOVDD
B4 E7
TXC IFPD_L3* TXC IFPE_L3*
IFPB_TXD7* AA1 D TXC IFPD_L3 B3 E IFPE_L3 E6
AB1 TXC
IFPB_TXD7
C4 B7
TXD0 IFPD_L2* TXD0 IFPE_L2*
TXD0 C3 B6
IFPD_L2 TXD0 IFPE_L2
AD4
IFPA_TXC*
A IFPA_TXC
AC4 TXD1 IFPD_L1*
D5
IFPE_L1*
A7
CLOCK +IFPDE_IOVDD H6 E4 TXD1 A6
IFPDE_IOVDD TXD1 IFPD_L1 IFPE_L1
TXD1
AB2 F4 C6
IFPB_TXC* R5026 TXD2 IFPD_L0* TXD2 IFPE_L0*
B IFPB_TXC AB3 TXD2 IFPD_L0 F5 IFPE_L0 D6
TXD2
B 10K/F_4 B
U5001H
N10M
PBGA533-NVIDIA-GEFORCE6250
7/13 IFPC
R5027 DVI DP
+IFPC_PLLVDD P6
IFPC_PLLVDD
R5
IFPC_RSET
10K/F_4
Optimus: U5001C
G5
IFPC_AUX*
G4 All unstuff , one Cap stuff 10K ohm
IFPC_AUX N10M
PBGA533-NVIDIA-GEFORCE6250

IFPC_L3* J4 3/13 DACA


R5029 *1K/F_4 TXC H4 R5028 10K/F_4 +DACA_VDD AG2 AD2
TXC IFPC_L3 DACA_VDD DACA_HSYNC
C DACA_VSYNC
AD1
K4 C5088 *0.1U/10V_4 DACA_VREF AF1
TXD0 IFPC_L2* DACA_VREF
L4
TXD0 IFPC_L2 R5030 *124/F_4 DACA_RSET AE1
DACA_RSET
TXD1 IFPC_L1* M4 DACA_RED AE2
+IFPC_IOVDD J6 TXD1 M5 AE3
R5031 10K/F_4 IFPC_IOVDD IFPC_L1 DACA_GREEN
AD3
DACA_BLUE
IFPC_L0* N4
TXD2
IFPC_L0 P4
TXD2
12/28 for Nvidia suggest +3V_GFX

BLM18PG221SN1D 220/1400mA P$


+1.05V_GFX +NV_PLLVDD
C +3V C
P$
L5004 R5032
C5089 22U/6.3VS_8 U5001J
N10M
C5090 0.1U/10V_4 PBGA533-NVIDIA-GEFORCE6250
C5091 0.1U/10V_4 12/13 XTAL_PLL 4.7K_4
C5092 0.1U/10V_4 4.7K_4 R5033
DGPU_PWROK <13,17,31>
C5093 0.1U/10V_4 K5
PLLVDD

3
K6 Q5003 R5034
VID_PLLVDD
P$+SP_PLLVDD L6 DGPU_PGOK-1 2
100K/F_4
SP_PLLVDD

3
PV: nVidia suggest R5035 DTC144EUA

1
+1.05V_GFX 4.7K_4 DGPU_POK4 2 Q5004 C5094
R5036 10K/F_4 XTAL_SSIN D11
XTAL_SSIN MMBT3904-7-F 1000P/50V_4
E9 BXTALOUT

1
XTAL_OUTBUFF C5095
XTALIN D10 E10XTALOUT *1000P/50V_4
XTAL_IN XTAL_OUT
R5037

3
Y5000 27MHZ 10K/F_4 R5038
2 1 +1.5V_GFX 4.7K_4 DGPU_POK2 2
C5101 27P/50V_4 C5102 27P/50V_4
Q5005

1
C5103 MMBT3904-7-F
*1000P/50V_4

D D

352-(&75'
4XDQWD&RPSXWHU,QF
<2,3,10,11,12,13,14,15,16,17,22,23,24,25,26,27,29,30,31,32,35,36,38> +3V
<17,20,36> +3V_GFX Size Document Number Rev
Custom 1A
<17,18,36> +1.05V_GFX N11M-GE2(DISPLAY)
Date: Tuesday, February 15, 2011 Sheet 19 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8


4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)]
U5001K
N10M
10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)]
PBGA533-NVIDIA-GEFORCE6250 15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)]
11/13 MISC
N12P-GV -> 0x17F 30.1K/F_4: CS33012FB18 [RES CHIP 30.1K 1/16W +-1%(0402)]
N12M-GE -> 0xA7A 1010 ->PU15K 35.7K/F_4: CS33572FB13 [RES CHIP 35.7K 1/16W +-1%(0402)]
ROM_CS*
B10 45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]
STRAP0 C7
STRAP0
/RJLFDO6WUDS%LW0DSSLQJ
STRAP1 B9 A10 ROM_SI CS31502FB24 15K 1% PCI_DEVID[4]/SUBVENDOR
STRAP2 A9 STRAP1 ROM_SI ROM_SO
C10
STRAP2 ROM_SO +3V_GFX +3V_GFX
ROM_SCLK
C9 ROM_SCLK ROM_SI -> based on VRAM. 389'' 3' 12/28: Change as nVidia setting

ROM_SO -> PU 10K


.  
A3 HDCP_SCL R5039 2.2K_4
(I2CH_SCL)GPIO20 +3V_GFX
R5040 40.2K/F_4 STRAP_REF_3V3 F11 A4 HDCP_SDA R5041 2.2K_4 R5042 R5043 R5047 R5048 R5044 R5045
A STRAP_REF_3V3
(I2CH_SDA)GPIO21 A

R5046 40.2K/F_4 STRAP_REF_MIOBF10 ROM_SCLK -> PU 5K .   *5.7K/F_4


STRAP_REF_MIOB
STRAP0 -> PU 45K .   *4.99K/F_4 10K/F_4 4.99K/F_4 45.3K/F_4 *45.3K/F_4
BUFRST*
N5 T5005 .   ROM_SI
ROM_SO
STRAP0
STRAP1
STRAP1 -> PD 35K
.  
+3V_GFX R5049 *10K/F_4 F9 ROM_SCLK STRAP2
4.99K/F_4 R5050 STRAP3(SPDIF)

GND0
F6
STRAP2 -> PD 5K .   R5051
R5052 R5053 R5054 R5055 R5056

TESTMODE
AD25 TESTMODE
STRAP3 -> PD 5K
.   (Ra) 35.7K/F_4 *10K/F_4 4.99K/F_4

+3V_GFX R5057 *10K/F_4 N2 .  


*10K/F_4 *10K/F_4 35.7K_4
PV: Change as nVidia setting
STRAP4(CEC)
R5058 10K/F_4
GND1
AC6 R5059 STRAP 4 -> PD 10K. Default: Hynix VRAM
10K/F_4

/RJLFDO /RJLFDO /RJLFDO /RJLFDO


PV: Change as nVidia setting 6WUDSSLQJ%LW 6WUDSSLQJ%LW 6WUDSSLQJ%LW 6WUDSSLQJ%LW
520B62 XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE
520B6&/. PCI_DEVIDE[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM
520B6, RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0]
PBGA533-NVIDIA-GEFORCE6250
U5001L
N10M +3V_GFX
675$3 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
9/13 I2C_GPIO_THERM_JTAG

I2CA_SCL
R1 GPU_DDCCLK 4.7K/F_4 R5061 675$3 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]
B T3 GPU_DDCDATA 4.7K/F_4 R5063 B
I2CA_SDA
675$3 USER[3] USER[2] USER[1] USER[0]
R2 I2CB_SCL_G R5064 2.2K_4 +3V_GFX
I2CB_SCL
T5006 D8
THERMDN I2CB_SDA
R3 I2CB_SDA_G 675$3 SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
R5065 2.2K_4
T5007 D9
THERMDP I2CC_SCL
A2 I2CC_SCL_G R5067 2.2K_4 +3V_GFX 675$3 RESERVED RESERVED PCIE_MAX_SPEED DP_PLL_VDD33V
B1 I2CC_SDA_G R5069 2.2K_4
I2CC_SDA
JTAG_TCK AF3 VRAM Configuration Table
JTAG_TMS JTAG_TCK
AF4
JTAG_TDI JTAG_TMS
AG4 RAMCFG
T5008 JTAG_TDO
JTAG_TRST#
AE4
AG3
JTAG_TDI
JTAG_TDO
JTAG_TRST*
[3:0]
0000
DESCRIPTION Vendor
Reserved
Vendor P/N ROM_SI
(Ra)
GPIO0
N1 DGPU_PIN_N1 T5009 0010 DDR3 64Mx16x8, 128bit, 1GB,800MHz Hynix 3'.
GPIO1
G1 TMDS_HPD T5010 0011 DDR3 64Mx16x8, 128bit, 1GB,800MHz Samsung 3'.
GPIO2
C1 DPST_PWM_DGPU T5011 0110 DDR3 128Mx16x4, 128bit, 1GB,800MHz Hynix 3'.
GPIO3
M2 DISP_ON_DGPU T5012 0111 DDR3 128Mx16x4, 128bit, 1GB,800MHz Samsung 3'.
DGPU_I2CS_SCL T1 M3 LVDS_BLON_DGPU XXXX
I2CS_SCL GPIO4 T5013
DGPU_I2CS_SDA T2 K3 XXXX
I2CS_SDA GPIO5 GFX_CORE_CNTRL0 <36>
K2 GFX_CORE_CNTRL1 <36>
GPIO6 DGPU_PIN_J2
J2 T5014
R5073 40.2K/F_4 GPIO7 VGA_OVT#
T6 C2
W6
Y6
AA6
MULTI_STRAP_REF2_GND
DBG_DATA1
DDBG_DATA2
GPIO8
GPIO9
GPIO10
M1
D2
D1
ALERT

GFX_GPIO11
T5015
JTAG_TMS R5075 *10K/F_4
+3V_GFX
GPIO ASSIGNMENTS
DBG_DATA3 GPIO11 T5020
N3 J3 AC_DET R5074 10K/F_4 +3V_GFX
DBG_DATA4 GPIO12 JTAG_TDI R5076 *10K/F_4
GPIO13
J1
K1 GFX_GPIO14
T5016 GPIO I/O ACTIVE USAGE
C GPIO14 T5021 C
F3 DVI_DET T5022 VGA_OVT# R5077 10K/F_4
GPIO15
GPIO16
G3
G2
T5017
ALERT R5079 10K/F_4
0 N/A N/A
GPIO17 T5018
DGPU_IDLE#
GPIO18
F1
F2 R5078 10K/F_4
+3V_GFX
12/28 for Nvidia suggest 1 IN N/A Hot plug detect for IFP link C
GPIO19 T5019
JTAG_TRST# R5080 10K/F_4
2 OUT HIGH PANEL BACKLIGHT PWM
JTAG_TCK R5084 *10K/F_4
3 OUT HIGH PANEL POWER ENABLE
+3V_GFX 4 OUT HIGH PANEL BACKLIGHT ENABLE
R5000 *0_4 GFX_CORE_CNTRL0 R5085 10K/F_4
GFX_CORE_CNTRL1 R5086 10K/F_4
5 OUT N/A NVVDD VID0
6 OUT N/A NVVDD VID1
2

DGPU_I2CS_SCL 1 3 12/28 for Nvidia suggest


GPUT_CLK <31>
2N7002E AC_DET 1 3 N12P-GV default boot up voltage
7 OUT N/A NVVDD VID2
ACIN <31,38,39>
R5088 Q5006 should be set to 0.85V. 8 I/O LOW OVERT
2

2.2K_4 Therefore, please add 10K pull down


Q5010 2N7002E
resistors to GFX_CORE_CNTRL0 and 9 I/O LOW ALERT
GFX_CORE_CNTRL1
+3V_GFX
12/29 Nvidia suggest for AC/Batt# function 10 OUT N/A Memory VREF SELECT
R5089 11 I/O N/A SLI SYNC0
2.2K_4 12 IN N/A PWR_LEVEL
2

2N7002E 12/29 Nvidia suggest


Q5007 +3V_GFX
DGPU_I2CS_SDA 1 3
13 OUT N/A THERM_LOAD_STEP_DOWN
GPUT_DATA <31>
D
14 OUT N/A THERM_LOAD_STEP_UP D
2

R5090 *0_4
VGA_OVT# 1 3 HWPG <3,31,33,34,37,40,41>
Q5011 *2N7002E
352-(&75'
4XDQWD&RPSXWHU,QF
<17,19,36> +3V_GFX Size Document Number Rev
Custom 1A
N12P-GV(GPIO/STRAPS)
Date: Tuesday, February 15, 2011 Sheet 20 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8


<18> VMA_DQ[63..0]
<18> VMA_DM[7..0]
<18> VMA_WDQS[7..0]
CHANNEL A: 256MB/512MB DDR3 <18> VMA_RDQS[7..0]

U5000 U5003 U5004 U5005

VREFC_VMA1 M8 E3 VMA_DQ21 VREFC_VMA1 M8 E3 VMA_DQ8 VREFC_VMA3 M8 E3 VMA_DQ43 VREFC_VMA3 M8 E3 VMA_DQ59


VREFD_VMA1 VREFCA DQL0 VMA_DQ16 VREFD_VMA1 VREFCA DQL0 VMA_DQ11 VREFD_VMA3 VREFCA DQL0 VMA_DQ42 VREFD_VMA3 VREFCA DQL0 VMA_DQ57
H1 F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1 VMA_DQ22 VREFDQ DQL1 VMA_DQ9 VREFDQ DQL1 VMA_DQ45 VREFDQ DQL1 VMA_DQ56
F2 F2 F2 F2
DQL2 VMA_DQ19 FBA_CMD7 DQL2 VMA_DQ12 FBA_CMD9 DQL2 VMA_DQ40 FBA_CMD9 DQL2 VMA_DQ60
<18> FBA_CMD7 N3 F8 N3 F8 N3 F8 N3 F8
A0 DQL3 VMA_DQ20 FBA_CMD10 A0 DQL3 VMA_DQ13 FBA_CMD24 A0 DQL3 VMA_DQ47 FBA_CMD24 A0 DQL3 VMA_DQ61
<18> FBA_CMD10 P7 A1 DQL4 H3 P7 A1 DQL4 H3 P7 A1 DQL4 H3 P7 A1 DQL4 H3
P3 H8 VMA_DQ17 FBA_CMD24 P3 H8 VMA_DQ15 FBA_CMD10 P3 H8 VMA_DQ44 FBA_CMD10 P3 H8 VMA_DQ62
A <18> FBA_CMD24 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5 A
N2 G2 VMA_DQ23 FBA_CMD6 N2 G2 VMA_DQ10 FBA_CMD13 N2 G2 VMA_DQ46 FBA_CMD13 N2 G2 VMA_DQ58
<18> FBA_CMD6 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
P8 H7 VMA_DQ18 FBA_CMD22 P8 H7 VMA_DQ14 FBA_CMD26 P8 H7 VMA_DQ41 FBA_CMD26 P8 H7 VMA_DQ63
<18> FBA_CMD22 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
P2 FBA_CMD26 P2 FBA_CMD22 P2 FBA_CMD22 P2
<18> FBA_CMD26 A5 A5 A5 A5
R8 FBA_CMD5 R8 FBA_CMD21 R8 FBA_CMD21 R8
<18> FBA_CMD5 A6 A6 A6 A6
R2 D7 VMA_DQ2 FBA_CMD21 R2 D7 VMA_DQ28 FBA_CMD5 R2 D7 VMA_DQ36 FBA_CMD5 R2 D7 VMA_DQ51
<18> FBA_CMD21 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
T8 C3 VMA_DQ5 FBA_CMD8 T8 C3 VMA_DQ25 FBA_CMD8 T8 C3 VMA_DQ39 FBA_CMD8 T8 C3 VMA_DQ53
<18> FBA_CMD8 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
R3 C8 VMA_DQ0 FBA_CMD4 R3 C8 VMA_DQ26 FBA_CMD23 R3 C8 VMA_DQ34 FBA_CMD23 R3 C8 VMA_DQ49
<18> FBA_CMD4 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
L7 C2 VMA_DQ6 FBA_CMD25 L7 C2 VMA_DQ31 FBA_CMD28 L7 C2 VMA_DQ38 FBA_CMD28 L7 C2 VMA_DQ54
<18> FBA_CMD25 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
R7 A7 VMA_DQ3 FBA_CMD23 R7 A7 VMA_DQ27 FBA_CMD4 R7 A7 VMA_DQ32 FBA_CMD4 R7 A7 VMA_DQ48
<18> FBA_CMD23 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
N7 A2 VMA_DQ7 FBA_CMD9 N7 A2 VMA_DQ29 FBA_CMD7 N7 A2 VMA_DQ35 FBA_CMD7 N7 A2 VMA_DQ55
<18> FBA_CMD9 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
T3 B8 VMA_DQ1 FBA_CMD12 T3 B8 VMA_DQ24 FBA_CMD14 T3 B8 VMA_DQ33 FBA_CMD14 T3 B8 VMA_DQ50
<18> FBA_CMD12 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMA_DQ4 FBA_CMD14 T7 A3 VMA_DQ30 FBA_CMD12 T7 A3 VMA_DQ37 FBA_CMD12 T7 A3 VMA_DQ52
<18> FBA_CMD14 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 FBA_CMD30 M7 FBA_CMD27 M7 FBA_CMD27 M7
<18> FBA_CMD30 A15 +1.5V_GFX A15 +1.5V_GFX A15 +1.5V_GFX A15 +1.5V_GFX

M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2


<18> FBA_CMD29 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
N8 D9 FBA_CMD13 N8 D9 FBA_CMD6 N8 D9 FBA_CMD6 N8 D9
<18> FBA_CMD13 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
M3 G7 FBA_CMD27 M3 G7 FBA_CMD30 M3 G7 FBA_CMD30 M3 G7
<18> FBA_CMD27 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
K8 K8 K8 K8
VDD#K8 VDD#K8 VDD#K8 VDD#K8
N1 N1 N1 N1
VDD#N1 VMA_CLK0 VDD#N1 VDD#N1 VMA_CLK1 VDD#N1
<18> VMA_CLK0 J7 N9 J7 N9 <18> VMA_CLK1 J7 N9 J7 N9
CK VDD#N9 VMA_CLK0# CK VDD#N9 CK VDD#N9 VMA_CLK1# CK VDD#N9
<18> VMA_CLK0# K7 R1 K7 R1 <18> VMA_CLK1# K7 R1 K7 R1
CK VDD#R1 FBA_CMD3 CK VDD#R1 FBA_CMD16 CK VDD#R1 FBA_CMD16 CK VDD#R1
<18> FBA_CMD3 K9 R9 K9 R9 <18> FBA_CMD16 K9 R9 K9 R9
CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX

K1 A1 FBA_CMD0 K1 A1 <18> FBA_CMD19 FBA_CMD19 K1 A1 FBA_CMD19 K1 A1


<18> FBA_CMD0 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1
L2 A8 FBA_CMD2 L2 A8 <18> FBA_CMD18 FBA_CMD18 L2 A8 FBA_CMD18 L2 A8
<18> FBA_CMD2 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
J3 C1 FBA_CMD11 J3 C1 FBA_CMD11 J3 C1 FBA_CMD11 J3 C1
<18> FBA_CMD11 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
B K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 B
<18> FBA_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 FBA_CMD28 L3 D2 FBA_CMD25 L3 D2 FBA_CMD25 L3 D2
<18> FBA_CMD28 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
F1 F1 F1 F1
VMA_WDQS2 VDDQ#F1 VMA_WDQS1 VDDQ#F1 VMA_WDQS5 VDDQ#F1 VMA_WDQS7 VDDQ#F1
F3 H2 F3 H2 F3 H2 F3 H2
VMA_RDQS2 DQSL VDDQ#H2 VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2
G3 H9 G3 H9 G3 H9 G3 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9

VMA_DM2 E7 A9 VMA_DM1 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9


VMA_DM0 DML VSS#A9 VMA_DM3 DML VSS#A9 VMA_DM4 DML VSS#A9 VMA_DM6 DML VSS#A9
D3 B3 D3 B3 D3 B3 D3 B3
DMU VSS#B3 DMU VSS#B3 DMU VSS#B3 DMU VSS#B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_WDQS0 C7 J2 VMA_WDQS3 C7 J2 VMA_WDQS4 C7 J2 VMA_WDQS6 C7 J2
VMA_RDQS0 DQSU VSS#J2 VMA_RDQS3 DQSU VSS#J2 VMA_RDQS4 DQSU VSS#J2 VMA_RDQS6 DQSU VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
M9 M9 M9 M9
VSS#M9 VSS#M9 VSS#M9 VSS#M9
P1 P1 P1 P1
VSS#P1 FBA_CMD20 VSS#P1 FBA_CMD20 VSS#P1 FBA_CMD20 VSS#P1
<18> FBA_CMD20 T2 RESET VSS#P9 P9 T2 RESET VSS#P9 P9 T2 RESET VSS#P9 P9 T2 RESET VSS#P9 P9
T1 T1 T1 T1
VMA_ZQ1 VSS#T1 VMA_ZQ2 VSS#T1 VMA_ZQ3 VSS#T1 VMA_ZQ4 VSS#T1
L8 T9 L8 T9 L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

B1 B1 B1 B1
VSSQ#B1 VSSQ#B1 VSSQ#B1 VSSQ#B1
VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
R5091 D1 R5092 D1 R5093 D1 R5094 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
240/F_4 D8 240/F_4 D8 240/F_4 D8 240/F_4 D8
VSSQ#D8 VSSQ#D8 VSSQ#D8 VSSQ#D8
E2 E2 E2 E2
VSSQ#E2 VSSQ#E2 VSSQ#E2 VSSQ#E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 F9 L1 F9 L1 F9 L1 F9
NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
J9 G1 J9 G1 J9 G1 J9 G1
C NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 C
L9 G9 L9 G9 L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 +1.5V_GFX NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 +1.5V_GFX SDRAM DDR3 SDRAM DDR3 +1.5V_GFX SDRAM DDR3
VRAM _DDR3 VRAM _DDR3 VRAM _DDR3 VRAM _DDR3 +1.5V_GFX
VMA_CLK0 R5095
1.33K/F_4
R5096 R5097 R5098
1.33K/F_4 1.33K/F_4 R5099
162/F_4 VREFD_VMA1 1.33K/F_4
VMA_CLK0#
VREFC_VMA1 12/28 for Nvidia suggest VREFC_VMA3
R5100 R change to 162ohm VREFD_VMA3
1.33K/F_4 C5104 VMA_CLK1
12/28 for Nvidia suggest R5101 C5105 0.1U/10V_4 R5102 C5107
R change to 162ohm 1.33K/F_4 R5103 1.33K/F_4 R5104 C5106
0.1U/10V_4 0.1U/10V_4 1.33K/F_4
162/F_4 0.1U/10V_4
VMA_CLK1#

+1.5V_GFX
+1.5V_GFX +1.5V_GFX
C5108 0.1U/10V_4 +1.5V_GFX
C5109 0.1U/10V_4 C5110 1U/6.3V_4 C5111 0.1U/10V_4
C5112 1U/6.3V_4 C5113 1U/6.3V_4 C5114 0.1U/10V_4 C5115 0.1U/10V_4 QCI PN
C5116 1U/6.3V_4 Left C5117 0.1U/10V_4 Left C5118 0.1U/10V_4
Left C5119 0.1U/10V_4
C5120 0.1U/10V_4 C5121 1U/6.3V_4 C5122 1U/6.3V_4 Hynix 512MB AKD5LZGTW00
C5123 1U/6.3V_4 C5124 1U/6.3V_4
D +1.5V_GFX C5125 10U/6.3V_6 D
+1.5V_GFX +1.5V_GFX
+1.5V_GFX
Samsung 512MB AKD5LGGT502
C5126 1U/6.3V_4
C5127 1U/6.3V_4 C5128 0.1U/10V_4 C5129 0.1U/10V_4
C5130 1U/6.3V_4 C5131 0.1U/10V_4 C5132 0.1U/10V_4 C5133 0.1U/10V_4 Hynix 1GB AKD5MGWTW07
C5134 10U/6.3V_6
Right C5135 0.1U/10V_4 Right C5136 1U/6.3V_4
Right C5137 0.1U/10V_4
C5138
C5142
0.1U/10V_4
0.1U/10V_4
C5139
C5143
10U/6.3V_6
1U/6.3V_4
C5140
C5144
0.1U/10V_4
1U/6.3V_4
C5141
C5145
1U/6.3V_4
1U/6.3V_4
Samsung 1GB AKD5MGWT508 352-(&75'
C5146 0.1U/10V_4 C5147 10U/6.3V_6 4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
U10 U31 U11 U30 <18,19,36> +1.5V_GFX DDR3 VRAM(BGA96)
Date: Tuesday, February 15, 2011 Sheet 21 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

LID Switch
<10> TXLCLKOUT+
TXLCLKOUT+
TXLCLKOUT-
+3V

R25
R26
2.2K_4
2.2K_4
EDIDCLK
EDIDDATA
23
<10> TXLCLKOUT-
<10> TXLOUT0+ TXLOUT0+ RF C17 C20
TXLOUT0- 10P/50V_4 10P/50V_4
<10> TXLOUT0-
<10> TXLOUT1+ TXLOUT1+
<10> TXLOUT1- TXLOUT1-
TXLOUT2+
A <10> TXLOUT2+ A
<10> TXLOUT2- TXLOUT2-

G_0
<10> TXUCLKOUT- TXUCLKOUT- +3VLCD_CON
TXUCLKOUT+ 1
<10> TXUCLKOUT+ 2
10/25 PV modify TXUOUT0+
<10> TXUOUT0+ +3V 3
C101 22P/50V_4 <10> TXUOUT0- TXUOUT0- EDIDCLK
R54 *0_4/S PN_BLON BLON_CON TXUOUT1+ EDIDDATA 4
<31> EMU_LID <10> TXUOUT1+ 5
D3 RB500V-40 R69 100K_4 <10> TXUOUT1- TXUOUT1- C18 TXLOUT0-
TXUOUT2+ TXLOUT0+ 6
<10> TXUOUT2+ 1000P/50V_4 7
R50 47K_4 TXUOUT2-
+3VPCU <10> TXUOUT2- +3VLCD_CON 8
TXLOUT1-
LVDS_BLON R49 1K_4 EDIDCLK TXLOUT1+ 9
LID_EC# <30,31> <10> EDIDCLK 10 G_1
D2 *RB500V-40 <10> EDIDDATA EDIDDATA
TXLOUT2- 11
12
3

Close to EC <10> LVDS_BLON LVDS_BLON TXLOUT2+


DISP_ON 13
<10> DISP_ON 14
DPST_PWM TXLCLKOUT-

C15*0.047U/10V_4

C16*0.047U/10V_4
<13> LCD_BK 2 <10> DPST_PWM
Q2 TXLCLKOUT+ 15
EMI request 16
C65
17

2
*DTC144EUA 100P/50V_4 TXUOUT0-
1

TXUOUT0+ 18 G_2
19

1
TXUOUT1- 20
TXUOUT1+ 21
22
TXUOUT2- 23
DISP_ON R57 100K_4 TXUOUT2+ 24 G_3
LVDS_BLON R45 100K_4 25
TXUCLKOUT- 26
10/25 PV modify 10/26 PV modify 27
TXUCLKOUT+
B
100mA +3V R43 *0_4/S +3V_CAM 8/25 SI for H/W.
28
B

R36 *0_4/S 29
<27> DIGITAL_D1 30
<27> DIGITAL_CLK L6 DIGITAL_CLK_L
+VIN_BLIGHT SBK160808T-601Y-N/0.2A_6 +3V_CAM 31 G_4
L7 4 USBP4-_R 32
<12> USBP4- 3
C48 C45 C40 C44 USBP4+_R 33
1 2
*0.01U/25V_4 *4.7U/6.3V_6 EMI *10P/50V_4
<12>
*10P/50V_4
USBP4+ 34
35
+VIN L8 +VIN_BLIGHT *WCM-2012-900T(400mA) VADJ1
BLON_CON 36
FBM2125 HM330-T/4A_8 +VIN_BLIGHT 37
38
C78 0.1U/25V_4 Please note that 2011 camera is +3V a We do not need to use 5V -> 3.95V regulator! 39
40

G_5
C77 0.01U/25V_4 8/25 SI for M/E.
CN2
follow L4 location GS12401-1011
DFHS40FS036
USBP4- R44 0_4 USBP4-_R 10/25 PV modify GS12401-1011-40P-R-NH-SMT

USBP4+ R46 0_4 USBP4+_R


EMI & RF DPST_PWM R51 *0_4/S VADJ1
R52 *1K_4
<31> PWM_VADJ
+VIN C61 33P/50V_4

C73 C96
*4.7U/25V_8 0.1U/25V_4
C change to +5VS5 +12VALW C

+5VS5
SI modify
8/25 SI for H/W.

+3V

14.5v

2
AO3404 ID

1
R24
R65
current 1A
Coupling CAP. 330K_6
5.8A

3
100K_4 Q1 +3VLCD +3VLCD_CON

1
+VIN +VIN AO3404
2

C751 *0.1U/25V_4 C761 *0.1U/25V_4 LCDONG 2 L4


HCB2012KF-600T30/3A_8

1
C752 *0.1U/25V_4 C762 *0.1U/25V_4 C14 *0.01U/25V_4

3
R72 C12 0.1U/10V_4
C753 *0.1U/25V_4 C763 *0.1U/25V_4

1
22_8
C754 *0.1U/25V_4 C764 *0.1U/25V_4 2

2
1
C755 *0.1U/25V_4 C765 *0.1U/25V_4 Q3 C13 LCDDISCHG
2N7002E 0.022U/25V_4
2

3
C756 *0.1U/25V_4 C766 *0.1U/25V_4
1

Q4
3

C757 *0.1U/25V_4 C767 *0.1U/25V_4 DTC144EUA


LCDON# 2 Q5
D C758 *0.1U/25V_4 C768 *0.1U/25V_4 DISP_ON 2 2N7002E D

C759 *0.1U/25V_4 C769 *0.1U/25V_4


1

1
C760 *0.1U/25V_4 C770 *0.1U/25V_4

352-(&75'
8/25 SI for H/W. 4XDQWD&RPSXWHU,QF
<10,30,31,33,39> +3VPCU
<2,3,10,11,12,13,14,15,16,17,19,23,24,25,26,27,29,30,31,32,35,36,38> +3V
Size Document Number Rev
<25,36,38,39> +12VALW
Custom LCD CONN/LID/CAM 1A
<33,34,35,36,37,38,39,40,41> +VIN
Date: Tuesday, February 15, 2011 Sheet 22 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V
Rg 4.7K_4
+3V
PV EMI change PN to CX601T02125 For UMA HDMI function 24

2
Signals R403 PC0 R397 *0_4
PDT PIM CHR L51
R393
Ra 4.7K_4 PC1
Re
R391 *0_4 EMI
PC1 4.7K 4.7K NC FCM1608KF-601T02/0.2A_6
Ra R407
Rb *4.7K_4 HDMI_CFG0 R408 *0_4 U8
Rc 4.7K_4

1
HDMI_CFG0 NC NC NC R406 HDMI_CFG1 R404 *0_4 +3V_LS 2
Rb 11
VCC
VCC
15 VCC

C657

C652

C649

C629

C647

C640

C631

C630

C634

C646
HDMI_CFG1 Rc 4.7K NC NC Rd 21
VCC
A 26 VCC
A
REXT R395 499/F_4 33
VCC

1000P/50V_4

1000P/50V_4

1000P/50V_4

1000P/50V_4
1U/6.3V_4

0.1U/10V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4
0.01U/25V_4
REXT Rd 499 4.7K 1.2K 40 POWER
RT_EN# VCC
R390 *0_4 PV EMI request 46 VCC
PC1 HDMI_OE# R387
Rf *4.7K_4
Re NC NC 4.7K 39 22 C_TXC_HDMI+
<10> IN_CLK IN_D1+ OUT_D1+
38 23 C_TXC_HDMI-
<10> IN_CLK# IN_D1- OUT_D1-
HDMI_OE# Rf NC NC 4.7K 42 19 C_TX0_HDMI+
<10> IN_D0 IN_D2+ OUT_D2+
RP1 <10> IN_D0# 41 20 C_TX0_HDMI-
HDMI_SCL_R HDMI_SCLK +3V IN_D2- OUT_D2-
PC0 Rg 4.7K 4.7K 4.7K 3 4
HDMI_SDA_R 1 2 HDMI_SDATA <10> IN_D1 45 16 C_TX1_HDMI+
IN_D3+ OUT_D3+ C_TX1_HDMI-
<10> IN_D1# 44 IN_D3- OUT_D3- 17
4P2R-S-33
<10> IN_D2 48 13 C_TX2_HDMI+
R182 IN_D4+ OUT_D4+ C_TX2_HDMI-
<10> IN_D2# 47 IN_D4- OUT_D4- 14
R173 2.2K_4
2.2K_4 <10> SDVO_CLK 9 28 HDMI_SCL_R
SCL SCL_SINK
<10> SDVO_DATA 8 29 HDMI_SDA_R
SDA SDA_SINK
Vender Part Part Number Part Description SDVO_DATA 7 30 HDMI_HPD_3V
<10> HDMI_HPD_CON HPD HPD_SINK
SDVO_CLK +3V
PDT PS8101 AL008101000 IC OTHER(48P) PS8101QFN48GTR(QFN)
R396 4.7K_4 DDC_EN 32
PC0 DDC_EN
PIM PI3VDP411LSRZBE ALP411LS004 IC OTHER(48P) PI3VDP411LSRZBE(TQFN) 3 PC0 GND 1
PC1 4 5
HDMI_CFG1 34 PC1 GND
CHR CH7318C AL007318002 IC OTHER(48P) CH7318C-BF-TR(QFN) EQUALIZATION SETTING DDCBUF_EN GND 12
HDMI_CFG0 35 18
PC1:PC0=0:0 8dB CFG GND
24
PC1:PC0=0:1 4dB Recommanded GND
GND 27
PC1:PC0=1:0 12dB RT_EN# 10 31
HDMI_OE# RT_EN# GND
PC1:PC0=1:1 0dB 25 36
REXT OE# GND
B
9/16 : PIM: need use ALP411LS000 or ALP411LS004 for capella 6 REXT GND 37 B
GND GND
43
SCLZ/SDAZ Low-level input/output Voltage CONTROL EPAD 49
CHR : need Na R1182, add R1027 for capella CFG1:CFG0=0:0 VIL:<0.4V VOL:0.6V (Default)
CGF1:CGF0=0:1 VIL:<0.36V VOL:0.55V
CGF1:CGF0=1:0 VIL:<0.44V VOL:0.65V
PI3VDP411LSRZBE
AL008101000
CGF1:CGF0=1:1 VIL:<0.36V VOL:0.6V IC OTHER(48P) PS8101QFN48GTR(QFN)

+3V

C213 C219
*0.1U/10V_4 *0.1U/10V_4
L32 *WCM2012-90
C_TX2_HDMI+ 4 3 CN18
C_TX2_HDMI- 1 2 20
C_TX2_HDMI+ SHELL1
1 D2+ SHELL2 21
L30 *WCM2012-90 C_TX2_HDMI- 3
C_TX1_HDMI+ C_TX1_HDMI+ D2-
4 3 4
C_TX1_HDMI- C_TX1_HDMI- D1+
1 2 6 D1-
7 D0+
L31 *WCM2012-90 9
C_TX0_HDMI+ C_TX0_HDMI+ D0-
8/25 SI for EMI reserve. 4 3
D2 Shield
2
C_TX0_HDMI- 1 2 C_TX0_HDMI- 5
L28 *WCM2012-90 D1 Shield
8
C_TX2_HDMI+ R504 *100/F_4 C_TX2_HDMI- C_TXC_HDMI+ C_TXC_HDMI+ 10 D0 Shield
4 3 11
C_TX1_HDMI+ R505 *100/F_4 C_TX1_HDMI- C_TXC_HDMI- C_TXC_HDMI- 12 CK+ CK Shield
1 2 17
C_TX0_HDMI+ R506 *100/F_4 C_TX0_HDMI- CK- GND
C C_TXC_HDMI+ R507 *100/F_4 C_TXC_HDMI- C

EMI HDMI_SCLK 15
DDC CLK CE Remote
13
HDMI_SDATA 16 14
DDC DATA NC
1A +5V_HDMIC
FUSE1.1A6V_POLY
+5V 2 1 18
F1 +5V
C594 *0.1U/10V_4

HDMI_HPD HDMI_HPD_L 19
HP DET
0_6
L48 HDMI CONN
C569 DFHD19MR130
220P/50V_4 hdmi-100042mr019s172zl-19p-v
reserved for EMI

+5V_HDMIC

HDMI_SDATA

HDMI_SCLK

2
D7
RB501V-40
C310

C303

+5V_HDMIC1

1
+3V
*10P/50V_4

*10P/50V_4

R316 R320
2.2K_4 2.2K_4

HDMI_SCLK HDMI_SDATA
D D

Q8
R318
3

MMBT3904-7-F
2 HDMI_DET_R HDMI_HPD

352-(&75'
1

HDMI_HPD_3V 200K/F_4
R319

R329
200K/F_4 4XDQWD&RPSXWHU,QF
10K_4
Size Document Number Rev
Custom HDMI CONN 1A

Date: Tuesday, February 15, 2011 Sheet 23 of 42


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CRT PORT
25
A A

16
6
CRT_R_1 L2 BK1608LL680/0.2A_6 CRT_R1 1 11
7
CRT_G_1 L1 BK1608LL680/0.2A_6 CRT_G1 2 12 CRTDDCDAT2 C4 *470P/50V_4
8
CRT_B_1 L3 BK1608LL680/0.2A_6 CRT_B1 3 13 CRTHSYNC C3 10P/50V_4
10/25 PV modify +5V_HDMIC 9
4 14 CRTVSYNC C2 10P/50V_4
R19 R16 R22 C11 10
C9 C7 C10 C6 C8 5 15 CRTDDCCLK2 C1 *470P/50V_4
CRT_R R20 *0_4/S CRT_R_1 5.6P/16V_4
<10> CRT_R CRT_G CRT_G_1
R17 *0_4/S 150/F_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4
<10> CRT_G
CRT_B R23 *0_4/S CRT_B_1 150/F_4

17
<10> CRT_B
HSYNC_COM
R7 *0_4/S HSYNC_COM_1 150/F_4
<10> HSYNC_COM CRT CONN
VSYNC_COM
R4 *0_4/S VSYNC_COM_1
<10> VSYNC_COM CN12
DDCCLK R14 *0_4/S DDCCLK_1 EMI
<10> DDCCLK DDCDATA R9 DDCDATA_1
*0_4/S
<10> DDCDATA
B B
DFDS15FR229
dsub-070546hr015m52tzr-15p

+5V
U1
+5V_CRT2 1 16 CRT_VSYNC1 R6 22_4 CRTVSYNC
VCC_SYNC SYNC_OUT2 CRT_HSYNC1 R8 22_4 CRTHSYNC
SYNC_OUT1 14
7 VCC_DDC
C5 0.22U/25V_6 CRT_BYP 8
BYP VSYNC_COM_1 +5V_CRT2
SYNC_IN2 15
2 13 HSYNC_COM_1
+3V VCC_VIDEO SYNC_IN1
R3 R2
CRT_R1 3 10 DDCCLK_1 2.2K_4 2.2K_4
CRT_G1 VIDEO_1 DDC_IN1 DDCDATA_1
4 11
CRT_B1 VIDEO_2 DDC_IN2
5
VIDEO_3 VGA_DDC_CLK_RT CRTDDCCLK2
DDC_OUT1 9
6 12 VGA_DDC_DAT_RT CRTDDCDAT2
GND DDC_OUT2
IP4772
+3V

DDCCLK_1 R13 2.7K_4


DDCDATA_1 R11 2.7K_4

C C
+5V_HDMIC 2 1 +5V_CRT2
+5V_HDMIC
RB501V-40 D1

HOLE CPU
H1 H6 H14 H11 H12 H3 H8 H4 H7
*h-c354d118p2 *O-R15D-1 *h-c354d118p2 *h-c354d118p2 *H-C354I158D118P2 *h-c354d118p2 *H-C354I158D118P2 *H-C354I158D118P2 *IINTEL-CPU-BKT2
3
2
4
1

h-c354d118p2 O-R15D-1 h-c354d118p2 h-c354d118p2 H-C354I158D118P2 h-c354d118p2 H-C354I158D118P2 H-C354I158D118P2 INTEL-CPU-BKT2

H2
*h-c236d118p2 H13
*h-c236d118p2
H15
*h-c354d118p2
VGA
D H10 H9 H5 D
*h-tc248bc197d150p2 *h-tc248bc197d150p2 *h-tc248bc197d150p2
1

352-(&75'
1

h-c236d118p2
H-tc354bc236d118p2
8/25 SI for M/E.
h-c354d118p2
4XDQWD&RPSXWHU,QF
h-tc248bc197d150p2 h-tc248bc197d150p2 h-tc248bc197d150p2
Size Document Number Rev
Custom CRT,Hole 1A

Date: Tuesday, February 15, 2011 Sheet 24 of 42


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CPU FAN
C518 2.2U/6.3V_6
SATA HDD CONNECTOR
26
CN16
+5V_FAN 1

<31>
C517
FAN1SIG
0.1U/10V_4 2
3
1
2
3
5
4
5
4
CN23 Bypass CAP close conn
+3V R290 4.7K_4 FAN CONN 1
A 1 A
2 SATA_TXP0_C C679 0.01U/25V_4
3 SATA_TXN0_C C676 0.01U/25V_4 SATA_TXP0 <10>
DFHD03MR026 4 SATA_TXN0 <10>
53398-0310-3P-L 5 SATA_RXN0_C C674 0.01U/25V_4
6 SATA_RXP0_C C672 0.01U/25V_4 SATA_RXN0 <10>
7 SATA_RXP0 <10>
8
9 +3V

Main HDD
10
FANPWR = 1.6*VSET 11
30 MIL 12
U2 13 +5V
2 3 +5V_FAN 14
+5V VIN VO
5 15
THERM_OVER# GND
+5V 1 /FON GND 6 16
R42 10K_4 7 17 PV modisy
GND
<31> VFAN 4 8 18
VSET GND
19 19
G991PV11
+5V

+5V 8 7 6 5 G995 layout notice SATA HDD(1ST)


Gnd shape DFHS13FS019
C37 sata-ah534-00-13p-r

1U/6.3V_4
1 2 3 4 C490 C481 C485 C489
10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8
B B

SATA ODD CONNECTOR


CN7 Bypass CAP close conn
1 1
2 SATA_TXP4_C C492 0.01U/25V_4
3 SATA_TXN4_C C493 0.01U/25V_4 SATA_TXP4 <10>
4 SATA_TXN4 <10>
5 SATA_RXN4_C C500 0.01U/25V_4
6 SATA_RXP4_C C501 0.01U/25V_4 SATA_RXN4 <10>
SATA_RXP4 <10>
follow INTEL DG change eject PU to +3V.
7 R279 1K_4
8 2 1 ODD_PRSNT# <10>
9 +3V
10 +5V_ODD
11 ODD_EJECT#
+12VALW +5V
12
13 R473 C495
C C
14 AO3404 ID

2
15 +5V_ODD +5V 10K_4 10/25 PV modify current 0.1U/10V_4
16 R277 5.8A
17
18 R278 *0_8 ODD_EJECT# *0_4/S R475 330K_6
EJECT# <31>

3
19 Q15 +5V_ODD

1
19
AO3404

2
SATA ODD High : ODD power down

1
3
DFHS13FS019
Low : ODD power on R468

1
sata-ah534-00-13p-r 22_8
<31> ODD_PD 2

2
1
C494

Q14 0.022U/25V_4

3
2N7002E

1
8/25 SI for H/W.
2
120 mils
Q38
+5V_ODD
2N7002E

1
C685 C502 C686 C682 C690
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

D D

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom HDD/ODD/FAN 1A

Date: Tuesday, February 15, 2011 Sheet 25 of 42


1 2 3 4 5 6 7 8
CLK_PCIE_REQ2#_R
5 4 3 2 1
+3V
GPIO49 <13>
C691 0.1U/10V_4

27

PLTRST#
R470 6.2K/F_4

SD_CD#

SD_WP
RREF

+3V
PLTRST# 10/26 PV modify
<3,11,17,29,31,32> PLTRST#
Footprint lqfp48-9x9-5-1_6h

47

44

40
48

46

43

39
45

42

41

38

37
CLK_PCIE_REQ2# R469 *0_4/S CLK_PCIE_REQ2#_R U28
<11> CLK_PCIE_REQ2#

EEDO

MS_INS#
3V3_IN

CLK_REQ#

EECS

SD_CD#
PERST#

EESK

SP15

SP14
RREF

GPIO/EEDI
D D

<11> PCIE_TXP3_CARD 1 36
HSIP SP13

<11> PCIE_TXN3_CARD 2 35
HSIN SP12

<11> CLK_PCIE_CARDP 3 34
REFCLKP SP11

<11> CLK_PCIE_CARDN 4 33
REFCLKN SP10
C504 4.7U/6.3V_6 AV12 5 32
AV12 SP9
C710 0.1U/10V_4 PCIE_RXP3_CARD_C 6 31
<11> PCIE_RXP3_CARD HSOP SP8
C713 0.1U/10V_4 PCIE_RXN3_CARD_C 7 30
<11> PCIE_RXN3_CARD
8
HSON

GND
Realtek RTS5219 SP7

SP6
29
C725 4.7U/6.3V_6
C721 0.1U/10V_4 DV12 9 28
DV12 SP5
10 27 DV12_S
+3VCARD Card1_3V3 DV12_S C717 0.1U/10V_4
+3V 11 26
3V3_IN GND
12 25 SD_D2_R R487 *0_4/S SD_D2
C509 C732 Card2_3V3 SD_D2
10/26 PV modify
C 10U/6.3V_8 0.1U/10V_4 C

SD_CMD
DV33_18
XD_CD#

SD_CLK
+3V3 cap place close chip

SD_D1

SD_D0

SD_D3
GND

SP1

SP2

SP3

SP4
RTS5159 max output current for ..

13

14

15

16

17

18

19

20

21

22

23

24
XD card 250mA
SD/MMC 250mA

SD_D1_R

SD_D0_R

SD_CMD_R
SD_CLK_R
DV33_18

SD_D3_R
MS/MSPRO 250mA
R3019~R3024, C3009 close to chip pin

R283

R285

R284

R488

R492
L55
AV12 DV12 C734 C735 10/26 PV modify
*0_6

SD_CLK 22_4
SD_D1 *0_4/S

SD_D0 *0_4/S

*0_4/S

SD_D3 *0_4/S
*4.7U/6.3V_6 0.1U/10V_4
Reserved

SD_CMD
Reserved

B C510 B
+3VCARD 10P/50V_4

CN9
1 SD_D3
SD-DAT3 SD_CMD +3VCARD
2
SD-CMD
GND1
3 CLOSE CONN
4
SD-VCC SD_CLK
5
SD-CLK
C508

C505

6
GND2 SD_D0
7
SD-DAT0 SD_D1
8
SD-DAT1 SD_D2 C726
9
SD-DAT2 SD_CD# R281
0.1U/10V_4

10
*0.1U/10V_4

SD-CD SD_WP *150K/F_4 10U/6.3V_8


11
SD-WP
12
SHIELD1-GND
13
SHIELD2-GND
14
SHIELD3-GND
15
SHIELD4-GND

CARD READER SOCKET


DFHD11MR003
SDCARD-CS1S-038-11P-SMT

A 8/25 SI for SMT. A

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
RTS5219 & CR SOCKET &HOLE
Date: Tuesday, February 15, 2011 Sheet 26 of 42
5 4 3 2 1
A B C D E

<2,3,10,11,12,13,14,15,16,17,19,22,23,24,25,26,29,30,31,32,35,36,38>

<14,23,24,25,30,32,38>
+3V

+5V
10/25 PV modify
+4.75VAVDD
28
+5V
U25
+5V_AVDD L52 +4.75VAVDD 5 1
Vout Vin
Close to CODEC >40mils trace
*0_6/S 4
Close to CODEC C681 C680 BYP C675 C677 C678
1U/6.3V_4 0.1U/10V_4 2 3 0.1U/10V_4 0.047U/10V_4 1U/6.3V_4
C684 GND EN
+3V_DVDD_CORE C687 C696 C720 1U/6.3V_4 TPS793475
+3V 10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4
AGND
C697 AGND R467 10K_4 +5V
C719 C718 10U/6.3VS_6 Vset=1.242V
1U/6.3V_4 0.1U/10V_4 U27
AGND
1 27 +5V
DVDD_CORE AVDD
+3V AVDD
38
Close to CODEC >40mils trace
9 DVDD
39 SENSE_A R489 2.49K/F_4 +5V_AVDD
PVDD
3 45
DVDD_IO PVDD
AGND
10/26 PV modify C736 1000P/50V_4

Digital
C700 <10> BIT_CLK_AUDIO R481 0_4 HD_BCLK 6 C694 C695 C693
0.1U/10V_4 HDA_BITCLK 1U/6.3V_4 0.1U/10V_4 10U/6.3VS_6 SENSE_B R490 100K/F_4 +5V_AVDD
R483 33_4 HD_SDIN0 8 13 SENSE_A
<10> ACZ_SDIN0 HDA_SDI SENSE_A SENSE_A <28>

<10> ACZ_SDOUT_AUDIO R479 *0_4/S HD_SDOUT 5 14 SENSE_B


HDA_SDO SENSE_B
+'$%XV C709
R484
*10P/50V_4
*0_4/S HD_SYNC 10 AGND
<10> ACZ_SYNC_AUDIO
C724 *10P/50V_4 HDA_SYNC Close to CODEC
<10> ACZ_RST#_AUDIO 11 28
HDA_RST# HP0_PORT_A_L
HP0_PORT_A_R 29
VREFOUT_A_or_F 23
C699 10P/50V_4
AGND SHIELD
<22> DIGITAL_CLK R472 100_4 DMIC_CLK_R 2 31 HPOUT_L
DMIC_CLK/GPIO1 HP1_PORT_B_L HPOUT_L <28>
72'LJLWDO0,& <22> DIGITAL_D1 R477 *0_4/S DMIC0 4
DMIC0/GPIO2 HPOUT_R
AGND SHIELD 72+HDGSKRQHMDFN
HP1_PORT_B_R 32 HPOUT_R <28>
10/26 PV modify C706 10P/50V_4 AGND SHIELD
46
DMIC1/GPIO0/SPDIF_OUT_1 MIC_L
19 MIC_L <28>
PORT_C_L
<28> 72$XGLR-DFN0,&
+3V R471 10K_4 48 20 MIC_R
SPDIF_OUT_0 PORT_C_R MIC_R
24 VREFOUT_C
VREFOUT_C VREFOUT_C <28>
<31> VOLMUTE# ADC_EAPD# 47
EAPD L_SPK+
SPKR_PORT_D_L+ 40
D11 RB500V-40 7 41 L_SPK-
DVSS SPKR_PORT_D_L-
R_SPK-
72,QWHUQDO6SHDNHUV +5V_AVDD
SPKR_PORT_D_R- 43
CAP- 44 R_SPK+
SPKR_PORT_D_R+
35
Close to CODEC CAP-
1

C701 15
4.7U/6.3V_6 PORT_E_L
16
1 PORT_E_R R498 1
36 C10625 close C10629, and C10625
Analog
2

CAP+ CAP+ 10K_4


17
33
PORT_F_L
18
close Chip
AVSS PORT_F_R C739 C744
30
AVSS check value
26 0.1U/10V_4 0.1U/10V_4
AVSS AMP_BEEP AMP_BEEP_L R497 100K_4 AMP_BEEP_R2
MONO_OUT

12
PC_BEEP
VREFFILT

42
PVSS

3
VREG

+3V
CAP2

Check SB side and 49 DAP R496


V-

vendor reply it C738 10K_4 2 ACZ_SPKR <10,13>


should reserve only 92HD80B1X5NLGXTA48 0.01U/25V_4 R250 0_4
2N7002E
37

34

21

22

25

R485 AGND
4.7K_4 Q40
6/17

1
8/25 SI for IDT R10453 close R10454 R499 0_4
ACZ_RST#_AUDIO
recommend. AGND R486 *0_4
AGND
R276 0_4
C728
0.01U/25V_4
Check layout 8/25 SI for IDT
mount location
ADC_VREG

ADC_V-

ADC_VREFFILT

ADC_CAP2

recommend.
R282 *0_8/S

AGND
1

C698 C707 C730 C727 EMI Request INT. SPEAKER


4.7U/6.3V_6 4.7U/6.3V_6 10U/6.3VS_6 0.1U/10V_4
2

INT SPEAKER CONN


L_SPK+ L61 SBK160808T-221Y-N/0.2A_6 L_SPK+_R
L_SPK- L60 SBK160808T-221Y-N/0.2A_6 L_SPK-_R 1
AGND AGND AGND AGND R_SPK- L59 SBK160808T-221Y-N/0.2A_6 R_SPK-_R 2
R_SPK+ L58 SBK160808T-221Y-N/0.2A_6 R_SPK+_R 3
4
BIT_CLK_AUDIO ACZ_SDIN0 Close to CODEC C740 220P/50V_4 CN11
DFHD04MR142
C743 220P/50V_4 3800-X04N-00X-4P-L

C745 220P/50V_4
C712 C715
33P/50V_4 33P/50V_4 C748 220P/50V_4

FOR EMI
8/25 SI for IDT

352-(&75'
recommend.

4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
Azalia 92HD80
Date: Tuesday, February 15, 2011 Sheet 27 of 42
A B C D E
1 2 3 4 5 6 7 8

LEFT SIDE USBX2


BLUETOOTH

300mA
BLUELED C496
EMI request
*1000P/50V_4
change to AL000547005
change to +5VS5
2A
+5VS5
U23 80 mils (Iout=2A) +5V_USBP0
2A
29
2 VIN1 OUT3 8 +5V_USBP0 C348 470P/50V_4
3 7 C351 0.1U/10V_4
+3VS5 +3VS5 VIN2 OUT2 C414 470P/50V_4
change to +3VS5 <31> USBPW_ON#
C664
4
1
EN OUT1 6
5 C413 0.1U/10V_4
GND OC
A A

+
G547E2P81U C660
R280 1U/6.3V_4

1
4.7K_4 8/25 SI for H/W.
Q16 100U/25V

2
ME2303-G CN8
C497
*1000P/50V_4
change to ELEC CAP
C356
24mil BTCON_P1
Q17 300mA 6 T38 1A *0.1U/10V_4

3
5 BLUELED <31,32>
3

+3VPCU_BT USBP2- R149 *0_4 CN19


4 USBP2- <12> L33
C503 USBP2+ +5V_USBP0 1 1 GND 8
3 USBP2+ <12> USBP0-_R
2 4 3 2 7
<13,32> BT_OFF#
*0.01U/25V_4
C498
0.1U/10V_4 C499
2
1
+3VPCU_BT <12>
<12>
USBP0-
USBP0+ 1 2 USBP0+_R 2 GND
3 3 GND
4 4 GND
6
5
Right SIDE USBX1
DTC144EUA *10U/6.3V_8 WCM2012-90
1

BLUE TOOTH CONN R152 *0_4 USB CONN +5VS5


87213-0600-6P-L DFHD04MR133
DFHD06MR055 8/25 SI for EMI. usb-020173mr004s53qzl-4p-r-v C27 0.1U/10V_4
<31> USBPW_ON#
CN1

C411 R502 *0_4


1
R225 *0_4 *0.1U/10V_4
2

L36
1A CN20
<12> USBP8- 4 3 USBP8-_R 3
+5V_USBP0 USBP8+_R 4
1 1 GND 8 <12> USBP8+ 1 2
USBP1-_R 5
<12> USBP1- 4 3 2 7
USBP1+_R 2 GND L5 6
<12> USBP1+ 1 2 3 3 GND 6
B 4 5 WCM2012-90 USB board B
WCM2012-90 4 GND R503 *0_4
R226 *0_4 USB CONN DFFC06MR001
DFHD04MR133 8/25 SI for EMI. 88513-0601-6P-L-SMT
8/25 SI for EMI. usb-020173mr004s53qzl-4p-r-v
EMI request
USBPW_ON# C19 220P/50V_4

Line out
R465 CN22
SENSE_PHONE SENSE_A
SENSE_A <27> AGND SHIELD HPOUT_L HPOUT_L1
1 7
20K/F_4 R482 16/F_4 L39 SBK160808T-301Y-N/0.2A_6 HPOUT_L2 2 DFTJ06FR342
<27> HPOUT_L
AGND SHIELD 6 9 audio-311105-2-6p-smt
SENSE_MIC R256 10K/F_4 SENSE_A <27> HPOUT_R HPOUT_R R480 16/F_4 HPOUT_R1 L42 SBK160808T-301Y-N/0.2A_6 HPOUT_R2 3 10
AGND SHIELD 4
5 8
R275 20K/F_4
AEC_311105-2
R270 20K/F_4 Normal Open AGND
C483 C488
C491 1000P/50V_4 0.1U/10V_4 0.1U/10V_4 SENSE_PHONE
C C
AGND C476 1000P/50V_4

AGND

VREFOUT_C
C455 1U/6.3V_4 AGND MIC
<27> VREFOUT_C R248 3.9K/F_4

R246 3.9K/F_4 CN21


1 7
MIC_L C688 2.2U/6.3V_6 MIC_L1 L37 SBK160808T-301Y-N/0.2A_6MIC_IN_L 2 DFTJ06FR342
<27> MIC_L
6 9 audio-311105-2-6p-smt
<27> MIC_R MIC_R C689 2.2U/6.3V_6 MIC_R1 L38 SBK160808T-301Y-N/0.2A_6MIC_IN_R 3 10
4
5 8
C456 220P/50V_4
AEC_311105-2
AGND C436 220P/50V_4 AGND Normal Open AGND

SENSE_MIC

D D

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom USB/BT/Audio JacK 1A

Date: Tuesday, February 15, 2011 Sheet 28 of 42


1 2 3 4 5 6 7 8
5 4 3 2 1

+1.05V_LAN

R96 2.49K/F_4 LANRSET LAN_TX# R103 *3.6K/F_4 +3V_LAN


+3V_LAN
30

XTAL2
XTAL1
LAN_GPIOS R317 1K_4
+3V_LAN
LAN_GLINK100#
GND VIA x 9 Pcs

49

46

41
48
47

45

40

37
44
43
42

38
39
U16

AVDD33
AVDD33

AVDD10

DVDD10(NC)
LED0

LED1/EESK
GND

RSET

CKXTAL2
CKXTAL1
AVDD33(NC)

DVDD33
GPO/SMBALERT
D D

MDI0+ 1 36
MDI0- MDIP0 REGOUT
2 MDIN0 VDDREG 35
3 AVDD10 VDDREG 34
MDI1+ 4 33 IND SMD 4.7UH +-20% 680MA(CBC2518T4R7M)
MDI1- MDIP1 ENSWREG R328 10K_4
5 MDIN1 EEDI 32 CV-4707MZ00
6 AVDD10(NC) LED3/EEDO 31
LAN_ECS_SCL R327 10K_4
XTAL1
7 MDIP2(NC) RTL8161EH/8165EH EECS 30
8 MDIN2(NC) DVDD10 29 +1.05V_LAN
XTAL2 9 28 PCIE_WAKE# Power trace Layout > 60mil
Y3 AVDD10(NC) LANWAKEB PCIE_WAKE# <12,32>
10 27 +3V_LAN
MDIP3(NC) DVDD33 ISOLATEB
11 MDIN3(NC) ISOLATEB 26 >60mil
12 PLTRST#

SMBDATA(NC)
AVDD33(NC) PERSTB 25 PLTRST# <3,11,17,26,31,32>

SMBCLK(NC)
25MHZ

REFCLK_N
REFCLK_P
CLKREQB
DVDD10

EVDD10

HSON
HSOP
+1.05V_LAN

HSIN
HSIP

GND
C579 C568
33P/50V_4 33P/50V_4

13
14
15
16
17
18
19
20
21
22
23
24
8/25 SI for TXC.
if ISOLATEB pin C598 C567 C255
+3V pull-low,the LAN 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
+1.05V_LAN

EVDD10
chip will not drive
<11> PCIE_CLKREQ_LAN# it's PCI-E outputs
( excluding VDD10 near pins 13, 29, 45.
<11> PCIE_TXP2_LAN R326
C
<11> PCIE_TXN2_LAN 1K/F_4 PCIE_WAKE# pin ) C
<11> CLK_PCIE_LANP
<11> CLK_PCIE_LANN EVDD10
<11> PCIE_RXP2_LAN C596 0.1U/10V_4 PCIE_RXP2_LAN_L ISOLATEB
C597 0.1U/10V_4 PCIE_RXN2_LAN_L
<11> PCIE_RXN2_LAN
C580 C576
1U/6.3V_4 0.1U/10V_4 8/25 SI for Realtek

2
R325

EVDD10 near pins 21.


15K/F_4

1
U13

Transformer for 10/100 LAN_MX1-

LAN_MX1+
1
RD+ RX+
16 MDI1-

V_DAC_2
+3V_LAN
3 RD- CT 15

LAN_EMI 75/F_4 R84 LAN_MCT0_2 C189 LAN_MCT1 2 14 MDI1+ +3VLANVCC


0.01U/100V_0603 CT RX-
LAN_MX0- 6 9 MDI0+
B TD+ TX- C300 C302 C290 C220 C239 C301
B

LAN_MX0+ 8 10 V_DAC_1 C146


TD- CMT 0.01U/25V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
LAN_EMI 75/F_4 R70 LAN_MCT0_1 C139 LAN_MCT0 7 11 MDI0-
0.01U/100V_0603
CT TX+

NS681684 VDD33 nesr pins 27, 39, 47, 48.


C522
1000P/3KV_1808

FOR EMI

Lan Con. C214 1000P/50V_4 RJ45


CN17

+3VLANVCC R85 330_4 LAN_GLED 12


LAN_GLED# LED_AMBER_P
11 LED_AMBER_N
<38> +3VLANVCC
<2,3,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,30,31,32,35,36,38> +3V
8 RX1-
7 RX1+
LAN_MX1- 6
LAN_GLINK100# RX0-
5 TX1-
A 4 A
LAN_TX# LAN_MX1+ TX1+
3
LAN_MX0- RX0+
2 14
LAN_MX0+ TX0- GND1
1
C119 LAN_GLED# FOR EMI TX0+
13
GND
1000P/50V_4
C581 0.01U/25V_4 +3VLANVCC R68 330_4 LAN_YLED
LAN_TX#
10 LED_WHITE_P 352-(&75'
4XDQWD&RPSXWHU,QF
9 LED_WHITE_N
DFTJ12FR178
C114 1000P/50V_4 rj45-130452-u4-12p
RJ45_CONN Size Document Number Rev
Custom RTL8165EH 1A

Date: Tuesday, February 15, 2011 Sheet 29 of 42


5 4 3 2 1
1 2 3 4 5 6 7 8

POWER BOTTON CONNECT


KEYBOARD Con.
MY5
MY6
MY3
MY7
C76
C125
C131
C111
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
MX1
MX7
MX6
1
2
CN4

1
2
<31>

<31>
MY[0..17]

MX[0..7]
MY[0..17]

MX[0..7]
31
100mA C55 1U/6.3V_4 1. +3VPCU(LIDSWITCH PWR) MY9
3
4
3
MY8 C117 *220P/50V_4 MX4 4
5 5
CN3 2. LEDVCC(+3VPCU) MY9 C53 *220P/50V_4 MX5 6
C58 0.1U/10V_4 MY10 C171 *220P/50V_4 MY0 6
7 7
3. LIDSWITCH MY11 C165 *220P/50V_4 MX2 8
A +3VPCU 1 8 A
+3VPCU MX3 9
2 9
.(<%2$5'38//83
4.POWERON# MY5 10
<22,31> LID_EC# 3 10
MY1 11
<31> NBSWON1# PWR_LED# 4 MY1 MX0 11
<31> PWR_LED# 5 5. PWRLED# C84 *220P/50V_4 12
12
MY2 C102 *220P/50V_4 MY2 13
6 MY4 C105 *220P/50V_4 MY4 13
6. GND 14 14
MY0 C63 *220P/50V_4 MY7 15
PWR BTN CONN 15
MY8 16 RP4
DFFC06MR001 MX4 C57 *220P/50V_4 MY6 16 MY14
17 +3VPCU 10 1
88513-0601-6P-L-SMT MX6 C50 *220P/50V_4 MY3 17 MY13 MY11
18 9 2
MX3 C71 *220P/50V_4 MY12 18 MY12 MY10
19 8 3
PWR_LED# MX2 C69 *220P/50V_4 MY13 19 MY3 MY15
20 7 4
C66 0.1U/10V_4 MY14 20 MY6
21 6 5
LID_EC# MY11 21
22 22
C67 0.1U/10V_4 MX7 C43 *220P/50V_4 MY10 23 +3VPCU *10P8R-8.2K
MX0 C95 *220P/50V_4 MY15 23
24 24
MX5 C60 *220P/50V_4 MY16 25 RP3
NBSWON1# MX1 C42 *220P/50V_4 MY17 25 MY2
26 10 1
C68 0.1U/10V_4 26 MY1 MY4
+3V 27 9 2
27
2 1 NBSWON1# MY12 C143 *220P/50V_4 <31> CAPSLED# R89 2 1 200/F_628 MY5 8 3 MY7
G1 *SHORT_ PAD1 MY13 C153 *220P/50V_4 R92 2 28 MY0 MY8
<31> NUMLED# 1 200/F_629 7 4
MY14 C157 *220P/50V_4 WIRELESS_ON_R 29 MY9
30 6 5
MY15 C182 *220P/50V_4 WIRELESS_OFF_R 30
31
MY16 C188 *220P/50V_4 31
32 32 +3VPCU *10P8R-8.2K
MY17 C201 *220P/50V_4
+3V DFFC32FR025 R83 *8.2K_4MY16
bl135h-32rla-tand-32p-l-smt R88 *8.2K_4MY17
KB CONN

B
8/25 SI for H/W. EC KB3930 has included K/B pull-up resistor and function B

+5V +5V
SI Modify
R298 R97
1K_4 1K_4

8/25 SI for LX. 8/25 SI for LX.


R302 2 1 *200/F_6 R95 2 1 *200/F_6
WIRELESS_ON_R WIRELESS_OFF_R

3
<31> WIRELESS_ON 2 <31> WIRELESS_OFF 2

Q21 Q22
PDTC144EU PDTC144EU

1
8/25 SI for LX. 8/25 SI for LX.

C
LED Con. TOUCH PAD Con. C

1000P/50V_4

1000P/50V_4
CN10 change to +3VSUS
+3V 1 close conn
<10> SATA_LED# PV EMI change to CH21006KB16
2 R188 4.7K_4 TPCLK
<31> PWRLED_LEFT 3 +3VSUS
R180 4.7K_4 TPDATA
4
To TOUCH PAD SW board

C401

C398
LED/B conn
8/25 SI for H/W. DFFC04FR042 CN5
88513-0401-4P-L-SMT TP_L
SATA_LED# C407 10P/50V_4 TP_R 6
C507 0.1U/10V_4 5
L35 BLM18BA470SN1D/0.3A_6 TPCLK-1 4
1. +3V <31> TPCLK 3
PWRLED_LEFT <31> TPDATA L34 BLM18BA470SN1D/0.3A_6 TPDATA-1
C506 0.1U/10V_4 C399 10P/50V_4 2
2. SATA_LED# 1
CN6
TP_LED#
<31> TPLED# TP_R 1
3. PWR_LED# TP_L 2
8/25 SI for H/W. TOUCH PAD CONN
DFFC06MR001 3
4.GND 25 mils 4
+3VSUS C386 0.1U/10V_4 88513-0601-6P-L-SMT
50503-0040N-001
DFFC04FR042
88513-0401-4P-L-SMT

D D

<10,22,31,33,39> +3VPCU
<14,23,24,25,27,32,38> +5V
<32,38> +3VSUS

352-(&75'
<2,3,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,31,32,35,36,38> +3V

4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom LED/KB/SW/TP 1A

Date: Tuesday, February 15, 2011 Sheet 30 of 42


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3VPCU

C612 0.1U/10V_4
500mA
adapter Type check
+3VPCU

Change to 1SS355 as Current loss 32

1
C615 0.1U/10V_4 +3VPCU_EC +3VPCU 3920_RST#
C609 0.1U/10V_4 D6 SI CHANGE POWER
U5 C585 0.1U/10V_4 1SS355
SERIRQ 3 9 C617 0.1U/10V_4 R309 4.7K_4 +1.05V_VTT
<10> SERIRQ SERIRQ VCC1
LFRAME# 4 22 C309 0.1U/10V_4
<10,32> LFRAME#

2
LAD0 LFRAME VCC2 C606 0.1U/10V_4 L49 AD_TYPE R310 10K_4 R304 100/F_4 C575 220P/50V_4
<10,32> LAD0 10 33 AD_ID <39>
LAD0 VCC3

2
LAD1 8 96 C608 0.1U/10V_4 BLM18BA470SN1D/0.3A_6 +5VPCU Q24
<10,32> LAD1 LAD1 VCC4
LAD2 7 111 C318 0.1U/10V_4 PV Change
<10,32> LAD2 LAD2 VCC5 U4
LAD3 5 125 C291 *10U/6.3V_8 3 1
<10,32> LAD3 LAD3 VCC6 PM_THRMTRIP# <3,13>
<12> CLK_33M_KBC 12 67 +3VPCU_EC 5 1 C571 R306
A PCICLK AVCC VOUT VIN 12K/F_4 C560 MMBT3904-7-F A
<3,11,17,26,29,32> PLTRST# 13
CLKRUN# PCIRST/GPIO5 C595 0.1U/10V_4 C588 0.1U/10V_4 100P/50V_4
<12> CLKRUN# 38
CLKRUN PV Remove BOM
C339
SCI1# 20 4.7U/6.3V_6 3
GATEA20 SCI/GPIOE TEMP_MBAT SHDN *1U/6.3V_4
<13> EC_A20GATE 1 63 TEMP_MBAT <39>
RCIN# GA20/GPIO0 AD0/GPI38 AD_TYPE
<13> EC_RCIN# 2 64
3920_RST# KBRST/GPIO1 AD1/GPI39 AD_AIR
37 65 AD_AIR <39>
ECRST AD2/GPI3A SYS_I
AD3/GPI3B
66 SYS_I <39> 4
NR/FB GND
2 Change to RB500 as Current loss
MX0 55
<30>
<30>
MX0
MX1
MX1 56
KSI0/GPIO30
KSI1/GPIO31 DA0/GPO3C
68 T24 8/25 SI for TP.
C340 *TPS73133 adapter select for EC SCI1# D9 1 2 RB501V-40 SIO_EXT_SCI# <13>
MX2 57 70
<30> MX2 KSI2/GPIO32 DA1/GPO3D GPU_PROCHOT
MX3 58 71 VFAN *1U/6.3V_4
<30> MX3 KSI3/GPIO33 DA2/GPO3E VFAN <25>
MX4 59 72 D/C# +3VPCU GPIO43 DNBSWON#1 D10 1 2 RB500V-40
<30> MX4 KSI4/GPIO34 DA3/GPO3F D/C# <39> DNBSWON# <12>
MX5 60 R368 10K_4 R369 *10K_4
<30> MX5 KSI5/GPIO35
MX6 61 21 PWM_VADJ Hi ==> DIS/SG
<30> MX6 KSI6/GPIO36 PWM1/GPIOE PWM_VADJ <22>
MX7 62 23 KBSMI#1 D8 1 2 RB500V-40
<30> MX7 KSI7/GPIO37 PWM2/GPIO10 BATSHIP <39> SIO_EXT_SMI# <13>
Low ==>UMA
MY0 39 26 R513 *0_4 EC_WP# MV add for WP# function Add Pin 117,103 for DSM,116 for Bluetooth
<30> MY0 KSO0/GPIO20 FANPWM1/GPIO12
MY1 40 27
<30> MY1 KSO1/GPIO21 FANPWM2/GPIO13 EMU_LID <22>
MY2 41 28 FAN1SIG
<30> MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG <25>
MY3 42 29 Delete T10 and tie pin 117 from Lan for DSM
<30> MY3 KSO3/GPIO23 FANFB2/GPIO15 ODD_PD <25>
MY4 43
<30> MY4 KSO4/GPIO24
MY5 44 77 MBCLK
<30> MY5 KSO5/GPIO25 SCL1/GPIO44 MBCLK <39>
MY6 MBDATA R341 10K_4 NBSWON1#
<30> MY6 45
KSO6/GPIO26 SDA1/GPIO45
78 MBDATA <39>for Battery charge/charge and cap board +3VPCU
MY7 46 79 MBCLK2
<30> MY7 KSO7/GPIO27 SCL2/GPIO46 MBCLK2 <11,16>
MY8 47 80 MBDATA2 for VGA/CPU thermal R338 4.7K_4 MBCLK
<30> MY8 KSO8/GPIO28 SDA2/GPIO47 MBDATA2 <11,16>
MY9 48 10/21 PV reserve for ENE timing R342 4.7K_4 MBDATA
<30> MY9 KSO9/GPIO29
<30> MY10 MY10 49 C771 *10P/50V_4 Close to U5
MY11 KSO10/GPIO2A
<30> MY11 50 pin79/pin80
MY12 KSO11/GPIO2B C772 *10P/50V_4 +3VPCU
51
<30>
<30>
MY12
MY13 MY13 52
KSO12/GPIO2C VGA_ALERT
512K byte SPI EC ROM 128K byte SPI EC ROM

3
MY14 KSO13/GPIO2D SUSB#
<30> MY14 53 6 SUSB# <12>
B MY15 KSO14/GPIO2E GPIO4 C545 0.1U/10V_4 B
<30> MY15 54
MY16 KSO15/GPIO2F HWPG U11
<30> MY16 81 14 HWPG <3,20,33,34,37,40,41>
MY17 KSO16/GPIO48 GPIO7 CPU_PROCHOT Q32 BIOS_CS#
<30> MY17 82 15 2 1 8
KSO17/GPIO49 GPIO8 *2N7002EPT_SC70 BIOS_SPI_CLK_I CE# VDD
6
GPUT_CLK SUSC# BIOS_WR# SCK
<20> GPUT_CLK 83 16 SUSC# <12> 5
GPUT_DATA PSCLK1/GPIO4A GPIOA PWRLED_LEFT BIOS_RD# SI SPI_7P
For GPU thermal <20> GPUT_DATA 84
PSDAT1/GPIO4B GPIOB
17 PWRLED_LEFT <30> 2
SO HOLD#
7
<30> TPLED# TPLED# 85 18 8/25 SI for H/W. R300 10K_4
GPIO33_E <10,13>

1
ACIN PSCLK2/GPIO4C GPIOC NBSWON1# SPI_3P3
<20,38,39> ACIN 86 19 NBSWON1# <30> +3VPCU 4
TPCLK PSDAT2/GPIO4D GPIOD R301 10K_4 WP# VSS
<30> TPCLK 87 25 SLP_S5 <12>
TPDATA PSCLK3/GPIO4E GPIO11 W25X10BVSNIG
<30> TPDATA 88 30 EC_DEBUG1 <32>
PSDAT3/GPIO4F GPIO16 AKE35FN0N00
BIOS_RD# GPIO17
31
KBSMI#1
EJECT# <25> Vender IC FLASH(8P) W25X10BVSNIG(SOIC)
119 32
BIOS_WR# RD GPIO18 SOIC8-6-1_27
BIOS_CS#
120
WR VR_ON
10/27 PV del for only use 150 mil Socket DG008000031
128
SELMEM/SPICS GPIO19
34
NUMLED#
VR_ON <35> Vender
<12> PCI_SERR# 89
SELIO/GPIO50 GPIO1A
36 NUMLED# <30> EON - EN25F10-100GIP
76
DGPU_PR_EN_E 109 SELIO2/GPIO43 Socket DG008000031
4/19 modify from EC request AKE35FN0Q00 IC FLASH(8P) EN25F10-100GIP(SOIC)
EC_GPXD1 D0/GPXD0
110
D1/GPXD1 10/27 PV add for EMI
<12> SUS_PWR_ACK 112
D2/GPXD2 WINBOND - W25X10BVSNIG
114 73
D3/GPXD3 CIR_RX/GPIO40 BIOS_SPI_CLK_I
<32> RF_LINK#
BLUELED
115
D4/GPXD4 GPIO41
74 AKE35FN0N00 IC FLASH(8P) W25X10BVSNIG(SOIC)
116 75
D5/GPXD5 GPIO42 DNBSWON#1 R508
117 90
D6/GPXD6 GPIO52 CAPSLED#
118
D7/GPXD7 GPIO53
91
PWR_LED#
CAPSLED# <30> Close to 33_4
92 PWR_LED# <30>
GPIO54 EC_PWROK U5 pin126
<28> USBPW_ON#
SUSON
97
A0/GPXA0 GPIO55
93
RSMRST#
EC_PWROK <12> Close to +3V
<37,38> SUSON 98 95 RSMRST# <12>
MAINON A1/GPXA1 GPIO56 VOLMUTE# BLM15AG700SS1D(70,0.5A) U11
<34,37,38,39,41> MAINON 99 121 VOLMUTE# <27> MV add latch for write protect
LAN_POWER A2/GPXA2 GPIO57 BIOS_SPI_CLK R299 BIOS_SPI_CLK_I
<38> LAN_POWER 100 126
S5_ON A3/GPXA3 GPIO58 LID_EC# C774
<33> S5_ON 101 127 LID_EC# <22,30>
R370 *0_4/S A4/GPXA4 GPIO59 22P/50V_4 C775
<32> BLED_COMBO 102
GPIO43 A5/GPXA5 C544
103
C A6/GPXA6 CRY2 C361 20P/50V_4 *0.1U/10V_4 R512 C
<12> AC_PRESENT 104 123 *22P/50V_4
A7/GPXA7 XCLKO U31 *10K/F_4
<39> MBATLED0# 105
A8/GPXA8
From EC
<39> AC_LED_ON# 106
A9/GPXA9 If use PCH
107 122 EC_WP# 1 8 FCH RST#
<30> WIRELESS_ON A10/GPXA10 XCLKI SUSCLK should CLK VCC
<30> WIRELESS_OFF 108
A11/GPXA11 change to 20P. R509 *0_4 PLTRST#
10/25 PV modify 2
D PRE
7
GND1
11 10/25 PV modify
GND2
24 10/26 PV modify for HW 3
Q CLR
6
35 CRY2 R150 *0_4/S
GND3 PCH_SUSCLK <12>
124 94 4 5 SPI_3P
V18R GND4 GND Q
113
GND5
2

69
C610 C607 AGND R155 *SN74LVC1G74YZPR
0.1U/10V_4 4.7U/6.3V_6 100K_4
1

KB3930QF A2 R511 *0_4 R510 *100K_4


1

AC present: AC_IN-->high, CPU_PROCHOT-->low , H_PROCHOT#-->high


Remove AC: AC_IN-->low, CPU_PROCHOT-->low , H_PROCHOT#-->low FOR SG/DIS 10/25 PV modify UMA remove 3920_RST#

Remove AC and re-cove prochot: AC_IN-->low, CPU_PROCHOT--> high, H_PROCHOT#--> high <13,17,19> DGPU_PWROK R360 *0_4/S EC_GPXD1 +3V R345 4.7K_4 MBCLK2 +3VPCU
R313 47K_4 C586 0.1U/10V_4
R347 4.7K_4 MBDATA2
+3VPCU 10/25 PV modify
10/25 PV modify R344 *10K_4 GPIO33_E
<36> DGPU_PR_EN R359 *0_4/S DGPU_PR_EN_E R357 100K_4
BLUELED <28,32>
R339 *0_4/S H_PROCHOT# <3,35>
12/28 Nvidia recommend
3

R343
D 10K_4 R358 +3V C605 *10P/50V_4 CLK_33M_KBC D
*100K_4 R350 *10_4
CPU_PROCHOT_1 2 PQ51 R5105 2.2K_4 GPUT_CLK
2N7002EPT_SC70
8/25 SI for H/W. R5106 2.2K_4 GPUT_DATA
3

PQ52 PQ50

352-(&75'
1

ACIN R340 *0_4 2 CPU_PROCHOT


2
<3,5,6,13,14,34,35,36,40> +1.05V_VTT 4XDQWD&RPSXWHU,QF
<2,3,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,32,35,36,38> +3V
*2N7002EPT_SC70 2N7002EPT_SC70 <10,22,30,33,39> +3VPCU
<33,39> +5VPCU Size Document Number Rev
1

Custom 1A
EC (KB3926)/ROM
Date: Tuesday, February 15, 2011 Sheet 31 of 42
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Mini PCI-E Card 1


8/25 SI for H/W.

<13,28> BT_OFF#
R29 0_4
WLAN +3V

C47 C113
+1.5V

C26 C36 C41 C21


+3V

C126
32
R28 *4.7K_4 0.01U/25V_4 0.1U/10V_4 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3VS_6
+3V
10/27 PV modify FOR KBC DEBUG +1.5V 4/19 modify from EC request
for no support BT CN15 10/25 PV modify
Combo R30 *0_6 +MINIEC_5V 51 52 R31 *10K_4
A
+5V Reserved +3.3V +3V A
49 50 R32 *0_4
Reserved GND BLED_COMBO <31>
EC debug pin 47 48 R34 *0_4/S
Reserved +1.5V MINI_BLED R33 *0_4
<31> EC_DEBUG1 45 46 BLUELED <28,31>
Reserved LED_WPAN# RF_LINK#
43 Reserved LED_WLAN# 44 RF_LINK# <31>
41 42 R37 *0_4
Reserved LED_WWAN# R38 10K_4
<11> PCIE_TXP1 39 Reserved GND 40 +3V
37 38
0510 add for WiMAX
<11> PCIE_TXN1 Reserved USB_D+ USBP10+ <12>
<11> PCIE_RXP1 35 GND USB_D- 36 USBP10- <12>
<11> PCIE_RXN1 PCIE_TXP1 33 34 10/25 PV modify
PCIE_TXN1 PETp0 GND
31 32
PETn0 SMB_DATA
10/27 PV modify 29 GND SMB_CLK 30 INTEL WLAN
for no support BT 27 28 CARD PIN 20
R47 *4.7K_4 PCIE_RXP1 GND +1.5V +3VSUS
+3V 25 26 W_DISABLE#
Combo R53 *0_4 PCIE_RXN1 PERp0 GND
<13,28> BT_OFF# 23 24
PERn0 +3.3Vaux PLTRST# have R74 *10K_4
10/25 PV modify 21 GND PERST# 22 PLTRST# <3,11,17,26,29,31>
R55 *0_4/S 19 20 internal
<12> CLK_33M_DEBUG Reserved W_DISABLE# RF_OFF# <13>
PLTRST# 17 18 pull-up 110k
Reserved GND
ohm

2
8/25 SI for ES2 BT. 15 16 LAD0 LAD0 <10,31>
CLK_PCIE_WLAN GND Reserved LAD1
<11> CLK_PCIE_WLANP 13 14 LAD1 <10,31>
CLK_PCIE_WLAN# REFCLK+ Reserved LAD2
<11> CLK_PCIE_WLANN 11 12 LAD2 <10,31>
REFCLK- Reserved LAD3
9 10 LAD3 <10,31>
GND Reserved LFRAME# MINICAR_PME#
<11> PCIE_CLKREQ_WLAN# 7 8 LFRAME# <10,31> <12,29> PCIE_WAKE# 3 1
R71 *0_4 BT_COMBO_EN_R# CLKREQ# Reserved Q7
<12> BT_COMBO_EN# 5 6
BT_CHCLK +1.5V *DTC144EUA
3 BT_DATA GND 4
MINICAR_PME# 1 2
WAKE# +3.3V
8/25 SI for ES2 BT.
MINI PCIE H=9.0
BT_DATA,BT_CHCLK,CLKREQ# DFHS52FR056
internal pull-DOWN 100k ohm MIPCI-C-1759513-52P-LDV-SMT
B B

CLK_33M_DEBUG R56 *0_4 C75 *33P/50V_4


8/25 SI for H/W. <2,6> +1.5V
<2,3,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,35,36,38> +3V
for EMI request <10,22,30,31,33,39> +3VPCU
<14,23,24,25,27,30,38> +5V

C C

D D

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
MINI PCIE CONN X1
Date: Tuesday, February 15, 2011 Sheet 32 of 42
1 2 3 4 5 6 7 8
5 4 3 2 1

DC/DC +3VS5/+5VS5
33
D +VIN D

Place these CAPs +VIN_5VS5


PL16 close to FETs
UPB201212T-800Y-N
Place these CAPs +VIN_3VS5 +VIN
close to FETs PL10
PC74
PC198 PC199 PC196 PC197 UPB201212T-800Y-N

0.1U/25V_4

2200P/50V_4
4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
+VIN +5VPCU
PC109 PC110 PC107 PC106 PC188

2200P/50V_4
0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
PR90 PC68
10_8

4.7U/6.3V_6
+5VPCU
+3VPCU +2VREF

2
PC27
PC60 PC10 PR17

4.7U/6.3V_6
1U/6.3V_4 PR18 *0_4/S

0.1U/25V_4
8
7
6
5

5
6
7
8
PR85 *0_4
+5 Volt +/- 5% *665K/F_4 +3.3 Volt +/- 5%

1
17
16
Countinue current:4A Countinue current:4A

3
C 4 4 C

Peak current:6A Peak current:6A

VREG3

VREG5

REF
VIN
PR76
8205EN 13 4
PQ47 EN0 TONSEL PQ28
OCP minimum:7.5A DMG4496
*330K/F_4
5V_UGATE1 21 10 3V_UGATE2 DMG4496 OCP minimum:7.5A
PC46 UGATE1 UGATE2 PC43
+5VS5 PR61 PR55 +3VS5
5V_BST1 22 9
1
2
3 BOOT1 BOOT2

3
2
1
PL20 2_6 2_6
2.2UH/8A 0.1U/25V_4 PU3 0.1U/25V_4 PL21
+5V_ALWP 5V_PHASE1 20 RT8223 11 3V_PHASE2 +3.3V_ALWP
PHASE1 PHASE2 2.2UH/8A
PR238 PR240
8
7
6
5

5V_LGATE1 19 12 3V_LGATE2
LGATE1 LGATE2

5
6
7
8
*0_2/S *0_2/S
1

24 PR135

ENTRIP1

ENTRIP2

SKIPSEL
+ 5V_FB1 VOUT1 2.2_8
4 2 7
FB1 OUT2

1
PC203 PC204 PR20 PR84 4

GND
GND
ENC
PR41
15.4K/F_4 2.2_8 PR46 PGOOD 23 5 3V_FB2 +
0.1U/10V_4
330U/6.3V_6X5.8

+3VS5
2

0_4 PGOOD FB2 PC211 PC205


10K_4
PQ46 PC111

0.1U/10V_4

330U/6.3V_6X5.8
1

18

25
15
14

2
PC59 ME4812 PQ23

2200P/50V_4
HWPG 3,20,31,34,37,40,41
ME4812
2200P/50V_4

1
2
3

3
2
1
PR19
10K/F_4 PR21 2 1
Rds(on) 20m ohm 110K/F_4 PR78
*0_4/S PR16
Rds(on) 20m ohm 6.8K/F_4
PR79
*0_4
PR14
B 130K/F_4 B

R12 SI for prevent interference +3VPCU PR15


10K/F_4
PR77 S5_ON 31
S5_ON
+5VS5
0_4
PC61

*0.1U/10V_4
1

PC229 PC230 PC231 PC232 PC233 PC234 PC235 PC236


1000P/50V_4

1000P/50V_4
1U/6.3V_4

1U/6.3V_4
0.1U/10V_4

0.1U/10V_4
0.01U/25V_4

0.01U/25V_4
2

+3VS5
1

PC237 PC238 PC239 PC240 PC241 PC242 PC243 PC244


1000P/50V_4

1000P/50V_4
0.1U/10V_4

0.1U/10V_4
1U/6.3V_4

1U/6.3V_4
0.01U/25V_4

0.01U/25V_4
2

A A
1

PC277 PC278 PC279 PC280 PC281 PC282 PC283 PC284


352-(&75'
4XDQWD&RPSXWHU,QF
1000P/50V_4

1000P/50V_4
1U/6.3V_4

1U/6.3V_4
0.1U/10V_4

0.1U/10V_4
0.01U/25V_4

0.01U/25V_4
2

Size Document Number Rev


Custom 1A
+5V/+3V (RT8206B)
Date: Wednesday, February 16, 2011 Sheet 33 of 42
5 4 3 2 1
5 4 3 2 1

+3VS5

PR62
10K/F_4

PR47 +VIN_1.05V_VTT
34
H_VTTVID1 5
*0_4 +VIN
PR60 PR56 PL3
+5VS5
10_6 *360K/F_4 UPB201212T-800Y-N
PC45
+1.05V_VTT Volt +/- 5%

RT8238TON
RT8238VCC
D D

1U/6.3V_4
PC95 PC91 PC77 PC72 PC69
Countinue current:10A

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
Peak current: 16A

5
D OCP minimum: 18A

11
5
PU1 G
PR42 3 RT8238DH 4

TON
VCC
RT8238ILIM 10 UGATE PC53 S +1.05V_VTT
PR7 *0_4/S CS PR70 PQ21 +1.05V_VTT_S2
69.8K/F_4 4 RT8238BST_1 RT8238BST
3 STAT_1.1 BOOST

1
2
3
2_6 RJK03B9D PL15
PR8 *0_4/S RT8238HWPG_S2A 9 0.1U/25V_4 PCMC104T-1R0MN/18A
3,20,31,33,37,40,41 HWPG PGOOD RT8240B
2 RT8238LX 600 mils
PR9 0_4 RT8238EN 8 PHASE
31,37,38,39,41 MAINON EN
1 RT8238DL
PR226

MODE
LGATE PR83

GND

5
PC7 13 2.2_8

FB
PAD 100_4

1
D

*0.1U/10V_4
G + +

12

6
4 PC215 PC206 PC216
S

0.1U/10V_4
2

390U/2.5V_6X5.8ESR10

*390U/2.5V_6X5.8ESR10
PQ19 PC81

RT8238FB

1
2
3
Vo=0.5(R1+R2)/R2 RJK03D3D

2200P/50V_4
PC31
PR10
+5VS5
*0_4
*100P/50V_4

C PR11 PR43 RDSon=5m ohm C

100_4 0_4
PR37
*10K/F_4

PR13
VTT_SENSE 5
0_4

PR12
VSS_SENSE_VTT 5
0_4

Pre SI modify 0216

B +3VS5 +1.8V +/- 5% B

Countinue current:0.7A
Peak current:1A
3 VIN NC 5
PC187 PC183
+1.8V
10U/6.3V_8

0.1U/10V_4

PU12
G9661-25ADJF12U 6
VOUT
PR210
31,37,38,39,41 MAINON 2 EN
0_4
+5VS5 4 8 PC194 PC186 PC189
PC182 VDD GND
10U/6.3V_8

10U/6.3V_8

0.1U/10V_4
ADJ

1 9
*0.1U/10V_4

PGOOD GND1
PC190
7
1U/6.3V_4

1.2VADJ1.8VPR211
R1 127K/F_4
2 1 PR212 VO=(0.8(R1+R2)/R2)
3,20,31,33,37,40,41 HWPG 100K/F_4
R2 R2<120Kohm
PR209
*0_4/S

A A

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom +1.1V VTT / PCH 1A

Date: Wednesday, February 16, 2011 Sheet 34 of 42


5 4 3 2 1
5 4 3 2 1

Connect to input caps


IMVP_PWRGD 12
+VIN_CPU *UPB201212T-800Y-N

UPB201212T-800Y-N
PL1

PL2
+VIN
35

1
PC21 PC19 PC23 PC22 PC66 PC65 + +
+VIN_CPU PC39 PC207 PC208 +VCORE

2200P/50V_4
4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8

*4.7U/25V_8

100U/25V

100U/25V
Countinue current:24A

0.1U/25V_4

2
PQ9

5
RJK03B9D
PR142 D Peak current:40A
1K/F_4
4
G OCP minimum 48A
D S D

1
2
3
+5VS5 +3V
+VCORE
Pre SI modify 0214
PL19
0.36uH

1
PQ43

5
PR213 *0_4/S RJK03D3D PR216 PR224 PR235 + +
+5VS5 PR129 PC117 PR50 D 2.2_8 *0_2/S *0_2/S PC213 PC143 PC136
649K/F_4 1.91K/F_4

1000P/50V_4
G

0.1U/10V_4

330U_2.5V_7343

*330U_2.5V_7343
2

2
4
S
PR59

1
2
3
10_6 PC185

2200P/50V_4
R15D DB
PR227 PR228

39

38
16
37

2
*0_4/S 10/F_4
+1.05V_VTT PC41

PWRGD
PH0

PH1
VCC

RAMP
2.2U/6.3V_6

PR3 12 35 3212_DRVH1
499/F_4 AGND DRVH1
49 36 PR66
AGND BST1 2_6
3,31 H_PROCHOT#
PC56
PR44 *0_4/S PSI#_1 41 0.22U/25V_6
5 H_PSI# PSI#
3

PQ2 34 3212_SW1
DMN601K-7 SW1 +VIN_CPU

2 10 VR_TT
C C
This NTC Close to Phase 1 Inductor
PR119 31 3212_DRVL1 PC20 PC25 PC24 PC26 PC67 PC64
DRVL1

2200P/50V_4
4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8

*4.7U/25V_8
+5VS5
1

PR230 7.32K/F_4
11 TTSNS
220K_6 NTC +5VS5
+5VS5 PR115 *0_4 8 PU6
PC101 TRDET# PC73 PQ10
1 2 9 VARFR

5
Panasonic 0.01U/25V_4 ADP3212 32 RJK03B9D
CPU_VID0 PVCC
5 CPU_VID0 48 D
ERT-J0EV474J VID0 4.7U/6.3V_6 G
CPU_VID1 47 26 3212_DRVH2 4
5 CPU_VID1 VID1 DRVH2 S
CPU_VID2 46 25 PR113
5 CPU_VID2

1
2
3
VID2 BOOT2 2_6 +VCORE
CPU_VID3 45
5 CPU_VID3 VID3 PC82 PL18
CPU_VID4 44 0.22U/25V_6 0.36uH
5 CPU_VID4 VID4
27 3212_SW2
CPU_VID5 SW2 PQ42
5 CPU_VID5 43
VID5

5
RJK03D3D
CPU_VID6 42 D PR214 PR223 PR234
5 CPU_VID6 VID6

1
G 2.2_8 *0_2/S *0_2/S
PR51 *0_4/S VR_ON_R 1 29 3212_DRVL2 4 + + + +
31 VR_ON EN DRVL2 S PC209 PC147 PC220 PC285 PC286
PR45 499/F_4 DPRSLPVR_R 40

0.1U/10V_4
5 DPRSLPVR

1
2
3

390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10
DPRSLPVR
PGND 30
PR36 2 VR_PWRGD_CLKEN# PR33 *0_4/S CLKEN# 4 PC184
100K/F_4 CLK_EN#

2200P/50V_4
+3V PR49 1.91K/F_4 PR222 PR225
*0_4/S 10/F_4
PR94
28 3212_CS_PH2
SWFB2
22 OD3# 1K/F_4
PR82 3212_CS_PH1
23 33
PWM3 SWFB1
B 1K/F_4 B
24 SWFB3 R15D DB
19 CSSUM PR131
CSSUM 140K_6
PC18
6 PR126 PR137
FB PC99 165K/F_4 140K_6
150P/50V_4 PC108 Pre SI modify 0214
470P/50V_4

1000P/50V_4

PC83
12P/50V_4 PR125 PR229
PC29
Shortest the
73.2K/F_4

220K_6 NTC

PR39 PR98
PC76 7 20
1.65K/F_4 39.2K/F_4
COMP CSCOMP net trace
150P/50V_4 17 3212_CSCOMP
1000P/50V_4 LLINE
5 FBRTN Close to Phase 1 Inductor
21 PR120 1.69K/F_4
PR34 ILIM
3
CSREF

IMON
4.42K/F_4
IREF

RPM

Pre SI modify 0215 OCP:


RT

PC30
48A --> PR66 = 1.54 Kohm
13

14

15

18

0.082U/16V_4 PR130
PR24 PR4
0_4 0_4 5 I_MON *0_4/S
PR127 PR141 PR128 PC103
162K/F_4
80.6K/F_4

47.5K/F_4

1U/6.3V_4

PR35
*0_4

+1.05V_VTT
A A

VSSSENSE 5

VCCSENSE 5

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
CPU Core (ADP3212)
Date: Wednesday, February 16, 2011 Sheet 35 of 42
5 4 3 2 1
1 2 3 4 5 6 7 8

VGA Core
+5VS5
PD6
36
PR89 RB501V-40 Pre SI modify 0215
10_6
2 1 8208RTBST1 +VIN_VGA PL11 +VIN
UPB201212T-800Y-N

8208RTVDD1
A Pre SI modify 0211 PC85
1U/6.3V_4
PC125
1U/6.3V_4 13*9 A

PC126 PC134 PC135 PC140 PC133 PC130


+3V 0.1U/25V_4 2200P/50V_4 0.1U/25V_4 4.7U/25V_8 4.7U/25V_8 0.1U/25V_4
8208BST1_1 PR144 +VGACORE +/- 5%
2_6 Countinue current:18.19A

5
PR146 D

13
Pre SI modify 0211 Peak current:21A

9
2
PR92 7.87K/F_4 PU7
G
10K/F_4 8208CS1 10 12 8208RTDH1 4
OCP minimum 25A

VDDP
VDD

BST
PR109 CS DH S PQ36
0_4 RJK03B9D

1
2
3
DGPU_VC_EN 8208RTPG1 4 11 8208RTLX2 PL22 +VGA_CORE
PR248 PGOOD PHASE PCMC104T-R88MN
8208RTEN1 8208TON1 PR116
15 EN/DEM RT8208A TON 16
31 DGPU_PR_EN 0_4 232K/F_4

1
17 8 8208RTDL1
PAD DL

5
VOUT
Pre SI modify 0215 PC100 PR162 PC218 +
8208RTD11 D 2.2_8 0.1U/10V_4 PC219

G0
14 5

FB

D0
0.47U/10V_4

1
PD16 G1 D1 PR242 390U/2.5V_6X5.8ESR10
G

2
1 2 4 *0_2/S

6
13 DGPU_PWR_EN

1
PR108 S PQ37
BAS316/DG 6.65K/F_4 RJK03D2D +

1
2
3
8208VOUT1
PR118 PC138 PC217
+3V_GFX 5.62K/F_4 2200P/50V_4 390U/2.5V_6X5.8ESR10

2
8208RTD10
PR123 +3V_GFX
47K_4 8208RTFB1
5'6RQ PRKP
&175/ &175/ PR138 PR97
B
13*6 *10K/F_4 1.33K/F_4 B

*3,2 *3,2 PR143


*10K/F_4 PR91
20 GFX_CORE_CNTRL0
  9 10K/F_4

  9 20 GFX_CORE_CNTRL1
PC90 PR122
*100P/50V_4 Pre SI modify 0211 *0_4
  9 GPU_VDD_SENSE 17

  1$ 9R  55 5

XSGDWH

+1.05V_VTT PC287
0.1U/10V_4

+3V_GFX

5
D
+VIN G PQ55
PR2
*22_8
4
S
RJK0392DPA
$
+12VALW

1
2
3
+1.05V_GFX
3

PR69 +3VS5
1M_4
PR80

1
C C
2 1M_4
1
2
5
6

PC169 PC288
3

PQ3 PC2 *10U/6.3V_8 0.1U/10V_4

2
*DMN601K-7 3 0.1U/10V_4
PR5
$ Pre SI modify 0211
1

DGPU_PWR_EN PR105 2 1M_4


0_4 PC3 PQ1
4

PQ8 0.01U/25V_4 ME3424D +3V_GFX +1.5VSUS


DMN601K-7 2 +1.05V_GFX +1.5V_GFX +12VALW
1

PQ12
DMN601K-7
PC5 PC4 +VIN PC113
1

5
0.1U/10V_4 *10U/6.3V_8 PR121 PR88 PR75 0.1U/10V_4
22_8 22_8 1M_4 D
G
4
S
PR111
3
PQ22
$

3
1M_4 PQ56 PQ15 RJK0392DPA

1
2
3
DMN601K-7 DMN601K-7
PD17 BAS316/DG PC47 +1.5V_GFX
1 2 2 2 2 0.01U/25V_4
3

PR110 PQ20
33K/F_4 PDTC144EU PQ16
DGPU_VC_EN 2 PR87 DMN601K-7 PC102 PC87 PC96
1

1
1M_4 0.1U/10V_4 *10U/6.3V_8 *10U/6.3V_8

PC86
1

D 0.47U/10V_4 D

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom +VGACORE (RT8208/1.8V) 1A

Date: Wednesday, February 16, 2011 Sheet 36 of 42


1 2 3 4 5 6 7 8
1 2 3 4 5

38
A A

PR65 +1.5VSUS
977$ *0_4/S
PR71
+VIN_DDR PL4
UPB201212T-800Y-N
+VIN

*0_4
+0.75V_DDR_VTT

4
PU4 PC40
24 23 PC49 PC63 PC62 PC48 PC50

MODE
VTT VLDOIN 0.1U/25V_4 4.7U/25V_8 4.7U/25V_8 2200P/50V_4 0.1U/25V_4
+1.5V +/- 5%

5
2 *0.1U/50V_6
PC70 PC71 VTTSNS
10U/6.3V_8 10U/6.3V_8 Countinue current:6A
1
VTTGND
21 1116DRVH 4
Peak current:12A
UGATE PQ14
3 PC28 AON7410 OCP minimum 15A
B GND PR58 B
22 1116VBST

3
2
1
VBST +1.5VSUS
P$ 25 GND 2_6
0.1U/25V_4
PL14
SLH0630-R82M-NB/13A
15 DDR_VTTREF 5 20 1116LL
VTTREF PHASE

1
PC51 7 19 1116DRVL PR6 PC202
NC LGATE

5
0.033U/10V_4 2.2_8 0.1U/10V_4 +

2
PD1 D PC200
RB501V-40 G PR217 390U/2.5V_6X5.8ESR10

2
1 2 51116S3 10 18 4 *0_2/S
31,34,38,39,41 MAINON S3 PGND S
PR31 17 PQ7 PC8

1
2
3
*0_4/S 51116S5 CS_GND PC11 +5VS5 RJK03D3D 2200P/50V_4
11 S5
31,38 SUSON 1U/6.3V_4
PR32 PR29 51116PG PR23
3,20,31,33,34,40,41 HWPG 13 15
100K_4 *0_4/S PGOOD VDDP
10_6
PC17
0.1U/10V_4 PR30 1116TONSET 12 PR63
+VIN_DDR 16 1116CS
TON CS
619K/F_4 7.5K/F_4
PR57
9 6 V5FILT
FB DEM
10K/F_4
8 VDDQSNS VDD 14

PR48
10.2K/F_4 TPS51116RGER PC12
1U/6.3V_4

C C
Pre SI modify 0211

D D

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
DDR3 (RT8207)
Date: Wednesday, February 16, 2011 Sheet 37 of 42
1 2 3 4 5
5 4 3 2 1

+VH28

+VAD

PR52
PR86
*0_4/S
+VA
+5V
+VIN
+1.8V
+3VS5
+5VS5
39
14,23,24,25,27,30,32
22,33,34,35,36,37,39,40,41
5,14,34
3,10,11,12,13,14,17,28,33,34,36,40
14,22,28,33,34,35,36,37,40,41
39
+VH28 39
22_6
+VAD_1 39
+3VSUS 30,32
+12VALW 22,25,36,39
PC54
+BATCHG 39
0.1U/25V_4 PC58
+1.5VSUS 3,6,15,16,36,37
D PC55 1U/35V_6 D
ACIN 20,31,39 +3VLANVCC 29

G5934CN
PC57

G5934CP
0.1U/25V_4
+0.75V_DDR_VTT 15,16,37

0.47U/25V_6

20

18

16
17
19
PR74
*0_4/S +VAD_1

VIN

CP

VOUT
CN

D_CAP
31 LAN_POWER 1 15 G5934PG
ON1 PG
PR72
750K/F_4

MAINON 2 14 G5934VSENSE
31,34,37,39,41 MAINON ON2 VSENSE

+12VALW PR68
100K/F_4
31,37 SUSON 3 13
ON3 REG

PC42
1U/16V_4
MAINON 4 ON4
7G5934DISC3 PR26 +3VSUS
DISC3 *0_6/S

+3VLANVCC G5934DISC1 5 6G5934DISC2 PR28 +5V


C DISC1 DISC2 *0_6/S C

DRIVER4

DRIVER3

DRIVER1

DRIVER2
PR27

DISC4
*0_6/S PU2 +5VS5

GND
P2806

12

11

G5934DISC4 8

10

21

5
PC171 +VIN +0.75V_DDR_VTT
0.1U/10V_4

MAIND 4
+3VS5
PQ41 $ PR38
PC14 AON7410 22_8

3
2
1
2200P/50V_4 PR40
5

PR25 +5V 1M_4

3
PC33 PQ13 *0_6/S PQ5
AON7410 +3VS5 R12 SI: DMN601K-7
0.1U/10V_4

MAIND3.3V
Delete PC169,EE side already
4 2
have 10uF*2(C489,C490)
$
PC170

3
0.1U/10V_4
PC35 +3V PC34
+3V
1
2
3

1
2
5
6
2200P/50V_4 0.1U/10V_4

1
2
$
LAN_ON 3 PR22
PQ6 1M_4
PQ38 +3VLANVCC DMN601K-7
MAIND 6 MAINON_G 6,15
PC89 PC88 PC15 ME3424D

1
0.1U/10V_4 *10U/6.3V_8 +3VS5 2200P/50V_4
B B

PC221 PC222

0.1U/10V_4

*10U/6.3V_8
PC9
6
5
2
1

$
0.1U/10V_4

3 SUSD
+3VSUS
PQ4
ME3424D PC6
4

2200P/50V_4

PC16 PC13
0.1U/10V_4

*10U/6.3V_8

R12 SI for prevent interference R12 SI for prevent interference R12 SI for prevent interference

+3V +1.5VSUS +5V


1

1
PC245 PC246 PC247 PC248 PC249 PC250 PC251 PC252 PC269 PC270 PC271 PC272 PC273 PC274 PC275 PC276 PC261 PC262 PC263 PC264 PC265 PC266 PC267 PC268
1000P/50V_4

1000P/50V_4

1000P/50V_4

1000P/50V_4

1000P/50V_4

1000P/50V_4
0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4
1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4
0.01U/25V_4

0.01U/25V_4

0.01U/25V_4

0.01U/25V_4

0.01U/25V_4

0.01U/25V_4
2

2
A A
1

PC253 PC254 PC255 PC256 PC257 PC258 PC259 PC260


352-(&75'
1000P/50V_4

1000P/50V_4
1U/6.3V_4

1U/6.3V_4
0.1U/10V_4

0.1U/10V_4
0.01U/25V_4

0.01U/25V_4
2

4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom Dis-charge IC (G5934) 1A

Date: Wednesday, February 16, 2011 Sheet 38 of 42


5 4 3 2 1
5 4 3 2 1

DC_JACK

40
90W
+PRWSRC
EC4
2200P/50V_4
R12 PV:
change footprint. Do Not add test pad on BATDIS_G signal R12 SI:
+BATCHG
AD_ID 31 M/E modify.
R12 SI: EC2 EC1 EC3 EC5 PL6
CN14 3 +VA_AC +VA

*10U/25V_8

*10U/25V_8

*10U/25V_8

*10U/25V_8
M/E modify. +VAD UPB201212T-800Y-N
7 PL9
AD_ID
VDD PD9
8 PQ24 PQ49 PL5 CN13
VDD UPB201212T-800Y-N FDMC4435BZ PQ48 BATT+
1 2 1 8 2 1
D P0603BDG UPB201212T-800Y-N 2 1 D
PL7 1 2 7
4 5 2 P4SMAJ20A 4 3 3 6 SMD 3 10
GND UPB201212T-800Y-N BATDIS_ID_DOD PC97 PC75 3 10
3 4 5
PC84 PC201 PC79 SMC 4 9

0.1U/25V_4

0.1U/25V_4
PC80 FDS6679AZ 4 9
2 5
0.1U/25V_4

0.1U/25V_4

0.22U/25V_8
1
LED2 GND
6 5 7

0.1U/25V_4
GND 5 7

4
1 AC_LED_ON# PC78 PR231 +VIN +3VPCU
LED1 RC2512-R010 B_TEMP_MBAT 6 8

0.1U/25V_4
IDEA_G
2 6 8
1 2
To PWR LED DC-IN CONN PQ44 ACOK_IN PR102 *100/F_4 BATDIS_G Place this ZVS close to PR93 PR95 200045MR008G10JZR
PDTC144EU 330_4 330_4 DFHD08MR145
Far-Far away +VIN
PR215 PR104 150K/F_4 PC104 bat-bp02081-b82d5-7h-8p-l-v
+12VALW 3 1 +VH28

1
PQ45 PR54

0.1U/25V_4
1M_4 31 MBDATA
2

DMN601K-7 PD11 10K/F_4


+VAD 8681_VDDA
PR221 Place this ZVS close to 100_4
P4SMAJ20A 31 MBCLK
1 3 +5VPCU PR233 PR232
2.43K/F_6
Diode away +VIN PR103 *0_2/S *0_2/S PL8 PR53
TEMP_MBAT 31

2
3

PR99 PC144 UPB201212T-800Y-N PD2 PD3 1K/F_4

1
CSIN
CSIP
100K/F_4

UDZ5V6B-7-F

UDZ5V6B-7-F
3
PC115 2 PC32 PC148
AC_LED_ON# 31
ACOK_IN 1U/10V_4

0.01U/25V_4

0.01U/25V_4
*0.1U/25V_4

PQ11 +VIN_CHARGER
PDTC144EU 2ACOK# PD5
1

2
MBATLED0# BAS316/DG PR157 PR161
2 1 10/F_4 10/F_4 PR164
2

PQ18 PR100 PQ17 100_4 8681_VDDP PC93 PC92

3
PQ29 DMN601K-7 Place this cap

100K/F_4

*100P/50V_4

*100P/50V_4
PR112

1
PDTC144EU

8681_VDDA
2 ACIN PC105 PC123 PC122 PC121
PR136
PC212 close to EC

2200P/50V_4

1000P/50V_4
1M_4

4.7U/25V_8

0.1U/25V_4
1

28681IACP
C C

8681IACM
8681_VDDP

MMBT3904-7-F
+12VALW 3 1

1
PQ33 PC94 PC139
2

2
DMN601K-7 1U/10V_4 1U/10V_4
1M_4

5
15
PR147

6
1 3 +5VPCU 2.2U/10V_6 PD15
2.43K/F_6 RB501V-40

IACP

IACM

VDDA

VDDP
PR101
3

PR241
PR154

1
1M_4 MBCLK 10 2_6 PC214 4
SCL 8681B_2 8681B_1
2 MBATLED0# 31 *0_4/S 12
PC120 BST
+VAD PR140 0.1U/50V_6 PR219 +BATCHG
*0.1U/25V_4

PR151

3
2
1
PQ32 MMDT2907A 1M_4 MBDATA 11 13 8681HDR PQ31 RC1206-R020
1

PDTC144EU SDL HDR AON7410


Q2

4 3 *0_4/S F3_2X1_65-2_8
PL17
PR134
5 6 14 8681LX 8681LR 1 2
PR156 LX

5
220K_4 ACIN 8681_ACAV 9 6.8uH
PR96 20,31,38 ACIN ACAV

1
2 1 +VA 100K/F_4 PU9
Q1

PR132 1K_6 16 8681LDR PR239


PR158 LDR PC191 PC192 PC193 PC195 PC98
+VA +VAD_1
220K_4 PQ25 OZ8681 2.2_8
4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4

0.1U/25V_4
100K/F_4
PD10

2
BAS316/DG PD12 PR220 PR218
PR155
2 1 +VAD_1 2 1 DCIN 1 *0_2/S *0_2/S

3
2
1
VAC

1
10_8 5 PQ30 PC210
BAS316/DG ICHP AON7410

1500P/50V_4
PC137 PD8
PD13 PC142

RB501V-40
1U/25V_6

8681_ACAV 2 1

1U/10V_4

2
PR236 4
75K/F_4 BAS316/DG 8681COMP ICHM 8681ICHP PR163 10/F_4 8681CSP
8
B COMP 8681ICHM PR159 10/F_4 8681CSM B
PD14

GND
31 AD_AIR

IAC
31,34,37,38,41 MAINON 2 1
PR160 PC141
PC150 BAS316/DG 0_4

0.01U/50V_4
17

7
0.1U/10V_4
PR237

8681IAC
4

12.4K/F_4
PC146
+BATCHG
0.47U/10V_4

PQ34 PR165
Place this cap SYS_I 31
IMD2 10/F_4
close to EC
PC145 PC149 PR117
3

470/F_8

0.01U/50V_4

0.01U/50V_4
PQ35
PR148 PR152 PR149

Q1
1 2
+BATCHG 1K_6 220K_4 220K_4

3
+VAD 6 5

Place this cap 3 4 +PRWSRC

Q2
2 PQ26
+VA close to EC MMDT2907A BATDIS_ID_DOD
31 BATSHIP
DMN601K-7
+VH28 38
+VAD_1 38
+3VPCU 10,22,30,31,33
ACOK_IN PR150 PR153
+5VPCU 31,33

1
1M_4 1M_4
+BATCHG
PR114
PQ27 0_4
3

PDTC144EU
A PD7 A
2D/C#_S6A1 2 D/C# 31
*BAS316/DG
PC114
1

*10U/6.3V_8

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom Charger (OZ8681) 1A

Date: Wednesday, February 16, 2011 Sheet 39 of 42


5 4 3 2 1
5 4 3 2 1

+VIN_GFX +VIN
+VGA_UMA +/- 5%
Countinue current:12A
41
PR196 8152VCCGFX +5VS5
PL12 Peak current:18A
UPB201212T-800Y-N
*0_4/S
PR194 OCP minimum 22A
+VIN_GFX
D 10_6 D
PC156 PC154 PC152 PC155 PC157

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
PC163 PC159
1U/6.3V_4 1U/6.3V_4
PR181 PQ40

5
RJK03B9D

19
10_6

7
D
G

PVDD
VCC
PR185
17 8152TONGFX 4
TON S
120K/F_4
PC160

1
2
3
0.1U/25V_4
PR170 *0_4/S GFXVR_VID_0_R 31
6 GFXVR_VID_0 VID0 +VGACORE_IGPU_1 +VGACORE_IGPU
PR171 *0_4/S GFXVR_VID_1_R 30 PL23
6 GFXVR_VID_1 VID1 8152UGATEGFX
23 0.56U25A(PCMC104T-R56MN)
PR172 *0_4/S GFXVR_VID_2_R 29
UGATE 800 mils
6 GFXVR_VID_2 VID2 PR179
24 8152BOOTGFX
1 2
PR173 *0_4/S GFXVR_VID_3_R BOOT
6 GFXVR_VID_3 28 VID3 2_6

1
PR243 PR244
PR174 *0_4/S GFXVR_VID_4_R 27 PC158 *0_2/S *0_2/S + +
6 GFXVR_VID_4 VID4

5
0.1U/25V_4
PC225 PC226 PC223

0.1U/10V_4
PR175 *0_4/S GFXVR_VID_5_R 8152PHASEGFX D PR167

390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10
26 22

2
6 GFXVR_VID_5 VID5 PHASE
G 2.2_8
PR176 *0_4/S GFXVR_VID_6_R 25 20 8152LGATEGFX 4
6 GFXVR_VID_6 VID6 LGATE S
PU10 PQ39 PR187

1
2
3
RJK03D3D 3.74K/F_4
RT8152E PC153 PC166

2200P/50V_4
PR183 *0_4/S 8152DPRSLPVRGFX
3 0.1U/25V_4 R15D DB
6 GFXVR_DPRSLPVR DPRSLPVR
C PR184 *0_4/S GFXVR_EN_R 4 C
6 GFXVR_EN VRON
8152ISENGFX PR191
6 CLKEN ISEN 16 RDSon=5m ohm
15 8152ISEN_NGFX *6.65K/F_4
PR186 *10K/F_4 ISEN_N
+3VS5
PR188 *0_4/S 8152PGOODGFX 5
3,20,31,33,34,37,41 HWPG PGOOD
+1.05V_VTT PR169 10K/F_4 8152VRTTGFX 32 PC165 *56P/50V_4
VRTT
PR190
11 8152CMSETGFX
8152NTCGFX CMSET
1 12K/F_4
NTC 8152VSENGFX
VSEN 12
PC168 PC167
8152VCCGFX PR177 PR178 PR180 8152OCSETGFX 8152FBGFX
2 OCSET FB 13
10K/F_4 2.2K/F_4 4.64K/F_4
*0.1U/25V_4 56P/50V_4
PR182
PR246 PR195 PR197 PR198
6.98K/F_4 +VGACORE_IGPU
10K/F_NTC_0603 PC161 14K/F_4 10K/F_4 100_4
PR245
VCC_AXG_SENSE 6
82P/50V_4 10K/F_NTC_0603
PR193 VSS_AXG_SENSE 6
14 8152COMPGFX
COMP
48.7K/F_4 PR192
RGND 9
100_4
PC162
8 8152SOFTGFX
B SOFT B

5600P/25V_4
10 8152CMGFX GFXVR_IMON 6
CM

PR189
PGND

86.6K/F_4

PC164
GND
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

0.01U/25V_4

+1.05V_VTT
18
33
35
34
36
37
38
39
40
41
42
21

PR166
*1K_4

GFXVR_EN_R

PR168 PC151
*1K_4 *1000P/50V_4

A A

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom UMA GPU CORE (RT8152C) 1A

Date: Wednesday, February 16, 2011 Sheet 40 of 42


5 4 3 2 1
5 4 3 2 1

42
D D

+VIN_1.05V
+VIN
PR200 PR207 PL13
+5VS5
UPB201212T-800Y-N

RT8238TONPCH
RT8238VCCPCH
10_6 360K/F_4
PC172
+1.05V PCH Volt +/- 5%

1U/6.3V_4
PC179 PC178 PC181 PC180 PC177
Countinue current:4A

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
5
Peak current:6A

11
OCP minimum:7.5A

5
PU11
PR206 3 RT8238DHPCH 4

VCC

TON
RT8238ILIMPCH UGATE PC174 +1.05V
10 PR202
C CS RT8238BST_1PCH RT8238BSTPCH PQ54 +1.05V_S2 C
97.6K/F_4 BOOST 4
2_6 AON7410 PL24

3
2
1
PR205 *0_4/S RT8238HWPG_S2APCH 9 0.1U/25V_4 2.2UH/8A
3,20,31,33,34,37,40 HWPG PGOOD RT8228A
2 RT8238LXPCH 600 mils
PR204 0_4 RT8238ENPCH PHASE
31,34,37,38,39 MAINON 8 EN
1 RT8238DLPCH
PR247

MODE
LGATE

5
PR208

GND
PC175 13 2.2_8

FB
PAD *0_2/S

1
*0.1U/10V_4
+

12

RT8238FBPCH 6
4 PC228 PC227

0.1U/10V_4
2

390U/2.5V_6X5.8ESR10
PQ53 PC176
AON7702

2200P/50V_4
3
2
1
PC173
*100P/50V_4
+5VS5
PR203
*0_4/S RDSon=14m ohm
PR199
11K/F_4
PR201
10K/F_4 Vo=0.5(R1+R2)/R2

B B

A A

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
+1.05V (RT8238A)
Date: Wednesday, February 16, 2011 Sheet 41 of 42
5 4 3 2 1
5 4 3 2 1

-->Pre SI
Page 19
1.Delete L5005, C5096,C5097,C5098,C5099,C5100 and connect +SP_PLLVDD to +NV_PLLVDD
2.L5004 change to bead 220ohm (ESR=0.5) 0603.
3.C5089 change to 22uF_0805

Page 11
1.delete Q35.

Page 17
D 1.delete L5000 and C5074. D
2.connect +3V_GFX to GPU ball AG9 with a 0.1uF cap C5075.
3.New add R5060 for test
4.L5001 change to bead 120ohm@100MHz (ESR=0.18ohm) 0603.
5.C5073 should be 4.7uF_X7R_0805.
6.C5072 should be 1uF_X7R_0603.
7.C5071 should be 0.1uF_X7R_0402.
8.PCIE change to PEX_TX0~7 and PEX_RX0~7 on GPU side for X8 lane configuration
9.unstuff R5009 and R5008 Q5002 stuff for test
9.delete L5002 for Nvidai recommend
Page 18

1.L5003 change to bead 30ohm (ESR=0.01) 0603.


2.C5085 change to 1uF_X7R_0603
3.Delete C5084.

Page 21
1.R5096 and R5103 change to 162ohm_1%.

Page 31
1.New add R5105 and R5106 2.2K pull up resistors to +3V for GPUT_CLK and GPUT_DATA on EC side.
2.Delete D20,Q25,D19,R500.
Page 20
1.delete R5081,R5082,R5082.
C C
2.New add R5085 and R5086 10K pull down resistors to GFX_CORE_CNTRL0 and GFX_CORE_CNTRL1
3.Change R5047 to 5K pull up for ROM_SCLK
4.Change R5080 to 10K for JTAG_TRST# pull down.
5.R5084 can be no stuff for JTAG_TCK
6.New add Q5010 for AC/Batt# function.
7.New add Q5011.

B B

A A

352-(&75'
4XDQWD&RPSXWHU,QF
Size Document Number Rev
C Change list 2A

Date: Wednesday, February 16, 2011 Sheet 42 of 42


5 4 3 2 1

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