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1) Closed loop control of PWM inverter

a) Voltage and Reactive Power (V-Q) control of inverter

The objective of the closed loop control of VSI is to regulate the dc link voltage and reactive power to the grid. To implement the control scheme, three phase voltages (v a , v b , v c ) and currents (i a , i b , i c ) are sampled. The sampled signals are shown in fig. 2. PV voltage (v pv ) and current (i pv ) are also sampled in order to implement the MPP algorithm to regulate the dc link voltage.

DC - link
DC - link

Figure 2: Sampled signals for closed loop control of inverter.

I) Inner current loop design

The dc quantities (v d , v q , i d , i q ) are generated by abc-dq0 transformation of three phase voltages and current as shown in fig. 3. Phase Locked Loop (PLL) is used to track the grid frequency and the phase angle. There is a cross-coupling between d- and q- channel due to fundamental drop across filter inductor. The d-q channel is decoupled by addition of decoupling terms to compensate the natural coupling between d- and q- axis and feedforward of the voltage into the current control loop, as shown in fig. 4. The proportional and integral (PI) controller is tuned in order to minimise the error between i d - i d,ref and i q i q,ref . The output of inner loop is sinusoidal reference signals m a , m b and m c of fundamental frequency. The reference signals are compared with triangular carrier signal (10kHz) to generate the switching signals of inverter IGBTs, as shown in fig. 5.

the switching signals of inverter IGBTs, as shown in fig. 5. Figure 3: abc to dq0

Figure 3: abc to dq0 transformation of three phase voltage and current.

Figure 4: Inner current loop control of the inverter. Figure 5: PWM signal generation for

Figure 4: Inner current loop control of the inverter.

Figure 4: Inner current loop control of the inverter. Figure 5: PWM signal generation for inverter

Figure 5: PWM signal generation for inverter IGBTs.

II) Outer voltage loop design

The objective of the outer loop design is to generate the reference current signals (i d, ref and i q, ref ) in order to regulate the dc link voltage and reactive power to the grid. For dc link voltage regulation, PI controller is tuned to minimise the error between actual PV voltage (v pv ) and reference PV voltage ( vPV ), as shown in fig. 6.

*

) and reference PV voltage ( v PV ), as shown in fig. 6. * Figure

Figure 6: Outer voltage loop control of inverter.

The reference PV voltage is obtained by Perturb and Observe (P&O) MPP algorithm, which is explained by flow chart as shown in fig. 7. PV voltage and current are continuously sampled with time period ‘T s . In this algorithm, perturbation (step) is given in the PV reference voltage (V * PV, new ) and then PV power is calculated. If, the change in PV power is positive, the same step is added to the previous PV reference voltage, else, the sign of step is changed and then added to the previous PV reference voltage. The step change in PV reference voltage is user defined.

The value of i q, ref is calculated from reference reactive power (Q * ref ) as given in equation below.

i q,ref

=

*

Q ref

3 v

2

d