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5V 5V
10k
1 2
VDD GP5/CIN
3
GP4/COUT
4
GP3/MC
IC2 5
GP2
PIC12C508P 6
8 GP1 R1
VSS 7
GP0
nR
R
ADDITIONAL 5V 5V
PICs
8
10k 6 _
IC1B 220 VOUT
2 _ 7
1 GP5/CIN 2 IC1A 6.8k TL072P
VDD 1 5 +
GP4/COUT 3 TL072P PINK NOISE
GP3/MC 4 3 + 400 mV P-P
4
IC3 5
GP2
PIC12C508P 6 3k 1k 300
GP1 R2
8 7 5V
VSS GP0 3.3k
nR
2 S1 0.1 µF
DISABLE 1 µF 0.27 µF 47 nF 47 nF 33 nF
1
NOISE
GENERATORS –3-dB/OCTAVE FILTER OUTPUT BUFFER
SUMMING AMPLIFIER
Figure 1 This simple circuit generates Gaussian-distributed noise for audio applications.
eters. For applications in which digital wave output that is high and
COMPARATOR
processors or microcontrollers serve for low alternately for a time pe- OUTPUT VOLTAGE 0 T1 T1T2
t
data acquisition and signal processing, riod T4C(R2RXR1R3)/R1.
the transducer’s response must assume a This equation indicates that VS2
form suitable for conversion to digital the circuit converts a change
format. It is desirable to convert the re- in sensor resistance into a
sistance change of such sensors into a proportional time period
proportional frequency or a time interval T with sensitivity
Figure 2
so that you can easily obtain an output T/RS4C(R2/R1).
in digital form, using a counter/timer. The following salient features
The circuit of Figure1 linearly converts of Figure 1 merit mention: kIS
the sensor resistance, RS, into a propor- ● The sensor is grounded;
tional time period. The circuit is essen- you can easily vary the con- COMPARATOR
tially a relaxation oscillator, comprising a version sensitivity by varying INPUT VOLTAGE 0 T1 T1T2
t
OFFSET ADJUST
R3
C FF
34.3k 1 µF OUTPUT
D2 2 5
SENSITIVITY D Q
D1 VCC V0UT
ADJUST 15V
IS VCC
R2 15V
7474
2 _ 7
7 6
65.4k 6 3 + Q
R1 IC1 R5
IN5287 6 3
3 LF 411
+ IC2 CLK
4 2 _
2k LF411 10k
D3 D4 4
VEE 5V
R4 ZENER
–15V VEE
1k
RX –15V
RS
Figure 1 (SENSOR)
Pt 100)
NOTE: D1, D2, D3, AND D4 ARE IN4002s.
D2 TO D5
S5
S6
S7
TRANSCONDUCTANCE
AMPLIFIER
VOUT
tation that you can pro- S8
R
gram from your PC using
the parallel port. The cir-
cuit uses analog switches D2
1k S1
and latches instead of digi- D3
tal potentiometers for the R1 2.2k S2
D4
digital control (figures 1
10k S3
and 2). By running simple VIN C1 D5
software code on the PC, 100k S4
you can configure a single PR 10V
design is a single-out- LP C2
Figure 1 10V
put-at-a-time filter.
Many power-sensitive sys- A PC-configurable filter uses a synthesized PC-
R5
PROGRAMMABLE
tems do not require simul- inductor and analog switches to determine INDUCTOR
taneous-filter functions. filter type and center frequency.
The design exploits the
fact that a series RLC resonator can pro- Figure 1, the inductor, LP, is implement- upon the state of switches S1 through S4
vide various filter functions with its ele- ed as a PC-controlled synthesized induc- (determined by PC-port data bits D2
ments. Because the design is based on an tor. The value of the inductor is through D5). The expression for the fre-
RLC section, it is trivial to convert the de- LPC2RPR3R5/R2. Here, RP can assume quency is 0(R2/C1RPR3R5)1/2. You can
sign into a PC-controlled resonator. In any of 15 possible values, depending thus effectively select 15 frequency values.
(This design uses 12 values of practical
TABLE 1—REPRESENTATIVE PORT SETTINGS AND FILTER PARAMETERS interest.) Data bits D6 through D9 from
Filter type/center Port setting Hex output the PC’s parallel port set the state of ana-
frequency D9 D8 D7 D6 D5 D4 D3 D2 from PC log switches S5 through S8. The state of
Lowpass/9.93 kHz 0 0 1 1 0 1 0 0 X34 the switches determines the type of fil-
Highpass/22.9 kHz 1 0 1 0 0 1 1 0 XA6 ter.
Bandpass/3.16 kHz 0 1 0 1 1 0 0 0 X58 Figure 3 shows the software-generated
Bandpass/37.3 kHz 0 1 0 1 0 1 1 1 X57 display for the circuit. This design uses a
82 edn | August 7, 2003 www.edn.com
design
ideas
IN1 IN2
2.2k
D1 D2
1k S1 S2
V V 1/2
OPA2241
1 GND NC _
14 OC VCC S4 S3
2
15 1D 1Q D4 D3
3 100k +
16 2D 2Q 10k
4 IN4 IN3
17 3D 3Q
5 DG308
18 4D 4Q
6 R2 R3 C2 R5
19 5D 5Q
7 100k 100 0.1 F 1k
20 6D 6Q C1
8
21 7D 7Q 0.1 F
9
22 8D 8Q IN1 IN2
10 _
23 GND EN D1 D2
11
24 S1 S2 R1
12 74573
25 V V 4.7k 1/2
13 +
GND NC OPA2241
S4 S3
D4 D3 VIN
IN4 IN3 V+ V+
IN+ IOUT VOUT
DG308
50 Z+ V+
500
500 NC ISET
Figure 2
Z V
You must take the finite on-resistance value of IN NC
50 V V
the analog switches into account in determining
the center frequency of the filter. MAX436
Reference
1. Gupta, Saurav, and Tejinder Singh,
“PC-based configurable filter uses no
digital potentiometers,” EDN, Jan 23,
Figure 3
This user-friendly configuration screen allows you to determine filter type and 2003, pg 76.
frequency.
R
15V
tems require amplifying weak sig- is the smallest 0.1 F
nals to match the full-scale input available for this Figure 1
range of an A/D converter. Unfortunate- function, and the circuits 7 VS
4
ly, when you configure them as gain require no external com- 10k