Time-Interleaved Analog-To-Digital Converters:

Status and Future Directions

Christian Vogel Hakan Johansson
Christian Doppler Laboratory for Nonlinear Signal Processing Division of Electronics Systems
Signal Processing and Speech Communication Laboratory Department of Electrical Engineering
Graz University of Technology, Austria Linkoping University, Sweden
Email: c.vogel@ieee.org Email: hakanj @isy.liu.se

Abstract- We discuss time-interleaved analog-to-digital converters fsM o27= TI-ADC

(ADCs) as a prime example of merging analog and digital signal
processing. A time-interleaved ADC (TI-ADC) consists of M parallel ADC
channel ADCs that alternately take samples from the input signal, where l
the sampling rate can be increased by the number of channels compared f7|1Y/l=
to a single channel. We recall the advantages of time interleaving and l
investigate the problems involved. In particular, we explain the error analog input
.
ADC digital output
behavior of mismatches among the channels, which distort the output xd(t)T y[n]
signal and reduce the system performance significantly, and provide a fM = m2 MUX)
concise framework for dealing with them. Based on this analysis, we I
review the principle possibilities of calibrating TI-ADCs, where we point + ADC
out the necessities and advantages of digital enhancement. To this end, we
discuss open issues of channel mismatch identification as well as channel fIM =(M- 1) I
mismatch correction. I

I. INTRODUCTION-I
Since analog-to-digital converters (ADCs) ultimately limit the
performance of today's communication systems, high-speed, high-
resolution, and power-aware ADCs are required in order to comply
with new communication standards. This also leads to an increased
demand for high-speed and high-resolution sampling systems in the
measurement industry [1]. Present ADC technologies work on their
limits and cannot be properly pushed further, since the downscaling
of IC technologies to deep sub-micron technologies makes their
design even more difficult. However, the increased component density
of digital circuits allows for using additional chip area with small
additional costs [2].
One possibility to overcome these performance limits is to use
parallelism, i.e., to split the information of the analog input signal
into several parallel channels, to convert them independently, and
finally to recombine them into one digital output signal. In theory,
which was introduced by Papoulis' Generalized Sampling Expansion
(GSE) [3], there are many ways to split the information of the
input signal. In practice, only a few parallel multi-channel sampling
structures [4] have been further analyzed [5]-[7], where the time-
interleaved structure is among the most promising ones for the future.
The idea of a time-interleaved ADC (TI-ADC) is that each channel
in a system of M parallel channels alternately takes one sample,
whereas the sampling frequency of one channel does not need to
fulfill the Nyquist Criterion [8]. However, when in the digital domain
all samples merge into one sequence we obtain an overall sampling
frequency that fulfills the Nyquist criterion. Thus, sampling with an
ideal TI-ADC with M channels is equivalent to sampling with an
ideal ADC with an M times higher sampling rate. The channels
of a TI-ADC can be realized in different converter technologies to
achieve for example high-rate and low-power ADCs [9] or high-rate
and high-resolution ADCs [10].
The typical structure of a TI-ADC is shown in Fig. 1. We see the
analog input signal Xa (t), the M time-interleaved parallel channels,
Fig. 1. Time-interleaved ADC (TI-ADC) with M channels. Each channel
alternately takes samples at a rate M from the input signal xa (t). At the
multiplexer (MUX), the samples from the M parallel channels are merged
into one output channel running at an M times higher rate fs.
and the multiplexer (MUX) to recombine the digital outputs of the
channels. The conversion rate of the overall system is increased by
the number of channels M. It should be noticed that each channel
has to deal with the entire input signal xa (t), and, therefore, the
sample-and-holds in each channel have to resolve the full input signal
bandwidth.
From a theoretical point of view, we can increase the sampling
rate of a TI-ADC by the number of channels that work in parallel in
the system. Ideally, the sampling rate would linearly scale with the
number of channels; however, channel mismatches ultimately limit
the performance of TI-ADCs. On the one hand, the downscaling of
the IC technologies complicates the matching of the components,
but, on the other hand, the increased component density allows for
including additional digital components with small additional costs.
Therefore, we can add digital circuits to overcome the problems of
analog converter circuits [11]. TI-ADCs constitute a prime example
of such merging technologies, where the technology can only be
properly pushed further, when we consider digitally enhanced analog
circuits.
II. CHANNEL MISMATCHES
Each channel ADC in a TI-ADC has technology dependent errors
(e.g., integral nonlinearity errors, clock jitter) like a single-channel
ADC, but due to component mismatches among the channels, ad-
ditional errors, called mismatch errors, are introduced [12]. This is
illustrated in Fig. 2, where we see a TI-ADC with channel mismatches
and without channel mismatches for a sinusoidal input signal. For

0-7803-9390-2/06/$20.00 ©C2006 IEEE 3386 ISCAS 2006

 0
-40-~~~
02 040
-4 0 43Q
02 O 1

l 20 2 ~20Fig. 4. Spectrum of a Tl-ADC. Each additional spectral component is a

TI-ADC \shifted (by kM) copy of the input spectrum Xa (jQ), which is weighted
Normalized frequency
with co0 by the complex transfer function V (jQ). Furthermore, we have Dirac delta
mismatches 80abbreviationVX forVk( -k)-1a - 0. 0).4 0.6 0.8

Fig. 2. If we had no mismatches we would see an output spectrum like for

a single-channel ADC. As soon as we have mismatches, we obtain additional be calculated by developing the Dirac delta distribution in (2) into a
spectral components, which significantly reduce the TI-ADC performance. continuous Fourier series, which leads us to

MT Ys>JQ)T2~
=kK E V (Q- J M ) XaK(iQ-ikM,)J' (3)

| ~ ~~~
too M1/ T, iT, yo(t)
<
lwhere1M-
Vk (iQ) = M E Hm (jQ) em M, (4)

mT, yo,ev(t)
Q Without an input signal the sampled output, i.e., offset mismatches
xt,,(t) IMT E y,(t)nmy, only, is

M ~
+s~(M1T
[+t I |M- n=o
60 whichareweightedwhere
Pulse atthek Fourier transform of (5) gives

tow IaY,(t) Z Ok(Q-7) (6)

Fig. 3. Linear mismatch model of a time-interleaved ADC with M channels °
and additional offsets in each channel. where
°Ok = o mei M . (7)
mO
matched channels, we obtain an output spectrum like for a single The final output iS the linear combination of (3) and (6), that is
channel ADC. We see the input signal, harmonics related to the
input signal, i.e., integral nonlinearity (INL) errors, and a noise floor Ys (jQ) =tYs(jQ) + YS°(jQ). (8)
determined by the quantization noise, differential nonlinearity (DNL) Frm()t(8wecneogiefqucyd anchatrsis
errors, and jitter effects. In contrast, we see for the TI-ADC with ofTADsTh inusgalpetmXa()ishfedb
channel mismatches additional spectral components in the output kQ n egtdb h orsonigmsac rnfrfnto
spectrum, which degrade the system performance. Vh (jQ), which is illustrated in Fig. 4. The mismatch transfer function
To model channel mismatches we can use the simplified model Vk (jQ) is the discrete Fourier transform (DFT) of the frequency
shown in Fig. 3. The input signal goes to M parallel linear filters
given bH Q-A -fr()l byeresponses Hm components
shifted spectral channels.
(jQ) of thebecome sincematched
zero,For channels,
the mismatch all
transfer
Hm ()- Am (Q) e (1) function is zero for all k 7 0, ±M, ±2M,.. . The output distortions
and is then sampled in a time-interleaved manner. Additionally, we caused by offset mismatches do not depend on the input signal a(t)c.
add Mli offsets °m in each channel, which are sampled in the same We therefore obtain a fixed output signal pattern at k QM that is
way as well. The signals Ym (t) (sampled input signals and offsets) of weighted by the factor ik, which is the DFT among the offsets of
all channels are merged into one output stream Ys (t), which becomes all channels. If all offsets are identical we will have no mismatches
after quantization the digital output signal y[n]. To determine the but we could still have an overall offset error 00.
Output signal Ys(t), we separate the input signal part and the offset For a general analysis of dynamic and static nonlinearity mis-
part and neglect the quantization process to simplify the model. matches we can use nonlinear hybrid filter banks, which unify and
Without offsets the sampled output, i.e., linear mismatches only, simplify the treatment of channel mismatches [13].
can be written as In the literature, two kinds of linear mismatches, i.e., gain mis-
M-1 oo matches and timing mismatches, have been treated extensively. The
Ys(t) =3 (Xa(t) * hm(t)) /d (t -(m + nM)T8), (2) gain of an ADC is often defined as the magnitude response for a DC
m=0 00-oc) input signal, which in our notation corresponds to
where Tw is the sampling period. The Fourier transform of (2) can thrn Hm (jO) =Am (JO). (9)

3387
 Signal with
channel mismatches channel mismatches
Tune channel Adapt
xj(t) My[
properties
TI-ADC
j
Normazefrequen]y Iparameters
Digital algorithm
I f
--
l______ mismatch
L calibration method.
-
identification
analog digital
Fig. 5. Possibilities to calibrate a TI-ADC.
Thus, the gain mismatch is the deviation of the gains gm from the
average gain of all channels. In practical TI-ADC designs, however,
we have to deal with magnitude mismatches. To compensate for them,
a first solution is to use some kind of average magnitude response
for each channel over the frequency band of interest instead of DC
gains.
The timing mismatch is the deviation from the averaged linear-
phase responses of the channels normalized by the frequency. To see
this, we split the phase responses into a linear and a nonlinear part,
i.e.,
(m (Q) = tmQ + >m (Q)m
where tmQ is the linear-phase response over the frequency band of
interest. The timing mismatch Atm is the deviation from the averaged
and frequency normalized linear-phase response, i.e.,
1 M-1
Atm = tm M E tm. (11)
mM=0
It should be noticed that we can treat aperture-delay mismatches with
this model as well. The aperture-delay mismatch is the deviation from
the ideal sampling instant caused by time-shifted clock signals. This
delay can be represented by an equivalent time-shift (linear phase
shift) of the input signal in each channel which can be accomplished
by the linear filters Hm (jQ).
III. CALIBRATION OF CHANNEL MISMATCHES
Avoiding mismatches is the main concern in designing fast TI-
ADCs [9]. Unfortunately, shrinking IC technologies and increasing
clock rates make component matching even more difficult. Further-
more, the matching is influenced by time-variant parameters such as
temperature or component aging. Therefore, calibration methods for
TI-ADCs have been proposed, which tune the component matching,
e.g., [14], [15], or digitally correct the distorted output signal,
e.g., [16]-[20].
In Fig. 5 the principal calibration methods are illustrated. We see
a TI-ADC driven by a sinusoidal input signal xa (t). At the output
of the TI-ADC (y[n]) we see the sampled spectrum of the sinusoidal
input signal and distortions caused by channel mismatches. In order to
reduce these distortions we have to identify the significant mismatch
parameters. This task is much easier to realize when we know the
input signal Xa (t), which is indicated by a dashed arrow from the
identification box to the input signal. In many cases, however, we
have no or just little statistical knowledge, e.g., bandlimitation or
modulation technique, about the input signal. This little knowledge
makes it much more difficult to obtain reliable estimates for the
mismatch parameters. If the mismatch parameters are known, we
Signal without
can tune the matching on the analog side or we can reconstruct the
distorted signal on the digital side. It is also possible to combine both
approaches [21].
Digital calibration is attractive in many ways. The digital cali-
bration is, like the principal topology of a TI-ADC, independent
Nomazefjequ.n].
y from the used channel converter technology. Hence, we can apply
the same digital calibration method to TI-ADCs with different chan-
nel converter technologies, since the TI-ADC environment and the
functionality of the
production pprocess do not ddirectly influence the functionality
A. Correction Methods
Although the correction of gain and offset mismatches in the
digital domain is quite simple, since we only have to add at most
one adder and one multiplier to the signal path of each channel
ADC, the correction of timing mismatches (linear-phase mismatches)
is much more difficult. In fact, it is a sub-problem of the non-
uniform sampling problem. For TI-ADCs the problem simplifies to
periodically non-uniform sampled signals, i.e., the time shifts Atm
exhibit a periodicity, where the time shifts Atm are small compared
to the sampling period T8. However, under the constraint of an on-
chip implementation the problem becomes difficult again.
For the timing-mismatch problem accurate solutions have been
found in [19], [20], [22], [23], although only for some of them [19],
[20] the implementation on a TI-ADC chip is maintainable. However,
(10) for changing timing mismatches the used reconstruction method has
to be easily adaptable. Thus, an open question is to find reconstruction
methods where the needed coefficients can be simply derived from the
estimated timing mismatches. A first solution to this problem can be
found in [21], [24]. In [24] the authors show that by using fractional
delay filters they only have to redesign one coefficient in each channel
to adapt to changed timing mismatches and in [21] a method was
introduced which reorders the channel sequence in order to achieve
a spectrally shaped output signal. Unfortunately, both methods need
some amount of additional oversampling.
Therefore, the goal of timing mismatch correction is to find an ac-
curate, power-aware method, which only needs a slight oversampling
and which can be easily adapted to changing timing mismatches.
If these problems are solved, magnitude and nonlinear-phase mis-
matches (bandwidth mismatches) will limit the effective resolution
of TI-ADCs and will therefore have to be corrected for a further
improvement [18].
B Identification M
ethods
The identification of mismatch parameters is the most critical
component in the channel mismatch compensation process of TI-
ADCs. If the identified parameters are wrong even the best correction
method cannot improve the TI-ADC performance.
For the identification of the channel mismatches with special input
signals we can find accurate solutions [18], [25], [26]. Nevertheless,
identification with special input signals is suitable for measurement
applications with calibration cycles but not suitable for communi-
cations systems, where in general we have no extra duty cycles
for the calibration. There, the identification has to be done during
the normal operation of the TI-ADC with the only restriction of
bandlimited input signals. For single communication protocols, we
can assume particular signal statistics, however, the trend towards
software defined radio (SDR) does not allow such assumptions.
For gain and offset mismatch identification we can find some
methods [17], [27], [28]. In many cases, we obtain good offset
and gain mismatch estimates with a simple comparison of the
3388
averaged output values and the averaged output power among all
channels. Unfortunately, such methods are vulnerable to an input
signal correlation with the switching sequence of the channels, i.e.,
we onlywegetolya gt a imitdnuber
limited number off dffernt
different smple
samples fro eac chanel
from each channel
for the estimation process.
The most challenging problem is the on-line identification of
timing mismatches. The identification should be accurate and its
implementation should be cost-efficient. Although we can find identi-
fication methods in the literature [17], [29], they are either imprecise,
limited in the number of channels, or have an enormous computa-
tional complexity.
Hence,Hence
we weneedeedstable
sableon-lie
on-line idntifcatio metods fr
identification methods ofset,
for offset,
gain, and timing mismatches, where an accurate and implementation
efficient timing mismatch identification is the foremost challenge for
the future. After having solved these problems, however, we will
also have to deal with the identification of bandwidth mismatches
and nonlinearity mismatches.
IV. CONCLUSION
We have presented a unified framework for dealing with linear
channel mismatches and offset mismatches. In particular, we can
use this framework to describe gain and timing mismatches as a
and identification of channel mismatches and we have pointed out
the most challenging problems for the near future. Since the major
problems of offset, gain, and timing mismatch correction have been [19] H. Johansson and P. Lowenborg, "Reconstruction of nonuniformly
recently solved, the main concern for the future will be finding stable
and reliable on-line mismatch identification methods. However, to
achieve very high-resolution TI-ADCs more errors, e.g., bandwidth
mismatches, INL mismatches, and DNL mismatches, have to be [20] R. Prendergast, B. Levy, and P. Hurst, "Reconstruction of band-limited
considered and calibrated as well. For example, for a 100 MHz
bandwidth, a50MH DCbadiIEEE
signal bandwidth, a 750 MHz ADC bandwidth, andsignal an analog device
matching of 1%, the bandwidth mismatch will limit the resolution to [21] C. Vogel, D. Draxelmayr, and G. Kubin, "Spectral shaping of timing mis-
some 12-13 bits. The research on these mismatches has just started.
REFERENCES
[1] K. Poulton, R. Neff, B. Setterberg, B. Wuppermann, T. Kopley, R. Jewett,
J. Pernillo, C. Tan, and A. Montijo, "A 20 GS/s 8 b ADC with a 1 MB
memory in 0.18 ,um CMOS," in IEEE International Solid-State Circuits
Conference, vol. 1, February 2003, pp. 318-496.
[2] B. Murmann and B. E. Boser, Digitally Assisted Pipeline ADCs: Theory
and Implementation. Springer, 2004.
[3] An
3 A. Papoulis, "Generalized
"n z ssampling eexpansion," IIEEE Trans.s. onX Circuits
[11] A. van Roermund, H. Hegt, P. Harpe, G. Radulov, A. Zanikopoulos,
K. Doris, and P. Quinn, "Smart AD and DA converters," in IEEE
International
pp. 4062-4065.
Symposium on Circuits and Systems, vol. 6, May 2005,
[12] C. Vogel, "The impact of combined channel mismatch effects in time-
interleaved ADCs," IEEE Trans. on Instrumentation and Measurement,
vol. 54, no. 1, pp. 415-427, February 2005.
[13] C. Vogel and G. Kubin, "Modeling of time-interleaved ADCs with
nonlinear hybrid filter banks," AEU-International J. of Electronics and
Communications, vol. 59, no. 5, pp. 288-296, 2005.
[14] K. Dyer, F. Daihong, S. Lewis, and P. Hurst, "An analog background
calibration technique for time-interleaved analog-to-digital converters,"
IEEE J. of Solid-State Circuits, vol. 33, no. 12, pp. 1912-1919, Decem-
ber 1998.
[ 15] C. Vogel, D. Draxelmayr, and F Kuttner, "Compensation of timing mis-
matches in time-interleaved analog-to-digital converters through transfer
characteristics tuning," in Proceedings of the 47th IEEE International
Midwest Symposium On Circuits and Systems, vol. 1, July 2004, pp.
341-344.
[16] H. Jin and E. K. F. Lee, "A digital-background calibration technique
for minimizing timing-error effects in time-interleaved ADCs," IEEE
Trans. on Circuits and Systems II: Analog and Digital Signal Processing,
vol. 47, no. 7, pp. 603-613, July 2000.
[17] S. Jamal, D. Fu, M. Singh, P. Hurst, and S. Lewis, "Calibration of
sample-time error in a two-channel time-interleaved analog-to-digital
converter," IEEE Trans. on Circuits and Systems I: Regular Papers,
vol. 51, no. 1, pp. 130-139, January 2004.
[18] M. Seo, M. Rodwell, and U. Madhow, "Comprehensive digital correction
of mismatch errors for a 400-Msamples/s 80-dB SFDR time-interleaved
analog-to-digital converter," IEEE Trans. on Microwave Theory and
Techniques, vol. 53, no. 3, pp. 1072-1082, April 2005.
sampled bandlimited signals by means of time-varying discrete-time
FIR filters," to appear in J. Applied Signal Processing - Special Issue
on Frames and Overcomplete Representations in Signal Processing,
Communications, and Information Theory, 2006.
periodic nonuniformly sampled signals through multirate filter banks,"
Trans. on Circuits and Systems I: Regular Papers, vol. 51, no. 8,
pp. 1612-1622, August 2004.
matches in time-interleaved analog-to-digital converters," in Proceedings
of the 2005 IEEE International Symposium on Circuits and Systems, May
2005, pp. 1394-1397.
[22] Y C. Jenq, "Perfect reconstruction of digital spectrum from nonuni-
formly sampled signals," IEEE Trans. on Instrumentation and Measure-
ment, vol. 46, no. 7, pp. 649 - 652, June 1997.
[23] Y C. Eldar and A. V. Oppenheim, "Filterbank reconstruction of bandlim-
ited signals from nonuniform and generalized samples," IEEE Trans. on
Signal Processing, vol. 48, no. 10, pp. 2864-2875, October 2000.
[24] H. Johansson and P. Lowenborg, "Reconstruction of nonuniformly
sampled bandlimited signals by of digital fractional delay filters,"
means

IEETas nSga rcsig vl 0 o 1 p 77 77

and Systems, vol. 23, no. 11, pp. 652- 654, November 1977. IEEE Trans. on Signal Processing, vol. 50, no. 11, pp. 2757- 2767,
[4] J. J. Brown, "Multi-channel sampling of low-pass signals," IEEE Trans November 2002.
on Circuits and Systems, vol. 28, no. 2, pp. 101-106, February 1981. [25] Y. C. Jenq, "Digital spectra of nonuniformly sampled signals: A robust
[5] A. Petraglia and S. K. Mitra, "High-speed A/D conversion incorporating sampling time offset estimation algorithm for ultra high-speed waveform
a QMF bank," IEEE Trans. on Instrumentati on and Measurement, digitizers using interleaving,"
Mesrmn,vl 9 o , p IEEE Trans. on Instrumentation
17,Fbur 90 and
vol. 41, no. 3, pp. 427-431, June 1992. Measurement, vol. 39, no. 1, pp. 71-75, February 1990.
[6] 5. R. Velazquez, T. Q. Nguyen, and S. R. Broadstone, "Design of [26] J. Pereira, P. Girao, and A. Serra, "An FFT-based method to evaluate
and compensate gain and tainndM
offset errorsof interleaved ADC systems,"
hybrid
hybrifilter banks
filter banks for
for analog/digital
analog/digital conversion," IEEE Trans. onSignal
on Signal IE Trn.onIsrm suen,vl.5,o.2p.
Processing, vol. 46, no. 4, pp. 956-967, April 1998. IEEE Trasr o strumentatn ad Measurernent, vol. 53, no. 2, pp.
[7][7]P. JhnsnadL.
dwebor, H. Johansson,
P. Lowenborg, .. multirateand L. Wahmmr "Tochne diia
Wanhammar, "Two-channel digital
42
'3,Api 04
[27] D. Fu, K. C. Dyer, S. H. Lewis, and P.d J. Hurst, "A digital background
and hybrid analog/digital filter banks with very low-complexity ne for te-in
calibr.ation t analog-to-digital backgoners
analysis or synthesis filters," IEEE Trans. on Circuits and Systems II: iEEEJiof Solidte Circuitsvl.a33, no -1911, cem-
Analog and Digital Signal Processing, vol. 50, no. 7, pp. 355- 367, July ber 1998.

[8] W. C. Black Jr. and D. A. Hodges, "Time-interleaved converter arrays,

[28] V.
Ferragina, A. Fornasari, U. Gatti, P. Malcovati, and F. Maloberti,
"Gain and offset mismatch calibration in time-interleaved multipath A/D
I1 , sgma-delta modulators," IEEE Trans. on Circuits and Systems I: Regular
190 Papers, vol. 51, no. 12, pp. 2365-2373, December 2004.
[9] D. Draxelmayr, "A 6b 600MHz 10mW ADC array in digital 9Onm [29] J. Elbornsson, F. Gustafsson, and J. E. Eklund, "Blind adaptive equal-
CMOS," in 2004 IEEE International Solid-State Circuits Conference, ization of mismatch errors in a time-interleaved A/D converter system,"
vo. , erury204 ~ 4-4.IEEE Trans. on Circuits and Systems I: Regular Papoers, vol. 51, no. 1,
[10] M. Kozak and I. Kale, Oversampled Delta-Sigma Modulators: Analysis, p.1118 aur 04
Applications and Novel Topologies. Kluwer Academic Publishers, 2003. p.15-58Jaur204

3389