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23 Transputere
23.1 Supercomputere
Memory Interface
Fig. 1 Structura internă a unui
transputer
64 bit - FPU
Timer
Links Control
Link 0
4 kB
RAM
Link 1
Link 2
Memory
Interface
Link 3
1
Front pointer 0
1
Back pointer 0
ALU - FPU
Acc.
A FA
B FB
C FC
FPU
Instruction pointer
Workspace pointer
CPU
Fig. 3 Registrele interne la transputerul IMS - T800
367
7 6 5 4 3 2 1 0
Cod Data
operaŃie valoare
Fig. 4 Structura instrucŃiunilor
1. Principii de concurenŃă
Lista de aşteptare 1
Memorie
Front pointer (1)
Proces 1
Proces 2
Acc.
Proces 3
A
C
Proces 4
în execuŃie
Instruction pointer
Workspace pointer
octet de date
RecepŃie 1 0
t
confirmare Fig.6. Protocolul de comunicaŃie serială
C1'
T1
C1
C4' T4 C4 T0 C2 T2 C2'
C3
T3
C3'
Fig. 7 ReŃea de transputere conectate serial prin canale duplex
Link Link
Contor Contor
Mesaj Transm. Receptor
Mesaj
Pointer Pointer
Receptor Transm.
TSP-1 TSP-2
Bibliografie