Documente Academic
Documente Profesional
Documente Cultură
UNIT-1
Computer architecture: Means those attributes of a system visible to the
programmer.
Computer types:
According to the size, cost computational power application computers are
classified as:
- Micro computers Mini computers
- Desktop computers
- Personal computers
- Portable notebook computers
- Workstations
- Mainframes or enterprise systems
- Servers
- Super computers
Desktop computers:
Commonly used in home or office desk
Work at very high speeds with large data word length(64bit or more)
Servers:
Having large storage unit and fast communication links.
Large storage allows storing sizable database and fast communication links
allow faster communication of data blocks with computers connected in the
n/w.
Functional units:
Functional Units
Arithm etic
Input and
logic
Mem ory
Output Control
I/O Processor
All the above activities are coordinated and controlled by the control unit.
The arithmetic and logic unit in conjunction with control is commonly called
CPU.
Input unit:
A computer accepts digitally coded information through i/p unit using input
devices like keyboard and mouse.
Mouse take to position the screen cursor and there by enter the information by
selecting option
Memory units:
Used to store programs and data.
These cells are read or written by CPU in a group of fixed size called word.
These are fast but they are small in capacities and expensive.
To perform operations operands brought from main memory into the high
speed storage elements called registers of the processors.
Each register can store one word of data and they are used to store frequently
used operands.
Access times of registers are typically 5 to 10 times faster than access times to
memory.
Non impact printers and plotters used laser techniques, inkjet sprays,
xerographically processes, electrostatic methods and electro thermal methods
to get images on the paper.
Control unit:
Control unit coordinates and controls the activities among the functional unit.
Basic function of control unit is to fetch the instructions stored in the main
memory.
It controls i/p o/p operations data transfers between the processor memory and
i/p and o/p devices using timing signals.
IR (Instruction Registers):
Is used to hold the instruction that is currently being executed.
The contents of IR are available to the control unit, which generate timing
signals that control the various processing elements involved in executing the
instruction.
MDR contains the data to be written into or read from the addressed word of
the main memory.
The processor can service these devices in one of the two ways polling routine
& interrupt.
Once the service is completed the processor would resume exactly where it
left off. This method is called interrupt method.
If more than one i/p devices request I/O service simulation sly, i/o provides
service based on priority.
The designs of this interconnection structure will depend on the exchanges that
must be made between modules.
Data bus:
Data bus consists of 8, 16, 32 or more parallel signal lines.
Address bus:
It is a unidirectional bus.
On these lines the CPU sends out the address of the memory location or i/o
port that is to be written to or read form.
Control bus:
The control lines regulate the activity on the bus.
The cpu sends signals on the control bus to enable the outputs of addressed
memory devices or port devices
In single bus structure all units (address bus, data bus, and control bus) are
connected to common bus called system bus.
In single bus only two units can communicate with each other at a time.
Advantage of single bus structure is its low cost and its flexibility for attaching
peripheral devices.
Multi bus structures:
The performance of computer systems suffers when large number of devices
connected to the bus this is because of two major reasons.
When two or more devices are connected to the common bus we need to share
the bus amongst these devices the sharing mechanisms co ordinates the use of
bus of different devices. This coordination requires finite time called
propagative delay. When control of the bus passes from one device to another
frequently these propagation delays are noticeable and affect the performance
of computer system.
When the aggregate data transfers demand approaches the capacities of the
bus, the bus may become a bottleneck. In such situations we have to increase
the data rate of the bus.
For this reason most computer systems use the multiple buses.
Software:
Is a collection of programs.
It was 2 types
System software
User software
System software in micro computer allows one to develop applications/user
programs for micro processor based systems.
Editor:
The editor is programs is used to creat and modify source program/text.
Assemblers:
In the 1st pass the assembler performs the fallowing operations:
1. Reading the source program instructions.
2. Creating the symbol table in which all symbols used in the program
together with their attributes are stored.
3. Replacing all mnemonic codes by their binary codes.
4. Detecting any syntax error in the source program
5. Assighning relative address to instructions and data.
Linkers:
A linker is a program which is used to join several object files into one large
object file.
When a large program will divide into small modules each module can be
written tested and debugged.
If all the all modules work, then they can be linked together to form a large
functioning program.
The linker produces a link file which contains binary codes for all the
combined modules.
The linker also produces a link map which contains the address information
about the link file.
The linker does not assigns absolute address, it provides relative address, this
form of program is said to be re locatable as it can be put any where in
memory for execution.
Locator:
a locator is a program used to assigns the specific address, at which the object code is
to be looked in memory.
Both compiler and interpreter are used for converting high level language to
machine language and these are also used for checking errors.
Compiler translates entire program at a time and then checks for errors where
as interpreter translates each instruction individually and then check for errors.
Each statement must be translated to machine code every time the program is
run.
Debugger:
A debugger is a program which allows to load adjust code program into
system memory execute the program and debug it.
The debugger allows you to look at the contents of the registers and memory
locations after your program runs.
It allows you to change the contents of register and memory locations and
rerun the program.
Some debuggers allow you to stop execution after each instruction so you can
check or alter memory and register contents.
If the results are correct up to that breakpoint, we can move the point to a later
point in our program.
Operating system:
An OS performs resource management and provides an interface between the
user and program.
Performance:
The time between start and completion of the program or event is reducing
execution time (or) response time.
Processor clock:
The processor is driven by a clock with a constant cycle time called processor
clock.
The period ’p’ of clock cycle is an important parameter that effects processor
performance.
The clock rate is given by R=1/p which measured in cycles per second (cps).
Clock rate:
Each machine instruction takes one or more cycle time for execution. The
average no of basic steps required to execute one machine instruction is
denoted by ‘S’
Throughput rate:
It indicates a no of programs a system can execute per unit time.
Throughput can be measured separately for the system (ws) and for the
processor (wp).
In multi computer systems each computer has its own memory unit.
When the tasks are needed to execute, communication between computers are
used message passing mechanisms’ to exchange information.
Data representations:
Based on the no system 2 basic data types are implemented in the computer
system.
1. Fixed point numbers
2. Float point numbers.
If the most significant bit is 0, the number is positive, and if the most
significant bit is 1, the number is negative.
fig
Ex: +6 = 00000110
-14 = 10001110
+24 = 00011000
For sign magnitude 8-bit no’s the large magnitude is reduced from 255 to 127
because we need to represent both positive and negative.
Maximum +ve no’s 0111 1111=+127
Maximum –ve no’s 1111 1111 =-127
Advantages:
There are distinct +0 and –ve representations in both the sign magnitude and
1’s compliment systems, but the 2’s compliment system has only a +0
representation.
For 4-bit numbers, the value-8 is represntable only in the 2’s complement
system and not in other systems.
The floating point representation has 3 fields: signed, significant digits and
exponents.
Ex: 111101 1000110
Normalized representation is nothing but shifting the decimal point to the right
of the first but and the number is multiplied by the correct scaling factor to get
some values as fallows
The IEEE standard form of representing the floating point values as below.
Error detection codes:
When the digital information in the binary form is transmitted from one circuit
or system to another circuit or system an error may occur.
The data along with the extra bit or bits forms the code and these codes will
allow only the error detection are called error detecting codes.
Parity bit:
The extra bit in data is called parity bit.
A parity bit is used for the purpose of detecting error’s doing transmission of
data binary information.
A parity bit is an extra bit included with binary message and transmitted
through the media and then checked at the receiving and for errors.
The circuit which generates the parity bit in the transmitter is called parity bit
generator.
The circuit that checks the parity in the receiver is called parity checker.
For example, consider the below table which shows that, a 3-bit message with
even parity and odd parity.
During transferring of information from one location to another, the parity bit
is handled as follows:
When the received parity bit generated, the message including the parity bit is
transmitted to its destination.
At the receiving end all the incoming bits are applied to the parity checker,
that check’s the proper parity adopted.
An error is detected if the checked parity does not conform to adopted parity.
The parity checker & parity generator circuit for a 3 bit message is as fallows
by using the exclusive OR gate
By using above circuit we can transmit the data with error detection codes,
which consists of parity generator & parity checker.
Multiplication:-
Compared with addition and subtraction, multiplication is a complex
operation, whether performed in hardware or software. A wide variety of algorithms
have been used in various computers. We begin with the simpler problem of
multiplying two unsigned (nonnegative) integers, and then we look at one of the most
Unsigned Integers:-
1. Multiplication involves the generation of partial products, one for each digit in the
multiplier. These partial products are then summed to produce the final product.
2. The partial products are easily defined. When the multiplier bit is 0, the partial
product is 0. When the multiplier is 1. the partial product is the multiplicand.
3. The total product is produced by summing the partial products. For this operation,
each successive partial product is shifted one position to the left relative to the
preceding partial product.
Description
Q multiplier
B multiplicand
A 0
SC number of bits in multiplier
E overflow bit for A
Do SC times
If low-order bit of Q is 1
A←A+B
Shift right EAQ
Product is in AQ
Flowchart
Example: 23 x 19 = 437
Multiply Signed-2’s Complement Booth algorithm
QR multiplier
Qn least significant bit of QR
Qn+1 previous least significant bit of QR
BR multiplicand
AC 0
SC number of bits in multiplier
Algorithm:-
1. Do SC + 1 times
2. QnQn+1 = 10
3. AC ← AC + BR + 1
4. QnQn+1 = 01
5. AC ← AC + BR
6. Arithmetic shift right AC & QR
7. SC ← SC – 1
Booth Multiplication Algorithm:-
One of the most common of these is Booth's algorithm. This algorithm also has the
benefit of speeding up the multiplication process, relative to a more straightforward
approach.
Hardware
Flowchart
Array Multiplier:-
Checking the bits of the multiplier one at a time and forming partial products is a
sequential operation that requires a sequence of add and shift micro-operations. The
multiplication of two binary numbers can be done with one micro-operation by means
of a combinational circuit that forms the product bits all at once. This is a fast way of
multiplying two numbers since all it takes is the time for the signals to propagate
through the
two half-adder (HA) circuits. Usually, there are more bits in the partial products and it
will be necessary to use full-adders to produce the sum. Note that the least significant
bit of the product does not have to go through an adder since it is formed by the
output of the first AND gate.
Combination circuit
Product generated in one microoperation
Requires large number of gates
Became feasible after integrated circuits developed
Needed for j multiplier and k multiplicand bits
j x k AND gates
j – 1 k-bit adders to produce product of j + k bits
4.3 Division:-
Division is somewhat more complex than multiplication but is based on the same
general principles. As before, the basis for the algorithm is the paper-and-pencil
approach, and the operation involves repetitive shifting and addition or subtraction.
As before, the divisor is subtracted from this number to produce a new partial
remainder. The process continues until all the bits of the dividend are exhausted.
Example: 448 ⁄ 17 = 26 r 6
Initially, AQ dividend
B divisor
At end of operation,
Q quotient
A remainder
Algorithm:-