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LED LCD TV
SERVICE MANUAL
CHASSIS : LD91L

MODEL : 42SL9000 42SL9000-ZA


MODEL : 42SL9500 42SL9500-ZB
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL58858420 (0909-REV00) Printed in Korea


CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ..................................................................................3

SPECIFICATION ........................................................................................6

ADJUSTMENT INSTRUCTION .................................................................9

BLOCK DIAGRAM...................................................................................15

EXPLODED VIEW .................................................................................. 23

SVC. SHEET ...............................................................................................

Copyright ©2009 LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer, AC Volt-meter

always perform an AC leakage current check on the exposed


metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instrument's CONDUIT etc.
0.15uF
Leakage Current Cold Check(Antenna Cold Check) exposed
With the instrument AC plug removed from AC source, connect an METALLIC PARTS
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc. When 25A is impressed between Earth and 2nd Ground
If the exposed metallic part has a return path to the chassis, the for 1 second, Resistance must be less than 0.1 Ω
measured resistance should be between 1MΩ and 5.2MΩ.
*Base on Adjustment standard
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright ©2009 LG Electronics. Inc. All right reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service unit under test.
manual and its supplements and addenda, read and follow the 2. After removing an electrical assembly equipped with ES
SAFETY PRECAUTIONS on page 3 of this publication. devices, place the assembly on a conductive surface such as
NOTE: If unforeseen circumstances create conflict between the aluminum foil, to prevent electrostatic charge buildup or
following servicing precautions and any of the safety precautions on exposure of the assembly.
page 3 of this publication, always follow the safety precautions. 3. Use only a grounded-tip soldering iron to solder or unsolder ES
Remember: Safety First. devices.
4. Use only an anti-static type solder removal device. Some solder
General Servicing Precautions removal devices not classified as "anti-static" can generate
1. Always unplug the receiver AC power cord from the AC power electrical charges sufficient to damage ES devices.
source before; 5. Do not use freon-propelled chemicals. These can generate
a. Removing or reinstalling any component, circuit board electrical charges sufficient to damage ES devices.
module or any other receiver assembly. 6. Do not remove a replacement ES device from its protective
b. Disconnecting or reconnecting any receiver electrical plug or package until immediately before you are ready to install it.
other electrical connection. (Most replacement ES devices are packaged with leads
c. Connecting a test substitute in parallel with an electrolytic electrically shorted together by conductive foam, aluminum foil
capacitor in the receiver. or comparable conductive material).
CAUTION: A wrong part substitution or incorrect polarity 7. Immediately before removing the protective material from the
installation of electrolytic capacitors may result in an leads of a replacement ES device, touch the protective material
explosion hazard. to the chassis or circuit assembly into which the device will be
installed.
2. Test high voltage only by measuring it with an appropriate high CAUTION: Be sure no power is applied to the chassis or circuit,
voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged
Do not test high voltage by "drawing an arc". replacement ES devices. (Otherwise harmless motion such as
3. Do not spray chemicals on or near this receiver or any of its the brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity
4. Unless specified otherwise in this service manual, clean sufficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10% (by volume) Acetone and 90% (by 1. Use a grounded-tip, low-wattage soldering iron and appropriate
volume) isopropyl alcohol (90%-99% strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500°F to 600°F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500°F to 600°F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500°F to 600°F)
Some semiconductor (solid-state) devices can be damaged easily b. First, hold the soldering iron tip and solder the strand against
by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors and component lead and the printed circuit foil, and hold it there
semiconductor "chip" components. The following techniques only until the solder flows onto and around both the
should be used to help reduce the incidence of component component lead and the foil.
damage caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. splashed solder with a small wire-bristle brush.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the

Copyright ©2009 LG Electronics. Inc. All right reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through Circuit Board Foil Repair
which the IC leads are inserted and then bent flat against the Excessive heat applied to the copper foil of any printed circuit
circuit foil. When holes are the slotted type, the following technique board will weaken the adhesive that bonds the foil to the circuit
should be used to remove and replace the IC. When working with board causing the foil to separate from or "lift-off" the board. The
boards using the familiar round hole, use the standard technique following guidelines and procedures should be followed whenever
as outlined in paragraphs 5 and 6 above. this condition is encountered.

Removal At IC Connections
1. Desolder and straighten each IC lead in one operation by gently To repair a defective copper pattern at IC connections use the
prying up on the lead with the soldering iron tip as the solder following procedure to install a jumper wire on the copper pattern
melts. side of the circuit board. (Use this technique only on IC
2. Draw away the melted solder with an anti-static suction-type connections).
solder removal device (or with solder braid) before removing the
IC. 1. Carefully remove the damaged copper pattern with a sharp
Replacement knife. (Remove only as much copper as absolutely necessary).
1. Carefully insert the replacement IC in the circuit board. 2. carefully scratch away the solder resist and acrylic coating (if
2. Carefully bend each IC lead against the circuit foil pad and used) from the end of the remaining copper pattern.
solder it. 3. Bend a small "U" in one end of a small gauge jumper wire and
3. Clean the soldered areas with a small wire-bristle brush. carefully crimp it around the IC pin. Solder the IC connection.
(It is not necessary to reapply acrylic coating to the areas). 4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
"Small-Signal" Discrete Transistor copper pattern. Solder the overlapped area and clip off any
Removal/Replacement excess jumper wire.
1. Remove the defective transistor by clipping its leads as close as
possible to the component body. At Other Connections
2. Bend into a "U" shape the end of each of three leads remaining Use the following technique to repair the defective copper pattern
on the circuit board. at connections other than IC Pins. This technique involves the
3. Bend into a "U" shape the replacement transistor leads. installation of a jumper wire on the component side of the circuit
4. Connect the replacement transistor leads to the corresponding board.
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder 1. Remove the defective copper pattern with a sharp knife.
each connection. Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
Power Output, Transistor Device 2. Trace along the copper pattern from both sides of the pattern
Removal/Replacement break and locate the nearest component that is directly
1. Heat and remove all solder from around the transistor leads. connected to the affected copper pattern.
2. Remove the heat sink mounting screw (if so equipped). 3. Connect insulated 20-gauge jumper wire from the lead of the
3. Carefully remove the transistor from the heat sink of the circuit nearest component on one side of the pattern break to the lead
board. of the nearest component on the other side.
4. Insert new transistor in the circuit board. Carefully crimp and solder the connections.
5. Solder each transistor lead, and clip off excess lead. CAUTION: Be sure the insulated jumper wire is dressed so the
6. Replace heat sink. it does not touch components or sharp edges.

Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Copyright ©2009 LG Electronics. Inc. All right reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method


This specification is applied to the LED LCD TV used LD91L 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety: CE, IEC specification
2. Requirement for Test - EMC:CE, IEC
Each part is tested as below without special appointment.

1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC


2) Relative Humidity : 65±10%
3) Power Voltage : Standard input voltage(100-240V@
50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. Electrical specification
- Module General Specification

No Item Specification Remark


1 Screen Device 42” wide color display module
2 Aspect Ratio 16:9
3 LCD Module 42” TFT LCD FHD 200Hz
4 Operating Environment Temp. : 0 ~ 50 deg
Humidity : 10 ~ 90%
4 Storage Environment Temp. : -20 ~ 60 deg
Humidity : 10 ~ 90 %
5 Input Voltage AC100-240V~, 50/60Hz
6 Power Consumption Power on (White) LCD (Module) + Backlight(LED)
Typ : 154, Max : 168
7 Module Size 973.2 (H) x 566.2 (V) x 11.9(B)/25.5mm (D) With inverter
8 Pixel Pitch 0.4845 (H) x 0.4845 (D)
9 Back Light LED
10 Display Colors 1.06Billion colors (10 bit)
11 Coating 3H(Hard coating)

Copyright ©2009 LG Electronics. Inc. All right reserved. -6- LGE Internal Use Only
Only for training and service purposes
5. Chroma& Brightness
- Module optical specification
(1) LGD Module
No. Item Specification Min. Typ. Max. Remark
1. Viewing Angle<CR>10> Right/Left/Up/Down 89 CR>10
2. Luminance Luminance (cd/m2) 450
Variation - 1.3 MAX /MIN
3. Contrast Ratio CR 900 1300
4. CIE Color Coordinates White Wx 0.279
Wy 0.292 Typ
RED Xr 0.640 ±0.03
Yr 0.331
Green Xg 0.282
Yg 0.634
Blue Xb 0.151
Yb 0.057

1) Standard Test Condition (The unit has been ‘ON’)


2) Stable for approximately 30 minutes in a dark environment at 25±2ºC.
3) The values specified are at approximate distance 50Cm from the LCD surface
4) Ta=25±2ºC, VLCD=12.0V, fV=60Hz, Dclk=74.25MHz VBR_A=1.65V,ExtVBR_B=85%

6. Component Video Input (Y, CB/PB, CR/PR)


Specification
No Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.43/67.5 59.94/60 HDTV 1080p

Copyright ©2009 LG Electronics. Inc. All right reserved. -7- LGE Internal Use Only
Only for training and service purposes
7. RGB Input(PC)
Specification
No Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 For only DOS mode
2. 640*480 31.469 59.94 Input 848*480 60Hz, 852*480 60Hz
-> 640*480 60Hz Display
3. 800*600 37.879 60.31
4. 1024*768 48.363 60.00
5. 1280*768 47.78 59.87
6. 1360*768 47.72 59.8
7. 1280*1024 63.595 60.00
8. 1920*1080 66.587 59.93
9. 1366*768 47.13 59.65

8. HDMI Input
(1) DTV Mode
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P

(2) PC Mode
Specification
No Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 For only DOS mode
2. 640*480 31.469 59.94 Input 848*480 60Hz, 852*480 60Hz
-> 640*480 60Hz Display
3. 800*600 37.879 60.31
4. 1024*768 48.363 60.00
5. 1280*768 47.78 59.87
6. 1360*768 47.72 59.8
7. 1280*1024 63.595 60.00
8. 1920*1080 66.587 59.93
9. 1366*768 47.13 59.65

Copyright ©2009 LG Electronics. Inc. All right reserved. -8- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range 4) Click “Connect” tab. If “Can’t” is displayed, check
connection between computer, jig, and set.
This specification sheet is applied to all of the LED LCD TV
with LD91L chassis.
(1) (4)

2. Designation
1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard Please Check the Speed :
5) Reserve after operation: Above 5 Minutes (Heat Run) To use speed between
from 200KHz to 400KHz
Temperature : at 25±5ºC
Relative humidity : 65±10%
Input voltage : 220V, 60Hz 5) Click “Auto” tab and set as below
6) Adjustment equipments: Color Analyzer (CA-210 or CA- 6) Click “Run”.
110), Pattern Generator(MSPG-925 Series or Equivalent), 7) After downloading, check “OK” message.
DDC Adjustment Jig equipment, Service Remote Control.
(5)
7) Push The “IN STOP KEY” - For memory initialization.
filexxx.bin
Case1 : Software version up (5)
1. After downloading S/W by USB, TV set will reboot
automatically. (7) ……….OK
2. Push “In-stop” key.
3. Push “Power on” key. (6)
4. Function inspection
5. After function inspection, Push “I n-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first. * USB DOWNLOAD
2. Push “Power on” key for turning it on. 1) Put the USB Stick to the USB socket
-> If you push “Power on” key, TV set will recover 2) Automatically detecting update file in USB Stick
channel information by itself. - If your downloaded program version in USB Stick is Low,
3. After function inspection, Push “In-stop” key. it didn’t work. But your downloaded version is High, USB
data is automatically detecting
3) Show the message “Copying files from memory”

3. Main PCB check process


* APC - After Manual-Insult, executing APC

* Boot file Download


1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
2) Set as below, and then click “Auto Detect” and check “OK”
message
If “Error” is displayed, Check connection between
computer, jig, and set.
3) Click “Read” tab, and then load download file (XXXX.bin)
by clicking “Read”

(3)

fi lexxx.bin

Copyright ©2009 LG Electronics. Inc. All right reserved. -9- LGE Internal Use Only
Only for training and service purposes
4) Updating is staring. 3.1. ADC Process
(1) External ADC(Only adjust in the component mode 480I)
• Input the signal in the Component 1 - Component 480i
(Adjusted only this mode)
MODEL: 209 in Pattern Generator(480i Mode)
PATTERN : 65 in Pattern Generator(MSPG-925 SERIES)

Adjustment pattern

• After enter Service Mode by pushing “ADJ” key,


• Enter the 5 item and then Push the “Start” key.

(2) Internal ADC(Only adjust in the RGB)


• After enter Service Mode by pushing “ADJ” key
• Enter ADC Calibration mode by pushing “G” key at “5.
ADC Calibration”
<Caution> Using ‘power on’ button of the Adjustment R/C ,
power on TV.

* ADC Calibration Protocol (RS232)


Item CMD1 CMD2 Data0
Adjust A A 0 0 When transfer the ‘Mode In’,
‘Mode In’ Carry the command.
5) Updating Completed, The TV will restart automatically.
ADC Adjust A D 1 0 Automatically adjustment
6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage) (The use of a internal pattern)
* If downloading version is more high than your TV have,
Adjust Sequence
TV can lost all channel data. In this case, you have to
• aa 00 00 [Enter Adjust Mode]
channel recover. if all channel data is cleared, you didn’t
• xb 00 40 [Component1 Input (480i)]
have a DTV/ATV test on production line.
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
* After downloading, have to adjust Tool Option again. • ad 00 10 [Adjust 1024*768 RGB]
1) Push "IN-START" key in service remote controller • aa 00 90 End Adjust mode
2) Select “Tool Option 1” and Push “OK” button.
3) Punch in the number. (Each model hax their number)
3.2. Function Check
Model Tool option1 Tool option2 Tool option3 Tool option4 (1) Check display and sound
SL9xxx 26305 3106 57254 3360 · Check Input and Signal items. (cf. work instructions)
1) TV
4) Completed selecting Tool option. 2) AV (SCART1/SCART2/ CVBS)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote control.

<Caution>
Not to push the INSTOP key after completion if the function
inspection.

Copyright ©2009 LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
4. Total Assembly line process RS-232C COMMAND MIN CENTER MAX

4.1. Adjustment Preparation [CMD ID DATA] (DEFAULT)


· W/B Equipment condition Cool Mid Warm Cool Mid Warm
CA210 : CH 14(LED), Test signal : Inner pattern (85IRE) R Gain jg Ja jd 00 172 192 192 255
· Above 5 minutes H/run in the inner pattern. (“power on” key
of adjust remote control) G Gain jh Jb je 00 172 192 192 255
B Gain ji Jc jf 00 192 192 172 255
Cool 13,000k ºK X=0.269(±0.002)
R Cut 64 64 64 128
Y=0.273(±0.002) <Test Signal>
G Cut 64 64 64 128
Medium 9,300k ºK X=0.285(±0.002) Inner pattern
B Cut 64 64 64 128
Y=0.293(±0.002) (216gray,85IRE)
Warm 6,500k ºK X=0.313(±0.002) In the SET applied LED module, as to physical characteristics
Y=0.329(±0.002) of LED Module, the sets takes a 120 minutes by aging time to
stabilize a color coordinates. So White Balance Control
equipments get the SET Aging Time from SET and then going
* Connecting picture of the measuring instrument to control the W/B by revise color coordinates in the each time
(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to Cautions) The Time Table of color coordinates by SET Aging Time
auto controller or push Adjustment R/C POWER ON ->
Enter the mode of White-Balance, the pattern will come out H/R Time Cool Medium Warm
(Min) X Y X Y X Y
269 273 285 293 313 329
1 ~5 281 297 290 307 318 343
Full White Pattern CA-210
2 6~20 280 288 289 301 317 338
COLOR
ANALYZER 3 21~30 278 285 287 297 316 334
TYPE: CA-210
4 31~ 276 283 285 293 313 329

RS-232C Communication ** Caution **


Color Temperature : COOL, Medium, Warm.
One of R Gain/ G Gain/ B Gain should be kept on 0xC0, and
* Auto-control interface and directions adjust other two lower than C0.
1) Adjust in the place where the influx of light like floodlight (when R/G/B Gain are all C0, it is the FULL Dynamic Range
around is blocked. (illumination is less than 10 lux). of Module)
2) Adhere closely the Color Analyzer (CA210) to the module
less than 10cm distance, keep it with the surface of the
* Manual W/B process using adjusts Remote control.
Module and Color Analyzer’s Prove vertically.(80~100°).
Dynamic contrast : off
3) Aging time
Dynamic color : off
- After aging start, keep the power on (no suspension of
OPC : off
power supply) and heat-run over 15minutes.
Energy saving mode : off
- Using ‘no signal’ or ‘full white pattern’ or the others,
• After enter Service Mode by pushing “ADJ” key,
check the back light on.
• Enter White Balance by pushing “ G ” key at “3. White
• Auto adjustment Map(RS-232C) Balance”.
RS-232C COMMAND
[CMD Format]
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A STOP
- LEN : Number of Data Byte to be send
- CMD : Command
- VAL : FOS Data
- CS : Checksum of sent Data
- A : Acknowledge
Ex) [Send : JA_00_DD] / [Ack : A_00_okDDX]

[CMD ID DATA]
Wb 00 00 White Balance Start
Wb 00 ff White Balance End
- In the SET applied LED module, as to physical
characteristics of LED Module, the sets takes a 120
minutes by aging time to stabilize a color coordinates. So
White Balance Control equipments get the SET Aging Time
from SET and then going to control the W/B by revise color
coordinates in the each time

Copyright ©2009 LG Electronics. Inc. All right reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
Cautions) The Time Table of color coordinates by SET Aging Tim
H/R Time Cool Medium Warm
(Min) X Y X Y X Y
269 273 285 293 313 329
1 ~5 281 297 290 307 318 343
2 6~20 280 288 289 301 317 338
3 21~30 278 285 287 297 316 334
4 31~ 276 283 285 293 313 329

* After done all adjustments, Press “In-start” button and


compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
- Manual Download
For correct it to the model’s module from factory JIG model. * Caution
* Push The “IN STOP KEY” after completing the function · Use the proper signal cable for EDID Download
inspection. - Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
· Never connect HDMI & D-sub Cable at the same time.
4.2. DDC EDID Write (RGB 128Byte) · Use the proper cables below for EDID Writing.
• Write EDID Data to EEPROM(24C02) by using DDC2B · Download HDMI1, HDMI2, separately because HDMI1 is
protocol. different from HDMI2.
• Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert For Analog EDID For HDMI EDID
Process in advance. D-sub to D-sub DVI-D to HDMI or HDMI to HDMI

4.3. DDC EDID Write (HDMI 256Byte)


• Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert
Process in advance.
No. Item Condition Hex Data
4.4. EDID DATA 1 ManufacturerID GSM 1E6D
1) All Data : HEXA Value 2 Version Digital : 1 01
2) Changeable Data : 3 Revision Digital : 3 03
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
1) Analog Data 128Byte (2Bi)
***:Year : Controlled
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
****:Check sum
0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ
0x01 ⓒ 01 03 68 73 41 78 0A CF 74 A3 57 4C B0 23
- Auto Download 0x02 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
• After enter Service Mode by pushing “ADJ” key. 0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
• Enter EDID D/L mode. 0x04 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
• Enter “START” by pushing “OK” key. 0x05 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
* Edid data and Model option download (RS232) 0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ

Item CMD1 CMD2 Data0 0x07 ⓓ 00 ⓔ

Download A A 0 0 When transfer the ‘Mode In’,


‘Mode In’ Carry the command.
2) DIGITAL DATA(HDMI-1/2/3/4) 256Byte
Download A E 00 10 Automatically Download
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D0x0E 0x0F
(The use of a internal Data) 0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ
0x01 ⓒ 01 03 80 73 41 78 0A CF 74 A3 57 4C B0 23
<Caution> 0x02 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
- Never connect HDMI & D-sub cable when the user 0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
downloading. 0x04 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
- Use the proper cables below for EDID Writing 0x05 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
0x07 ⓓ 01 ⓔ
0x00 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
0x01 22 15 01 26 15 07 50 09 57 07 67 ⓕ
0x02 ⓕ E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C
0x03 25 00 7E 8A 42 00 00 9E 01 1D 00 80 51 D0 0C 20
0x04 40 80 35 00 7E 8A 42 00 00 1E 02 3A 80 18 71 38
0x05 2D 40 58 2C 45 00 7E 8A 42 00 00 1E 66 21 50 B0
0x06 51 00 1B 30 40 70 36 00 7E 8A 42 00 00 1E 00 00
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ⓔ

Copyright ©2009 LG Electronics. Inc. All right reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
* Detail EDID Options are below 5. Serial number D/L
ⓐ Product ID
• Press “Power on” key of service remote control.
Model Name HEX EDID Table DDC Function (Baud rate : 115200 bps)
**SL9**** 0001 0100 Analog • Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
0000 0100 Digital • Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below).

ⓑ Serial No: Controlled on production line.


ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘02’ -> ‘02’
Year : ‘2009’ -> ‘13’
ⓓ Model Name(Hex):
MODEL MODEL NAME(HEX)
42SL9000 00 00 00 FC 00 34 32 53 4C 39 30 30 30 2D 5A 41 0A 20
42SL9500 00 00 00 FC 00 34 37 53 4C 39 30 30 30 2D 5A 41 0A 20
5.1. Signal TABLE
CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY
ⓔ Checksum: Changeable by total EDID data.
CMD : A0h
ⓕ Vendor Specific(HDMI)
LENGTH : 85~94h (1~16 bytes)
INPUT MODEL NAME(HEX) ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
HDMI1 67 03 0C 00 10 00 B8 2D Data : Write data
HDMI2 67 03 0C 00 20 00 B8 2D CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n
Delay : 20ms
HDMI3 67 03 0C 00 30 00 B8 2D
HDMI4 67 03 0C 00 40 00 B8 2D
5.2. Command Set
No. Adjust mode CMD(hex) LENGTH(hex) Description

4.5. Checking the function of Bluetooth 1 EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16)

using adjusts Remote control


(1) Auto checking * Description
- Auto checking is doing in “Power Only”. FOS Default write : <7mode data> write
- Checking the result of searched(check that is in list or not). Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
- Go out of checking mode pushing button “Exit”. Phase
Data write : Model Name and Serial Number write in EEPROM.
(2) Manual checking
- Push the button “Power Only” and “Exit”.
- Push the button hot key “Bluetooth”.
5.3. Method & notice
- Checking the result of searched(check that is in list or not). A. Serial number D/L is using of scan equipment.
- Go out of checking mode pushing button “Exit”. B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.

4.6. Outgoing condition Configuration


- When pressing “IN-STOP” key by Service remote control,
Red LED are blinked alternatively. And then Automatically
turn off. (Must not AC power OFF during blinking)

4.7. Internal pressure


Confirm whether is normal or not when between power
board's ac block and GND is impacted on 1.5kV(dc) or
2.2kV(dc) for one second.

Copyright ©2009 LG Electronics. Inc. All right reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It
need Manual download.
1) Press the ‘Instart’ key of ADJ remote control.
2) Go to the menu ‘5.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 42LH4000-ZA) or Serial
number like photo.

4) Check the model name Instart menu -> Factory name


displayed (ex 42SL8000-ZB)
5) Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42SL8000-ZB)

Copyright ©2009 LG Electronics. Inc. All right reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
Module 1. T-project

Chip Tuner

74L
(XC5000) I2C
BUF_TS_CLK/ERR/SYN/DATA[0] FRC
LGE7329

Buffer
LVDS

LVC541A
CI_TS_DATA [0:7]

Only for training and service purposes


Demodulator CI_Data[0:7] PCM_D[0:7]
SPI_CK/CS/D0/D1 Serial Flash
(DRC3931) FE_TS_DATA[0:7] PCM_A[8:14] For Boot

o
CI Sl ot
CI MDI[00:7]]
CI_MDI[
CI_ADDR[0:7] PCM_A[0:7]
SDDR_D[0:15]

Buffer
DDR2 SDRAM
SDDR_A[0:12]

74LCX244
(1GB)

Copyright ©2009 LG Electronics. Inc. All right reserved.


TDDR_D[0:15] HYNIX
DDR2 SDRAM
TDDR_A[0:12] (512MB)
FE_VMAIN HYNIX

FE_ VOUT PCM_A[0:7] NAND Flash


F- SCART HYNIX
SC1_CVBS_IN
(64MB)
SC1_R/G/B
H- SCART I2C
DTV/MNT_VOUT Mstar EEP ROM
AT24C512

- 15 -
CVBS IN
SC2__

Side AV
Saturn 6
AV3 AV_CVBS_IN I2S
Digital amp L/ R
MSD3368 (NTP3100L)
COMPONENT COMP_Y/Pb/Pr
BLOCK DIAGRAM

RGB DSUB_ R/G/B


DSUB_H/VSYNC
USB1_DM/ DPUSB USB Power MP6211DH
AUDIO IN (PC) USB Power
AUDIO Out (Head Phone)
Audio
AUDIO Out(B/T Headset) Switch
TMDS[0:7] HDMI 4
USB0_DM/ DP Side
HPD, 5V_HDMI
DGB_TX/RX
RS-232C
MAX3232CDR TMDS[0:7] HDMI
HDMI_CEC TMDS351PAGR
A 1/2/ 3
SPDIF
SPDIF_OUT Rear : 3
HPD
5V_HDMI

LGE Internal Use Only


MSD3368 SA TURN6
+1.8V_DDR +1.8V_DDR
(IC100) 512Mbit DDR2(IC301)
2. Memory
1Gbit DDR2(IC300)
G8 M8 A_DDR2_A0 B_DDR2_A0
A_DDR2_A1 M8 G8
G2 M3 B_DDR2_A1
A_DDR2_A2 M3 G2
H7 M7 B_DDR2_A2
A_DDR2_A3 M7 H7
H3 N2 B_DDR2_A3
A_DDR2_A4 N2 H3
H1 N8 B_DDR2_A4
N8 H1

Only for training and service purposes


H9 N3 A_DDR2_A5 B_DDR2_A5
A_DDR2_A6 N3 H9
F1 N7 B_DDR2_A6
A_DDR2_A7 N7 F1
F9 P2 B_DDR2_A7
A_DDR2_A8 P2 F9
C8 P8 B_DDR2_A8
A_DDR2_A 9 P8 C8
C2 P3 B_DDR2_A9
A_DDR2_A10 P3 C2
D7 M2 B_DDR2_A10
M2 D7
D

Copyright ©2009 LG Electronics. Inc. All right reserved.


D3 P7 A_DDR2_A11 B_DDR2_A11
A_DDR2_A12 P7 D3
D1 R2 B_DDR2_A12
R2 D1
D9 D9
B1 A_DDR2_DQ0 B_DDR2_DQ0 B1
B9 A_DDR2_DQ1 B_DDR2_DQ1 B9
AD_DR2 DQ2 B DDR2
B_DDR2_DQ2
A_DDR2_DQ3 B_DDR2_DQ3

- 16 -
A_DDR2_DQ4 B_DDR2_DQ4
A_DDR2_DQ5 B_DDR2_DQ5
A_DDR2_DQ6 B_DDR2_DQ6
A_DDR2_DQ7 B_DDR2_DQ7
A_DDR2_DQ8 B_DDR2_DQ8
A_DDR2_DQ9 B_DDR2_DQ9 512Mbit +3.3V
A_DDR2_DQ10 B_DDR2_DQ10
A_DDR2_DQ11 B_DDR2_DQ11
NAND Flash(IC102)
+3.3V A_DDR2_DQ12 B_DDR2_DQ12
32Mbit Serial Flash A_DDR2_DQ13 B_DDR2_DQ13
(IC103) - For boot A _DDR2_DQ14 B_DDR2_DQ14
A_DDR2_DQ15 B_DDR2_DQ15

SPI_DI PCM_A I/O0 ~ I/O7


PCM_A[0] ~ A[7]
DI SPI_D0 SPI_DI
DO SPI_DO
SPI_CK F-RBZ, PF_OE, R/B, RE, CE
CK SPI_CK F/RB, PF_OE,PF_CE0,
PF_CE0,PF_CE1,
CS SPI_CS SPI_CS PF_CE1,PF_ALE,PF_WE, C
CLE. ALE,WE,WP
PF_ALE, PF_WE,
PF_AD15E PF_ WP

LGE Internal Use Only


3. Video
SATURN 6
TMDS351PAGR(TI)(IC603) -MSD3368 (IC100)
BU16027KV(ROHM)
HDMI CLK+/- RX0+/RX0- DDCD_A_DA Tuner In
CVBS0/RF_CVBX FE_VMAIN
DDCD_A_CK
RX1+/RX1- RX2+/RX2- HDMI Switch
RXACKP
HDMI_SCL/SDA
HDMI1/2/3 RXACKNDDCD_C_DA

Only for training and service purposes


HDMI_CEC RXA0P DDCD_C_CK
CVBSOUT0 TV/MNT Out
RXA0N RXCCKP (SC2_MNTOUT) DTV/MNT_VOUT
RXA1P RXCCKN
EEPROM RXA1N RXC0P
RXA2P RXC0N
HDMI4 RXA2N RXC1P LGE7329A(IC900)
LVA0P

Copyright ©2009 LG Electronics. Inc. All right reserved.


RXC1N LVA0M
EEPROM RXC2P LVA1P RA1+
SC1-ID RXC2N LVA1M RA1-
LVA2P RB1+
SC1-FB SCART LVA2M LVDS OUT
HYNCO0/SC1_ID RB1-
RGB VSYNC0/SC1_FB LVA3P RC1+
SC1_R/G/B LVA3M
R/G/BINOP (SC1_R/G/B) RC1-
SOGIN0/SC1_CVBS LVA4P RD1+

- 17 -
SC1_CVBS_IN
LVA4M RD1-
LVACKP RE1+
DSUB_HSYNC DSUB LVACKM RE1-
HSYBC1/DSUB_HSYNC
RCLK+
VSYNC/DSUB_VSYNC
_
DSUBVSYNC LVB0P RCLK-
R/G/BIN1P (DSUB_R/G/B)
LVB0M RA2+
DSUB_R/G/B EEPROM SOGIN1
D_SUB_SCL LVB1P RA2- IC902
D_SUB_SDA LVB1M RB2+
RIN2P/COMP_PR+ LVB2P RB2-
LVB2M Serial
COMP_Pr COMP GIN2P/COMP_Y+ RC2+
LVB3P RC2- Flash
BIN2P/COM _PB+
COMP_Y SOGIN2 LVB3M RD2+
LVB4P RD2-
COMP_Pb LVB4M RE2+
LVBCKP RE2-
CVBS CVBS1/SC_CVBS LVBCKM
SC1_CVBS_IN CVBS2/SC_CVBS
CVBS3/SIDE _CVBS
SC2_CVBS_IN CVBS
Side AV
AV_CVBS_IN

LGE Internal Use Only


SA TURN 6
+1.26V_VDDC
-MSD3368 (IC100)
+1.8V_DDR
AUR0 AV_R_OUT
+3.3V
4. Audio & ETC

AUL0
+3.3V AV_L_OUT
AUR1
AUL1 FE_AM_AUDIO
EEPROM_SCL AUL2 SUB_SPK_MONO

Only for training and service purposes


512Kbit EEPROM EEPROM_SDA UART2_TX/SCKM AUR2
UART2_RX/SCKM
- M24512(IC105) FE_SIF
SIF0P (From Tuner)
SATURN_RESET_In HWRESET

Copyright ©2009 LG Electronics. Inc. All right reserved.


SCART1_Rout
AUOUTR1/SC1_ROUT Scart Out
AUOUTL1/SC1_LOUT SCART1_Lout
Crystal XIn/XOut
12MHz AUOUTR2/SC2_ROUT
AUOUTL3/SC2_LOUT
SCART2_Rout
UART (P401) SCAR2_Lout

- 18 -
DBG_TX/RX
MAX3232 UART_TX2/
RX2
DR2G
Head Phone Out (JK700)
MC74HC4066ADR2G USB_CTL AUOUTR0/HP_ROUT SPDIF_OUT
Audio Switch
SPDIF(JK403)
AUOUTL0/HP_LOUT

USB0_DP
USB0_DM
NTP-3100L (IC701)
USB_CTL AUDIO_MASTER_CLK
GPIO67 I2S_OUT_MCK
I2S_OUT_WS I2S out MS_LRCK
MP6211DH USB_OCD
USB Power GPIO85 I2S_OUT_BCK
I2S_OUT_SD MS_SCK

USB(JK405) +5V_USB MS_LRCH


USB1_DP
USB1_DM

LGE Internal Use Only


5. Tuner

Chip Tuner Demodulator


D_3.3V
XC5000 DRX3913K FE_TS_SYNC
A_3.3V
- Xceive (IC1200) C_+3.3V -MICRONAS (IC1203) FE_TS_ERR
12 V
+1. FE_SERIAL
In1 FE_TS_DATA_CLK

Only for training and service purposes


+5V_TUNER A_1.2V MSTRT FE_TS_VAL
+3.3V_TUNER MERR
+1.8V_TUNER MD0
MCLK
VAGC IF_
IF AGC IF AGC
IF_ MVAL

Copyright ©2009 LG Electronics. Inc. All right reserved.


Crystal
X1/X2 MD0 FE_TS_DATA[0-7]
20.25MHz
~
TUNER_SIF_IF_N INN MD7
Crystal SIF TU_RESET
31.875MHz X1/X2 RSTN From
TUNER_CVBS_I
F_P INP Saturn6

- 19 -
VIF MSD3368
I2C_SCL1
FE_TUNER_SDA(5V) I2C_SDA1
FE_TUNER_SCL(5V) +3.3V_FE_DEMOD_SCL
SDA/SCL +3.3V_FE_DEMOD_SDA

TU_RESET
RESET
(FE_RESET) SATURN 6
From - MSD3368
Saturn6 (IC100)
CVBS_SCART_OUT FE_TS_ERR AND
MSD3368 FE_TS_VAL_ERR
FE_TS_VAL Gate

LGE Internal Use Only


6. CI
CI_TS_DATA[0~7]

+5.0V_CI_ON PCM_IRQA

CI_TS_CLK
FE_TS_DATA[0~7] CI_MD1[0~ 7] CI_TS_VAL

Only for training and service purposes


Register CI_TS_SYN
CI_TS_WAIT

CI_ADDR[8~14]
NAND CI_ADDR[0~7]
Flash Register CI slot

Copyright ©2009 LG Electronics. Inc. All right reserved.


PCM_CE

PCM_A[0~7] CI_ADDR[0~7] PCM_OE


PCM_RST
74LCX244
74LCX24 PCM_IORD SATURN 6

- 20 -
+3.3V_CI MTC CI_CD1 PCM_IOWR -MSD3368 (IC100)
CI_DET PCM_REG
OE Or CI_CD2 PCM_RST
Gate

3.3V_CI
BUF_TS_CLK
FE_TS_CLK
FE_TS_VAL_ERR 74LVC541A BUF_TS_VAL_ERR
Buff er
FE_TS_SYN BUF_TS_SYN
FE_TS_SERIAL BUF_TS_SERIAL_D

LGE Internal Use Only


7. I2C Map

EEPROM_SCL
EEPROM_SDA
(+3.3V)
NVRAM HDCPKey
M24512(IC105) CA
CAT24WC08W (IC107)

Only for training and service purposes


SDA0/SCL0
(+3.3V) FE_DEMOD_SDA MEMC_SDA
FE_DEMOD_SCL MEMC_SCL
FRC

Copyright ©2009 LG Electronics. Inc. All right reserved.


Demodulator
DRX3913K-XK (IC1203) MST7323S (IC900)

SDA1/SCL1
SDA_SUB/AMP SDA_SUB/AMP
(+3.3V)
SCL_SUB/AMP SCL_SUB/AMP

- 21 -
Audio Amp Soft touch
NTP-3100L(IC701) PIC16F722 (P1304)

FE_TUNER_SCL
FE_TUNER_SDA
(+5V_GENERAL)
Chip Tuner
XC500(IC1200)

LGE Internal Use Only


+5V_ST
ST +3.3V_
+3.3V ST
8. Power
AP1117E33G-13
+5V_ST IC801

+1.26V_VDDC
MP2212DN
IC805

Only for training and service purposes


A_1.2V
+5V_CI_ON
Q501
+1.2V
PCM_5V_CTL MICOM AZ1117H-1.2TRE1
IC1202

Copyright ©2009 LG Electronics. Inc. All right reserved.


S6
+1.8V_VDDC +5V_Tuner

BD9150MUV +3.3V_AVDD
IC806
+3.3V_CI +3.3V_Tuner

- 22 -
+5V_TUNER +1.8V_Tuner
AP1117E33G-13 AP1117E18G-13
IC809 IC811
+5V_GENERAL
MP2305DS
+12V IC808 +5V_HDMI
A_3.3V

+5V_USB_SIDE
D_3.3V

806 PANEL_POWER

PANEL_CTL C_3.3V
MICOM
S6
MP2305DS BD9130EFJ-E2 +1.26V_MEMC
IC810 IC802
+3.3V_MEMC

SC4215ISTRT +1.8V_FRC_DDR
+24V +24V IC807

LGE Internal Use Only


EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

400

540

A7
801

530
LV2

550
803
LV1

910

900
802

A9
200

A10
810

A22
580

A2

OK

G
A
P

Q.MENU

RETURN
Q.VIEW
INPUT
TV/RAD

P
3
6
9

MARK/

RATIO
MODE
ON/OFF

MUTE
FAV

OK

INFO
AV

2
5
8
0
ENERGY SAVING
POWER
122

GUIDE
MENU
LIST
1
4
7
120
310

500
300

510
501

Copyright LG Electronics. Inc. All right reserved. - 23 - LGE Internal Use Only
Only for training and service purposes
IC102
+3.3V HY27US08121B-TPCB +3.3V
NAND FLASH MEMORY VOLTAGE DETECTOR
C105
10uF 10V *Mstar reset:Active high reset
NC_1 NC_28
1 48
/PF_CE0
NC_2 NC_27
H : Serial Flash 2 47
L : NAND Flash PCM_A[0-7]
NC_3 NC_26 +3.3V_ST
/PF_CE1 3 46

3.9K
H : 16 bit

R105 OPT 1K

1K
NC_4 NC_25

1
L : 8 bit 4 45 AR102 JTP-1127WEM
NC_5 I/O7 PCM_A[7]

R107
SW100

470
5 44

R1540

R111
NC_6 I/O6 PCM_A[6]
6 43

2
R/B I/O5 PCM_A[5]
/F_RB 7 42
RE
1386 WON PCM_A[4]
IC100 X100 080923_Time Delay
I/O4 C102 10uF 0 R116 12MHz C111
/PF_OE 8 41 LGE3369A (Saturn6 Non RM)
CE NC_24 22 6.3V
/PF_CE0 9 40 R193 20pF
PCM_D[0-7]
NC_7 NC_23 1M

1K
10 39 IC101 D4 HWRESET B3
XIN C112
A3

OPT
NC_8 PRE KIA7427F R172 0
C103 11 38 VCC 1 3 OUT XOUT
AC16

R112
PCM_D[0] 20pF
0.1uF VCC_1 VCC_2 PCMD0/CI_D0
12 37 2 PCM_D[1] AA15 E6 R173 0
C101 R115 PCMD1/CI_D1 TESTPIN/GND
VSS_1 VSS_2 C106 0.1uF 0.022uF GND 10K PCM_D[2] AA16
13 36 16V PCMD2/CI_D2
PCM_D[3] AC6
NC_9 NC_22 PCMD3/CI_D3
14 35 PCM_D[4] Y10 AE11 R1524 33 SPI_DI 0 0 1 : I 1 2
PCMD4/CI_D4 SPI_DI
NC_10 NC_21 PCM_D[5] Y11 AF12 SPI_DO
15 34 PCMD5/CI_D5 SPI_DO
PCM_D[6] Y12 AE12 R1525 33 SPI_CS
CLE NC_20 PCMD6/CI_D6 /SPI_CS
16 33 PCM_A[0-14] PCM_D[7] Y13 AD11 R1526 33 SPI_CK
/PF_CE1 AR103 PCMD7/CI_D7 SPI_CK
ALE I/O3 PCM_A[3]
PF_ALE 17 32 PCM_A[0] AB16
WE I/O2 PCM_A[2] PCM_A[1] PCM_A0/CI_A0
18 31 AC15
/PF_WE PCM_A[2] PCM_A1/CI_A1
WP I/O1 PCM_A[1] AC14
R1539

19 30 PCM_A[3] PCM_A2/CI_A2
AB14
PCM_A3/CI_A3
1K

+3.3V_ST +3.3V NC_11 I/O0 PCM_A[0] PCM_A[4] AC12 B5


20 29 R178 0 BT_DP
PCM_A[5] PCM_A4/CI_A4 USB_DP_1
NC_12 NC_19 22 AB8 A5 R179 0
21 28 PCM_A[6] PCM_A5/CI_A5 USB_DM_1 BT_DM
AC13 AC10 R174 0
R103

SIDE_USB_DM 004:AG21
10K

NC_13 NC_18 PCM_A[7] PCM_A6/CI_A6 USB_DM_2


R114 22 27 AA9 AB10 R175 0
OPT PCM_A[8] PCM_A7/CI_A7 USB_DP_2 SIDE_USB_DP 004:AG22
R151 NC_14 NC_17 AB5
0 PCM_A8/CI_A8 SIDE_USB
PF_WP 23 26 PCM_A[9] AA4
C NC_15 NC_16 PCM_A[10] PCM_A9/CI_A9
24 25 V4
R1509 PCM_A[11] PCM_A10/CI_A10 R132
0 B Q100 Y4 R133
KRC103S PCM_A[12] PCM_A11/CI_A11 15K 15K +3.3V_ST
OPT AB9
PCM_A12/CI_A12 OPT OPT
OPT PCM_A[13] AA7
E
PCM_A[14] PCM_A13/CI_A13
AD6

R195
PCM_A14/CI_A14

10K
PM GPIO Assignment Recommended by MStar

R1510 33 AA14 E5 R1613 22 001:AI23;009:AH22


PCM_RST PCM_RST/CI_RST GPIO_PM0/GPIO134 WARM_LED_ON
R1511 33 AB18 F5 R1520 100
/PCM_CD PCM_CD/CI_CD GPIO_PM1/GPIO135 DBG_TX
+3.3V IC103 +3.3V
R1512 33 Y5 G5 R184 100
W25X32VSSIG EEPROM IC105: EAN43352801(ATMEL SHRINK) /PCM_OE /PCM_OE GPIO_PM2/GPIO136 INV_CTL 008:B4
Serial FLASH MEMORY
R1533

R1513 33 AB15 H5 R185 100 PANEL_CTL OPT 100


4.7K

/PCM_REG 008:Q5 R182


L102

0IMMRMP008A(MICROCHIP) PCM_REG/CI_CLK GPIO_PM3/GPIO137 POWER_DET


for BOOT /PCM_WAIT R1514 33 AA10 F6 R186 100 POWER_ON/OFF1
IC105 +3.3V PCM_WAIT/CI_WACK GPIO_PM4/GPIO138
CS VCC R1515 33 AC8 G6 DBG_RX 008:N5;008:Q14
M24512-WMW6G(REV.B) /PCM_IRQA
Flash_WP_1

SPI_CS 1 8 /PCM_IRQA GPIO_PM5/INT1/GPIO139


R1516 33 AC7 H6 R1523 100
/PCM_WE /PCM_WE GPIO_PM6/INT2/GPIO140 POWER_DET
+3.3V
0.1uF

$0.76 E0 VCC /PCM_IOWR R1517 33 AA5 AC17 R188 100


BT_ON/OFF
PCM_IOWR/CI_WR GPIO131/LDE/SPI_WPn1 007:AL5
C104

SPI_DO R1530 DO HOLD 1 8 C100


R1518 33 W4 AB17 OPT
2 7 R187 100
R104

/PCM_IORD
10K

0.1uF AR100 PCM_IOR/CI_RD GPIO130/LCK ISP_TXD


33 $0.418 R1519 33 T4 AF11
E1 WC /PCM_CE /PCM_CE GPIO132/LHSYNC/SPI_WPn
2 7 AE6 AA18
R101 0 WP CLK 001:E4 /PF_CE0 /PF_CE0 GPIO60/PCM2_RESET/RX1
3 6 SPI_CK AF6 AA17 R167 1K
C
E2
3 6
SCL
R110 22 001:E6 /PF_CE1 /PF_CE1 GPIO62/PCM2_CD_N/TX1 HP_AU_SW
EEPROM_SCL AA12 R159 100 Flash_WP_1
001:E4 /PF_OE /PF_OE 001:B11
R102 0 B GND DIO R100 001:H16;001:J19;001:Y13 22 AA11 R1535 22
4 5 SPI_DI /PF_WE AR101 SDA1
0 VSS 4 5
SDA
R113 22 001:E7 /PF_WE 001:J21
OPT EEPROM_SDA PF_ALE AC9 R1536 22 SCL1
001:E6 PF_ALE 001:J21
Q101 C107 C108 001:H16;001:J19;001:Y14 Y14
E PF_WP
KRC103S 8pF 001:C8 PF_AD15
8pF AB11 E7 R1537 0
OPT /F_RB FE_TUNER_SCL
OPT OPT 001:E3 22 F_RBZ LHSYNC2/I2S_OUT_MUTE/RX1
AC18 R1534 100 OPC_EN
LVSYNC/GPIO133 011:AG20
EEPROM_SCL R162 0 F8 C6 R1538 22 FE_TUNER_SDA
001:H16;001:J19;001:P12 UART2_TX/SCKM GPIO79/LVSYNC2/TX1
EEPROM_SDA R163 0 D11 F9 R108 22
001:H16;001:J19;001:P12 UART2_RX/SDAM UART2_RX/GPIO84 5V_HDMI_3
R164 0 AB21 F10
SDA0 DDCR_DA UART2_TX/GPIO85 USB_OCD 004:AI20
MCU BOOT STRAP DIMMING R165 0 AC21 A6 R169 22
HDCP EEPROM +3.3V SCL0 DDCR_CK UART1_RX/GPIO86 5V_HDMI_1 006:D1;006:AK2
Addr:10101-- 10 : BOOT 51
B6 R170 22
5V_HDMI_2
UART1_TX/GPIO87 006:D10;006:AK8
11 : BOOT RISC R140 22 J1 AF5
ISP_RXD DDCA_CLK GPIO42/PCM2_CE_N PCM_5V_CTL 005:E25
+3.3V R141 22 J2 AF10 R127 100 CI_TS_DATA[0-7]
ISP_TXD DDCA_DA GPIO43/PCM2_IRQA_N AV_CVBS_DET
R142 22 W5
0 R1545 100 DBG_RX UART_RX2
IC107 R1707 PWM0 R143 22 V5 AA8 CI_TS_DATA[0]
CAT24WC08W-T A_DIM DBG_TX UART_TX2 TS0_D0
C114
R158 Y8 CI_TS_DATA[1]
4.7K 0.1uF R198 R1501 R1544 100 TS0_D1
A0 VCC 1K PWM_DIM PWM2 Y9 CI_TS_DATA[2]
1 8 1K TS0_D2
$0.199 PWM0 AB7 CI_TS_DATA[3]
A1 WP R109 4.7K TS0_D3
2 7 001:J19;001:P12;001:Y13 AA6 CI_TS_DATA[4]
EEPROM_SCL PWM1 C1500 C1501 TS0_D4
A2 SCL R161 22 AB6 CI_TS_DATA[5]
3 6 1uF 2.2uF TS0_D5
R199 R1500 OPT U4 CI_TS_DATA[6]
VSS SDA OPT TS0_D6
4 5 1K 1K AC5 CI_TS_DATA[7]
R171 22 EEPROM_SDA OPT OPT TS0_D7
AC4 CI_TS_SYN
001:J19;001:P12;001:Y14 TS0_SYNC 005:D10
AD5 CI_TS_VAL
TS0_VLD 005:D10
AB4 CI_TS_CLK
TS0_CLK 005:D10

AB19 BUF_TS_DATA[0] 005:V22


TS1_D0
+3.3V_TUNER AA20 BUF_TS_SYN
+5V_GENERAL TS1_SYNC 005:V22
+3.3V PWM0 AB13 AC19
I2C PWM0 TS1_VLD BUF_TS_VAL_ERR 005:V21
PWM1 AB12 AA19 BUF_TS_CLK
PWM1 TS1_CLK 005:V21
AD12
001:S15 PWM2 PWM2
R1505
R1504

R1506

R1507

AA13 C10 R154 100


R1503

R1502

R150 22
1.2K

SCART2_DET
1.2K

1.2K

1.2K

RF_ATTENUATION
R124

ET_TXD0
2.2K

2.2K

4.7K

010:B2 PWM3
R125

4.7K

R1706 22 B11 R177 100


008:B9 A_DIM ET_TXD1 SC_RE2 009:D22
OPT A4 A9 R183 100
009:AB20KEY1 SAR0 ET_TX_CLK SC_RE1 009:B21
B4 C11
009:AB20KEY2 SAR1 ET_RXD0 SIDE_HP_MUTE 007:G26
001:AK13;010:W8 FE_TUNER_SDA F4 C9
EEPROM_SDA 001:H16;001:P12;001:Y14 LED_ON SAR2 ET_RXD1 HP_DET
001:AK13;010:W9 FE_TUNER_SCL R1550 100 E4 B10 R190 100
EEPROM_SCL 001:H16;001:P12;001:Y13 0 0 7 : G 2 5 ; 0 0 7 : R 1 2 ; 0 0 9 : Y 2 3 ; 0 0 9 : Y 2 6SB_MUTE SAR3 ET_TX_EN EDID_WP 004:M18;006:AI8;006:AL3;006:AL13;006:AL18
R146 0 C4 A10 R191 1K
R122 0 IR IRIN ET_MDC BT_AU_SW
010:AG17 FE_DEMOD_SDA SDA0 001:J20;001:Y14 B9 R136 0
R123 0 009:AG22 ET_MDIO MODEL_OPT_3
010:AG17 FE_DEMOD_SCL SCL0 001:J20;001:Y14 A11 R153 100
ET_COL SCART1_DET
0 1 1 : I 2 2 ; 0 1 1 : A K 4 MEMC_SDA R130 0 R106 100 AC11
SDA0 001:J20;001:Y14 GPIO44
0 1 1 : I 2 2 ; 0 1 1 : A K 4 MEMC_SCL R131 0 HPD3
SCL0 001:J20;001:Y14
R128 0 009:Y27 SCART2_MUTE R156 100 D9
0 0 7 : E 1 2 ; 0 0 9 : A J 1 9 SDA_SUB/AMP SDA1 001:AJ12 GPIO96
R129 0 007:E5 R157 100 D10
0 0 7 : E 1 2 ; 0 0 9 : A J 1 8 SCL_SUB/AMP SCL1 001:AJ13
AMP_RST GPIO88
R189 0 D7
MODEL_OPT_1 GPIO90/I2S_OUT_MUTE
R168 0 E11
MODEL_OPT_2 GPIO91
008:B7ERROR_OUT R160 100 E8
MODEL OPTION GPIO97
007:R13 NTP_MUTE R166 100 E10
GPIO98
R126 0 D6
MODEL_OPT_0 GPIO99
R148 100 D5
COMP_DET GPIO103/I2S_OUT_SD3
R147 100 C5
DSUB_DET GPIO102
POWER DETECT +3.3V
+24V +12V
+3.3V_ST

+5V_ST
R1521 R1541 R1528 R1603 R1605 R1607 R1609
R1543 3.3K 3.3K 3.3K
30K OPT OPT 3.3K
+12V 10K OPT
1/10W
R117
R120 1% R1612 100
POWER_DET MODEL_OPT_0
10K 22 SEL2_HDMI_SW
C
R134 R119 R1600 100
B Q102 MEMC_RESET MODEL_OPT_1
12K 2SC3052 R1532
C 1K
1%
R121 E OPT
B Q103 R118
2SC3052 2.2K R1601 100
MODEL OPTION
1K FE_AGC_SPEED_CTL MODEL_OPT_2
IC1500
R135 E NCP803SN293 +3.3V
1.1K FE_RESET R1611 100 MODEL_OPT_3 PIN NAME PIN NO. HIGH LOW
RESET 2 3 VCC
MODEL_OPT_0 D6 LCD PDP
R1604 R1606 R1608 R1610 R152
1 C113 4.7K
R1527 3.3K 3.3K 3.3K 3.3K B9(FHD) FRC NO_FRC
R1565 GND 0.1uF OPT OPT OPT MODEL_OPT_1 D7
5.1K B9(HD) LVDS_B LVDS_A A7 R192 100
OPT 16V USB_CTL
1/10W LED_NORMAL GPIO67 004:AI20
OPT MODEL_OPT_2 E11 LED_MOVING B8 R155 100 SCART1_MUTE009:Y24
5% Soft_Touch GPIO68
MODEL_OPT_3 B9 FHD HD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN_1 1 12

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
+1.26V_VDDC

C2028 C2002 C243 C246 C249 C252 C257 C264 C275 C281 C289 C294 C297 C2000 C2001 C2003 C2005 C219 C220 C261 C268 C270 C278 C280 C282 C290 C295 C298 C299
10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

+3.3V
+3.3V_VDDP +1.8V_DDR
L210
BLM18PG121SN1D

ZD200
C2004 C2026 C276 C265 C258 C253 C250 C247 C244 C241 C2027 C242 C245 C248 C251 C254 C259 C266 C277 C283 C291 C296

5V
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

IC100
LGE3369A (Saturn6 Non RM)

+1.26V_VDDC
F1 RXACKP AE16 IC100 VDDC : 970mA
CK+_HDMI_SW MEMC_RXE0+
006:T13
F2 RXACKN
LVA0P
AD16
011:Q28 LGE3369A (Saturn6 Non RM)
006:T13 CK-_HDMI_SW LVA0M MEMC_RXE0- 011:R28
G2 RXA0P AD15
006:S13 D0+_HDMI_SW LVA1P MEMC_RXE1+ 011:Q28
G3 RXA0N AF16
006:S13 D0-_HDMI_SW LVA1M MEMC_RXE1- 011:Q28 E16 D16
H3 AF15 GND_2 VDDC_1
D1+_HDMI_SW RXA1P LVA2P MEMC_RXE2+ E17 D17
006:R13 011:Q28 VDDC_2
D1-_HDMI_SW G1 RXA1N AE15 GND_3
006:S13 LVA2M MEMC_RXE2- 011:Q28 E18 VDDC_3 D18
H1 RXA2P AD13 GND_4
006:R13 D2+_HDMI_SW LVA3P MEMC_RXE3+ 011:P28 F7 D19
H2 AF14 GND_5 VDDC_4
D2-_HDMI_SW RXA2N LVA3M MEMC_RXE3- L9 D20
006:R13 011:P28 VDDC_5
R207 0 A1 DDCD_A_DA AF13 GND_6
006:Z15 DDC_SDA_SW LVA4P MEMC_RXE4+ 011:O28 L10 H18
B2 DDCD_A_CK AE13 GND_7 VDDC_6
DDC_SCL_SW R208 0
006:Z15 LVA4M MEMC_RXE4- 011:P28 L11 VDDC_7 H19

LVDS OUT
R247 100 A2 HOTPLUG_A GND_8
006:H2 HPD1 VDDC_8 H20
AE14
LVACKP MEMC_RXEC+ 011:P28 VDDC_9 J20
C3 RXBCKP AD14
LVACKM MEMC_RXEC- 011:P28 L12 VDDC_10 K20
B1 RXBCKN GND_9
L13 VDDC_11 L20
C1 RXB0P AE20 GND_10
LVB0P MEMC_RXO0+ 011:T28 L14 VDDC_12 M20
C2 AD20 GND_11
HDMI

RXB0N LVB0M MEMC_RXO0- L15 P7


011:T28 VDDC_13
D2 RXB1P AD19 GND_12
LVB1P MEMC_RXO1+ 011:T28 L16 VDDC_14 R7
D3 RXB1N AF20 GND_13
LVB1M MEMC_RXO1- 011:T28 L17 GND_14 VDDC_15 T7
E3 RXB2P AF19
LVB2P MEMC_RXO2+ 011:S28 L18 GND_15 T22
D1 RXB2N AE19 VDDC_16
LVB2M MEMC_RXO2- 011:T28 M9 GND_16 U7
E1 DDCD_B_DA AD17 VDDC_17
LVB3P MEMC_RXO3+ 011:S28 U20
F3 DDCD_B_CK AF18 VDDC_18
LVB3M MEMC_RXO3- 011:S28 M10 GND_17 U22
R201 100 E2 HOTPLUG_B AF17 VDDC_19
006:H11 HPD2 LVB4P MEMC_RXO4+ 011:R28 M11 GND_18 V7
AE17 VDDC_20
LVB4M MEMC_RXO4- 011:R28 M12 V22
AE8 RXCCKP GND_19 VDDC_21
006:T24 CK+_HDMI4 M13 W11
AD8 RXCCKN AE18 GND_20 VDDC_22
006:T23 CK-_HDMI4 LVBCKP MEMC_RXOC+ 011:S28 M14 W12
AD9 RXC0P AD18 GND_21 VDDC_23
006:T24 D0+_HDMI4 LVBCKM MEMC_RXOC- 011:S28 M15 W19
AF8 RXC0N GND_22 VDDC_24
006:T24 D0-_HDMI4 M16 W20
AF9 RXC1P GND_23 VDDC_25
006:T25 D1+_HDMI4 M17 W22
AE9 RXC1N GND_24 VDDC_26
006:T25 D1-_HDMI4 Y22
AE10 RXC2P AA3 C229 2.2uF VDDC_27
006:T26 D2+_HDMI4 AUR0 SC1_R_IN 009:O12 M18
AD10 RXC2N Y1 C230 2.2uF GND_25 +3.3V_VDDP VDDP : 102.3mA
006:T26 D2-_HDMI4 AUL0 SC1_L_IN 009:O11 N4
R248 0 AE7 DDCD_C_DA AE1 C2006 2.2uF GND_26
006:T22;006:AL20 DDC_SDA_4 AUR1 N9 H9
R249 0 AF7 DDCD_C_CK AF3 C2007 2.2uF GND_27 VDDP_1
006:T22;006:AL19 DDC_SCL_4 AUL1 N10 H10
R200 100 AD7 HOTPLUG_C AE3 C2008 2.2uF GND_28 VDDP_2

AUDIO IN
006:S20 HPD4 AUR2 SC2_R_IN 009:AL12 N11 H11
R204 100 J 3 CEC AUL2 AE2 C2009 2.2uF GND_29 VDDP_3
006:AF24 HDMI_CEC SC2_L_IN 009:AL10 N12 H12
AA1 C2011 2.2uF GND_30 VDDP_4
AUR3 N13 N20
AB1 C2012 2.2uF GND_31 VDDP_5
AUL3 N14 P20
AB2 C2013 2.2uF GND_32 VDDP_6
AUR4 COMP_R_IN 004:L11 W9
N2 HSYNC0/SC1_ID AC2 C2014 2.2uF VDDP_7 +3.3V
SCART_RGB

009:O9 SC1_ID AUL4 COMP_L_IN 004:K12 N15 W10 +3.3V_S6


R210 47 N1 VSYNC0/SC1_FB AB3 C2015 2.2uF GND_33 VDDP_8
009:O6 SC1_FB AUR5 PC_R_IN 004:Z5 N16
R211 47 C200 0.047uF P2 RIN0P/SC1_R AC3 C2016 2.2uF GND_34 AVDD_AU : 36.11mA
009:I7 SC1_R AUL5 PC_L_IN 004:Z6 N17 L209
R212 47 C201 0.047uF R3 GIN0P/SC1_G GND_35 BLM18PG121SN1D
009:I8 SC1_G TUNER_SIF_IF_N 010:S16;010:AM11 N18 W7
R213 47 C202 0.047uF R1 BIN0P/SC1_B GND_36 AVDD_AU
009:I9 SC1_B P4 +1.8V_DDR
R214 470 C203 1000pF P3 SOGIN0/SC1_CVBS GND_37
002:E21;009:M4 SC1_CVBS_IN P9 C284 C293

ZD201
R215 47 C204 0.047uF P1 RINM W3 C231 0.1uF R241 47 GND_38
SIF0P P10 G12

5V
R216 47 C205 0.047uF T3 BINM W2 C232 0.1uF R242 47 GND_39 AVDD_DDR_1 0.1uF 0.1uF
SIF0M G13
R217 47 C206 0.047uF R2 GINM AVDD_DDR_2
H13
AVDD_DDR_3
R243 R244 P11 H14
F11 R266 100 GND_40 AVDD_DDR_4
10K 10K SPDIF_IN 5V_HDMI_4 P12 H15
R246 22 K3 HSYNC1/DSUB_HSYNC E9 R230 100 GND_41 AVDD_DDR_5
004:C22 DSUB_HSYNC SPDIF_OUT SPDIF_OUT 004:R12 P13 H16
R245 22 K2 VSYNC1/DSUB_VSYNC GND_42 AVDD_DDR_6
004:C22 DSUB_VSYNC P14 W14
R218 0.047uF L1 RIN1P/DSUB_R GND_43 AVDD_DDR_7
DSUB

47 C212
004:C26 DSUB_R P15 W15
R219 47 C207 0.047uF L3 GIN1P/DSUB_G GND_44 AVDD_DDR_8
004:C24 DSUB_G P16 W16
R220 47 C213 0.047uF K1 BIN1P/DSUB_B GND_45 AVDD_DDR_9
004:C23 DSUB_B P17 W17
R221 470 C208 1000pF L2 SOGIN1 AF1 R237 100
HP/BT_ROUT GND_46 AVDD_DDR_10 +3.3V_S6 AVDD_MEMPLL : 23.77mA

AUDIO OUT
AUOUTR0/HP_ROUT 007:AM25 P18 W18
AF2 R238 100 GND_47 AVDD_DDR_11
AUOUTL0/HP_LOUT HP/BT_LOUT 007:AE21
AD3 R239 100
AUOUTR1/SC1_ROUT SCART1_Rout 009:N24;009:O19 R4 H17
R222 47 C214 0.047uF V1 RIN2P/COMP_PR+ AD1 R240 100 SCART1_Lout GND_48 AVDD_MEMPLL_1
T20
COMP

004:J13 COMP_Pr AUOUTL1/SC1_LOUT 009:N22;009:O18 R9


R223 47 C215 0.047uF V2 GIN2P/COMP_Y+ AC1 R250 100 SCART2_Rout GND_49 AVDD_MEMPLL_2 C262 C269 C273
004:J15 COMP_Y AUOUTR2/SC2_ROUT 009:N27;009:X18 R10 V20
R224 47 C216 0.047uF U1 BIN2P/COMP_PB+ AD2 R251 100 SCART2_Lout GND_50 AVDD_MEMPLL_3
004:J14 COMP_Pb AUOUTL2/SC2_LOUT 009:N25;009:X19 R11
0.1uF 0.1uF 0.1uF
0.01uF

0.01uF

0.01uF

0.01uF

0.01uF

0.01uF
R225 470 C209 1000pF V3 GND_51
C2017

SOGIN2
C2018

C2020

C2021

C2022

C2023
R12 AVDD_LPLL : 4.69mA
R252

R253

R254

R255

R256
+3.3V_S6

R257
22K

22K

22K

22K

22K
R284 100 J 5 VSYNC2 GND_52

22K
009:AL8 SC2_ID R13
GND_53
R14
A8 R231 22 GND_54
I2S_OUT_MCK AUDIO_MASTER_CLK 007:E6 R15 R20
B7 R232 22 GND_55 AVDD_LPLL
R205 47 C210 0.047uF U3 CVBS1/SC1_CVBS I2S_OUT_WS MS_LRCK 007:E11 +3.3V_AVDD_MPLL
002:E17;009:M4 SC1_CVBS_IN C7 R233 22
0.047uF U2 R16 C279
CVBS

R206 47 C211 CVBS2/SC2_CVBS I2S_OUT_BCK MS_SCK 007:E12


009:AG5 SC2_CVBS_IN D8 R234 22 GND_56
R226 47 C217 0.047uF T1 CVBS3/SIDE_CVBS I2S_OUT_SD MS_LRCH 007:E11 R17 H7
C8 R274 100 GND_57 AVDD_MPLL 0.1uF
R227 47 C218 0.047uF T2 VCOM1 I2S_IN_SD C236 C237 C238 C239 R18
SEL1_HDMI_SW GND_58
22pF 22pF 22pF 22pF T5 C2029 C2025
OPT OPT OPT OPT GND_59 0.1uF 10uF
T9 6.3V
M1 CVBS4/S-VIDEO_Y GND_60
M2 K4
C235 0.1uF T10 AVDD_33 : 281mA
CVBS6/S-VIDEO_C C223 0.1uF GND_61
VCLAMP T11 +3.3V_AVDD
H4 C233 GND_62
REFP T12 L206
R235 47 C2024 0.047uF N3 CVBS5 J4 GND_63 BLM18PG121SN1D
REFM 0.1uF J7
R236 47 C2019 0.047uF M3 CVBS7 G4 R229 390 AVDD_33_1
REXT C234 0.1uF T13 K7
1% +3.3V GND_64 AVDD_33_2 C263 C271 C274 C260 C267 C286
T14 L7
R228 100 C221 0.047uF W1 CVBS0/RF_CVBS Check GND_65 AVDD_33_3
010:S19;010:AM10 TUNER_CVBS_IF_P T15 M7 0.1uF
TV/MNT

100 Y3 AE5 C224 0.1uF GND_66 AVDD_33_4 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
R209 C222 0.047uF VCOM0 AUCOM T16 N7
AE4 GND_67 AVDD_33_5 +3.3V_S6
AUVRM T17
Y2 CVBSOUT0/SC2_MNTOUT AF4 C225 10uF 10V GND_68
009:AM6 DTV/MNT_VOUT AUVRP T18
AA2 CVBSOUT1 AD4 C226 0.1uF GND_69
009:T5 FE_VSCART_OUT AUVAG U5 W8
C227 1uF GND_70 AVDD_DM
W13 +3.3V_S6
C228 4.7uF GND_71 C2030
Y21
GND_72
AA23 H8 AVDD_DM : 0.03mA
GND_73 AVDD_USB 0.1uF

C256
C240
2.2uF 0.1uF
Close to IC
as close as possible
081212_MSTAR request

AVDD_OTG : 22.96mA

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN_2 2 12
AIN_2

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_DDR +1.8V_DDR

0.1uF
0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
C325

C327

C329

C330

C331

C332

C334

C336

C337

C338

C339

C340

C341
C302 C323

0.1uF

0.1uF
C324

C326

C328

C342
C314

10uF
C303

10uF
C304

C305

C306

C307

C308

C310

C312

C313

C315

C316

C317

C318

C319

C320
0.1uF 0.1uF

Close to DDR Power Pin Close to DDR Power Pin

+1.8V_DDR
+1.8V_DDR +1.8V_DDR

1K 1%

R345
R301

1K 1%
R321

1%
1K
0.1uF
0.1uF

R302 1K 1%

1%
C300 0 . 1 u F

0.1uF
R322

R343
C333 C335

1%
IC300 0.1uF 0.1uF IC301

1K
IC100

1K

C311
C301

C309
HY5PS1G1631CFP-S6 LGE3369A (Saturn6 Non RM) H5PS5162FFR-S6C

SDDR_D[0] DQ0 G8 J2 VREF AR300 D15 VREF J2 G8 DQ0 TDDR_D[0]


SDDR_A[5] ADDR2_A[5] A_MVREF
SDDR_D[1] DQ1 G2 AR303 G2 DQ1 TDDR_D[1]
SDDR_A[3] ADDR2_A[3] BDDR2_A[9] TDDR_A[9]
SDDR_D[2] DQ2 H7 H7 DQ2 TDDR_D[2]
M8 A0 SDDR_A[0] SDDR_A[1] ADDR2_A[1] ADDR2_A[0] C13 T26 BDDR2_A[0] BDDR2_A[3] TDDR_A[3] TDDR_A[0] A0 M8
SDDR_D[3] DQ3 H3 A_DDR2_A0 B_DDR2_A0 H3 DQ3 TDDR_D[3]
A1 SDDR_A[1] SDDR_A[10] 56 56 ADDR2_A[10] ADDR2_A[1] A22 AF26 BDDR2_A[1] BDDR2_A[1] TDDR_A[1] TDDR_A[1] A1
DQ4 M3 A_DDR2_A1 M3 DQ4
SDDR_D[4] H1 B_DDR2_A1 H1 TDDR_D[4]
M7 A2 SDDR_A[2] ADDR2_A[2] B13 T25 BDDR2_A[2] BDDR2_A[10] 56 TDDR_A[10] TDDR_A[2] A2

SDDR_A[0-12]
M7

TDDR_D[0-15]
DQ5 AR301 DQ5

ADDR2_A[0-12]
SDDR_D[5] H9 A_DDR2_A2 B_DDR2_A2 H9 TDDR_D[5]
SDDR_D[0-15]

A3 SDDR_A[3] ADDR2_A[3] C22 AF23 BDDR2_A[3] AR304 TDDR_A[3] A3


DQ6 N2 SDDR_A[9] ADDR2_A[9] A_DDR2_A3 B_DDR2_A3 N2 DQ6
SDDR_D[6] F1 F1 TDDR_D[6]
N8 A4 SDDR_A[4] SDDR_A[12] ADDR2_A[12] ADDR2_A[4] A13 T24 BDDR2_A[4] TDDR_A[4] A4 N8
BDDR2_A[5] TDDR_A[5]

TDDR_A[0-12]
DQ7 DQ7

BDDR2_A[0-12]
SDDR_D[7] F9 A_DDR2_A4 B_DDR2_A4 F9 TDDR_D[7]
N3 A5 SDDR_A[5] SDDR_A[7] ADDR2_A[7] ADDR2_A[5] A23 AE23 BDDR2_A[5] TDDR_A[5] A5 N3
SDDR_D[8] DQ8 A_DDR2_A5 B_DDR2_A5 BDDR2_A[12] TDDR_A[12] DQ8 TDDR_D[8]
C8 A6 AR302 C12 R26 BDDR2_A[6] A6 C8
N7 SDDR_A[6] ADDR2_A[6] BDDR2_A[7] 56 TDDR_A[7] TDDR_A[6] N7
SDDR_D[9] DQ9 C2 SDDR_A[0] ADDR2_A[0] A_DDR2_A6 B_DDR2_A6 C2 DQ9 TDDR_D[9]
P2 A7 SDDR_A[7] ADDR2_A[7] B23 AD22 BDDR2_A[7] AR305 TDDR_A[7] A7 P2
SDDR_D[10] DQ10 D7 SDDR_A[2] ADDR2_A[2] A_DDR2_A7 B_DDR2_A7 BDDR2_A[0] TDDR_A[0] D7 DQ10 TDDR_D[10]
P8 A8 SDDR_A[8] ADDR2_A[8] B12 R25 BDDR2_A[8] TDDR_A[8] A8 P8
SDDR_D[11] DQ11 D3 SDDR_A[4] ADDR2_A[4] A_DDR2_A8 B_DDR2_A8 BDDR2_A[2] TDDR_A[2] D3 DQ11 TDDR_D[11]
P3 A9 SDDR_A[9] ADDR2_A[9] C23 AC22 BDDR2_A[9] TDDR_A[9] A9 P3
SDDR_D[12] DQ12 D1 SDDR_A[6] 56 ADDR2_A[6] A_DDR2_A9 B_DDR2_A9 BDDR2_A[4] TDDR_A[4] D1 DQ12 TDDR_D[12]
M2 A10/AP SDDR_A[10] R319 56 ADDR2_A[10] B22 AD23 BDDR2_A[10]
56 TDDR_A[10] A10/AP M2
SDDR_D[13] DQ13 D9 SDDR_A[11] ADDR2_A[11] A_DDR2_A10 B_DDR2_A10 BDDR2_A[6] TDDR_A[6] D9 DQ13 TDDR_D[13]
P7 A11 SDDR_A[11] ADDR2_A[11] A12 R24 BDDR2_A[11] TDDR_A[11] A11 P7
SDDR_D[14] DQ14 B1 SDDR_A[8] R320 56 ADDR2_A[8] A_DDR2_A11 B_DDR2_A11 BDDR2_A[11] R325 56 TDDR_A[11] B1 DQ14 TDDR_D[14]
R2 A12 SDDR_A[12] ADDR2_A[12] A24 AE22 BDDR2_A[12] TDDR_A[12] A12 R2
SDDR_D[15] DQ15 B9 A_DDR2_A12 B_DDR2_A12 BDDR2_A[8] R326 56 TDDR_A[8] B9 DQ15 TDDR_D[15]

+1.8V_DDR +1.8V_DDR
L2 BA0 SDDR_BA[0] 56 R303 ADDR2_BA[0] C24 AC23 BDDR2_BA[0] R327 56 TDDR_BA[0] BA0 L2
A_DDR2_BA0 B_DDR2_BA0
L3 BA1 SDDR_BA[1] 56 R304 ADDR2_BA[1] B24 AC24 BDDR2_BA[1] R328 56 TDDR_BA[1] BA1 L3
VDD5 A1 A_DDR2_BA1 B_DDR2_BA1 A1 VDD5
L1 BA2 SDDR_BA[2] 56 R305 ADDR2_BA[2] D24 AB22 BDDR2_BA[2] OPT R329 56 TDDR_BA[2] NC4 L1
VDD4 E1 A_DDR2_BA2 B_DDR2_BA2 E1 VDD4
22 R306 ADDR2_MCLK B14 V25 BDDR2_MCLK R330 22
VDD3 J9 A_DDR2_MCLK B_DDR2_MCLK J9 VDD3
R300

R344
OPT

OPT
VDD2 CK SDDR_CK TDDR_MCLK CK VDD2
150

150
M9 J8 J8 M9
VDD1 R1 K8 CK /SDDR_CK 22 R307 /ADDR2_MCLK A14 V24 /BDDR2_MCLK R331 22 /TDDR_MCLK CK K8 R1 VDD1
/A_DDR2_MCLK /B_DDR2_MCLK
K2 CKE SDDR_CKE 56 R308 ADDR2_CKE D23 AB23 BDDR2_CKE R332 56 TDDR_CKE CKE K2
A_DDR2_CKE B_DDR2_CKE
R350

R351
OPT +1.8V_DDR +1.8V_DDR
OPT

R346 4.7K R348 OPT 4.7K


0

0
VDDQ10 A9 K9 ODT OPT SDDR_ODT 56 R309 ADDR2_ODT D14 U26 BDDR2_ODT R333 56 ODT K9 A9 VDDQ10
R347 4.7K A_DDR2_ODT B_DDR2_ODT
VDDQ9 C1 L8 CS R349 OPT 4.7K CS L8 C1 VDDQ9
VDDQ8 C3 K7 RAS /SDDR_RAS 56 R310 /ADDR2_RAS D13 U25 /BDDR2_RAS R334 56 /TDDR_RAS RAS K7 C3 VDDQ8
/A_DDR2_RAS /B_DDR2_RAS
VDDQ7 C7 L7 CAS /SDDR_CAS 56 R311 /ADDR2_CAS D12 U24 /BDDR2_CAS R335 56 /TDDR_CAS CAS L7 C7 VDDQ7
/A_DDR2_CAS /B_DDR2_CAS
VDDQ6 C9 K3 WE /SDDR_WE 56 R312 /ADDR2_WE D22 AB24 /BDDR2_WE R336 56 /TDDR_WE WE K3 C9 VDDQ6
/A_DDR2_WE /B_DDR2_WE
VDDQ5 E9 E9 VDDQ5
VDDQ4 G1 G1 VDDQ4
F7 LDQS SDDR_DQS0_P 56 R313 ADDR2_DQS0_P B18 AB26 BDDR2_DQS0_P R337 56 TDDR_DQS0_P LDQS F7
VDDQ3 G3 A_DDR2_DQS0 B_DDR2_DQS0 G3 VDDQ3
B7 UDQS SDDR_DQS1_P 56 R314 ADDR2_DQS1_P C17 AA26 BDDR2_DQS1_P R338 56 TDDR_DQS1_P UDQS B7
VDDQ2 G7 A_DDR2_DQS1 B_DDR2_DQS1 G7 VDDQ2
VDDQ1 G9 G9 VDDQ1
F3 LDM SDDR_DQM0_P 56 R315 ADDR2_DQM0_P C18 AC25 BDDR2_DQM0_P R339 56 TDDR_DQM0_P LDM F3
A_DDR2_DQM0 B_DDR2_DQM0
B3 UDM SDDR_DQM1_P 56 R316 ADDR2_DQM1_P A19 AC26 BDDR2_DQM1_P R340 56 TDDR_DQM1_P UDM B3
A_DDR2_DQM1 B_DDR2_DQM1
VSS5 A3 A3 VSS5
VSS4 E3 E8 LDQS SDDR_DQS0_N 56 R317 ADDR2_DQS0_N A18 AB25 BDDR2_DQS0_N R341 56 TDDR_DQS0_N LDQS E8 E3 VSS4
A_DDR2_DQSB0 B_DDR2_DQSB0
VSS3 J3 A8 UDQS SDDR_DQS1_N 56 R318 ADDR2_DQS1_N B17 AA25 BDDR2_DQS1_N R342 56 TDDR_DQS1_N UDQS A8 J3 VSS3
A_DDR2_DQSB1 B_DDR2_DQSB1
VSS2 N1 N1 VSS2
AR306 AR310
VSS1 P9 SDDR_D[11] ADDR2_D[11] ADDR2_D[0] B15 W25 BDDR2_D[0] BDDR2_D[11] TDDR_D[11] P9 VSS1
R3 NC5 A_DDR2_DQ0 B_DDR2_DQ0 NC5 R3
SDDR_D[12] ADDR2_D[12] ADDR2_D[1] A21 AE26 BDDR2_D[1] BDDR2_D[12] TDDR_D[12]
R7 NC6 A_DDR2_DQ1 B_DDR2_DQ1 NC6 R7
SDDR_D[9] ADDR2_D[9] ADDR2_D[2] A15 W24 BDDR2_D[2] BDDR2_D[9] TDDR_D[9]
A_DDR2_DQ2 B_DDR2_DQ2
SDDR_D[14] 56 ADDR2_D[14] ADDR2_D[3] B21 AF24 BDDR2_D[3] BDDR2_D[14] TDDR_D[14]
VSSQ10 B2 A_DDR2_DQ3 B_DDR2_DQ3 AR311 B2 VSSQ10
NC1 AR307 ADDR2_D[4] C21 AF25 BDDR2_D[4] 56 NC1
VSSQ9 A2 SDDR_D[4] ADDR2_D[4] A_DDR2_DQ4 B_DDR2_DQ4 BDDR2_D[4] TDDR_D[4] A2 VSSQ9
B8 NC2 C14 V26 NC2 B8
ADDR2_D[5] BDDR2_D[5]

BDDR2_D[0-15]
VSSQ8 E2 SDDR_D[3] ADDR2_D[3] A_DDR2_DQ5 B_DDR2_DQ5 BDDR2_D[3] TDDR_D[3] E2 VSSQ8
A7 A7
ADDR2_D[0-15]

R8 NC3 ADDR2_D[6] C20 AE25 BDDR2_D[6] NC3 R8


VSSQ7 SDDR_D[1] ADDR2_D[1] A_DDR2_DQ6 B_DDR2_DQ6 BDDR2_D[1] TDDR_D[1] VSSQ7
D2 C15 W26 D2
SDDR_D[6] 56 ADDR2_D[6] ADDR2_D[7] BDDR2_D[7] BDDR2_D[6] 56 TDDR_D[6]
VSSQ6 D8 A_DDR2_DQ7 B_DDR2_DQ7 D8 VSSQ6
AR308 ADDR2_D[8] C16 Y26 BDDR2_D[8] AR312
VSSQ5 E7 VSSDL SDDR_D[15] ADDR2_D[15] A_DDR2_DQ8 B_DDR2_DQ8 BDDR2_D[15] TDDR_D[15] VSSDL E7 VSSQ5
J7 ADDR2_D[9] C19 AD25 BDDR2_D[9] J7
VSSQ4 F2 SDDR_D[8] ADDR2_D[8] A_DDR2_DQ9 B_DDR2_DQ9 BDDR2_D[8] TDDR_D[8] +1.8V_DDR F2 VSSQ4
+1.8V_DDR ADDR2_D[10] B16 Y25 BDDR2_D[10]
VSSQ3 F8 SDDR_D[10] ADDR2_D[10] A_DDR2_DQ10 B_DDR2_DQ10 BDDR2_D[10] TDDR_D[10] F8 VSSQ3
ADDR2_D[11] B20 AE24 BDDR2_D[11]
VSSQ2 H2 SDDR_D[13] 56 ADDR2_D[13] A_DDR2_DQ11 B_DDR2_DQ11 BDDR2_D[13] TDDR_D[13] H2 VSSQ2
AR309 ADDR2_D[12] A20 AD26 BDDR2_D[12] AR313 56
VSSQ1 H8 J1 VDDL A_DDR2_DQ12 B_DDR2_DQ12 VDDL J1 H8 VSSQ1
SDDR_D[7] ADDR2_D[7] ADDR2_D[13] A16 Y24 BDDR2_D[13] BDDR2_D[7] TDDR_D[7]
SDDR_D[0] ADDR2_D[0] A_DDR2_DQ13 B_DDR2_DQ13 BDDR2_D[0] TDDR_D[0]
ADDR2_D[14] B19 AD24 BDDR2_D[14]
SDDR_D[2] ADDR2_D[2] A_DDR2_DQ14 B_DDR2_DQ14 BDDR2_D[2] TDDR_D[2]
ADDR2_D[15] A17 AA24 BDDR2_D[15]
SDDR_D[5] ADDR2_D[5] A_DDR2_DQ15 B_DDR2_DQ15 BDDR2_D[5] 56 TDDR_D[5]
56

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR2 3 12
DDR2

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
PC AUDIO
JK401
PEJ027-01

3 E_SPRING

6A T_TERMINAL1

7A B_TERMINAL1
PC_R_IN 002:S16
D421 R451 R455
4 R_SPRING C422 15K 0
AMOTECH 100pF R449
5.6V 470K R453
50V 10K
5 T_SPRING OPT

R452
7B B_TERMINAL2 15K
PC_L_IN 002:S16
R456
T_TERMINAL2 D422 C424 R450 0
6B AMOTECH 100pF 470K
5.6V 50V R454
8 SHIELD_PLATE OPT 10K

+3.3V
COMPONENT
R418
4.7K
R425
AMOTECH 1K
COMP_DET 001:AA22
SPDIF OPTIC JACK
D412 +3.3V +5V_GENERAL
JK400 5.6V
PPJ234-01
R466

R470
6E [RD]E-LUG 0

0
OPT
R431 R436
5E [RD]O-SPRING_2 10K 0 R467
COMP_R_IN 002:S16 0
R468 D411
C417
R433

4E [RD]CONTACT 0 AMOTECH R430


12K

5.6V 1000pF
470K
50V
5D [WH]O-SPRING
R432 R435 R462
10K 0 IC404 1K
[RD]O-SPRING_1 COMP_L_IN 002:S16 OPT
5C NL17SZ00DFT2G JK403
D410 C415
R434

R429 SPDIF_INT JST1223-001


12K

AMOTECH 470K 1000pF


7C [RD]E-LUG-S 5.6V 50V R464
0 A VCC GND
1 5

1
SPDIF_OUT

Fiber Optic
ADMC5M03200L_AMODIODE
5B [BL]O-SPRING 1/16W
002:X18 B VCC
AMOTECH 2

2
[BL]E-LUG-S COMP_Pr 002:E20 SPDIF_INT
7B
D409 R428 SPDIF_INT
75 R465
30V GND Y 22 VINPUT
4A [GN]CONTACT 3 4

3
4
[GN]O-SPRING AMOTECH COMP_Pb 002:E20
5A
D408 R427 FIX_POLE
75 C408
[GN]E-LUG 30V OPT
6A 100pF ZD403
50V C406
R419 SPDIF_BYPASS 0.1uF
AMOTECH 0 R463
16V
COMP_Y 002:E20
D407 22
R426
30V 75

+5V_ST
D400
ENKMC2838-T112
A1
C
Side USB MIC2009YM6-TR
IC401
+5V_EXT

L400 L401
A2 MLB-201209-0120P-N2 MLB-201209-0120P-N2
VOUT VIN
6 1
IC400
CAT24C02WI-GT3 C400
0.1uF
RS232C +5V_ST C410
120-ohm ILIMIT
5 2
GND
C409 C403
C407 10uF 0.1uF

R469
FAULT/ ENABLE
16V 4 3
A0 VCC 001:AJ19;006:AI8;006:AL3;006:AL13;006:AL18

180
1 8 22uF 10uF 10V 16V
C425 16V 10V
R404 R406 EDID_WP 0.33uF
A1
2 7
WP
2.2K R412 R416 16V
2.2K 10K 100
A2 SCL

[ PC ] VSS
3 6

SDA
ISP_RXD
C429
0.33uF
4 5 ISP_TXD C428 16V
0.33uF +5V_GENERAL
16V C430 USB_CTL
C401 C402
0.047uF
18pF 18pF 25V
50V 50V R420
C421
0.1uF 10K
R403
DOUT2

16V
RIN2

R444 47 USB_OCD
C2-

C1-
R445

C2+

C1+
22
V-

V+
22
001:AI14
8

JK405
UAR27-4K2300

1
USB DOWN STREAM
D413 IC403
30V
MAX3232CDR

2
D414 SIDE_USB_DM 001:AK8
30V
ADUC30S03010L_AMODIODE
0 R437 D419
002:E18DSUB_VSYNC ADMC5M03200L_AMODIODE
10

11

12

13

14

15

16

3
5.6V SIDE_USB_DP 001:AK8
9

0 R440 OPT
002:E18DSUB_HSYNC D425
GND

VCC
DOUT1
ROUT2

ROUT1

D418
DIN2

DIN1

RIN1

CDS3C05HDMI1 D426
+3.3V

4
ADMC5M03200L_AMODIODE 5.6V CDS3C05HDMI1
OPT 5.6V +5V_ST 5.6V

5
R447 C431
002:E19DSUB_B 0.1uF
D415 4.7K 16V
R443 C418 ADUC30S03010L_AMODIODE JP1421 R448
75 OPT 30V DSUB_DET IR_OUT
1% JP1420 D420 1K
R446 ADMC5M03200L_AMODIODE
0
5.6V
R457 R458 D423 OPT
OPT OPT 6.2K 6.2K
R460

R459 ADUC30S03010L_AMODIODE
100

100
GREEN_GND

DDC_CLOCK

30V
DDC_DATA

SYNC_GND
BLUE_GND

DDC_GND
RED_GND

002:E19DSUB_G
H_SYNC

V_SYNC
GREEN
GND_2

GND_1
BLUE

R441 C419
RED

D416 DBG_TX
NC

75 OPT ADUC30S03010L_AMODIODE
1% 30V DBG_RX
50V JP1423 D424 OPT
SHILED
11

12

13

14

15

ADUC30S03010L_AMODIODE
C426 220pF JP1422 30V
16
10
6

C427 220pF
50V
1

JP1424
002:E18DSUB_R
P400
R442 C420 D417 SPG09-DB-010
75 OPT ADUC30S03010L_AMODIODE
30V
1%
6

10
1

P401
SPG09-DB-009

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. INTERFACE 4 12
ERFACE

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
DVB-CI SLOT
DVB-CI TS INPUT
+5V_CI_ON

CI_DATA[0-7] AR506
33 FE_TS_DATA[7]
CI_MDI[7] FE_TS_DATA[6]
CI_MDI[6]

FE_TS_DATA[0-7]
FE_TS_DATA[5]
CI_MDI[5] FE_TS_DATA[4]

CI_DATA[0-7]
CI_MDI[4]
+5V_GENERAL AR507 FE_TS_DATA[3]
C505 33
CI_MDI[3] FE_TS_DATA[2]
10uF
10V CI_MDI[2] FE_TS_DATA[1]

R505
EAG41860102

10K
CI_MDI[1] FE_TS_DATA[0]
P500 CI_MDI[0]
/CI_CD1
C501 10067972-000LF
FE_TS_DATA[0-7]
0.1uF
16V 35 AR513
33
R511 100 36 CI_DATA[3] 005:D14 CI_MISTRT FE_TS_SYNC
37 3 CI_DATA[4] FE_TS_VAL_ERR

R517
AR500 CI_MIVAL_ERR

10K
33 38 4 CI_DATA[5]
CI_TS_DATA[4]
39 5 CI_DATA[6] FE_TS_DATA_CLK
CI_TS_DATA[5] CI_MCLKI
40 6 CI_DATA[7]
CI_TS_DATA[6]
CI_TS_DATA[7] 41 7 R515 47
/PCM_CE
42 8 CI_ADDR[10]
R508 10K 43 9 CI_OE
44 10 CI_ADDR[11]
CI_IORD
45 11 CI_ADDR[9] +5V_GENERAL
CI_IOWR
46 12 CI_ADDR[8]
CI_ADDR[13]

R518
47 13

10K
CI_MDI[0]
48 14 CI_ADDR[14]
CI_MDI[1]
CI_MDI[2] 49 15 CI_WE
50 16 R516 100
CI_MDI[3] /PCM_IRQA
C503 0.1uF 51 17
R513 0 R514 0 C509
52 18 C508
GND 0.1uF
OPT 53 19 OPT 0.1uF
CI_MDI[4] 16V
GND
CI_MDI[5] 54 20
55 21 CI_ADDR[12]
CI_MDI[6]
GND
DVB-CI HOST I/F
56 22 CI_ADDR[7]
CI_MDI[7]
R509 10K 57 23 CI_ADDR[6]
R503 47 58 24 CI_ADDR[5]
PCM_RST
R500 47 59 25 CI_ADDR[4] CI_DET
/PCM_WAIT
AR503 60 26 CI_ADDR[3]
REG
33 61 27 CI_ADDR[2]
CI_TS_CLK
CI_TS_VAL 62 28 CI_ADDR[1]
CI_TS_SYN 63 29 CI_ADDR[0] IC501 +3.3V_CI
64 30 CI_DATA[0] C511
65 31 CI_DATA[1] 0.1uF
CI_ADDR[0-14] 1OE VCC 16V
CI_TS_DATA[0] 66 32 CI_DATA[2] 1 20
33
CI_TS_DATA[1] TOSHIBA
67 33
CI_TS_DATA[2] 68 34 1A1 2OE
CI_TS_DATA[3] PCM_A[0] 2 19
0
OPT

AR504 G2
2 69 G1
1 0ITO742440D
2Y4 1Y1
R512

R510 100 CI_ADDR[7] 3 18 CI_ADDR[0]


/CI_CD2
R507

+5V_GENERAL GND
10K

1A2 2A4
PCM_A[1] 4 17 PCM_A[7]
GND
2Y3 1Y2

TC74LCX244FT
CI_ADDR[6] 5 16 CI_ADDR[1]
R506 GND
1A3 2A3
10K C502 6 15
PCM_A[2] PCM_A[6]
0.1uF
16V
2Y2 1Y3
CI_ADDR[5] 7 14 CI_ADDR[2]
CI_MISTRT
CI_MIVAL_ERR 1A4 2A2
PCM_A[3] 8 13 PCM_A[5]

CI_MCLKI 2Y1 1Y4


CI_ADDR[4] 9 12 CI_ADDR[3]

GND 2A1
10 11 PCM_A[4]

DVB-CI SERIAL BUFFER TS

+3.3V_CI CI_DATA[0] AR508 PCM_D[0]


33
CI_DATA[1] PCM_D[1]

CI_DATA[0-7]
CI_DATA[2] PCM_D[2]
DVB-CI DETECT CI_DATA[3] PCM_D[3]

PCM_D[0-7]
+3.3V_CI CI_DATA[4] AR509 PCM_D[4]
+3.3V_CI 33
IC502 CI_DATA[5] PCM_D[5]
IC500
74LVC1G32GW CI_DATA[6] PCM_D[6]
005:E12 74LVC541A(PW)
B 1 5 VCC CI_DATA[7] PCM_D[7]
/CI_CD2

0.1uF
0.1uF

R520
C510

C512
10K

A 2
/CI_CD1 16V
OE1 VCC
005:D4 GND 3 4 Y 1 20
PCM_D[0-7]
005:AE5;010:Z10 A0 OE2 CI_DATA[0-7]
GND 005:AB9 2 19
R519 FE_TS_DATA_CLK
CI_DET
47 005:AE5;010:AC4 R526
R521 A1 Y0 47
/PCM_CD
FE_TS_VAL_ERR 3 18 BUF_TS_CLK
AR510
47 33
001:AA10 005:AE5;010:Z10 R528 CI_ADDR[8] PCM_A[8]
A2 Y1 47
FE_TS_SYNC 4 17 BUF_TS_VAL_ERR CI_ADDR[9] PCM_A[9]
BUFFER

R527 CI_ADDR[10] PCM_A[10]


010:Z10 A3 Y2 47
5 16 CI_ADDR[11] PCM_A[11]
FE_TS_SERIAL BUF_TS_SYN

R522 R525
10K A4 Y3 47
6 15 BUF_TS_DATA[0]
CI POWER ENABLE CONTROL AR511
R523 33
A5 Y4 CI_ADDR[12] PCM_A[12]
10K
7 14 CI_ADDR[13] PCM_A[13]
CI_ADDR[14] PCM_A[14]
A6 Y5 /PCM_REG
+5V_CI_ON 8 13 REG
+5V_ST Q501
RSR025P03 A7 Y6
S D 9 12
AR512
33
R530 GND Y7 CI_OE /PCM_OE
R504
C500 22K 4.7uF G C507 10 11 CI_WE /PCM_WE
0.1uF 0.1uF R524
16V CI_IORD /PCM_IORD
16V 16V 33K
CI_IOWR /PCM_IOWR
C504
R529
10uF
2.2K
10V
C
R502
10K B Q500
PCM_5V_CTL 2SC3052

E
R501
33K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PCMCIA 5 12
CMCIA

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
5V_HDMI_1

HDMI EEPROM
C
20 R615
Q601 B 10K
2SC3052 HPD1
20 5V_HDMI_1 +5V_ST
E
C600
19

A2

A1
0.1uF
18
16V UI_HW_PORT2 ENKMC2838-T112
R612

R600
2K
1K D600

C
17
R610 22
DDC_SDA_1 IC600

CK+_HDMI2

DDC_SDA_2
D0+_HDMI2

DDC_SCL_2
CK-_HDMI2
D0-_HDMI2
16

D2+_HDMI2

D1+_HDMI2
D2-_HDMI2

D1-_HDMI2
006:O7;006:AL6 EDID_WP
DDC_SCL_1
CAT24C02WI-GT3
15 R611 22 +3.3V JP606
006:O7;006:AL5

BLM18PG121SN1D
14 R607 +5V_HDMI_SW
0 006:H13;006:H22;006:T23;006:AL24 A0 VCC
CEC_REMOTE 1 8
13

L600
006:O8
CK-_HDMI1 R618
12 A1 WP 0 R626 R629

MMBD301LT1G
2 7
EAG59023302

C603
0.1uF 4.7K 4.7K
11 006:O8
CK+
10 CK+_HDMI1 A2 SCL

D605
3 6

30V
D0- 006:O8 DDC_SCL_1
9 R623 0
D0-_HDMI1 C608 C609 C610 C611 C612 C613 C614
D0_GND 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF VSS SDA
8 4 5
C616 R621 0 DDC_SDA_1
D0+ 006:O8
7 0.1uF
D0+_HDMI1

GND_7
VCC_8

VCC_7
D1- 006:O9

HPD3

SDA2
HPD2
SCL2
6

VDD
A24

A23

A22

A21
B24

B23

B22

B21
D1-_HDMI1
D1_GND
5

EDID_WP
UI_HW_PORT3
D1+

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
006:O9

UI_HW_PORT1
4 D1+_HDMI1
D2- 006:O9 SDA3 1 48 A14
3 DDC_SDA_1 D2+_HDMI3
D2-_HDMI1 SCL3 47 B14
DDC_SCL_1 2
D2_GND D2-_HDMI3
2 GND_1 3 46 VCC_6 5V_HDMI_2
+5V_ST
D2+ 006:O10 B31 4 45 A13
1 D2+_HDMI1
CK-_HDMI1
A31 B13 D1+_HDMI3 IC601
5 44

A2

A1
CK+_HDMI1
VCC_1 GND_6 D1-_HDMI3 CAT24C02WI-GT3
6 IC604 43 ENKMC2838-T112
B32 7 42 A12 D602
D0-_HDMI1 TMDS351PAGR D0+_HDMI3

C
A32 8 41 B12 A0 VCC
D0+_HDMI1 HDMI S/W_TI D0-_HDMI3 1 8
GND_2 9 40 VCC_5
B33 10 39 A11 R640
D1-_HDMI1 CK+_HDMI3 A1 WP 0 R649
R646
J600
GND UI_HW_PORT1 D1+_HDMI1
VCC_2
A33 11
12
38
37
B11
SCL1
CK-_HDMI3
2 7 C607
0.1uF 4.7K 4.7K
DDC_SCL_3
B34 13 36 SDA1 A2 SCL
D2-_HDMI1 DDC_SDA_3 3 6 DDC_SCL_2
A34 14 35 HPD1
D2+_HDMI1 R645 0
R624 GND_3 15 34 EQ
5V_HDMI_2 4.7K VSS SDA
VSADJ 16 33 S2 4 5 DDC_SDA_2
+3.3V
1/10W R642 0

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1%
C
R616

R650
4.7K
20

OPT
S1
Z4

Z3

Z2

Z1
Y4

Y3

Y2

Y1
GND

SCL_SINK
VCC_3

VCC_4
10K

GND_4

GND_5

SDA_SINK
HPD_SINK
Q602 B
2SC3052 HPD2
20
E

R633
C601 5V_HDMI_3
19 +5V_ST
0.1uF

0
16V
18 R613
R601
2K

A2

A1
1K
17 006:T5;006:AL10 ENKMC2838-T112
R603 22
DDC_SDA_2 D606
16

C
006:T5;006:AL10
15 R604 22 DDC_SCL_2 SEL1_HDMI_SW IC602
CAT24C02WI-GT3 EDID_WP
14 R605 006:H4;006:H22;006:T23;006:AL24 SEL2_HDMI_SW
0
CEC_REMOTE

D2+_HDMI_SW
D2-_HDMI_SW

D1+_HDMI_SW
D1-_HDMI_SW

CK+_HDMI_SW
D0+_HDMI_SW

CK-_HDMI_SW
D0-_HDMI_SW
13 +3.3V
006:T5 A0 VCC
CK-_HDMI2 1 8
12
R641
EAG59023302

11 006:T5 A1 WP 0 R644
CK+ 2 7 C615 R643
10 0.1uF 4.7K
CK+_HDMI2 4.7K
D0- 006:S5

R651
4.7K
9 A2 SCL

R652
4.7K
D0-_HDMI2 R647 0
3 6
D0_GND DDC_SCL_3
8
D0+ 006:S5 VSS SDA
7 D0+_HDMI2 DDC_SDA_SW 4 5
R648 0 DDC_SDA_3
D1- 006:S5 DDC_SCL_SW
6 D1-_HDMI2
D1_GND
5
D1+ 006:S5
4 D1+_HDMI2
D2- 006:R5
3 5V_HDMI_4
D2-_HDMI2 +5V_ST
D2_GND
2

A2

A1
D2+ 006:R5
1 D2+_HDMI2 ENKMC2838-T112
D601

C
RESERVE2
IC603
CAT24C02WI-GT3

GND_7
VCC_8

VCC_7
HPD3

SDA2
HPD2
EDID_WP

SCL2
A24

A23

A22

A21
B24

B23

B22

B21
UI_HW_PORT2 A0
1 8
VCC

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
J601
GND
SDA3 1 48 A14 R619

SIDE HDMI GND_1


SCL3

B31
2
3
47
46
B14
VCC_6
A13
A1

A2
2 7
WP

SCL
0

R620 0
C604
0.1uF
R628
4.7K
R630
4.7K

4 45
3 6
A31 44 B13 DDC_SCL_4
5V_HDMI_3 5
VCC_1 6 IC604-*1 43 GND_6
5V_HDMI_4 VSS SDA
B32 7 42 A12 4 5
A32
BU16027KV B12 R622 0 DDC_SDA_4
C 8 41
20 R634 GND_2 VCC_5
10K C 9 40
Q604 B
BODY_SHIELD R617 B33 39 A11
2SC3052 HPD3 10K 10
20 Q603 B
A33 11 38 B11
E 2SC3052 HPD4
20 VCC_2 SCL1
C606 12 37
19 E
0.1uF B34 13 36 SDA1
C602
16V 19
18 R635 0.1uF A34 14 HDMI S/W_rohm 35 HPD1
R636
2K

1K 16V GND_3 34 RESERVE1


18 R614 15
17
R602
2K

R637 22 1K VSADJ 16 33 S2
DDC_SDA_3 17 22 002:E14;006:AL20
16 R608

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
16 DDC_SDA_4
15 22 DDC_SCL_3 002:E15;006:AL19
R638 +3.3V_ST
DDC_SCL_4

S1
Z4

Z3

Z2

Z1
Y4

Y3

Y2

Y1

SCL_SILK
15

VCC_3

VCC_4

SDA_SILK
HPD_SILK
GND_4

GND_5
14 R606 22
R639 0
CEC_REMOTE 14 006:H4;006:H13;006:H22;006:AL24
13 R609 0
CEC_REMOTE
CK-_HDMI3 13 R627 R631
12 002:E13 120K OPT
CK-_HDMI4
EAG59023302

12
11
CK+
EAG39323102

10 CK+_HDMI3 11 Q600 MMBD301LT1G


CK+ 002:E13 SSM6N15FU
D0- 10 D603
9 D0-_HDMI3 CK+_HDMI4
D0- 002:E13 30V
D0_GND 9
8 D0-_HDMI4
D0_GND SOURCE1 DRAIN1
D0+ 8 HDMI_CEC 1 6 CEC_REMOTE
7 D0+_HDMI3
D0+ 002:E13
D1- 7
6 D0+_HDMI4 GATE1 GATE2
D1-_HDMI3
D1- 002:E14 2 OPT 5
D1_GND 6
5 D1-_HDMI4
D1_GND DRAIN2 SOURCE2
D1+ 5 OPT
4 3 4
D1+_HDMI3 C605
D1+ 002:E14
D2- 4 0.1uF
3 D2-_HDMI3 D1+_HDMI4
D2- 16V
D2_GND 3 002:E14
2 D2-_HDMI4
D2_GND
D2+ 2 R625 0 GND
1 D2+_HDMI3
D2+ 002:E14
1
D2+_HDMI4

UI_HW_PORT3
J602
GND GND UI_HW_PORT4
J603

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 6 12
HDMI

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
D704 R725 R705
1N4148W
100V
12 12 SPK_L+ 007:AA10 BLUETOOTH
+24V OPT C755
L704 0.01uF
C741 AD-8770 50V
390pF C749 R730 +5V_GENERAL
EAP60684501 R734
50V 0.1uF 4.7K
2S 2F 50V 3.3
C745
SPEAKER_L

G
C733 C729 C725 C780 C742 0.47uF
0.1uF 0.1uF 10uF 390pF 50V
50V 10uF 50V 1S 1F R735
50V 35V 35V

S
C750 3.3

D
D705 0.1uF R731 C761 1uF

RTR030P02
1N4148W R726 50V C756

Q702
R713 4.7K 0.01uF
100V 50V
OPT 12 12
C716 SPK_L- 007:AA10
22000pF
50V C726 47K
22000pF R747
50V
R744
0

PGND1A_2
PGND1A_1

PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1

PGND1B_2
PGND1B_1
C727

OUT1A_2
OUT1A_1

OUT1B_2
OUT1B_1
0.1uF
R704 16V C R748

VDR1B
BST1B
R749
0
100 B 4.7K
001:AA21 AMP_RST 2SC3052
C707 Q703 BT_ON/OFF

56
55
54
53
52
51
E

50
49
48
47
46
45
44
43
1000pF
50V R740 C730 P701
0 BST1A 42 NC 0.1uF R727 R716 12507WR-08L
002:X21
AUDIO_MASTER_CLK C713 1 SPK_R+ 007:AA11
VDR1A VDR2A 16V C732 D706 12
2 41 12
0 . 1 u F 16V RESET 22000pF 1N4148W 1
3 40 BST2A 100V
+1.8V_AMP +3.3V L705 C757
AD PGND2A_2 50V OPT C743
4 39 AD-8770 2
390pF 0.01uF R746
+1.8V_AMP DVSS_1 38 PGND2A_1 50V EAP60684501 C746 C751 R732
C709 5 0.47uF 50V BT_DM 3
2S 2F 50V 0.1uF 4.7K R736
BLM18PG121SN1D

0.1uF VSS_IO 6 IC701 37 OUT2A_2 0


CLK_I 7 36 OUT2A_1 C744
50V 3.3 SPEAKER_R R750
4
R703

L701
BLM18PG121SN1D

C708 VDD_IO PVDD2A_2 390pF BT_DP 5


8 35 50V 1S 1F R737
C705 1000pF EAN60664001 0
0

L700 50V DGND_PLL 9 34 PVDD2A_1 6


100pF 3.3
R708 AGND_PLL 33 PVDD2B_2 D707 C752 R733
50V 10 R728 BT_LOUT_AMP 7
1N4148W R719 0.1uF 4.7K C758
3.3K LFM 11 NTP-3100L 32 PVDD2B_1 0.01uF
100V 12 12 50V 8
AVDD_PLL OUT2B_2 OPT 50V
12 31 SPK_R- 007:AA11 9
DVDD_PLL 13 30 OUT2B_1
C728 C720
TEST0 14 29 PGND2B_2 0.1uF 0.01uF
C778 C777 50V 50V
C700 C702 10uF
10uF 1uF 0.1uF C704 C706 +24V
15
16
17
18
19
20
21
22
23
24
25
26
27
28
10V 10V 16V 10V 1uF 0.1uF
10V 16V
WAFER-ANGLE

SCL
DVSS_2

BST2B
SDA
WCK
BCK

FAULT
DVDD

PGND2B_1
VDR2B
SDATA

MONITOR_0
MONITOR_1
MONITOR_2
+1.8V_AMP L706 5
C734 C735 C736 C779 120-ohm
10uF
MCLK SDATA WCK BCK TP is necessory 0.1uF
50V
0.1uF
50V
35V
10uF
35V
007:AD2 SPK_L+
L707
4

C724 120-ohm
C760
1uF C715 0.1uF 007:AD4 SPK_L-
16V C731 3
10V 0.1uF
16V L709
22000pF 120-ohm
50V
R722 100
OPT
007:AD6 SPK_R+
L708
2 BLUETOOTH Audio TR Amp
002:X21 MS_LRCH +3.3V_ST
R720 100 C721 120-ohm L711 +5V_GENERAL
002:X21 MS_LRCK 33pF 007:AD8 SPK_R- CIC21J501NE
1
R721 100 50V
002:X21 MS_SCK
R709 100 R724 P700 C773
0 0 1 : E 2 1 ; 0 0 9 : A JSDA_SUB/AMP
19 R718 0 10K D709 C765
R710 100 0.1uF
C ENKMC2838-T112 0.1uF
001:E21;009:AJ1 8
SCL_SUB/AMP A1
SB_MUTE
2A => 5A 16V
16V
R729 001:W19;007:G25;009:Y23;009:Y26 R752
Q701 B C 1K
C712 C714 R717
33pF 33pF 33K OPT 2SC3052 A2 E
10K NTP_MUTE
50V 50V 001:AA22
E 2SA1504S
Q706 B
C
R754
47K
Q704 C762
2SC3052 C 10uF
Monitor0_1_2 TP is necessory B
6.3V
C766 BT_LOUT
22uF
16V R758
3K E
R755 C763
BT_LOUT_AMP 15K 0.1uF
R757 R753 16V
47K R756 470 OPT
OPT 3K

EARPHONE AMP

BT & HP AUDIO SWITCH


+3.3V
HP_LOUT IC700
TPA6110A2DGNRG4
007:AE22
+5V_EARPHONE R707
R711 C717 10K
R712 0.22uF
BYPASS IN1- 27K 20K 8
SHIELD_PLATE +5V_GENERAL
1 8
C701 16V 100uF +5V_GENERAL
R701 C718 T_TERMINAL2 6B R760

OPT
1uF 16V IC702
10K GND VO1 680K
6.3V 2 7 MC74HC4066ADR2G
D710 HP_DET B_TERMINAL2 7B HP/BT_LOUT
R714 C723 C775 C767
SHUTDOWN VDD 0.1uF
5.6V
22uF R773 0 R764 +5V_GENERAL
0.1uF

OPT
3 6 1K AMOTECH XA VCC
25V 5 680K 1 14 16V
T_SPRING
C710 C719 100uF R766
HP_ROUT R702 16V 4.7K
C703 20K IN2- VO2 0.1uF
4 5 R_SPRING 4 YA CONTROL_A R770
16V D711 2 13 0 R765 0
AMOTECH HP_LOUT
0.22uF R715 C722 C774
007:AL23 16V C
0.1uF 5.6V 22uF B_TERMINAL1 7A
1K YB CONTROL_D
+5V_EARPHONE 25V 3 12 Q707 B 0 R771
BT_LOUT HP_AU_SW
+5V_EARPHONE KRC103S
R706 D700 +5V_GENERAL T_TERMINAL1 6A OPT
27K C711 ENKMC2838-T112 XB XD OPT
E
R742 10uF A1 4 11
E_SPRING 3
10K C 10V C +5V_GENERAL
R700 B A2 PEJ027-01 CONTROL_B YD
Q700 5 10 HP_ROUT
JK700 R759
10K 2SC3052
C 4.7K
E R769 R761 CONTROL_C YC
R741 0 6 9 0 R767
B Q705
HP_MUTE
10K 2SC3052 0
007:J25 C GND XC
E 7 8
R768 0 B Q708
BT_AU_SW
KRC103S +5V_GENERAL
OPT
OPT
E
R762

OPT
D708 680K
R772 0
ENKMC2838-T112
A1 HP/BT_ROUT
001:W19;007:R12;009:Y23;009:Y26 SB_MUTE
R763

OPT
C
HP_MUTE 680K
A2
001:AJ19 SIDE_HP_MUTE 007:C24

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AMP 7 12
AMP

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
FROM LIPS & POWER B/D +12V
L810
+12V
BLM18PG121SN1D
+12V
C842 C845
C841 0.1uF 10uF
0.01uF 16V 16V R848
+5V_ST 25V 100K
OPT Q806
RSR025P03
+3.3V_ST S D
IC808
R818 MP2305DS
+5V_ST
3.3K R842 C847 PANEL_POWER C868
10K 4.7uF 0.1uF
R814 G 16V
R822 +3.3V_ST R837 16V C853 BS SS
100 RT1P141C-T112 1 8
10K 22K
Q801
C R815 P800 +1.8V_DDR 1uF $0.28
R804 R843 25V IN EN
R821 6.8K FM20020-24 1.8K 2 7
INV_CTL 10K B Q802 OPT 3 1 10K C860
R805 C848
2SC3052 R807 C1130 5.6nF R852
10K OPT 0.1uF 50V
C 9.1K
. .
33K 2 R806 R832 C839 50V SW 3 6
COMP
R823 E 1 2 OPT 0 C835
10K B Q805 22uF 0.47uF
10K . .
3 4 C R802 2SC3052 25V 25V
OPT +24V . 5 6 . 10K OPT C859 GND FB
Q800 B R810 0 C 4 5
. . R833 E 0.1uF
L804 7 8 2SC3052
PANEL_CTL
10K B Q804 R839 16V R2 R853 +5V_GENERAL
+5V_HDMI_SW
CB3216UA121 . 9 10 . POWER_ON/OFF1 22K 12.4K
E 2SC3052 R847
. . 001:AK10 R1 1%
11 12 56K BLM18PG121SN1D BLM18PG121SN1D
OPT . . +5V_ST E 1%
C832 C821 C813 13 14 L821 L830
Vout=0.923*(1+R1/R2)
68uF 68uF 0.1uF . 15 16 . L806
35V 35V 50V CB3216UA121
. L819

ZD206
17 . 18

8.2B
22UH C858 C850 C897
. 19 12 20 0.1uF 0.1uF
L829 22uF
BLM18PG121SN1D 21 11 14 22 16V 16V 16V
C802 C885
. C824 C898 +3.3V +1.8V_DDR
23 13 24 0.1uF 0.1uF
OPC_OUT2 100uF 100uF
16V 16V
C834
16V
16V 16V +5V 450 mA
25

R872
0.1uF

10K
OPT +12V L826
L807 2.2uH
CB3216UA121 Vout=0.8*(1+R1/R2)
ERROR_OUT R1806
10K
R841
4.7K
C807
0.1uF C865
R1
R809
+12V +3.3V for FRC
C820 C826 C1809
OPT 16V 0.1uF 0.1uF 100uF 100uF 10.5K
OPT 16V 16V 16V 16V 1% C829 C877 +12V
1uF 0.1uF

PGND2_2
6.3V 16V

SW2_2

SW2_1
R2 R803
A_DIM R859 22 R871

EN2

FB2
R851 4.7K PWM_DIM 100K
8.2K 22uF
OPT
1% C876 IC810
C818

20

19

18

17

16
6.3V
OPC_OUT1 +5V_ST MP2305DS
1uF BLM18PG121SN1D PGND2_1 1 15 ITH2 C823
C895 L828 0.1uF
L817 PVCC_1 2 14 AVCC 16V
OPT 0.1uF BS SS
BLM18PG121SN1D 10uF 1 8
16V
C878 PVCC_2 3 IC806 13 NC
BD9150MUV
R874 $0.28
PVCC_3 AGND IN EN
4 12 75K 2 7
10uF C862
R873 C863
C879 PGND1_1 5 11 ITH1 5.6nF R813
5% 0.1uF 50V 9.1K
56000 C816 50V SW COMP

10
C1812 C804 3 6

9
22uF 0.47uF
0.1uF C883
5% 25V 25V
16V

FB1
330pF

EN1
SW1_1

SW1_2
GND FB

PGND1_2
D1801 Stand-by +3.3V 22uF
C880
C882
330pF
4 5
R2 R850
12.4K
+3.3V_MEMC

33K
R849
ENKMC2838-T112 +3.3V_AVDD

1%
A1 R1 1%
L827 BLM18PG121SN1D
C L805
2.2uH Vout=0.923*(1+R1/R2) L815
A2 BLM18PG121SN1D
+5V_ST +3.3V_ST
GND
L808
C811 22UH C867 C869
Replaced Part GND
+3.3V_ST +3.3V_AVDD_MPLL 0.1uF 22uF 0.1uF
IC801 16V 16V 16V
L803 +3.3V
AP1117E33G-13 +3.3V_ST
BLM18PG121SN1D
IN $0.048 ADJ/GND
3 1
C815
ZD204

C803 2 C806 C808 0.1uF


5V

R856 C825 +3.3V_CI


ZD202

100uF
8.2B

0.1uF OUT 0.1uF 16V


16V 16V 16V 4.7K 0.1uF
16V L814
R800 BLM18PG121SN1D
POWER_ON/OFF1
10K C852
001:AK11;008:N5
ZD203

0.1uF
+1.26V Core for FRC
5V

10uF 16V
C866

Vout=0.8*(1+R1/R2)
600mA

D1802
ENKMC2838-T112
A1
C
+5V_TUNER +5V_GENERAL
A2
+3.3V_TUNER
+3.3V_MEMC
+3.3V Replaced Part
Replaced Part IC811 IC803
+1.8V_AMP
IC809 AP1117E18G-13 AP1117E18G-13
OPT
R1805 AP1117E33G-13 IC802
IN ADJ/GND IN $0.048 ADJ/GND
0 $0.048 ADJ/GND 3 1 3 1 BD9130EFJ-E2 R844
IN 3 1
2
50 mA 10K
2
C890 2 C893 C894
C892 OUT OUT C822 C827
0.1uF 150uF 0.1uF C800 C814 ADJ EN
10uF OUT +1.8V_TUNER 100uF 0.1uF 1 8
16V 6.3V 16V 100uF 0.1uF
10V 16V 16V C320 MUST BE PLACED NEAR PVCC PIN
16V 16V $0.23
VCC PVCC +1.26V_MEMC
D1803 GND 2 7
ENKMC2838-T112 C830
A1 10uF L809
C ITH SW 6.3V
3 6
A2 R829 2.2uH
18K GND PGND
ZD207

ZD208

C871
C872 C870 4 5
5V

5V

22uF C819 R834


0.1uF 150uF C817 10K
16V 0.1uF
16V 6.3V 10uF 1% C831
C828 C833
6.3V 16V 0.1uF 22uF
330pF R1 16V 16V
50V

S6 core 1.26 volt R835


17.4K
1%
+5V_ST
+12V +12V 5V SEPERATE USB 465 mA @85% efficiency +3.3V
R2

CIC21J501NE
L1800 R831
BLM18PG121SN1D 1/16W
1N4148W_DIODES

+5V_GENERAL
IC1800 L812 Replaced Part
10K
MAX 3A +1.8V_MEMC for DDR
D1800

MP2305DS OPT +1.26V_VDDC


100V

OPT

R1800
100K

C1803 R830
0.1uF C891
BS SS 50V 10K
Close to IC
415 mA @85% efficiency
1/16W 0.47uF 400 mA
1 8 Vout=0.8*(1+R1/R2) R825 25V
C1804 24K 1%
IN EN Close to IC IC805
1000pF OPT
2 7 R824
C1808 OPT C1813 MP2212DN +1.8V_FRC_DDR
22K R1 +3.3V_MEMC
0.1uF 50V 100pF $0.07
50V 1%
50V SW 3 6
COMP 4.9A 0.0150OHM 34MHZ IC807
C1806 FB EN/SYNC
C1807
C1800 R1802 1 8 1600 mA SC4215ISTRT
10uF Vout=0.8*(1+R1/R2)
16V 5600pF 9.1K Vout=0.923*(1+R1/R2) L813 L816
0.47uF GND FB R827
4 5 50V R2

1/10W
25V 75K GND SW_2 3.6uH BLM18SG121TN1D

R838
+5V_EXT 1/8W 2 7 NC_1 GND R1/R2 : 27K / 20K => Vout=1.88

12K
R1801R2 $0.24 1 8 R1

1%
12K 1% R1/R2 : 15K / 12K => Vout=1.80
R1804 1% DEVELOPE NR8040T3R6N
OPT R836
$0.195 R1/R2 : 12K / 9.1K => Vout=1.85
R1 56K Placed on SMD-TOP IN SW_1

ZD205
3 6 C849 10K EN ADJ R1/R2 : 18K / 13K => Vout=1.90
1% C843 C856 2 7

5V
22uF 22uF 0.1uF
10V 10V
BS VCC VIN VO
L1801 C837 4 5 C836
C1811 C838 3 6
22uH C1802 C1805 0.1uF 22uF 22uF 0.1uF
R1803 Placed on SMD-TOP
22uF 22uF 16V OPT 50V
0.1uF
16V 16V NC_2 NC_3 C854 C855

1%
1/10W

9.1K
16V 4 5
3225 3225 C846 C851 100uF 0.1uF

R840
R862 0 100uF 0.1uF R2 16V 16V
C IN C896
R826 16V 16V 1uF
Placed on SMD-TOP 10V
10 C840
1/10W 1uF
1% 10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 8 12
POWER

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
+3.3V

+3.3V
R1124
4.7K

SCART1_DET +12V

4.7K
R1126 +12V

R1122
L1109
1K BLM18PG121SN1D
D1110 C1113 L1104
30V 0.1uF BLM18PG121SN1D SCART2_DET
OPT 16V R1159
1K C1104 C1139 C1141
C1105 10uF 0.1uF 0.1uF
E C1143 C1144 C1145 0.1uF 16V 50V 50V
R1140
470 10uF 0.1uF 0.1uF 16V
ISA1530AC1 50V
16V 50V E
SC1_CVBS_IN Q1119 B R1162
ISA1530AC1 470
R1117 C1108
C1106 0 C R1133 Q1109
R1109 220pF R1174 B
47pF 50V 47K SC2_CVBS_IN
75 50V C
OPT C1142 0 C1125 R1166
C1119
22
D1101 Q1120 C 47uF
R1182 22 R1139 47pF
220pF 47K
AV_DET 6.3V D1112 50V Q1111 C1109
30V GND 2SC3052 B 0 AV_DET 75 50V OPT
21 FE_VSCART_OUT 30V 2SC3052 C 47uF
COM_GND OPT 21 6.3V
COM_GND OPT
20 R1113 B
SYNC_IN 390 E 20 DTV/MNT_VOUT
R1175 SYNC_IN
19 R1136 R1131
SYNC_OUT R1107 15K 19 75 E
75 C1107 SYNC_OUT 390
D1106 R1138 R1167
18 30V 100uF 120 15K
SYNC_GND2 D1102 18
30V OPT 16V SYNC_GND2 C1122
17 D1115 R1161
17 100uF 120
SYNC_GND1 OPT R1114 22 30V
SYNC_GND1 16V
16 SC1_FB OPT
RGB_IO 16
RGB_IO
15 SC1_R
R_OUT D1103 15
R1106 R_OUT
14 30V R1104 75 R1134
RGB_GND 14 0
OPT 75 1% RGB_GND REC_8
13 1%
R_GND 13
R_GND R1125
12 R1105 62K
D2B_OUT 0 12
D2B_OUT SC2_ID
11 SC1_G
G_OUT D1104 11 R1132
R1101 G_OUT
30V 1% 11K
10 75
D2B_IN OPT 10
D2B_IN
9 R1137
G_GND 9
G_GND 75
8 SC1_ID 002:E16
ID R1118 8
R1123 ID
7 SC1_B D111162K D1118 L1105
B_OUT 30V 11K 7 30V 120-ohm R1121
D1109 R1102 B_OUT 10K
6 30V 75 OPT OPT SC2_L_IN
AUDIO_L_IN 6

R1127
OPT 1% AUDIO_L_IN
5 C1120

12K
B_GND 5 D1116R1116 C1123
B_GND 5.6V OPT 330pF
4
AUDIO_GND 4 OPT 470K 50V
AUDIO_GND
3 R1110
AUDIO_L_OUT 3
10K AUDIO_L_OUT L1106
2 SC1_L_IN
AUDIO_R_IN 2 120-ohm R1128
L1101 C1103 AUDIO_R_IN 10K
1 R1103 120-ohm 330pF R1112 SC2_R_IN
AUDIO_R_OUT D1108 1

R1129
470K C1101 50V 12K AUDIO_R_OUT
5.6V OPT

12K
C1121 C1124
OPT D1117 R1115 OPT 330pF
5.6V
PSC008-01 PSC008-01 OPT
470K 50V
JK1100 R1108 JK1101
10K L1108
SC1_R_IN 002:S14 BLM18PG121SN1D R1164
0
L1100 C1102 DTV/MNT_L_OUT
D1107 120-ohm
R1100 C1100 330pF R1111 C1112
5.6V OPT 12K
OPT 470K 50V 1000pF
D1114 50V C1117
5.6V 4700pF
OPT
L1102
BLM18PG121SN1D R1135
0 L1107
TV_L_OUT 009:N17 BLM18PG121SN1D R1163
C1110 0
C1116 DTV/MNT_R_OUT
1000pF
D1105 50V 4700pF
5.6V C1114
OPT C1118
1000pF
L1103 4700pF
D1113 50V
BLM18PG121SN1D R1160 5.6V
0 OPT
TV_R_OUT 009:N20

D1100 C1111 C1115 IC1103


5.6V 1000pF 4700pF LM324D
OPT 50V
R1191 R1196
2.2K 1 14 2.2K
TV_L_OUT 1 14 DTV/MNT_R_OUT
CONTROL KEY & BREATHING LED

R1194
R1193

470K

OPT
R1145 R1155

470K
OPT
C1133 2 13 C1135
10uF 33K 33K 10uF
2 13 +3.3V

R1147

R1153
16V 16V

10K

10K
C1127
+12V +12V 33pF 3 12 C1129 33pF
[SCART2 PIN 8] R1143
5.6K
3 12
R1157

G
SCART1_Lout SCART2_Rout
4 11 5.6K
4 11 R1402
0
C1126 SCL_SUB/AMP

S
R1184 R1144 R1158
0.1uF 5.6K 5 10 5.6K

Q1302
2N7002K
15K R1185 R1187 C 50V SCART1_Rout 5 10 SCART2_Lout R1401
0 0 0
R1176 B Q1118 R1146 R1156 SDA_SUB/AMP
R1178 P1402
2SC3052 33K 6 9 33K

G
2K 10K 6 9
R1186
R1148

R1154
OPT 12507WR-12L
R1188 E
10K

10K
12K +3.3V_ST
51K C1128 33pF 7 8 C1316 33pF
OPT

S
C R1190 7 8 R1197

Q1303
2N7002K
2.2K 2.2K

R1408

R1400
B Q1117 TV_R_OUT DTV/MNT_L_OUT 1

4.7K

4.7K
001:AJ19 SC_RE1

R1195
2SC3052 D1404
R1192

470K
R1180 C1134
470K

OPT
R1177 C1136 JP1402 ADMC5M03200L
OPT

1K E 10uF 10uF 5.6V


560 16V 2
P1401 16V
OPT
C 12507WR-10L JP1400 R1403
L1401 012:I3
100 1%
B Q1116 3 KEY1
001:AJ19 SC_RE2 REC_8 009:AL8 D1403 BG2012B080TF
2SC3052 JP1412
R1181 JP1410 ADMC5M03200L R1404 012:I3
1 L1402
R1179
680
1K E
IR & EYE-Q 4

JP1409
5.6V
BG2012B080TF
100 1%
KEY2

OPT 2 +5V_ST
5
R1411 JP1408 L1403
0
3 SCL_SUB/AMP CB3216PA501E
D1400 6
JP1413 ADMC5M03200L
5.6V R1409 JP1407 C1412
0 ZD1403 ZD1401 C1410 C1409 C1413
4 SDA_SUB/AMP 1000pF
TV_L_OUT +3.3V +3.3V_ST 7 5.6B 0.1uF 0.1uF 0.1uF
5.6B 50V
JP1414 C1401 C1400 +5V_ST
1000pF 1000pF
Q1126 R1149 5 50V R1405
50V 8
R1141 D1401 L1407 WARM_LED_ON
2SC3052 R1119 R1120
2K 10K ADMC5M03200L CB3216PA501E JP1403 C1416 4.7K
10K 10K 5.6V R1406
6 0 0.1uF
D1120 9
JP1415 ST_LED
Q1130 ENKMC2838-T112 C1405 C1403
A1 +5V_ST
RT1P141C-T112 SB_MUTE 7 0.1uF 1000pF
TV_R_OUT C 50V 10
A2 JP1416 L1400
3 1 SCART1_MUTE L1404 JP1411
8 +3.3V +3.3V_ST CB3216PA501E
R1151 IR 012:G6

CB3216PA501E
CB3216PA501E
C1131 11
Q1127 2 JP1417 BG2012B080TF
0.1uF ZD1400 C1402
2K JP1406

L1406

L1405
2SC3052 5.6B 100pF R1407 C1406 C1415
9
50V 100

OPT
12 0.1uF 1000pF
JP1418 LED_ON 50V
JP1404
10

R1708
13

10K
DTV/MNT_L_OUT JP1419 C1417 C1404
11
0.1uF 1000pF
50V
Q1128 R1150
2SC3052
2K +5V_ST
D1119
RT1P141C-T112 ENKMC2838-T112
Q1131 A1
SB_MUTE +5V_ST R1301
DTV/MNT_R_OUT C 10K
A2 OPT
3 1 SCART2_MUTE 22 R1300
IR_OUT
R1152 2
C1132 R1303
10K
C
OPT
KEY1 : POWER / INPUT / MENU / ENTER
Q1129 0.1uF OPT 10KR1302 B Q1300
2SC3052
2K
OPT
2SC3052 KEY2 : VOL- / VOL+ / CH- / CH+
C
E
47K R1304B Q1301
2SC3052
OPT
E
close to wafer
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SCART 11 12
SCART

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
Attenuation Rev(4)
+3.3V_TUNER +3.3V_TUNER
R12004.7K FE_RESET DVB-CI DETECT
OPT
845 OHM 1%
R1202
R1203 +3.3V_TUNER
22 820 OPT C1218
R1214 0.1uF
RF_ATTENUATION
OPT OPT 10 16V
FE_AGC_SPEED_CTL IC1201
R1201

NL17SZ08DFT2G
OPT OPT OPT (TUNER RESET GPIO OPTION)
OPT

C1200 C1201 C1203


0.1uF BAP70-02 TU_RESET FE_TS_VAL 1 5
0.1uF 2200pF
0

10 C1247
PIN Diode R1212 FE_TS_ERR 2
0.1uF
C1282
D1201 0.1uF 3 4
16V
50V 16V
BAP70-02
OPT TUNER RESET 16V
GND
FE_TS_VAL_ERR
Active High : ACTIVE LOW (SOFT RESET) 0.1uF R1241
for Attenuation at least 3mA C1227
C1231
47
0.1uF
16V
0.1uF
C1228 D_3.3V

TU_RESET
NEED TO VERY CLOSE TO RF LINE

0.1uF

0.1uF
BECAUSE THIS POINT MAKE ATTENUATOR +1.8V_TUNER

0.1uF
1000pF

4.99K
0.1uF
+3.3V_TUNER +5V_TUNER

C1225
+1.8V_TUNER

C1230
1%
C1219
C1221

C1223
R1215
C_+3.3V

R1221
C1214 0.1uF +1.2V

0
C1254 C1256 Rev(9)
15pF 15pF C152,155
50V 50V

VDDA_8

VDDA_7
VDDC_9

VDDC_8
VDDC_7

VDDC_6
VREF_N
18pF=>13pF=>15pF

VREF_P
X1201

GND_9

RESET
REXT

VI2C
L115

VDDAH_OSC
VSSAH_OSC
6.8nH=>12 nH =>6.8nH 20.25MHz

I2C_SDA2
I2C_SCL2
KCN-ET-0-0094 For Attenuation

VDDH_4
VDDL_4

VSSH_4
VSSL_4
I2S_DA
I2S_CL
48
47
46
45
44
43
42
41
40
39
38
37
JK1200 C1206 C1210
L1202 C1213 1000pF VDDA_1 GND_8 A_1.2V A_3.3V

TMS
TDO
1 36

TCK
TDI
56pF 39pF 0603CS-6N8XGLW2%

XO
XI
IN1 SDA R1224 100
1 2 35 FE_TUNER_SDA
GND_1 SCL R1225 C_+3.3V
0603CS-R39XGLW

2 5% 5% 6.8nH 3 34 100 FE_TUNER_SCL

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
C1238
0603CS-R27XGLW

D1200 IN2 4 33 VDDD_2


C1242 15pF C1244 C1245
RCLAMP0502B IC1200
L1201

270nH

C1211

6.8pF

GND_2 EXTREF I2S_WS PDN C1259 0 . 1 u F


L1203

390nH

0.1uF 68pF 68pF 48


OPT

5 32 1
2%

2%

C1212 0 . 1 u F L1204 EXTCHOKE X1 50V 50V VDDL_1 PDP C1260 0 . 1 u F


XC5000 X1202
47

R1242
6 31 31.875MHz 2

4.7K
X-TAL_1 GND_2
820nH 2% GND_3 7 30 GND_7 GND_1
1 4
X-TAL_2
VSSL_1 3 46 VDDAL_AFE2
2 3 C1243
C1209 1008CS-821XGLC VDDA_2 8 29 X2 GPIO1 4 45 VSSAL_AFE2
120pF C1216 0 . 1 u F VDDA_3 ADDRSEL R1237 47 MSTRT 44 SIF
9 28 15pF FE_TS_SYNC 5
5% VDDC_1 Rev(6)
C1217 0 . 1 u F 10 27 DDI2 R1238 47 MERR 6 IC1203 43 CVBS
C1239 FE_TS_ERR

1000pF
C140,141

C1268
Rev(5) GND_4 11 26 VDDC_5 33pF=>13pF=>15pF=>18pF R1239 47 VSSH_1 7 42 VDDAH_CVBS
FE_TS_SERIAL DRX3913K-XK

50V
C111 C1215 0.1uF VDDC_2 12 25 DDI1 0.1uF VDDH_1 8 41 VSSAH_CVBS
150pF->120pF R1229 TUNER_CVBS_IF_P
47 MCLK 9 40 INP

13
14
15
16
17
18
19
20
21
22
23
24
FE_TS_DATA_CLK R1240 47 MVAL INN
10 39
FE_TS_VAL FE_TS_DATA[0] R1230 47 MD0 VSSAH_AFE1

SIF
38

VIF
11 TUNER_SIF_IF_N

1000pF
GND_5

GND_6
VAGC

50V
VDDC_3

VDDC_4
+1.8V_TUNER

VDDA_4

VDDA_5

VDDA_6

0 . 1 u F VDDD_1
FE_TS_DATA[1] R1231

TESTMODE

C1269
+3.3V_TUNER 47 MD1 12 37 VDDAH_AFE1
FE_TS_DATA[2] R1232 MD2 VDDAL_AFE1
47 13 36 R1249
L1207 FE_TS_DATA[3] R1233 6.8K
47 MD3 VSSAL_AFE1
+1.8V_TUNER LQH32MN2R2K23L 2.2uH 14 35
VSSL_2 IF_AGC

0.1uF
0.1uF

0.1uF

0.1uF
0.1uF
15 34 IF_AGC
VDDL_2 16 33 RF_AGC
C1234 C1237 C1264
0.1uF 0.1uF 0.027uF

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
C1220
C1222

C1224

C1226
C1229

C1232
16V

I2C_SCL1
I2C_SDA1

GPIO2
VSSL_3
VSSH_2

VSSH_3
MD4
MD5
MD6
MD7

RSTN
VDDL_3
VDDH_2

VDDH_3

VSYNC

SAW_SW
R1218
1K C_+3.3V
IF_AGC
C1233 FE_TS_DATA[4] R1234 47
0.1uF FE_TS_DATA[5] R1235
50V 47 R1247
+5V_TUNER FE_TS_DATA[6] R1236
47 4.7K
FE_TS_DATA[7] R1228 47
R1248
FE_RESET
C1240 100
R1219 0.1uF
390 16V C1257
0.1uF
TUNER_SIF_IF_N R1245 R1246 16V
002:S16;010:AM11 100 100

50V 50V
R1216 E FE_TS_DATA[0-7] 10pF 10pF
C1252 C1255
680 Q1204
ISA1530AC1
L1206 B
MLF1608A2R7J C1236
2.7uH 5% C
10pF
50V

Place the Buffer close to Tuner

FE_DEMOD_SCL
FE_DEMOD_SDA
+5V_TUNER

C1241 +1.2V A_1.2V


R1220 0.1uF
390 16V L1211
CIC21J501NE
TUNER_CVBS_IF_P
C1262 C1265 C1271
Rev(5) 10uF 0.1uF 0.1uF C1274 C1277
R1217 E C160 MLCC 16V 16V 0.1uF 0.1uF
16V
680 Q1205 16V 16V
ISA1530AC1
L1205 B
MLF1608A2R7J C1235
2.7uH 5% C
10pF
50V

+3.3V_TUNER A_3.3V
L1212
CIC21J501NE

16V 16V 16V 16V 16V 16V


+5V_TUNER +1.2V 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C1263 C1266 C1267 C1272 C1275 C1278

CIC21J501NE
L1208
+5V_GENERAL
+5V_TUNER IC1202
AZ1117H-1.2TRE1 +3.3V_TUNER C_+3.3V+3.3V_TUNER
L1213 D_3.3V
CIC21J501NE
IN OUT L1209
CIC21J501NE L1210
ADJ/GND CIC21J501NE
C1279 C1248 C1250 C1251
C1281 C1280 C1249
100uF 100uF 0.1uF
0.1uF 0.1uF 22uF 0.1uF C1261
16V 16V 50V C1253 C1258 C1270
16V 16V 16V 50V C1273 C1276
0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 0.1uF 0.1uF
16V
16V 16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER 12 12
UNER

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
SPI FLASH +3.3V_MEMC

MEMC_RXE4-

MEMC_RXE3-

MEMC_RXE2-

MEMC_RXE1-

MEMC_RXE0-

MEMC_RXO4-

MEMC_RXO3-

MEMC_RXO2-

MEMC_RXO1-

MEMC_RXO0-
MEMC_RXEC-
MEMC_RXE4+

MEMC_RXE3+

MEMC_RXE2+

MEMC_RXE1+

MEMC_RXE0+

MEMC_RXOC-
MEMC_RXEC+

MEMC_RXO4+

MEMC_RXO3+

MEMC_RXOC+

MEMC_RXO2+

MEMC_RXO1+

MEMC_RXO0+
PANEL_POWER

0.1uF

CB3216PA501E
IC902

C903
R927

10K
W25X20AVSNIG

L907
M_XTALI
R925 56 R928 R929

M_XTALO
CS VCC
1 8
M_SPI_CZ
R926 56 DO
2 7
HOLD 100 100
M_SPI_DO
WP CLK R947 56 R930 R931
3 6
WP_FLASH_MEMC M_SPI_CK
R948 56 100

URSA_B0P

URSA_B1P
URSA_A0P

URSA_A1P

URSA_A2P

URSA_A3P

URSA_A4P
GND DIO 100

URSA_B0M

URSA_B1M
URSA_A0M

URSA_A1M

URSA_A2M

URSA_A3M

URSA_A4M
URSA_ACKP
4 5
M_SPI_DI C952 C953

URSA_ACKM
C951
R935 R936 +3.3V_MEMC 100uF
16V 1000pF 0 . 1 u F
100 100
+3.3V_MEMC +3.3V_MEMC_AVDD R945 R946
100 100 BLM18PG121SN1D

R938 R939 P900

L905 TF05-51S

BLM18PG121SN1D 100 100 +3.3V_MEMC_AVDD


+1.26V_MEMC

0.1uF
C904

C906

1uF
1

Placed on SMD-TOP R942 R943 2


L904 3
100 100

10V
10V
4

0.1uF
C901
22uF

C956 0 . 1 u F

C908
10uF
5

16V

C939
6

10uF
10uF
7

0.1uF
8

C937
C914
C912
9

10
URSA_B4M

AVDD_LVDS_1

AVDD_LVDS_2
11

R954 C907 10uF +3.3V_MEMC URSA_B4P 12

AVDD_PLL
URSA_B3M

GPIO[25]
13

GPIO_13
GPIO_14

GPIO_12

LVACKM
C905 URSA_B3P

LVACKP
GPIO_2
GPIO_1

GPIO_9
GPIO_8

GPIO_6
GPIO_4
820 14

ROCKN

LVA0M

LVA1M

LVA2M

LVA3M

LVA4M
RECKN

LVB0M

LVB1M
ROCKP
RECKP

GND_6

GND_5

GND_2

LVA0P

LVA1P

LVA2P

LVA3P

LVA4P

LVB0P

LVB1P
SDAM
XOUT

SCLM
RO4N

RO3N

RO2N

RO1N

RO0N

REXT
RE4N

RE3N

RE2N

RE1N

RE0N

RO4P

RO3P

RO2P

RO1P

RO0P
RE4P

RE3P

RE2P

RE1P

RE0P
15

XIN
URSA_BCKM

4.7K

R972 OPT 4.7K

4.7K
16

+3.3V_MEMC 10uF 10V URSA_BCKP 17

18
URSA_B2M

OPT
F11

F10
E11

OPT
B14

C10

B10
B11

C11
C12

B12

B13

C13
C14
B1

C1
C2

B2
B3

C3
C4

B4

B5

C5
C6

B6
B7

C7
C8

B8
G11

K15
K16

A14

D13
D11

B9

C9

A10

A11

A12

A13

D12
A1

A2

A3

A4

H8

A5

A6

A7

A8

H7

D4
D3

D5
D6
N7

G8

A9

D9
D7
V4 LGD BIT SEL URSA_B2P
19

R949 1K R992 100 SDAS D8 GPIO_5 20


MEMC_SDA E1 H or NC : 10 bit URSA_B1M

R970
100 SCLS GPIO_7 21

R978
R993 D1 D10 URSA_B1P
MEMC_SCL L : 8 bit 22
GPIO[8] F1 E10 GPIO_11 URSA_B0M 23

GPIO[9] GPIO_10 URSA_B0P


C928 G1 E3 R955
24

0.1uF GND_14 GPIO_3 BIT_SEL 25


+3.3V_MEMC K8 [E1] D2
R950 1K 22 OPT 26

OPT VDDC_1 E5 C15 LVB2P URSA_B2P URSA_A4M


GPIO12 GPIO14 011:AG22 [D1] 27

GPIO[10] E2 LVB2M URSA_B2M URSA_A4P 28


BIT_SEL B15
L908 URSA_A3M 29
URSAII LVDS TYPE GPIO[11] F2 A15 LVBCKP URSA_BCKP
LVDS_SEL BLM18PG121SN1D URSA_A3P
LOW LOW GPIO[12] F3 LVBCKM URSA_BCKM
30

VENUS (MST7329N) R941


A16 OPT 31
OPC_OUT2

R940
OPT 1K

1K
GPIO[13] G2 LVB3P URSA_B3P L909 URSA_ACKM 32
B16
BLM18PG121SN1D URSA_ACKP
OPT

URSAII MINI LVDS TYPE GPIO[22] M4 LVB3M URSA_B3M 33


LOW HIGH C16
M+S NORMAL 42"(MST7327N) GPIO[23] M5 LVB4P URSA_B4P OPC_EN 34

D15 URSA_A2M 35
L910 URSA_A2P
GPIO[14] G3 D16 LVB4M URSA_B4M 36
URSAII MINI LVDS TYPE BLM18PG121SN1D URSA_A1M
R957

R956

HIGH LOW GPIO[15] E4 AVDD_33_2 C949 37

M+S NORMAL 47"(MST7327N) F9 OPC_OUT1 URSA_A1P 38


1K

1K

GPIO[16] F4 G10 GND_4 URSA_A0M 39


L911 URSA_A0P
URSAII MINI LVDS TYPE GPIO[17] G4 E15 LVC0P URSA_C0P 40
HIGH HIGH BLM18PG121SN1D
41
M+S GIP 37"(MST7327N) GPIO[18] H4 E16 LVC0M 0.1uF URSA_C0M
PWM_DIM 42
GPIO[19] J 4 E14 LVC1P URSA_C1P 43

GPIO[20] K4 F14 LVC1M URSA_C1M R967 44


+3.3V_MEMC
45
L902 GPIO[21] L4 F16 LVC2P URSA_C2P LVDS_SEL
22 OPT OPT OPT OPT OPT
46
C929 VDDP_2 J6 F15 LVC2M URSA_C2M OPT OPT OPT OPT 47

0.1uF
0.1uF

0.1uF

0.1uF
10uF

0.1uF

0.1uF

C957
OPT
10uF
10V

0.1uF

0.1uF

C958
OPT

0OPT
GND_7 LVCCKP URSA_CCKP

C964

C963

C961

C960

C959
C962
48
BLM18PG121SN1D H9 G15
49
0.1uF 0.1uF GND_15K9 LVCCKM URSA_CCKM

0
G16 50

+1.8V_FRC_DDR G14 LVC3P URSA_C3P

R971

R973

R937

R979
51
C916

C917

URSA_DQ[0-31]

VDDC_2 F6 H14 LVC3M URSA_C3M 52


C926
URSA_DQ[20] MDATA[20] H1 H16 LVC4P URSA_C4P
Placed on SMD-TOP URSA_DQ[19] MDATA[19] H2 H15 LVC4M URSA_C4M
J15 LVD0P URSA_D0P V4 LGD LVDS SEL

IC900
22uF
16V

CONTACT TO MODULE FOR EMI URSA_DQ[17] MDATA[17] H3 J16 LVD0M URSA_D0M L or NC : VESA
URSA_DQ[22] MDATA[22] J1 J14 LVD1P URSA_D1P H : JEIDA
K14 LVD1M URSA_D1M
URSA_DQ[27] MDATA[27] J2
C909

URSA_DQ[28] MDATA[28]

LGE7329A
J3 C950 V4 LGD OPC P901

C919 0.1uF G9 GND_3 TF05-41S

L or NC : DISABLE
URSA_DQ[25] MDATA[25] K1 L14 LVD2P URSA_D2P
M2 H : ENABLE 1
URSA_DQ[30] MDATA[30] K2 L15 LVD2M 0.1uF URSA_D2M
2
MDS62110201
AVDD_DDR_2 K6 L16 LVDCKP URSA_DCKP URSA_D4M 3

DQM[3] LVDCKM URSA_DCKM URSA_D4P 4


URSA_DQM3 K3 M16 URSA_D3M 5
DQM[2] L1 F8 AVDD_33_1 URSA_D3P
URSA_DQM2 6
C920 0.1uF GND_10 J8 M15 LVD3P URSA_D3P 7

DQS[2] LVD3M URSA_D3M URSA_DCKM 8


URSA_DQS2 L2 M14 URSA_DCKP 9
DQSB[2] L3 N16 LVD4P URSA_D4P
URSA_DQSB2 10
M4 OPT AVDD_DDR_4 LVD4M C947 URSA_D4M URSA_D2M
L6 N15 11

VDDP_3 URSA_D2P 12
MDS62110201 L8 URSA_D1M 13
GND_8 H10 H6 VDDC_5 URSA_D1P 14
DQS[3] GPIO[24] 0.1uF +3.3V_MEMC URSA_D0M
C927 0.1uF M1 N6 15
URSA_DQS3 URSA_D0P
DQSB[3] M2 E12 GPIO[7] 16
URSA_DQSB3 17
AVDD_DDR_5 L7 D14 GPIO[6]
18
URSA_DQ[31] MDATA[31] M3 F12 GPIO[5] URSA_C4M 19
M5 URSA_C4P
URSA_DQ[24] MDATA[24] N1 E13 GPIO[4] 20

MDS62110201 URSA_C3M 21
C921 0.1uF GND_11 J9 F13 GPIO[3] URSA_C3P

R959

R963
22

1K

1K
URSA_DQ[26] MDATA[26] N2 G13 GPIO[2] 23

URSA_DQ[29] MDATA[29] GPIO[1] URSA_CCKM 24


M6 N3 H13 URSA_CCKP 25
AVDD_DDR_6 L10 J13 GPIO[0]
MDS62110201 26
URSA_DQ[23] MDATA[23] P1 K12 PWM0 URSA_C2M 27

URSA_DQ[16] MDATA[16] PWM1 URSA_C2P 28


R1 [N13] L12 URSA_C1M 29
M7 URSA_DQ[18] MDATA[18] T1 [L9] K13 CSZ URSA_C1P
+3.3V_MEMC [N12] M_SPI_CZ 30
URSA_DQ[21] MDATA[21] SDO URSA_C0M
MDS62110201 T2 [N5] M12 M_SPI_DO
31
URSA_C0P

R960

R964
OPT

OPT
MCLK[0] SDI

1K

1K
32
URSA_MCLK R2 [N4] M13 M_SPI_DI 33
MCLKZ[0] P2 L13 SCK
BLM18PG121SN1D URSA_MCLKZ M_SPI_CK 34
C925 0.1uF GND_1 GPIO[30]
G7 N14 35

AVDD_MEMPLL GPIO[29] 36

L903 L9 N13 37
MVREF GPIO[28]
N5 N12 38
ODT
C913

10uF

39
URSA_ODT N4 OPT

M11
K10

K11

H11

GPIO[27] N10
N11
R10

R11

R12

R13

R14

R15

R16
L11

T10

T11

T12

T13

T14

T15

T16
P10

P11

P12

P13

P14

P15

P16
J10

J11
40
0.1uF C922
N8

K7

GPIO[26] N9

G6
R3

R4

R5

R6

R7

R8

R9
T3

T4

T5

T6

T7

T8

T9
P3

P4

P5

P6

P7

P8

F7

P9

J7
R933 41
0
42

GND_9
DQS[0]

DQS[1]
DQSB[0]

DQSB[1]
WP_FLASH_MEMC
BADR[1]
BADR[0]

0.1uF

MCLK[1]
DQM[1]
DQM[0]
MADR[11]

MADR[10]

MADR[12]

MCLKZ[1]
MADR[0]
MADR[2]
MADR[4]

MADR[6]
MADR[8]

MADR[1]

MADR[5]
MADR[9]

MADR[7]
MADR[3]

RESET
WEZ
RASZ
CASZ

MDATA[11]
MDATA[12]

MDATA[14]

MDATA[15]

MDATA[10]
MDATA[13]
GND_12

GND_16

GND_13

GND_17
MDATA[4]
MDATA[3]

MDATA[1]
MDATA[6]

MDATA[9]

VDDP_1

MDATA[8]

MDATA[7]
MDATA[0]
MDATA[2]
MDATA[5]
VDDC_3

VDDC_4
MCLKE
AVDD_DDR_7

AVDD_DDR_3

AVDD_DDR_1
GPIO8 PWM1 PWM0

C923
I2C HIGH LOW HIGH

+3.3V_MEMC

0.1uF
0.1uF

0.1uF

C944
C938

EEPROM HIGH HIGH LOW

0.1uF
C941

XTAL SPI HIGH HIGH HIGH


R934 1M

R994
C945

10K
C932

C933

C934

C935
R951

C936
10K

M_XTALO M_XTALI
X900 MEMC_RESET
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

R953
12MHz C902

0
ISP Port for FRC
URSA_A[11]

URSA_A[10]

URSA_A[12]

C900 20pF
URSA_A[0]
URSA_A[2]
URSA_A[4]

URSA_A[6]
URSA_A[8]

URSA_A[1]

URSA_A[5]
URSA_A[9]

URSA_A[7]
URSA_A[3]

20pF
P902
0.1uF

C918

12507WR-04L
R952

C924
1uF
10K

URSA_DQ[11]
URSA_DQ[12]

URSA_DQ[14]

URSA_DQ[15]

URSA_DQ[10]
URSA_DQ[13]
URSA_DQ[4]
URSA_DQ[3]

URSA_DQ[1]
URSA_DQ[6]

URSA_DQ[9]

URSA_DQ[8]

URSA_DQ[7]
URSA_DQ[0]
URSA_DQ[2]
URSA_DQ[5]
1

URSA_DQ[0-31] 3 MEMC_SCL 001:E20;011:I22

4 MEMC_SDA 001:E20;011:I22
URSA_A[0-12]

5
URSA_BA1
URSA_BA0

URSA_DQS0

URSA_DQS1
URSA_RASZ
URSA_CASZ

URSA_DQSB0

URSA_DQSB1
URSA_WEZ

URSA_DQM1
URSA_DQM0

URSA_MCLK1
URSA_MCLKZ1
URSA_MCLKE

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FRC 9 12

Copyright © 2009 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
DDR2 1.8V By CAP - Place these Caps near Memory

+1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR

10V

10V

C1024

C1026

C1028

C1029

C1031

C1033

C1034

C1035

C1036

C1037

C1038

C1039

C1040
C1025

C1027

C1041
C1013

C1023

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
C1002

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
10uF
C1003

C1004

C1005

C1006

C1007

C1009

C1011

C1012

C1014

C1015

C1016

C1017

C1018

C1019

C1020

C1022

0.1uF

0.1uF
C1001

10uF
10uF

10uF
10uF
+1.8V_FRC_DDR +1.8V_FRC_DDR

R1001

1K1%

R1037
1K1%
URSA_A[0-12]
011:AA4;012:AL20 URSA_DQ[0-31] URSA_DQ[0-31] 011:AA4;012:E20

1K 1%

R1038
1K1%
R1002

C1030

0.1uF
C1010

0.1uF
AR1000 IC1000 IC1001 AR1004
URSA_DQ[27] DDR_DQ[27] DDR_DQ[15] URSA_DQ[15]
URSA_DQ[28] DDR_DQ[28]
H5PS5162FFR-S6C H5PS5162FFR-S6C DDR_DQ[8] 56 URSA_DQ[8]
URSA_DQ[25] 56 DDR_DQ[25] DDR_DQ[10] URSA_DQ[10]
URSA_DQ[30] DDR_DQ[30] DDR_DQ[13] URSA_DQ[13]
DDR_DQ[16] DQ0 G8 J2 VREF VREF J2 G8 DQ0 DDR_DQ[0]
AR1001 DDR_DQ[17] DQ1 G2 G2 DQ1 DDR_DQ[1] AR1005
URSA_DQ[22] DDR_DQ[22] DDR_DQ[7] URSA_DQ[7]
DDR_DQ[18] DQ2 URSA_A[3] AR1010 DDRA_A[3] DQ2 DDR_DQ[2]
URSA_DQ[17] DDR_DQ[17] H7 A0 DDRB_A[0] DDRA_A[0] A0 H7 DDR_DQ[0] URSA_DQ[0]
M8 DDRB_A[10] AR1013 URSA_A[10] URSA_A[1] 22 DDRA_A[1] M8 56
DDR_DQ[19] DQ3 DQ3 DDR_DQ[3]
DDR_DQ[16-31]

URSA_DQ[19] 56 DDR_DQ[19] H3 A1 DDRB_A[1] DDRA_A[1] A1 H3 DDR_DQ[2] URSA_DQ[2]

DDR_DQ[0-15]
DDR_DQ[20] DQ4 M3 DDRB_A[1] 22 URSA_A[1] URSA_A[10] DDRA_A[10] M3 DQ4 DDR_DQ[4]
H1 H1

DDRB_A[0-12]
URSA_DQ[20] DDR_DQ[20] M7 A2 DDRB_A[2] DDRA_A[2] A2 M7 DDR_DQ[5] URSA_DQ[5]

DDRA_A[0-12]
DDR_DQ[21] DQ5 H9 DDRB_A[3] URSA_A[3] H9 DQ5 DDR_DQ[5]
N2 A3 DDRB_A[3] DDRA_A[3] A3 N2
AR1002 DDR_DQ[22] DQ6 DDRB_A[9] URSA_A[9] URSA_A[9] DDRA_A[9] DQ6 DDR_DQ[6] AR1006
URSA_DQ[31] DDR_DQ[31] F1 A4 DDRB_A[4] DDRA_A[4] A4 F1 DDR_DQ[11] URSA_DQ[11]
DDR_DQ[23] DQ7 N8 DDRB_A[12] AR1014 URSA_A[12] URSA_A[12] AR1011 DDRA_A[12] N8 DQ7 DDR_DQ[7]
URSA_DQ[24] DDR_DQ[24] F9 A5 DDRB_A[5] DDRA_A[5] A5 F9 DDR_DQ[12] 56 URSA_DQ[12]
DDR_DQ[24] DQ8 N3 DDRB_A[7] 22 URSA_A[7] URSA_A[7] 22 DDRA_A[7] N3 DQ8 DDR_DQ[8]
URSA_DQ[26] 56 DDR_DQ[26] C8 A6 DDRB_A[6] DDRA_A[6] A6 C8 DDR_DQ[9] URSA_DQ[9]
DDR_DQ[25] DQ9 N7 DDRB_A[5] URSA_A[5] URSA_A[5] DDRA_A[5] N7 DQ9 DDR_DQ[9]
URSA_DQ[29] DDR_DQ[29] C2 A7 DDRB_A[7] DDRA_A[7] A7 C2 DDR_DQ[14] URSA_DQ[14]
DDR_DQ[26] DQ10 P2 DDRB_A[0] URSA_A[0] URSA_A[2] DDRA_A[2] P2 DQ10 DDR_DQ[10]
D7 A8 DDRB_A[8] DDRA_A[8] A8 D7
AR1003 DDR_DQ[27] DQ11 P8 DDRB_A[2] AR1015 URSA_A[2] URSA_A[0] AR1012 DDRA_A[0] P8 DQ11 DDR_DQ[11] AR1007
URSA_DQ[23] DDR_DQ[23] D3 A9 DDRB_A[9] DDRA_A[9] A9 D3 DDR_DQ[6] URSA_DQ[6]
DDR_DQ[28] DQ12 P3 DDRB_A[4] 22 URSA_A[4] URSA_A[6] 22 DDRA_A[6] P3 DQ12 DDR_DQ[12]
URSA_DQ[16] DDR_DQ[16] D1 A10/AP DDRB_A[10] DDRA_A[10] A10/AP D1 DDR_DQ[1] 56 URSA_DQ[1]
DDR_DQ[29] DQ13 M2 DDRB_A[6] URSA_A[6] URSA_A[4] DDRA_A[4] M2 DQ13 DDR_DQ[13]
URSA_DQ[18] 56 DDR_DQ[18] D9 A11 DDRB_A[11] DDRA_A[11] A11 D9 DDR_DQ[3] URSA_DQ[3]
DDR_DQ[30] DQ14 P7 AR1017 AR1019 P7 DQ14 DDR_DQ[14]
URSA_DQ[21] DDR_DQ[21] B1 A12 DDRB_A[12] B_URSA_RASZ URSA_RASZ URSA_RASZ A_URSA_RASZ DDRA_A[12] A12 B1 DDR_DQ[4] URSA_DQ[4]
DDR_DQ[31] DQ15 R2 R2 DQ15 DDR_DQ[15]
B9 B_URSA_CASZ URSA_CASZ URSA_CASZ A_URSA_CASZ B9
DDRB_A[11] URSA_A[11] URSA_A[8] 22 DDRA_A[8]
+1.8V_FRC_DDR L2 BA0 DDRB_A[8] URSA_A[8] URSA_A[11] DDRA_A[11] BA0 L2
B_URSA_BA0 A_URSA_BA0 +1.8V_FRC_DDR
L3 BA1 22 BA1 L3
VDD5 B_URSA_BA1 A_URSA_BA1 VDD5
A1 R1005 22 R1024 22 A1
VDD4 URSA_MCLK 011:H11 011:Z4 URSA_MCLK1 VDD4
R1000

E1 E1

R1039
OPT

OPT
VDD3 CK CK VDD3
150

150
J9 J8 J8 J9
VDD2 M9 K8 CK R1006 22 R1025 22 CK K8 M9 VDD2
URSA_MCLKZ 011:H10 011:AA4 URSA_MCLKZ1
VDD1 R1 K2 CKE CKE K2 R1 VDD1
B_URSA_MCLKE 012:T10 012:V9 A_URSA_MCLKE

K9 ODT R1008 22 R1027 22 ODT K9


URSA_ODT 011:H10;012:Y14 011:H10;012:Q14URSA_ODT
VDDQ10 A9 L8 CS CS L8 A9 VDDQ10
VDDQ9 C1 K7 RAS RAS K7 C1 VDDQ9
B_URSA_RASZ 012:R16 012:X16 A_URSA_RASZ
VDDQ8 C3 L7 CAS CAS L7 C3 VDDQ8
B_URSA_CASZ 012:R16 012:X16 A_URSA_CASZ
VDDQ7 C7 K3 WE WE K3 C7 VDDQ7
B_URSA_WEZ 012:T10 012:V8 A_URSA_WEZ
VDDQ6 C9 C9 VDDQ6
VDDQ5 E9 E9 VDDQ5
F7 LDQS R1012 56 R1031 56 LDQS F7
VDDQ4 URSA_DQS2 011:H14 011:W4 URSA_DQS0 VDDQ4
G1 UDQS R1013 56 R1032 56 UDQS G1
VDDQ3 B7 URSA_DQS3 URSA_DQS1 B7 VDDQ3
G3 011:H13 011:X4 G3
VDDQ2 G7 G7 VDDQ2
VDDQ1 G9 F3 LDM R1014 56 R1033 56 LDM F3 G9 VDDQ1
URSA_DQM2 011:H15 011:V4 URSA_DQM0
B3 UDM R1015 56 R1034 56 UDM B3
URSA_DQM3 011:H15 011:V4 URSA_DQM1

VSS5 A3 E8 LDQS R1016 56 R1035 56 LDQS E8 A3 VSS5


URSA_DQSB2 011:H14 011:W4 URSA_DQSB0
VSS4 E3 A8 UDQS R1017 56 R1036 56 UDQS A8 E3 VSS4
URSA_DQSB3 011:H13 011:X4 URSA_DQSB1
VSS3 J3 J3 VSS3
VSS2 N1 N1 VSS2
L1 NC4 AR1016 NC4 L1
VSS1 P9 P9 VSS1
NC5 B_URSA_BA0 URSA_BA0 011:Q4;012:T9 NC5
R3 R3
NC6 B_URSA_BA1 URSA_BA1 011:Q4;012:T9 NC6
R7 R7
012:Q14 B_URSA_MCLKE URSA_MCLKE 011:S4;012:T9
VSSQ10 012:Q13 B_URSA_WEZ URSA_WEZ 011:Q4;012:T8 VSSQ10
B2 NC1 22 NC1 B2
VSSQ9 A2 A2 VSSQ9
B8 NC2 AR1018 NC2 B8
VSSQ8 E2 E2 VSSQ8
A7 NC3 011:Q4;012:V10 URSA_BA0 A_URSA_BA0 NC3 A7
R8 012:AA15 R8
VSSQ7 D2 +1.8V_FRC_DDR D2 VSSQ7
+1.8V_FRC_DDR 011:Q4;012:V10 URSA_BA1 A_URSA_BA1 012:AA15
VSSQ6 D8 D8 VSSQ6
0 1 1 : S 4 ; 0 1 2 : V 1 0URSA_MCLKE A_URSA_MCLKE 012:Z14
VSSQ5 E7 VSSDL VSSDL E7 VSSQ5
J7 011:Q4;012:V10 URSA_WEZ A_URSA_WEZ 012:Y13 J7
VSSQ4 22 VSSQ4
F2 F2
VSSQ3 F8 F8 VSSQ3
VSSQ2 H2 H2 VSSQ2
VSSQ1 H8 J1 VDDL VDDL J1 H8 VSSQ1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX60890801 2009.04.16
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FRC DDR2 10 12

Copyright © 2009 LG Electronics. Inc. All right reserved.


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