Documente Academic
Documente Profesional
Documente Cultură
The main oscillator uses a 10 MHz crystal (Y1) which serves as the controller’s primary oscillator.
A second circuit, using a 32.768 kHz (watch type) crystal (Y2), functions as the Timer1 oscillator, the source for
the Real-Time Clock/Calendar (RTCC) and secondary oscillator.
The PIC18LF2450, the heart of the RS-232 to USB conversion, is independently clocked with its own 12 MHz
crystal (Y3).
2.6.4 PLL IN INTOSC MODES
The 4x Phase Locked Loop (PLL) can be used with the internal oscillator block to produce faster device clock
speeds than are normally possible with the internal oscillator sources.
When enabled, the PLL produces a clock speed of 16 MHz (4 X 4 MHz) or 32 MHz (4 x 8 MHz).
Unlike HSPLL mode, the PLL is controlled through software. The control bit, PLLEN (OSCTUNE), is used to enable
or disable its operation.
The PLL is available when the device is configured to use the internal oscillator block as its primary clock source
(FOSC = 1001 or 1000).
Additionally, the PLL will only function when the selected output frequency is either 4 MHz or 8 MHz (OSCCON
= 111 or 110).
If both of these conditions are not met, the PLL is disabled and the PLLEN bit remains clear (writes are ignored).
2.6.5 INTOSC FREQUENCY DRIFT
The factory calibrates the internal oscillator block output (INTOSC) for 8 MHz. However, this frequency may
drift as VDD or temperature changes and can affect the controller operation in a variety of ways.
It is possible to adjust the INTOSC frequency by modifying the value in the OSCTUNE register. Depending on the
device, this may have no effect on the INTRC clock source frequency. Tuning the INTOSC source requires
knowing when to make the adjustment, in which direction it should be made and in some cases, how large a
change is needed.
The PIC18F8722 family of devices can be operated in ten different oscillator modes.
The user can program the Configuration bits, FOSC, in Configuration Register 1H to select one of these ten
modes:
3. HS High-Speed Crystal/Resonator (10 MHz for our development board, primary clock)
5. RC External Resistor/Capacitor with FOSC/4 output on RA6 (NOT for our development board)
6. RCIO External Resistor/Capacitor with I/O on RA6 (NOT for our development board)
7. INTIO1 Internal Oscillator with FOSC/4 output on RA6 and I/O on RA7
This can be done using the external clock source of 10 MHz and using the PLL (Phase Lock Loop) option in order
to multiply by 4 the frequency Fosc = 4 x 10 MHz = 40 MHz
Step 1: Set CONFIG1H to right values from REGISTER 25-1 (pp. 299)
Since CONFIG1H is a configuration register, his value can be modified only from MPLAB IDE, with option “HS
oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)”
OSCCON.SCS<1:0> = 00
#include <xc.h>
//#include <delays.h>
do {
Delay10TCYx(1);
} while(--unit != 0);
do {
Delay10KTCYx(1);
} while(--unit != 0);
void delay_time()
if (milisec > 0)
my_delay_mili_sec(milisec);
if (microsec > 0)
my_delay_micro_sec(microsec);
void main(){
time_delay = 0.125;
milisec = time_delay*1000;
TRISA = 0xFF;
TRISB = 0xFF;
LATD = 0x00;
TRISD = 0x0;
// configure OSCON for primary clock for XTAL = 10 MHz
OSCCON = 0x00;
while(1)
if(PORTBbits.RB0 == 0)
{ LATD = 0x01;
delay_time();
LATD = LATD<<1;
delay_time();
else{
LATD=0x00;
if(PORTAbits.RA5 == 0)
{ LATD = 0x80;
delay_time();
LATD = LATD>>1;
delay_time();
else
LATD = 0x00;
Atunci frecvenţa clockului de system va fi de 4 ori mai mica, deoarece efectul PLL de multiplicare cu 4 a
frecvenţei de oscilaţie dispare.