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Unul dintre circuitele conectate la LIN trebuie să fie master, iar celelalte
slave. Masterul generează un nivel space pe perioada 13-16 biţi urmat de
Descrierea protocolului un cuvânt 55H.
Aplicatii specifice
Mirror LIN
Lock Plafon:
Lock Window Lift (cantitate mare de cabluri ) Directie:
Universal Light (Multe elemente de control sunt pozitionate
Senzor de ploaie, Senzor pe trenul de rulare)
CAN Light limina, Control lumina, Cruise Control, stergatoare,
panoramic … Turning Light, …
Seat (Senzorul de ploaie trebuie sa
Instruments
Htng Optional: Climate Control,
fie interogat la fiecare 10-
Htng Wiper
20ms) Radio, Telephone, etc.
Power Train Central WHtg
ITS Body Ctrl Roof Interior
Light
Climate
Htng Trunk Scaun:
x6 Pozitii motore scaune,
Seat
Light Seat Occupancy Sensor,
Htng Panou de control
St-Wheel Panel CAN
•Usa/fereastra/scaun:
Universal Motor
Oglinda,Central ECU, Climatizare:
Lock Lock Switch, fereastra, Multe motoare mici
1 backbone, 13 nodes
8 subnets, 1-8 local nodes Sub-Bus
Universal Panel Switch control scaun, Panou Control
52 nodes total
Mirror Usa inchisa, etc.
1
LIN Consortium
Consortium format in 1998.
25.6M D2B, MOST
token ring ONE Semiconductor Supplier (Motorola)
optical bus One tool Supplier (VCT)
Byteflight
optical bus
2M
Lansat in 2000
Vietza [bit/s]
1 2 4.5 10
cost per node [$]
2
LIN Standard - Overview Structura retea/magistrala
ECU
(numai functii
relevante LIN)
Tools
Magistrala continua
ierarhica
LIN Conformance Test Specification
Operating System
Network Configuration
Communication Manager LIN Config. Language
Generator (LCFG)
Bus Analyzer
• Sub retelele/magistralele sunt necesare pentru a reduce incarcarea retelei principale
Hardware Bus Transceiver
(LINSpector)
Level
• CAN • Serial Sub Bus
LIN Physical Layer Spec. LIN Physical Layer Spec. - fara standard Magistrala sistem
+Magistrala Automotive Standard
+Compatibila cu Magistrala Principala - nu este compatibila cu Magistrala Principala
Vehicle Network + ieftin
- Scumpa (Dimeniune standard/ 2 fire)
+ SCI-Based: Interfata exista chiar si pe cele mai ieftine dispozitive
+ Interfata poate fi foarte usor reconstruita de ASIC or CPLD
+ Protocolul poate fi facut Software
3
Master / Slave Protocol Protocol Master / Slave
• Master Task
• Master
– Stabilește ordinea și prioritatea mesajelor.
– Are controlul asupra intregii Magistrale si a Protocolului
– Monitorizeaza Datele si verifica bitii; controleaza Masterul controleaza care mesaj la care timp urmeaza a fi transmis
error handler. pe magistrala. Se ocupa si de manipularea/coordonarea erorilor.
– Servește ca o referință cu baza sa de ceas (ceas Pentru indeplinirea acestor sarcini Masterul:
• Trimite Sync Break
stabil necesar)
• trimite Sync Byte
– Primeste Wake- Up Break de la nodurile slave • Trimite ID-Field
• Monitorizeaza Data Bytes and Check Byte, si ii evalueaza
• Slave Task • primeste WakeUp Break de la nodurile slave cand magistrala
este inactiva si cand solicita unele actiuni.
– Este unul din cei 2-16 membri de pe magistrala
• Serveste ca referinta cu baza sa de timp (necesar un clock
– Primește sau transmite date atunci când i se stabil)
adreseaza prin ID de catre Master.
– Nodul care serveste ca master poate fi slave, de
asemenea!
4
Transmiterea datelor Message Frame
master control unit • Synch Byte:
polling slave control unit slave control unit
– Model specific pentru determinarea Time Base
master task (Determinarea timpului intre doua fronturi crescatoare)
slave task slave task slave task – Un Synch Byte precede orice Message Frame
• ID-Field:
inter-frame
13 bit
spacing
synch identifier – Message Identifier: Incorporeaza Informatia despre
field field next synch field
Break
$55
Next 13 bit break
expeditor, receptor/receptori, scopul si Lungimea
Master Task campului Datei.
2 byte 1 byte
time Lungime 6 Bit.
response
spacing data block parity 4 clase de 1/2/4/8 Data Bytes. Codificarea lungimii
este un confifuratia
Slave Task
time 2 LSB ai ID-Field. Fircare clasa are 16 Identificatori.
Un total de 64 Mesaje de Identificare sunt disponibile.
– 2 Bits de Paritate protejeaza aceasta inalta
sensibilitatea ID-Field.
5
LIN Communication - Data LIN Communication - Data
from Slave to Master from Master to Slave(s)
Master Node Slave Node Master Node Slave Node A
identificator synch field synch break
LIN Master Task Slave Task Rec LIN Master Task Slave Task Rec
quartz
quartz
Slave Task Rec Slave Task Trans Slave Task Rec Slave Task Trans
data byte data byte checksum
Slave Task Trans Slave Task Trans
Slave Node B
6
Sincronizare Frame (1) Sincronizare Frame (2)
Conditii intiale: +/- 15% precizia ratei de transfer pentru Master
Conditii intiale: +/- 4% precizie relativa a ratei de transfer pentru
O pauza de sincronizare de cel putin 13 bit (durata perioadei) pentru
sursa
a permite o acuratete a LIN slave
Un standard de transmitere a datelor va necesita Trimitere
exacta si rata de transfer a receptorului
Mesaj UART
Standard UART byte
1 10 13
Start-Bit
Start-Bit Masterul trimite o bauza (durata perioadei 13 bits sau mai mult)
Stop bit
un UART cu eroare a ratei de transfer
<4% va citi datele corect Un slave lent poate vedea mai putine perioade bit
1 2 11
Sincronizare Bit
• Un bit de strat la un nivel logic low indica
Bit Sampling
inceputul unui Byte, ultimul se completeaza
cu un bit cu nivel logic high care indica bit-ul
de stop
Start-Bit Stop-Bit
Sample Clock
7
Sincronizare Bit Interfata fizica LIN
Start-Bit Stop-Bit Usual
coordonata de
LIN Control Unit un emitator
Bus Voltage
Dupa recunoasterea Nivelului Low in bitul de start, data este esantionata la
o rata de 16 ori mai mare decat rata de biti asteptata Cele 3 esantioane din VBAT
8...18V
mijloc trebuie sa fie identice pentru a fi siguri ca nu avem o eroare de recessive
receptie in procesul de transmitere date. Ω
master: 1kΩ logic ‘1’
Ω
slave: 30kΩ 60%
controlled slope
Un bit de stop este asteptat dupa 1 bit de start si 8 cu date intr-un mesaj ~2V/µs
Rx Bus 40%
tipic UART dominant
Tx
logic ‘0’
GND
Time
Sample Clock
Example capacitati
master: 2.2nF
slave: 220pF
8
Latency optimisation with LIN Variables Scheduling
Basic schedule
Sub
Window Lock Mirror Master Keyboard Schedule Table
Status Status Status Command Status Alternate Sub Schedule Table
Schedule Table Main
Schedule Table Sub Schedule Table
• Problem
LIN User provided
– Specific node communication required but this takes up too Configuration Information
much time for all network messages Description File (Target-Hardware-
Information)
• Solution : Event Triggered frame:
LIN
– Header is sent out Configuration
Tool
• normal case: no answer LIN LIN
LIN API
LIN Application
• Rare response: only one node responds Bus-Emulator Bus-Analyzer
& Configuration
ECU Application
Code
Code
• Very rare response : several nodes respond
simultaneously
• Cases 1 and 3 are exceptions that should be addressed at the LIN-Bus
Compiler / Linker
application design.
Target
• Event triggered messaging is complementary to the regular ECU ECU ECU Image
signal based messaging scheme
9
LIN Configuration Description
Taking account of Ground-Shift
File The detection point for data transitions can be affected by voltage references. Ground shift
• Includes all essential information of can change this reference by a significant amount, affecting the bit timing of the data
Sense voltage
times, nodes affected
• Input file serves as a development
interface for a node
• LIN Application Generator Data timing
– LIN-Emulator
Available bit sampling zone can reduce worst case bit width to around 40us at 20k baud
– LIN Analyser This affects the overall baud rate tolerance required for safe LIN communications
10