Week 7 Resources

EE-231 Electronics I
Engr. Dr. Hadeed Ahmed Sher
Ghulam Ishaq Khan Institute of Engineering Sciences and Technology, TOPI 23460
hadeed@giki.edu.pk
March 11, 2018
Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 7 Resources March 11, 2018 1 / 36
Overview
1 DC biasing of Bipolar Junction Transistor (BJT)

Why emphasis on Biasing ?
Biasing techniques
Fixed bias configuration
Emitter Bias configuration
Examples
Voltage divider biasing configuration
Exact method
Example
Approximate analysis
Examples
Collector feedback configuration
Example
DC biasing of Bipolar Junction Transistor (BJT)
DC biasing Bipolar Junction Transistor (BJT)
Amplification is a combined effect of input and the biasing supply.

Amplification has two parts, one is the DC portion and other is called AC
part.
Biasing is the study of arrangement of dc portion.
Most of the biasing techniques are discussed for common emitter
configuration however, common collector and common base configurations
are also discussed.
Following expressions are used frequently in the forthcoming discussion.
VBE = 0.7V (1)
IC = βIB (2)
IE = IC + IB = βIB + IB = (1 + β)IB (3)
In most cases IB is determined first thereafter, IC and IE are computed.
DC biasing of Bipolar Junction Transistor (BJT) Why emphasis on Biasing ?

DC operating point of Q point must be set such that signal variations are
amplified and reflected at the output without any distortion.
If the Q point is not set correctly then the amplifier may swing into the
saturation and cut off region. In each region the output waveform distorts.
To further clarify this consider this circuit shown.
Case 1
Assume that RB is adjusted such that IB =200µA then ,
IC = 20mA (4)
VCE = VCC − (IC RC ) = 5.6V (5)
Case 2
Assume that RB is adjusted such that IB =300µA then,
IC = 30mA (6)
VCE = VCC − (IC RC ) = 3.4V (7)

Case 3
Assume that RB is adjusted such that IB =400µA then ,
IC = 40mA (8)
VCE = VCC − (IC RC ) = 1.2V (9)
Note that as IB increase, IC increase and VCE decrease and vice versa.
These three cases are plotted to
show that an improper biasing may
operate a transistor near cut off or
saturation region.
Only case 2 lies inside linear region
provided it is within safe operating
region.
DC biasing of Bipolar Junction Transistor (BJT) Biasing techniques
Biasing techniques
Following kinds of biasing techniques are discussed.

Emitter bias configuration
Collector feedback biasing configurations
Biasing for common collector configuration
Biasing for common base configuration
For the first four biasing configurations a common emitter configuration
with an NPN transistor is used. Passive sign convention is adopted for
analysis.
DC biasing of Bipolar Junction Transistor (BJT) Fixed bias configuration
Figure : Fixed bias circuit

Figure : DC equivalent circuit
Figure : Base Emitter is forward biased

Figure : Collector emitter is reverse
biased
Applying KVL.
Vcc + RB IB + VBE = 0 (10) IC is calculated using β relationship.

Applying KVL for VCE .
VCC − VBE
IB = (11)
RB VCE = VCC − IC RC (12)
Note that in this kind of biasing IE =0 and therefore, VCE =VC and
VBE =VB .
In this configuration, the maximum current that can lead the transistor in
saturation region is Icsat which is
VCC
Icsat = (13)
RC
Value of Icsat provides an idea so that transistor stays in linear region.
Similarly, maximum voltage that can appear at the output is VCEmax =VCC
i.e when IC is zero. Pin pointing and joining the values of Icsat and VCEmax
on output characteristic curve of common emitter yields load line.
Note that the Q point shifts because of change in IB as well as with
change in RC .
Effect of IB on Q point Effect of RC on Q point. RC defines

the slope of line
Fixed Bias configuration
Figure : Effect of VCC on Q point.
Fixed bias configuration— Example 4.1
For the circuit shown find IC and

VCE . Assume β=50
Using (12),
VCE = 12−(2.35mA)(2.2kΩ) = 6.83V

(14)
VB =VBE =0.7V
VC =VCE =6.83V
VBC =VB − VC =-6.13V
Negative sign means that the
junction is reverse biased.
Using (11) the value of base current
is 47.08µA. Therefore IC =2.35mA.
Fixed bias configuration— Example 4.5
For the circuit shown in example 4.1

find IC and VCE . Assume that beta
has changed to β=100
Using (12),
VCE = 12−(2.35mA)(2.2kΩ) = 1.64V

(15)
In this configuration, for 100 percent
change in beta, collector current is
changed by 100 percent and output
voltage are decreased by 6 percent.
This means that this configuration is
poor in terms of stability.
Using (11) the value of base current
is 47.08µA. Therefore IC =4.71mA.
Example 4.3
For the given circuit find the value of

VCC , RC and RB for fixed bias
configuration. Solution.
When IC =0 then,
VCC = VCE = 20V (16)
VCC
RC = = 2kΩ (17)
IC
Q point is at 25 mA therefore,
VCC − VBE
RB = = 772kΩ (18)
IB
DC biasing of Bipolar Junction Transistor (BJT) Emitter Bias configuration

A resistor is added in series with the emitter in addition to the fixed bias
configuration.
It has improved stability compared to fixed bias circuit.
Emitter Bias configuration — Base emitter loop

The DC analysis for base emitter
loop is based on following circuit.
Applying the KVL.
−VCC +IB RB +VBE −IE RE = 0 (19)
converting IE into IB using the

expression IE = (1 + β)IB and
rearranging the terms
Base current
VCC − VBE
IB = (20)
RB + (β + 1)RE
Emitter Bias configuration — Collector emitter loop

The DC analysis for collector emitter
loop is based on following circuit.
Applying the KVL.
VCC − IE RE − VCE − IC RC = 0 (21)
Using α assuming IE ≈Ic and

rearranging the terms
Collector Emitter voltage
VCE = VCC − IC (RE + RC ) (22)
In this biasing configurations,
IE = IE RE (23)
VCE = VC − VE =⇒ VC = VCE + VE (24)
Alternatively
VC = VCC − IC RC (25)
Similarly
VB = VCC − IB RB (26)
Also,
VB = VBE − VE (27)

In this biasing configuration the saturation current at VCE =0 is
VCC
ICsat = (28)
RC RE
The second point for load line is same as fixed bias i.e VCE = VCC when
IC =0
Example 4.4
Find IB ,IC ,VCE ,VC ,VE ,VB and VBC .
Assuming β=50
Using (22) VCE =13.97V.
VC = VCC − IC RC = 15.98V (29)
VE = VC − VCE = 2.01V (30)

VB = VBE + VE = 2.71V (31)
VBC = VB − VC = −13.27 (32)
Base collector is therefore, reverse
biased as required.
Using (20) IB =40.1µA, and therefore
IC =2.01mA
Example 4.5
Find IC and VCE for the circuit
shown if β=100
Using (22) VCE =9.11V
In this configuration, the collector
current increases to 81% for a 100%
increase in beta. VCE has dropped
35% which is considerable low
compared to fixed bias configuration.
Comparison
Emitter bias is more stable against
beta variations compared to fixed
bias configuration.
Using (20) IB =36.3µA, and therefore

IC =3.63mA
Example 4.7
For the network shown draw the load
line, find ICQ and VCEQ for
IB =15µA,βdc at Q point and RB .
From figure VCEQ =7.5V and

ICQ =3.3mA.
I BQ
Using (28) ICsat =5.45mA. The VCE βdc = = 220.Using (20) RB is
IC Q
at IC =0=VCC =18V. Joining these calculated as 910kΩ.
two points gives the load line.
DC biasing of Bipolar Junction Transistor (BJT) Voltage divider biasing configuration

It is the most widely used configuration for biasing. It is more stable
against variations in beta.
Analysis for base emitter loop is possible through two methods. The exact
method and the approximate method.
Exact method
In exact method thevenin equivalent is calculated at point B.
R1 R2
Rth = (33)
R1 + R2
VCC R2
Eth = VB = (34)
R1 + R2
Exact method
Now that thevenin is plugged into the original circuit, apply KVL on the
base emitter loop to get IB
−Eth + IB Rth + VBE + IE RE = 0 (35)
Using IE =(β + 1)IB and rearranging the terms
Eth − VBE
IB = (36)
Rth + (β + 1)RE
Using beta IC can be calculated. Thereafter, applying the KVL on

collector emitter loop we get,
VCE = VCC − IC (RC + RE ) (37)
Expressions for VC , VE and VB are same as that of emitter bias circuit.
Example 4.8
For the network shown find VCE and

IC .
First step is to find the thevenin
equivalent using (33) and (34).
Rth =3.55kΩ and Eth =2V.
Second step is to find IB using (36).
IB =8.38µA.
Third step is to find IC
IC =βIB =0.84mA
Finally using (37) the output voltage
is 12.34V.
Approximate analysis can only be applied if the following condition is true.

Condition
βRE ≥ 10R2 (38)
If this condition is true then the following process can be adopted.

Step 1: The value of IB is very small compared to the IC therefore, it can
be neglected. This means that resistance R1 and R2 comes in series.
Therefore,
VCC R2
VB = (39)
R1 + R2
Step 2: Using the expression that VBE =VB -VE the value of VE is
VE
VE = VB − VBE =⇒ IE = (40)
RE
Step 3: Compute the value of IC assuming α=1 and thereafter VCE is
given as
VCE = VCC − IC (RE + RC ) (41)
Example 4.9
For the network shown find VCE and
IC using approximate method.
Step 1: Calculate VB using (39).
VB =2V.
Step 2: Calculate VE and IE using
(40).
VE =1.3V and IE =0.867mA.
Step 3: Calculate VCE using (41)
VCE =12.03V
Compared to the results presented in
example 4.8 the results are
reasonably correct. This is because
the condition is satisfied for this
circuit.
First check the condition using (38).
In this case it is true.
Example 4.11
For the network shown find VCE and Using exact method
IC using exact and approximate The value of IB using (36) is 39.6µA.
method. The value of IC is 1.98mA.
The value of VCE using (37) is
4.54V.
Using approximate method Step 1:
Calculate VB using (39).
VB =3.81V.
Step 2: Calculate VE and IE using
(40).
VE =3.11V and IE =2.59mA.
Step 3: Calculate VCE using (41)
VCE =3.88V
Compared to the results generated
First check the condition using (38). using exact method the approximate
In this case it is not true. method is not correct.
Voltage divider configuration
Note that the major advantage here is improved stability.

Suppose that because of temperature increase IC increases , this will
increase IE .
As a result VE will increase.
This reduces the VBE which in turn reduce the base current IB .
As base current decreases the collector current IC decreases.
Remarks
Note that as given in (36), the voltage VBE should not be treated as a
constant voltage source. This quantity VBE reflects the forward voltage
drop as a result of forward biased base emitter region. Therefore, the
above discussion is valid despite apparently not being in harmony with
(36).
DC biasing of Bipolar Junction Transistor (BJT) Collector feedback configuration

Stability can also be enhanced using the circuit shown. Its performance is
superior than the fixed biased and emitter biased configuration but inferior
than the voltage divider biasing.
In this configuration, the base

emitter loop is as shown below.
Applying KVL
−VCC +IC0 RC +IB RF +VBE +IE RE = 0

(42)
Assuming IC0 =IC and IE ≈ IC
Base current
VCC − VBE
IB = (43)
RF + β(RC + RE )

In this configuration, the collector
emitter loop is as shown below.
Applying KVL
VCC − IC0 RC − IE RE − VCE = 0 (44)
Assuming IC0 =IC and IE ≈ IC
Collector emitter voltage
VCE = VCC − IC (RC + RE ) (45)
Example 4.12
Find IC and VCE for the circuit Using (43) it is calculated as

shown. 11.91µA.
Using beta IC =1.07mA.
Using (45) the value of VCE is
calculated as 3.69V.
If the beta is increased to 135 then,
the new values are as follows,
IB =8.89µA and IC =1.2mA
VCE =2.92V
With 50% increase in beta, collector
current increased 12.1% whereas
output voltage decreased 20.9%.

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EE-231 Electronics I

Engr. Dr. Hadeed Ahmed Sher

March 11, 2018

1 DC biasing of Bipolar Junction Transistor (BJT)

DC biasing Bipolar Junction Transistor (BJT)

Amplification is a combined effect of input and the biasing supply.

VBE = 0.7V (1)

Why emphasis on Biasing ?

Why emphasis on Biasing ?

Why emphasis on Biasing ?

Following kinds of biasing techniques are discussed.

Fixed bias configuration

Figure : Fixed bias circuit

Fixed bias configuration

Figure : Base Emitter is forward biased

Vcc + RB IB + VBE = 0 (10) IC is calculated using β relationship.

Fixed bias configuration

Fixed bias configuration

Effect of IB on Q point Effect of RC on Q point. RC defines

Fixed Bias configuration

Figure : Effect of VCC on Q point.

Fixed bias configuration— Example 4.1

For the circuit shown find IC and

VCE = 12−(2.35mA)(2.2kΩ) = 6.83V

Fixed bias configuration— Example 4.5

For the circuit shown in example 4.1

VCE = 12−(2.35mA)(2.2kΩ) = 1.64V

For the given circuit find the value of

VCC = VCE = 20V (16)

Emitter Bias configuration

Emitter Bias configuration — Base emitter loop

−VCC +IB RB +VBE −IE RE = 0 (19)

converting IE into IB using the

Emitter Bias configuration — Collector emitter loop

Applying the KVL.

VCC − IE RE − VCE − IC RC = 0 (21)

Using α assuming IE ≈Ic and

VCE = VCC − IC (RE + RC ) (22)

Emitter Bias configuration

In this biasing configurations,

Emitter Bias configuration

VC = VCC − IC RC = 15.98V (29)

VE = VC − VCE = 2.01V (30)

Using (20) IB =36.3µA, and therefore

From figure VCEQ =7.5V and

Voltage divider biasing configuration

In exact method thevenin equivalent is calculated at point B.

−Eth + IB Rth + VBE + IE RE = 0 (35)

Using IE =(β + 1)IB and rearranging the terms

Using beta IC can be calculated. Thereafter, applying the KVL on

VCE = VCC − IC (RC + RE ) (37)

Expressions for VC , VE and VB are same as that of emitter bias circuit.

For the network shown find VCE and

Approximate analysis can only be applied if the following condition is true.

If this condition is true then the following process can be adopted.

Voltage divider configuration

Note that the major advantage here is improved stability.

Collector feedback configuration

Collector feedback configuration

In this configuration, the base

−VCC +IC0 RC +IB RF +VBE +IE RE = 0

Collector feedback configuration

VCC − IC0 RC − IE RE − VCE = 0 (44)