A Novel ZVS Push-Pull Type LLC Series
Resonant Dc-Dc Converter for Hybrid Fuel Cell
Power Systems
Wei Chen, Zhengyu Lu(Senior Member, IEEE)
College of Electrical Engineering
Zhejiang University
Hangzhou 310027, Zhejiang, P.R.China
Abstract—Fuel cells are becoming a more attractive option
for many remote power applications. To effectively control
fuel cell system energy flow, improve system efficiency and
lengthen lifetime of the fuel cell itself, a novel push-pull type
LLC series resonant dc-dc converter was proposed. This
converter, besides possessing all advantages of conventional
LLC converters, emerges as a higher efficiency can be
achieved for the merit of primary resonant current can be
halved and where each half is carried by one push-pull
branch, while the high voltage issue for conventional
push-pull converters being overcome without employing the
series-switches technique, and which turns out to be
favorable for improving overall efficiency as well.
Additionally, the wide input range capability further endows
the proposed converter the applicability for the fuel cell
output characteristics. Therefore the proposed converter is
very suitable for the hybrid fuel cell power systems. The
detail operation principles and converter’s characteristics
were presented and the validity and applicability were also
verified by a 1kW prototype.
Keywords—Push-Pull converter, LLC series resonant
converter, Hybrid fuel cell power system
I. INTRODUCTION
The use of fuel cell technology for electricity and heat
generation for residential applications has generated lots
of interest due to their high operation efficiencies and low
CO2 emission levels [1-4].However, due to the slow fuel
supply process, a fuel cell system requires energy storage
elements to improve its system dynamics, as shown in
Fig. 1, an auxiliary battery stack is employed to gain
optimum energy usage control, start-up control and load
transient control, and be cost effective [2-3]. However,
although the secondary energy source, such as the high
power density battery, was introduced to the fuel cell
system, the fuel cell itself remains the main barrier, which
has slow response and whose output voltage fluctuates
with loads (200-400VDC) [3]. Such wide variable input
voltage range becomes a challenge for designing the
downstream uni-direction dc-dc converters to provide a
stable DC bus for load. On this respect, several solutions
of wide range input dc-dc converters have been proposed
in the technical literature, in which almost every
converter employs a pair of series switches connected
together, especially in three-level converters, to overcome
the high voltage stress issue to suitable for high line input.
Project supported by National Natural Science Foundation of China
(50677063ZD) and Delta S&T Educational Development Program
(DREO2006021)
978-1-4244-1668-4/08/$25.00 ©2008 IEEE
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Fuel Cell Uni-directional
200-400V DC-DC
Load
48V DC BUS
Auxiliary
Battery
Bi-directional
DC-DC
24V
Figure.1 Typical configuration of hybrid power system
Therefore conduction loss will be doubled and efficiency
is declined, which is unfavorable for fuel cell working
lifetime. If using PC stands for conduction loss in
conventional single switch converters, then the converters
proposed by [5-7] will be 2PC. [8] presented a push-pull
dc-dc converter suitable for high input voltage
applications, which can divide primary current by some
proportion and thus conduction loss for each switch is
reduced to some level. However, this proportion
coefficient could not be smaller than 0.5, additional, this
converter still employs two series switches in one branch
to overcome voltage stress issue, which means
conduction loss for this converter will only be expressed
as xPC (0.5<x”2). Therefore, how to design an excellent
converter that has minimized conduction loss with
high-voltage-stress-issue-free characteristic remains a
major effort for a perfect fuel cell power system.
The LLC series resonant converter, which has merits
as ZVS for primary switches at entire load, ZCS for
rectifier diodes and high efficiency under all input
voltages, gains popularity in recent years [9]. However,
conventional LLC-SRC is often constructed on a
half-bridge or full-bridge configuration, and there has
merely little report of push-pull type LLC-SRC been
presented. In this paper, the conception of LLC resonant
tank is introduced into the conventional push-pull
converter and a novel push-pull type LLC-SRC was
created. This converter, besides possessing all advantages
of LLC converter, has additional merits as: 1. higher
efficiency for primary side current is divided into half,
whose conduction loss is only 0.5PC; 2. voltage stress for
each switch is just input voltage. The detail design
considerations are presented and a 1kW prototype was
built to confirm validity and applicability of the proposed
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 converter.
S1,3 S2,4 S1,3
II. OPERATION PRINCIPLES AND TIME DOMAIN ANALYSIS vgs t
Power stage of the proposed converter is illustrated in Fig.
vds1,3 Vin t
2. The main components of the converter are: two main
switches Sl and S4 are the main components of the two vds2,4 Vin t
push-pull branches, respectively; two auxiliary iLs1-iLs2 iLs1
freewheeling switches S2 and S3 parallel with part of the iLm/n
resonant tank of CS1+LS1 and CS2+LS2 respectively;
iLs&im t
COSS1-COSS4 represent parasitic capacitors of S1-S4
correspondingly; the output rectifier is constituted by four
iLs2
rectifier diodes D1-D4; between the primary and
secondary side is the coaxially wound transformer TR, vCs1 Vin/2 t
which has a same-turn-center-tapped winding for primary
and lumped secondary; Lm is referred to the magnetizing vCs2 Vin/2 t
inductor on the secondary side, and the whole resonant
tank, which consists of CS1+LS1, CS2+LS2 and Lm with
iDR
CS1=CS2 and LS1=LS2, resonates at the switching iDR1,3 iDR2,4 iDR1,3
t
frequency; finally, Cb is a large blocking capacitor which
blocks DC current and avoids flux imbalance for TR. vDR1,3 VO
t
S1 CS1 LS1
VDR2,4 VO
TR t
vCs1 iLs1 iDR1 t0 t1 t2 t3 t4 t5 t6 t7 t8
Coss1 vTp Cb DR1 DR4 Figure. 3 Operation principle waveform of the
S2 Coss2 Lm Co
proposed converter
Vin Io

S3 Coss3 im vTs
Ro the difference between the terms of ip and im. The
Coss4 vTp simplified equivalent circuit is given by Fig. 5. During
iDR2
vCs2
iLs2 DR2 DR3 the stage, the differential equations in push-pull branch 1
can be listed as follows:
S4 CS2 LS2
d
Figure. 2 Push-pull type LLC-SRC dc-dc converter Vin  uCs1 (t )  n ˜ Vo LS1 ˜ iLs1 (t ) (1)
dt
The driving signals for all main switches and the d
CS1 ˜ uCs1 (t ) iLs1 (t ) (2)
proposed converter’s principle waveforms are shown in dt
Fig. 3. This converter operates under variable frequency d
Lm ˜ im (t ) VO (3)
modulation, i.e., S1&S3 share the same 50% duty cycle dt
driving signal and S2&S4 share another half during a , where n is the turn ratio of primary side to secondary.
switching period. To simplify the process of the analysis, By factorizing variant uCs1(t) into the DC term and AC
it is assumed that the converter is under steady operation Vin
state; the output capacitor CO is large enough to be term, i.e.: uCs1(t )  uCs1ac (t ) , then (1) can be
2
considered as a voltage source VO; the blocking capacitor rewritten as:
Cb is large enough to be considered to be short-circuited
Vin d
under AC operation. The proposed converter has 8 uCs1ac (t )  n ˜ Vo  LS1 ˜ iLs1 (t ) (4)
operation stages during a switching period. The 2 dt
waveforms and equivalent circuit in the former 4 From (2)-(4), with the initial condition:
operation stages in a half switching cycle are given by iLs1(0) = It0, uCs1ac(0) = VCs1act0, im(0) = 2 ˜ n ˜ I t 0
Fig. 4. Other 4 stages are just similar to the previous half
After calculation, the stage equations of this stage are:
cycle. The detailed operating processes as well as the
state equations are described as follows: Vin
uCs1ac (t ) (n ˜ VO  VCs1act 0  ) ˜ cos[Z 0 ˜ (t  t0 )]
2
Stage 1 [t0, t1]:
V
At the time of t0, S1 and S3 are turned on simultaneously.  LS1 ˜ Z 0 ˜ sin[Z 0 ˜ (t  t0 )]  in  n ˜ VO (5)
2
The primary resonant current iLs1 and iLs2 in the resonant
iLs1 (t ) I t 0 ˜ cos[Z 0 ˜ (t  t0 )]
tank both increase in a sine-wave mode, whose absolute
values are always kept the same whereas directions are Vin
 CS 1 ˜ Z 0 ˜ (  n ˜ VO  VCs1act 0 ) ˜ sin[Z 0 ˜ (t  t0 )] (6)
just opposite to each other. Meantime, the magnetizing 2
current im increases linearly for the voltage of the V ˜t
im (t ) 2 ˜ n ˜ It 0  O (7)
secondary side is clamped by output voltage. If using ip Lm
stands for the sum of absolute values of iLs1 and iLs2, then 1
rectified current in secondary side iDR, is proportional to , where: Z0 (8)
LS1 ˜ CS1

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 S1 CS1 LS1 S1 CS1 LS1 S1 CS1 LS1
TR TR TR
vCs1 iLs1 iDR1 vCs1 iLs1 iDR1 vCs1 iLs1 iDR1
Coss1 vTp Coss1 vTp Coss1 vTp
DR1 DR4 DR1 DR4 DR1 DR4
S2 Coss2 Lm S2 Coss2 S2 Coss2
Lm Lm
Vin Vo Vin Vo Vin Vo

S3 Coss3 im vTs S3 Coss3 im vTs S3 Coss3 im vTs

Coss4 vTp Coss4 vTp Coss4 vTp
iDR2 iDR2 iDR2
vCs2 DR2 DR3 vCs2 DR2 DR3 vCs2 DR2 DR3
iLs2 iLs2 iLs2
S4 CS2 LS2 S4 CS2 LS2 S4 CS2 LS2
Stage 1 [t0, t1] Stage 2 [t1, t2] Stage 3 [t2, t3] Ls1 ip
S1 CS1 LS1 S1 CS1 LS1
TR TR CS1 iLs1 Ls2 VO
vCs1 iLs1 iDR1 vCs1 iLs1 iDR1
vTp vTp CS2 |iLs2| im2/n
Coss1 DR1 DR4 Coss1 DR1 DR4 n Lm
S2 Coss2 S2
Lm Coss2 Lm Figure 5. Equivalent resonant
Vin Vo Vin Vo
circuit of Stage 1
Ls1 ip
S3 Coss3 iLmvTs S3 Coss3 im vTs Figure 4. Equivalent
Coss4 vTp Coss4 circuits for each stage CS1 iLs1
iDR2 vTp iDR2 Ls2 VO
vCs2 DR2 DR3 vCs2 DR2 DR3
iLs2 iLs2
CS2 |i | im2/n
Ls2
S4 CS2 LS2 S4 n Lm
CS2 LS2
Stage 4 [t3, t4] The operation state at time t4 Figure 6. Equivalent resonant
circuit of Stage 2

For the symmetry, the differential equations in push-pull discharge the parasitic capacitors COSS2 and COSS4of S2
branch 2 have the same expressions except for the minus and S4 correspondingly, where COSS1-COSS4 also
sign to uCs2ac(t) and iLs2(t). Therefore they are omitted participate in the resonance process. For simplify the
here to simplify analysis process. analysis, it is assumed that the value of COSS1-COSS4 are
Stage 2 [t1, t2]: all equal to each other. Therefore the equations for this
stage can be given by:
When the difference resonant current ip resonates over its
peak, it begins to decline and equals to the increasing d Vin
( LS1  n 2 Lm ) ˜ iLs1 (t )  uCs1ac (t )  uCoss1 (t ) (14)
magnetizing current im at time t1. The secondary current dt 2
decreases to zero and DR1,3 turn off, which means the d i (t )
CS1 ˜ uCs1ac (t ) iLs1 (t ) m (15)
magnetizing inductor Lm is free from the output voltage dt 2n
clamping and participates the resonance. The simplified d d
equivalent circuit is given by Fig. 6. During this stage, COSS1 ˜ uCoss1 (t )  COSS 2 ˜ uCoss 2 (t ) iLs1 (t ) (16)
dt dt
the equation can be listed as follows: uCoss1 (t )  uCoss 2 (t ) Vin (17)
2 d Vin , with the initial condition is:
( LS1  2n Lm ) ˜ iLs1 (t )  uCs1ac (t ) (9)
dt 2
iLs1(0)=It2, uCs1ac(0)=VCs1act2, uCoss1(0)=0, uCoss2(0)=Vin
d i (t )
CS ˜ uCs1ac (t ) iLs1 (t ) m (10) After calculation, the stage equations of this stage are:
dt 2n
, with the initial condition is: It 2
uCs1ac (t ) sin[Z 2 ˜ (t  t2 )]
CS1 ˜ Z 2
iLs1(0)=It1, uCs1ac(0)=VCs1act1
COSS ˜ (Vin  2VCs1act 2 )
After calculation, the stage equations of this stage are:  ˜ cos[Z 2 ˜ (t  t2 )]
2(CS1  COSS )
uCs1ac (t ) ( LS1  2n 2 Lm ) ˜ Z1 ˜ I t1 ˜ sin[Z1 ˜ (t  t1 )]
2 ˜ CS1 ˜ VCs1act 2  COSS ˜ Vin
V V  (18)
 (VCs1act1  in ) ˜ cos[Z1 ˜ (t  t1 )]  in (11) 2(CS1  COSS )
2 2
iLs1 (t ) I t 2 ˜ cos[Z 2 ˜ (t  t2 )]
im (t )
i p (t ) I t1 ˜ cos[Z1 ˜ (t  t1 )] C ˜C V
2n  S1 OSS ˜ Z 2 ˜ ( in  VCs1act 2 ) ˜ sin[Z 2 ˜ (t  t2 )] (19)
CS1  COSS 2
V
 CS1 ˜ Z1 ˜ ( in  VCs1act1 ) ˜ sin[Z1 ˜ (t  t1 )] (12) 1
2 , where Z 2 (20)
1 2 C ˜C
, where Z1 (13) ( LS1  2n Lm ) ˜ S1 OSS
CS1  COSS
( LS1  2n 2 Lm ) ˜ CS1
Stage 4 [t3, t4]
Stage 3 [t2, t3]:
At time of t3, voltage applied on S1 and S3 reaching Vin
At time t2, S1 and S3 are turned off. Therefore the
and vds2 and vds4 decreasing to zero as well, which results
difference resonant current ip begins to charge the
in the resonant currents iLs1 and iLs2 beginning to be
parasitic capacitors COSS1 and COSS3 of S1 and S3, and also
carried by the parasitic diodes of S2 and S4 respectively.

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 Then the resonant currents iLs2 feed back to input, which this mode, equivalent value of Lm for each resonant tank
causes reversal of the voltage applied on the resonant is doubled. Therefore the resonant parameters and
tank. Therefore the rectifier diode DR2,4 conduct and the resonance characteristics differs with the conventional
magnetizing inductor Lm is clamped by output voltage uni-resonant tank LLC converters. According to the time
and disengages the resonance again. Similar to stage 1, domain stage equations, although there is no information
resonances between CS1&LS1 and CS2&LS2 in each branch loss theoretically, no symbolic answers can be deduced.
resume in this stage. Also the time domain equations can However, approximating curves, which are deduced by
be listed as follows: the stage differential equations, show the characteristics
Vin d of the proposed converter, given by Fig. 7.
uCs1ac (t ) n ˜ Vo   LS1 ˜ iLs1 (t ) (21)
2 dt
d
CS 1 ˜ uCs1ac (t ) iLs1 (t ) (22)
dt
d
Lm ˜ im (t ) VO (23)
dt
, with the initial condition is:
iLs1(0) = It3, uCs1ac(0) = VCs1act3, im(0) = 2 ˜ n ˜ I t 3 M
After calculation, the stage equations of this stage are:
Vin
uCs1ac (t ) (VCs1act 3   n ˜ VO ) ˜ cos[Z3 ˜ (t  t3 )]
2
V h Z
 LS1 ˜ Z3 ˜ sin[Z3 ˜ (t  t3 )]  n ˜ VO  in (24)
2 Figure. 7 DC gain M versus h and Z
i Ls1 (t ) I t 3 ˜ cos[Z 3 ˜ (t  t 3 )]
Vin
Where in Fig. 7, M is the normalized DC gain, which is a
 CS1 ˜ Z3 ˜ (n ˜ VO   VCs1act 3 ) ˜ sin[Z3 ˜ (t  t3 )] (25) function of h and Ȧ. h and Ȧ are related to the actual
2
circuit parameters, which are also both normalized and
VO ˜ t can be expressed as follows:
i m (t ) 2 ˜ n ˜ I t3  (26)
Lm
2n 2 Lm fs
1 h (28), Z (29)
, where: Z3 (27) LS1 fo
L S1 ˜ C S1
, where fS is the switching frequency and fO is the
At time t4, main switches S2 and S4 turn on, which ends resonant frequency:
the half of a switching period previously discussed and 1 1
enters the next half. Operation principles of time t4-t8 are f0 (30)
just similar to stage 1-4 and will not be described in detail 2S LS1 ˜ CS1 2S LS 2 ˜ CS 2
here. However, for the symmetric operation waveforms When f0 is determined, ratio of resonant capacitor CS1 and
of this proposed converter, the boundary conditions still resonant inductor LS1 can be decided [11]. Then,
can be deduced from a half switching cycle, which can be combination of h and Ȧ decide M and converter’s
described as follows: performance. According to curve of Fig. 7, the converter
1. All stages are related to the one just starting next can be optimum designed to assure practicability and
in turn, e.g.: Stage (t n-) = Stage (t n+). reliability.
2. The AC values in Stage 1 are just negative to that B. Current Sharing for Push-Pull Transformer
of related in Stage 4, i.e.: Stage (t4-) = -Stage (t1+).
Current peak mode control is employed in conventional
Energy balance turns out to be another important factor PWM push-pull converters to eliminate potential flux
for calculation. Then from discussion above, the precise imbalance for the push–pull transformer. However, in
operation equations can be deduced. However, due to the proposed converter, currents in the two primary branches
complicated and complex characteristics of these can automatically balance and current sharing is realized.
equations, the symbolic answers can not be yielded yet The simplest way has been illustrated by Fig. 2, that a
after a numerous complicated work of calculation. large value capacitor Cb is adding to the secondary side of
III. DESIGN CONSIDERATIONS the transformer to block the DC current, which is
recognized the main reason of flux imbalance. Thus, the
A. Performance Analysis two currents of iLs1 and iLs2 on the primary side can
Different from conventional LLC converter, in the automatically compensate with each other and the
proposed push-pull type LLC-SRC, according to the proposed converter achieves current sharing.
analysis above, during Stage 1, primary current is C. ZVS Conditions
actually divided into two half parts and each half is
carried by a push-pull branch respectively, which is The periods between t2-t4 and t6-t8 are defined as dead
illustrated by Fig. 5. Then during Stage 2, by Fig. 6, there times. During these dead times, currents in the branches
exist two resonant tanks of CS1-LS1-Lm and CS2-LS2-Lm. In on the primary side should complete the mission of

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 energy communication between the parasitic capacitors
of the main switches which are connected both in the
same branch to create ZVS conditions for these main
switches. Due to these dead times are rather small
compared to a switching cycle, therefore during these
period, in each branch, the primary current can be
considered as half of the peak value of im, i.e.: Im/2n
according to previously analysis. Then the boundary
conditions for ZVS can be obtained according to energy
balance:
1 I 1 conventional push-pull converter. Fig. 8 (c)-(d) are the
˜ (2n 2 ˜ Lm ) ˜ ( m ) 2 ˜ 2COSS ˜ Vin2
2 2n 2
Then Im should satisfy (32) for ZVS condition:
COSS
I m t 2 ˜ Vin ˜
Lm
IV. EXPERIMENTAL RESULTS
A proposed 1kW push-pull type LLC-SRC prototype
used for hybrid fuel cell power system was built to verify
the characteristics and advantages. The specifications are
as follows:
Vin: 200-400Vdc; VO: 48Vdc; IO: 0-20 A; fmin: 127 kHz; f0:
265 kHz; fmax: 262 kHz
The components of the power stage shown in Fig. 2 are
listed as follows:
S1-4: 2SK3934; DR1-DR4: MBR30H60CTG; T R:
n=16+16:4; LS1=LS2: 13uH; Lm: 3uH (measured on the
secondary side); CS1=CS2: 28.2nF/630V; Cb: 10uF/200V
Both LS and Lm are integrated to the transformer TR by
employing integrated magnetic technique.
Fig. 8shows the main experimental waveforms under
200V and 400V input at full load. Fig. 8 (a)-(b) show the
S1’s driving signal vgs, drain-source voltage vds and the
current flowing through ids. It can be observed ids is
negative before the arrival of the driving signal , which
assures vds decreases to zero before the switch turning on
and achieves ZVS. Another important information is the
voltage stress of S1 is just the very input voltage, which is
the main merit of the proposed converter, that whose high
voltage stress issue is overcome compared with
(31) waveforms of S4, which is in another branch. Since it is
similar to S1, it is not discussed detailedly here. Fig. 8
(e)-(f) show the waveforms of one of the push-pull
branches, which including the voltage of resonant
(32)
capacitor Cs1 vCs1, voltage of the primary side of the
transformer vTp, and resonant current iLs1. It can easily be
seen the resonant current iLs1 has two resonant stages in a
half switching period under low line input, while a nearly
pure sine wave appearing under highest voltage input. Fig.
8 (g)-(h) show waveforms of the other branch. Compared
with (e) and (g), as long as the resonant parameters of the
two branches kept close, the resonant modes of these two
branches would be almost the same. Fig. 8 (i)-(j) show
the relationship between the secondary side voltage of the
transformer vTs, voltage of rectifier diode DR1 vDR1 and
the rectified current iDR1.The diode DR1 turns off after iDR1
declines to zero and achieves ZCS and the maximum
voltage value applied on the diode is just Vo. vTs is quite
different from vTp because of the employing of IM
technique. Also, comparing between the primary resonant
currents and the secondary rectifier current, it can be

ids1: [10A/div] ids1:[10A/div] ids4: [10A/div] ids4:[10A/div]

vgs1: [20V/div] vgs1: [20V/div] vgs4: [20V/div] vgs4:[20V/div]

vds1: [100V/div] Time: [2us/div] vds1: [200V/div] Time: [2us/div] vds4: [100V/div] Time: [2us/div] vds4:[200V/div] Time: [2us/div]
(a) vgs, vds and ids of S1@200V, 20A (b) vgs, vds and ids of S1@400V, 20A (c) vgs, vds and ids of S4@200V, 20A (d) vgs, vds and ids of S4@400V, 20A

iLs1: [10A/div] iLs2: [10A/div]

iLs1: iLs2:
vTp: [200V/div] vTp: [200V/div]
[10A/div] [10A/div]

vTp: vTp:
200V/div 200V/div

vCs1: [100V/div] vCs2: [100V/div]

vCs1: Time: vCs2: Time:
100V/div [2us/div] Time: [2us/div] 100V/div [2us/div] Time: [2us/div]
(e) iLs1, vTp and vCs1@200V, 20A (f) iLs1, vTp and vCs1@400V, 20A (g) iLs2, vTp and vCs2@200V, 20A (h) iLs2, vTp and vCs2@400V, 20A
iDR1: [40A/div] iDR1: [40A/div]

vTs: [100V/div] vTs: [100V/div]

Figure. 8 Experimental Waveforms

vDR1: [50V/div] vDR1: [50V/div]

Time: [2us/div] Time: [2us/div]

(i) iDR1, vTs and vDR1@200V, 20A (j) iDR1, vTs and vDR1@400V, 20A

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 appreciated each primary branch shares half of the load
current in Stage 1, which accords to theory well and will
be favorable for efficiency.
Fig. 9 shows the conversion efficiency of all
conditions. The maximum efficiency is nearly 97 ˁ
under 400V input. The proposed push-pull type
LLC-SRC can achieve a high efficiency since the primary
current is divided into two equal parts and no two series
switches configuration is employed to overcome high
voltage issue. Fig. 10 shows the deduced theoretical DC
gain under the actual circuit parameters in the prototype.
Fig. 11 shows the switching frequency versus load under
different voltage input. From these two curves, the
switching frequency operating range varies from 127 kHz
to 262 kHz, which matches theory one to some extent.
Figure. 9 Measured efficiency at different
load under all inputs
Q= , h=7
M [11] Teng Liu, Ziying Zhou, Aiming Xiong. “A Novel Precise Design
Z
Figure. 10 Characteristic of the prototype
Figure.11 Switching frequency versus load
under different voltage input
V. CONCLUSIONS
The proposed push-pull type LLC-SRC, which
possessing all advantages of the conventional LLC
converters, can overcome the high voltage issue while not
employing the series switches technique. Besides, by the
current division effect for the push-pull converters, the
proposed converter can achieve a higher efficiency. In
addition, the wide range voltage input capability endows
its applicability for the fuel cell output characteristics.
Therefore the proposed converter is a very competitive
candidate for the uni-direction dc-dc converter for hybrid
fuel cell power system.
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