DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB 2018

EXPERIMENT
16 BIT COMPARATOR USING 4 BIT COMPARATORS

1 Objective
Design a 16 bit comparator using 4 bit comparators

2 Aim
Test the functioning of the 16 bit comparator kit which is designed using 4 bit comparators

Board Design
a) Design objectives:
i. Use four 4 bit comparators
ii. Implement 16 bit Comparator
iii. Indicate the Comparator all the three outputs status using LEDs
b) Components:
Technology: There are two choices for selecting the components i) TTL ii) CMOS.
Here TTL ICs are chosen for implementing. Designs will depend on the technology
Requirement IC/Value Qnty Remark
i. 4 Bit Comparator 74LS85 4Nos 4X4 Bit to 16 comparator
ii. Driver for LEDs 74LS16 1 Each IC has 6 open Collector (No
internal collector load) Inverter
Drivers
iii. LED --- 3 Output Pin 6: A>B
Output Pin 4: A=B
Output Pin 2: A<B
iv. Resistors 220 Ohms 3 LED Current limiting
v. Shorting Links 2 Pin with 32 One unit for each input. When
Link shorted it provides logic ‘0’ to
encoder input and when open the
status at the encoder input is logic
‘1’ through pull up resistor
vi. Resistors SIP 100E 4 Each SIP has 8 resistors of 100
Ohms each with one end of all
resistors connected together. Please
see the circuit for better
understanding

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DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB 2018

c) Component Details
i. 74LS85: 4 Bit Magnitude comparator
 Pin numbers are marked
inside the chip diagram
 Pin names are marked
outside the chip diagram
 A0, A1, A3 are binary inputs correspond to
Magnitude ‘A’ with A0 as LSB
 B0, B1, B3 are binary inputs correspond to
Magnitude ‘B’ with B0 as LSB
 A > Bi Input to Comparator for cascading
 A = Bi Input to Comparator for cascading
 A < Bi Input to Comparator for cascading
 A > Bo output from Comparator for cascading
comparators and status indication
 A = Bo output from Comparator for cascading
comparators and status indication
 A < Bo output from Comparator for cascading
comparators and status indication
 VCC .. Connected to5V
 GND … Connected to circuit common point

a) There are two binary data ‘A’ and ‘B’, each of 16 bits. The data is grouped into
4 sets of 4 Bits each (AH, AM-H, AM-L, AL) and (BH, BM-H, BM-L, BL): H-MSD, M-L:
LSD of Middle Digits, M-H: MSD Middle Digits and L: LSD
b) Comparison is always done from MSD to LSD.
c) If AH > BH then A>B output is set ‘1’, and A<B and A=B outputs are set to ‘0’
d) If AH < BH then A>B output is set ‘1’, and A<B and A=B outputs are set to ‘0’
e) If AH = BH , then the process described in c) & d) is carried on AM-H and BM-H

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DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB 2018

f) If AH = BH and AM-H = BM-H then process described in c) & d) is carried on A M-L

and BM-L
g) If AH = BH , AM-H = BM-H and AM-L = BM-L then process described in c) & d) is
carried on AL and BL
h) If AH = BH , AM-H = BM-H , AM-L = BM-L and AL = BL then A>B output is set ‘0’, A<B
output is set to ‘0’ and A=B outputs is set to ‘1’
i) Since AH and BH are most Significant digits of 16 bit datas, higher significant
digits to AH and BH are Zero for ‘A’ and ‘B’. Hence the MSD comparator
cascading inputs are tied as follows. (Ai>Bi)= 0, (Ai<Bi) = 0 and (Ai=Bi) = 1
j) (Ao>Bo), (Ao<Bo) and (Ao=Bo), the comparator outputs of the LSD are connected
to LEDs through dirver 74LS16.

ii. 74LS16: HEX INVERTER WITH OPEN COLLECTOR

iii. SIP Resistors

Each of the terminals 2,3,4,5,6,7,8 and 9 is one end of a
resistor. Pin 1 is a common to which the other end of all
resistors is connected. The connection details shall be
checked from the circuit diagram

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DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB 2018

iv. 2 Pin Connector and a plug used to short both pins

d) Design Basics:
A. The design concept is very simple. The design shall have 32 inputs and 3
comparator status outputs corresponding A>B, A<B and A=B.
B. The 32 inputs are divided into two groups A0-A15 and B0-B15, representing
magnitude ‘A’and magnitude ‘B’. Further A group of A0-A15 is divide into (A3-
A0), (A7-A4), (A11-A8) and (A15-A12) and B group of B0-B15 is divide into
(B3-B0), (B7-B4), (B11-B8) and (B15-B12).
C. (B15-B12) & (A15-A12) the MSD of the 16 bits data are connected to one (first)
comparator. As described in earlier section, its cascading inputs are fixed as
(Ai>Bi)= 0, (Ai<Bi) = 0 and (Ai=Bi) = 1.
D. (B8-B11) & (A8-A11) the next MSD of data are connected to second
comparator. Its cascading inputs (Ai>Bi), (Ai<Bi) and (Ai=Bi) are connected to
first comparator outputs (Ao>Bo), (Ao<Bo) and (Ao=Bo) respectively.
E. (B4-B7) & (A4-A4) the next MSD of data are connected to third comparator. Its
cascading inputs (Ai>Bi), (Ai<Bi) and (Ai=Bi) are connected to second
comparator outputs (Ao>Bo), (Ao<Bo) and (Ao=Bo) respectively.
F. (B0-B3) & (A0-A3) the LSD of data are connected to forth comparator. Its
cascading inputs (Ai>Bi), (Ai<Bi) and (Ai=Bi) are connected to third comparator
outputs (Ao>Bo), (Ao<Bo) and (Ao=Bo) respectively.
G. The LSD comparator outputs (Ao>Bo), (Ao<Bo) and (Ao=Bo) are connected to
LEDs through driver.

e) Design:
The design may be divided into 5 sections
i) Input Connections to Comparators
ii) Inter Connections between comparators
iii) Connecting LEDs to Comparator outputs

Details of Each of the Sections

i) Input Connections to a comparator
10

12
A0 Any input will assume logic ‘0’or Logic ‘1’.
A<BO
7

VCC
13
A1

A2
When the 2 pin connector terminals are open,
A=BO
6

5
15
A3 then input say, A0 (Pin 10) will be Logic ‘0’.
A>BO

9
B0
When the connector terminals are short
7485
11
circuited (by putting shorting link), A0 (Pin 10)
2
2
3
4
5
6
7
8
9

B1 A<BI
14 3
R8
100E 1
B2

B3
will be at Logic ‘1’.
A=BI

A>BI
4
1

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DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB 2018

ii) Cascading connections using comparator inputs and Outputs

10

12
A0 It may be seen that the comparator used for comparing MSD
A<BO
7

13
A1

A2
data cascading inputs are connected as follows.
A=BO
6

5
15
A3 A>B is connected to GND
A>BO

7485 [Next MSD]

9
B0
A<B is connected to GND
11

14
B1 A=B is connected to VCC
A<BI
2

3
B2 A=BI
1 4
B3 A>BI

U7 And MSD comparator cascading outputs are connected as

10

12
A0
A<BO
7 follows.
A1 6
13
A2
A=BO
5
A>Bo output is connected to A> Bi input
15
A3
A>BO
A>Bo output is connected to A> Bi input
9
B0
7485 [MSD] A=Bo output is connected to A= Bi input
11 2
B1 A<BI
14 3
B2 A=BI VCC
1 4
B3 A>BI

10
For all other sections the cascading is done as follows.
A0 2
12
A1
A<BI
3
(Ai > Bi) input of LSD is connected to MSD (Ao > Bo) output
A=BI
13

15
A2
A>BI
4 (Ai < Bi) input of LSD is connected to MSD (Ao < Bo) output
A3
(Ai = Bi) input of LSD is connected to MSD (Ao = Bo) output
9
B0
11 7485 5
B1 A>BO
14 6
B2 A=BO
1 7
B3 A<BO

1 4
B3 A>BI
14 3
B2 A=BI
11 2
B1 A<BI
9 7485
B0

15
A3 5
13 A>BO
A2 6
12 A=BO
A1 7
10 A<BO
A0

iii) Connecting LEDs to Comparator outputs

The output bit status is indicated using LED and hence 3 bits are indicated by
means of 3 LEDs. Let us assume that when bit is = 0, then LED is OFF and when
the bit is ‘1’, the LED is ON. Considering that the used LED driver is a NOT gate,
the following circuit helps controlling the LED as above.

A>B1
COMPARATOR OUTPUT 1 2
VCC
7416 220E

Status 7416 LED Remark

output status
0 1 OFF No current flows
1 0 ON Assuming the drop across the diode (LED) is
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DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB 2018

about 1V (Depend on the LED colour), and VCC

= 5V, the Current through the LED is
approximately = (5-1)/220 = 18mA.
Hence to represent 3 status bits, 3 circuits are required.
Each status output is connected to a driver-inverter (74LS16).

1 4
B3 A>BI
14 3
B2 A=BI
11 2
B1 A<BI R10
U8 A>B
9 7485 5 7416 6 220E
B0 VCC

15
A3 5 U7B
13 A>BO R9
A=B
A2 6 3 7416 4 220E
12 A=BO
A1 7
10 A<BO
A0
R8
A<B
1 2 220E
7416

f) Circuit Diagram
U2
A8 10
A0
A4 10
A0
7 2
A9 12
A1
A<BO A5 12
A1
A<BI
6 3
A10 13
A2
A=BO A6 13
A2
A=BI
5 4
A11 15
A3
A>BO A7 15
A3
A>BI

B8 9
B0
B4 9
B0
7485 VCC
B9 11
B1 A<BI
2 B5 11
B1
7485
A>BO
5
U3
B10 14
B2 A=BI
3 B6 14
B2 A=BO
6
R7 R6 R5
B11 1
B3 A>BI
4 B7 1
B3 A<BO
7 220E 220E 220E

VCC VCC
2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

A>B A=B A<B

R2
100E R3
100E
1 1

U1
A12 10
A0 7 B3 1 4
A13 6

2
12 A<BO B3 A>BI
A1 6 B2 14 3
A14 13 A=BO B2 A=BI
A2 5 B1 11 2 U5C U5B U5A
A15 15 A>BO B1 U4 A<BI 7416 7416 7416
A3 B0 9 7485
5

1
B0
B12 9 7485
B0 A3 15
B13 11 2 A3 5
B1 A<BI A2 13 A>BO
B14 14 3 A2 6
B2 A=BI VCC
A1 12 A=BO
B15 1 4 A1 7
B3 A>BI A0 10
A0
A<BO

VCC
2
3
4
5
6
7
8
9

VCC

R1
100E
2
3
4
5
6
7
8
9

100E
R4
1

g) Operating Procedure:
The photograph of Kit’s front plate is shown here. On to the left 16 2-pin connectors are
placed into 4 groups. First top 4 connectors represent (B11-15), Next 4 connectors
represent (A11-15). The next 4 connectors represent (B8-12)and Next 4 connectors
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DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB 2018

represent (A8-11). The pattern

continue till all the 32 bits are
represented. When a connector is
open, then the respective input is
‘0’. When connector pins are
shorted using short link, then the
respective input is ‘1’.

h) Conclusions: The design explained above is not unique. The design depends on the
chosen comparator and its functional pins. Even when CMOS Ics are employed, 74LS16
can still be employed to drive the LEDs as the 74LS16 inputs are compatible with both TTL
and CMOS. The current limiting resistors’ value depends on the LED colour. The resistor
value so chosen may vary and lower the value higher the brightnessand vice versa.
However higher the current will reduce the LED life. Student may explore alternate design
of interfacing the encoder output sets to LEDs, instead of using MUX. Student shall study
implementing the same with 74885, an 8 bit comparator instead of 7485.

i) Viva Questions:

7 DESIGN & MANUAL: Dr. P. Sudhakara Rao [VMTW]