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Voltus can be used throughout the entire design flow to identify possible IR drop issues
before signoff. From silicon prototyping and floorplanning, all the way down to
optimization and signoff, the seamless integration with Innovus System, Tempus Timing
Signoff Solution (Tempus), and Sigrity help improve productivity and convergence.
The Quick Start Guide will demonstrate the basics of generating power-grid library, and
running a power and IR drop analysis using TCL scripts. For GUI and more advance flow,
please download the official training kit.
2. Data requirements
The following are a list of input files required for Voltus
Environment Setup
• Set the installation directory in following environment variables:
o PATH: <Install_dir>/<platform>/bin
o LD_LIBRARY_PATH: <Install_dir>/<platform>/lib
• Set the license variable using CDS_LICENSE_FILE
o Example: setenv CDS_LICENSE_FILE 5280@lic_server
Documentation
• Full documentation can be accessed from the Cadence Support website or from
the installed software. From the software, you have access to the Cadence
online documentation system, which includes documentation library viewing and
search capabilities.
Cell PG library is generated to enable more accurate rail analysis. These libraries are
generated for standard cells, memories, IOs and custom macros in the design. The Cell PG
library contain three types of views for each cell viz. Early, IR and EM. Based on the
analysis type and accuracy requirement in rail analysis, Voltus will pick the best
view to model the design components.
Tip: For standard cells, the PGV model each standard cells with SPICE
simulated decoupling capacitances. For macros/IOs/memories, PGV model
the design components using SPICE simulated decoupling capacitance,
GDS extracted power network, and more accurate current distribution.
Refer to Voltus User Guide for more information.
The library generation for technology and power-grid library is very similar other than
additional inputs (spice netlist/model, GDS, etc.) for standard cells and macros. The
Quick Start Guide will demonstrate generating a technology library, which can be used
to run rail analysis.
• Import OA database
Note: Voltus requires verilog, LEF, SDC, DEF and timing libraries to run
analysis. If the database is missing some of the required input, it must be
loaded first using setup script or Innovus configuration file.
Tip: Voltus offers design browser and sanity checks to help verify the completeness
of input data. Refer to Voltus User Guide on following commands:
• check_design (Check LEF, physical/logical netlists, SPEF data)
• checkTimingLibrary (Check missing power tables in .lib)
• verify_connectivity (Check power grid integrity)
• verify_power_via (Check missing vias)
After the design is loaded, set up the power analysis options using the command
set_power_analysis_mode, follow by setting up the activity factors and import any
activity files. Start the power analysis using report_power command (sample below)
voltus> set_power_analysis_mode \
-method static \
-create_binary_db true \
–write_static_currents true
voltus> set_default_switching_activity \
-global_activity 0.15
voltus> set_power_output_dir static_power
voltus> report_power -outfile static_power/design.rpt
Tip: create_binary_db will create power database that can be used at later
time for GUI interactive debug, write_static_currents will
generate the current files required for rail analysis
Once the static power analysis is complete, static power summary report can be found
in the log file (Total Switching/Internal/Leakage Power), detailed report will be written
to file specified through ‐outfile. User can generate incremental reports using additional
report_power commands for clock domain, power domain/net, hierarchy level,
instance/cell/cell types.
Voltus GUI offers many more debugging features to analyze power result:
• Layout overlay power plots: total power, internal power, switching power,
leakage power, frequency domain, transition density and loading capacitance
• Static power histograms and pie-charts
• Interactive queries and violation browser to debug high power instances
Tip: Refer to Voltus User Guide and Voltus Training material on GUI usage
©2016 Cadence Design Systems, Inc. All rights reserved. 10/03/168
7. Static Rail Analysis
Voltus static rail engine offers static IR drop and ElectroMigration (EM) analysis. The rail
analysis by default will also perform power-grid integrity, voltage source/resistor/tap
current, effective instance voltage, and power-gate/package analysis as applicable. Some
of the key features supported by Static Rail Analysis include:
• Full power-grid extraction for DEF, RDL and full-chip GDS design
• Support extracting manufacturing effects like erosion, wire edge enlargement,
temperature, dishing, slotting, cladding, etc. for signoff
• Accuracy settings to adjust performance/accuracy tradeoff
• Support package model for realistic IR drop behavior
Note: 1. Analysis type is picked as per command option used and input data provided
2. Voltus support concurrent Power and rail analysis
Once static power analysis is complete, set up the rail analysis options using the
command set_rail_analysis_mode, followed by specifying the power
domain/nets and pad locations. Start the rail analysis using analyze_rail command
(sample below)
voltus> set_rail_analysis_mode \
-method static \
-accuracy hd \
-power_grid_library {techonly.cl stdcell.cl} \
voltus> set_power_domain -name All -pwrnets VDD -gndnets VSS
voltus> set_pg_nets -net VDD -voltage 1.08
voltus> set_pg_nets -net VSS -voltage 0.0
voltus> set_power_data -format current -scale 1 \
{static_VDD.ptiavg static_VSS.ptiavg}
voltus> set_power_pads -net VDD -format xy -file VDD.ppl
voltus> set_power_pads -net VSS -format xy -file VSS.ppl
voltus> analyze_rail -type domain \
-results_directory static_rail All
Note: The technology library (see above techonly.cl) need to be the first
power_grid_library input, followed by cell power-grid libraries. Voltus
will pick Early view for xd accuracy, IR view for hd accuracy, and EM
view for hd accuracy if EM analysis is enabled. If power grid library for
a cell is not available, the tech view from the technology library will be
used.
Once the static rail analysis is complete, all the analysis summary can be found in the log
file, and the individual ascii/html report will be outputted to <PG_net> and
<PG_net>/Reports directories. A gif plot for each of the analysis is also available
under <PG_net> directory.
Tip: Refer to Voltus User Guide and Voltus Training material on GUI usage
Dynamic power analysis supports two flows: vectorbased and vectorless. The
vectorbased flow uses the waveform activities from VCD/FSDB, while the vectorless flow
uses activity propagation with user specified activity level, or partial/full annotation of
VCD/FSDB/TCF/SAF files.
Since the emphases of dynamic analysis is placed on IR drop, Power-up, and Decap
analysis, it is common to run dynamic power and rail analysis concurrently. Voltus
supports running dynamic analysis using a single analyze_rail command as illustrated
below.
voltus> set_power_analysis_mode \
-method dynamic_vectorless \
-power_grid_library {techonly.cl}
voltus> set_default_switching_activity \
-global_activity 0.15
voltus> set_rail_analysis_mode \
-method dynamic \
-accuracy hd \
-power_grid_library {tech.cl std.cl mem.cl} \
-report_power_in_parallel true \
-decap_opt_method feasibility \
-generate_decap_eco true
voltus> set_power_domain -name All -pwrnets VDD -gndnets VSS
voltus> set_pg_nets -net VDD -voltage 1.08
voltus> set_pg_nets -net VSS -voltage 0.0
voltus> set_power_pads -net VDD -format xy -file VDD.ppl
voltus> set_power_pads -net VSS -format xy -file VSS.ppl
voltus> analyze_rail -type domain All
Once the dynamic rail analysis is complete, all the analysis summary can be found in the
log file, and the individual ascii/html reports and gif plots will be outputted to <PG_net>
and <PG_net>/Reports directories.
The Voltus GUI offers additional debugging features to analyze dynamic power/rail
result:
• Plots instance/total current, composite waveforms, voltage source current, etc.
• Layout overlay rail analysis plots: IR drop, Decap Density, Effective Instance
Voltage, grid capacitance, device tap currents, drop across package, instance
based effective resistance, unconnected grid, etc.
• Dynamic IR Drop and Tap Current movies
• Interactive queries and violation browser to debug IR hotspots
Traditionally ERA was part of Innovus, starting 15.1 Voltus standalone also support this
capability. ERA does not need fully routed power-grid because it has the ability to create
virtual power connections based on logical connectivity. ERA allows variety of user defined
power constraints in interactive manner which enables it to quickly perform rail analysis and
check if design meets those power constraints.
Tip: Static Power and Rail Analysis without PGV can also be run using the
Innovus license.
For additional information on ERA refer Voltus user guide at: https://support.cadence.com
ResourcesProduct ManualsSSV13.2(Latest Version) Voltus User Guide
For “do yourself” refer Voltus RAK (Rapid Adoption Kit) for ERA at ‘Related Solutions’
sections below the PDF.
This pdf can be searched with the document title on https://support.cadence.com
During dynamic rail analysis, the effective instance voltage is calculated inside the
switching window of the instance to obtain the worst operating voltage between power
and ground.
Cadence Support
https://support.cadence.com
877-CDS-4911 (877-237-4911)