PD - 91342B

IRF540NS
l Advanced Process Technology
IRF540NL
l Ultra Low On-Resistance
HEXFET® Power MOSFET
l Dynamic dv/dt Rating D
l 175°C Operating Temperature VDSS = 100V
l Fast Switching
l Fully Avalanche Rated RDS(on) = 44mΩ
Description ®
G
Advanced HEXFET Power MOSFETs from
International Rectifier utilize advanced processing ID = 33A
techniques to achieve extremely low on-resistance per S
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application. D2 Pak TO-262
The through-hole version (IRF540NL) is available for low- IRF540NS IRF540NL
profile applications.

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V ‡ 33
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V ‡ 23 A
IDM Pulsed Drain Current ‡ 110
PD @TC = 25°C Power Dissipation 130 W
Linear Derating Factor 0.87 W/°C
VGS Gate-to-Source Voltage ± 20 V
IAR Avalanche Current 16 A
EAR Repetitive Avalanche Energy 13 mJ
dv/dt Peak Diode Recovery dv/dt ƒ‡ 7.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.15
°C/W
RθJA Junction-to-Ambient (PCB mount)** ––– 40

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IRF540NS/IRF540NL
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, I D = 1mA ‡
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 44 mΩ VGS = 10V, ID = 16A „
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 21 ––– ––– S VDS = 50V, ID = 16A„ ‡
––– ––– 25 VDS = 100V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 71 ID = 16A
Qgs Gate-to-Source Charge ––– ––– 14 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 21 VGS = 10V, See Fig. 6 and 13 „‡
td(on) Turn-On Delay Time ––– 11 ––– VDD = 50V
tr Rise Time ––– 35 ––– ID = 16A
ns
td(off) Turn-Off Delay Time ––– 39 ––– RG = 5.1Ω
tf Fall Time ––– 35 ––– VGS = 10V, See Fig. 10 „ ‡
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH
from package G

LS Internal Source Inductance ––– 7.5 –––

and center of die contact S

Ciss Input Capacitance ––– 1960 ––– VGS = 0V

Coss Output Capacitance ––– 250 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 40 ––– pF ƒ = 1.0MHz, See Fig. 5 ‡
EAS Single Pulse Avalanche Energy‚‡ ––– 700… 185† mJ IAS = 16A, L = 1.5mH

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– 33
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 110

(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C, IS = 16A, VGS = 0V „
trr Reverse Recovery Time ––– 115 170 ns TJ = 25°C, IF = 16A
Qrr Reverse Recovery Charge ––– 505 760 nC di/dt = 100A/µs „‡
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
‚ Starting TJ = 25°C, L =1.5mH
RG = 25Ω, IAS = 16A. (See Figure 12)
ƒ ISD ≤ 16A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
„ Pulse width ≤ 400µs; duty cycle ≤ 2%.
… This is a typical value at device destruction and represents
operation outside rated limits.
† This is a calculated value limited to TJ = 175°C .
‡ Uses IRF540N data and test conditions.
**When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniques refer to application
note #AN-994

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 IRF540NS/IRF540NL

1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V

I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)

7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V
100 100

4.5V
10 4.5V 10

20µs PULSE WIDTH 20µs PULSE WIDTH

TJ = 25 °C TJ = 175 °C
1 1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.5
ID = 33A
RDS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

3.0

2.5
(Normalized)

TJ = 25 ° C 2.0
100
1.5
TJ = 175 ° C
1.0

0.5
V DS = 50V
20µs PULSE WIDTH VGS = 10V
10 0.0
4.0 5.0 6.0 7.0 8.0 9.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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 IRF540NS/IRF540NL

3000 20
VGS = 0V, f = 1MHz ID = 16A
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd VDS = 80V

VGS , Gate-to-Source Voltage (V)

2500 Coss = Cds + Cgd VDS = 50V
16 VDS = 20V
C, Capacitance (pF)

Ciss
2000
12

1500

8
1000

Coss
4
500
Crss FOR TEST CIRCUIT
SEE FIGURE 13
0 0
1 10 100 0 20 40 60 80
VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)

ID, Drain-to-Source Current (A)

100 100

TJ = 175 ° C

10
100µsec
10

TJ = 25 ° C 1msec

1 1
T A = 25°C 10msec
T J = 175°C
V GS = 0 V Single Pulse
0.1 0.1
0.2 0.6 1.0 1.4 1.8
VSD ,Source-to-Drain Voltage (V) 1 10 100 1000
VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRF540NS/IRF540NL

35 RD
VDS
30
VGS
D.U.T.
RG
ID , Drain Current (A)

25 +
-VDD

20
V GS
Pulse Width ≤ 1 µs
15 Duty Factor ≤ 0.1 %

10
Fig 10a. Switching Time Test Circuit
5 VDS
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)

10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Thermal Response (Z thJC )

1
D = 0.50

0.20

0.10 P DM
0.1 0.05 t1
0.02 SINGLE PULSE
0.01 (THERMAL RESPONSE) t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF540NS/IRF540NL

400
ID

EAS , Single Pulse Avalanche Energy (mJ)

15V
TOP 6.5A
11.3A
BOTTOM 16A
L DRIVER 300
VDS

RG D.U.T +
V
- DD 200
IAS A
20V
tp 0.01Ω

Fig 12a. Unclamped Inductive Test Circuit 100

V(BR)DSS
tp 0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( °C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current
I AS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

VGS +
V
D.U.T. - DS
QGS QGD
VGS
VG 3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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 IRF540NS/IRF540NL
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T* • Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• ISD controlled by Duty Factor "D" VDD
-
• D.U.T. - Device Under Test
VGS

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive

P.W.
Period D=
P.W. Period

[VGS=10V ] ***

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% [ISD ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

Fig 14. For N-channel HEXFET® power MOSFETs

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IRF540NS/IRF540NL
D2Pak Package Outline
Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information

7+,6,6$1,5)6:,7+ 3$57180%(5
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8 www.irf.com
 IRF540NS/IRF540NL
TO-262 Package Outline
Dimensions are shown in millimeters (inches)

TO-262 Part Marking Information

(;$03/( 7+,6,6$1,5//
/27&2'( 3$57180%(5
$66(0%/('21:: ,17(51$7,21$/
5(&7,),(5
,17+($66(0%/</,1(& /2*2
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SRVLWLRQLQGLFDWHV/HDG)UHH $66(0%/< <($5 
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OR
3$57180%(5
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5(&7,),(5
/2*2
'$7(&2'(
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$66(0%/< 352'8&7237,21$/
/27&2'( <($5 
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$ $66(0%/<6,7(&2'(

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IRF540NS/IRF540NL

D2Pak Tape & Reel Information

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161)
1.50 (.059) 0.368 (.0145)
3.90 (.153)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Data and specifications subject to change without notice.

This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.07/05
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/