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Analog to Digital

(A/D) and Digital to


Analog (D/A)

Chapter 2 Conversion
Wail Gueaieb

Analog to Digital (A/D) and Digital to Analog (D/A)


Conversion
Lecture notes of ELG4159: Integrated Control Systems

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM

Wail Gueaieb
EECS
University of Ottawa
2.1
Analog to Digital
Outline (A/D) and Digital to
Analog (D/A)
1 Introduction Conversion
Wail Gueaieb
2 Fundamentals of A/D Conversion
Resolution
I/O Mapping
Conversion (Quantization) Error
3 A/D Conversion Using PIC16F917
ADC Configuration
Reference Voltage
Introduction
Conversion Speed
Fundamentals of A/D
Starting a Conversion Conversion
Accessing the ADC’s Output A/D Conversion Using
ADC Configuration PIC16F917

4 Digital to Analog Converters (DACs) Digital to Analog


Converters (DACs)
Components of a DAC
DAC Through PWM
Output Voltage
R-2R Ladder Network DAC
5 DAC Through PWM
Pulse Width Modulation (PWM)
Timer 2 Module on the PIC16F917 [PIC16F917 DataSheet, 2007,
Section 7]
Capture/Compare/PWM (CCP) Module [PIC16F917 DataSheet, 2007,
Section 15]
Generating a PWM Pulse at Pin CCPx
Configuring the CCP Module to PWM Operation
2.2
Analog to Digital
Introduction (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• Digital devices (microcontrollers, computers, digital oscilloscopes, etc.)


can only process digital data (binary coded format).
• For them to process signals fed by analog devices (e.g., current, voltages) Introduction
these signals have to be converted to digital quantities first. Fundamentals of A/D
Conversion
• Likewise, before a digital signal is used by an analog device (motor,
A/D Conversion Using
heater, etc.) it has to be converted to an analog quantity first. PIC16F917
• The devices responsible for converting quantities from analog to digital Digital to Analog
and vice-versa are called Converters (DACs)

• Analog to Digital Converters (ADC) DAC Through PWM


• Digital to Analog Converters (DAC)

2.3
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Digital Analog

Reference
Input r(t) r(k) u(k) u(t) Output c(t)
Digital Analog
ADC DAC
Processor Plant Introduction

Fundamentals of A/D
Conversion
Analog Signal Analog
ADC
cs (k) cs (t) Sensor A/D Conversion Using
Digital Signal PIC16F917

Digital to Analog
Converters (DACs)
Figure 1: Configuration of a digital control system. DAC Through PWM

2.4
Analog to Digital
Fundamentals of A/D Conversion (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• A typical ADC setup is shown in Fig. 2.


• The input to the ADC receives the analog signal Vi (Vx in the figure),
compares it to the ADC’s full scale (FS = VRH − VRL ), converts it into a Introduction
fraction of this full scale, and presents it at the output as an unsigned Fundamentals of A/D
binary value N. Conversion
Resolution
• The digital output N depends on two fundamental parameters: I/O Mapping
• The low and high reference voltages, VRL , VRH of the ADC, and Conversion (Quantization)
Error
• The number of bits k the ADC uses to code its output N.
A/D Conversion Using
• A k -bit ADC can generate a maximum of 2k output levels, called quanta PIC16F917

(or quantization size). Digital to Analog


Converters (DACs)

DAC Through PWM

2.5
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Introduction

Fundamentals of A/D
Conversion
Resolution
I/O Mapping
Conversion (Quantization)
Error

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM

Figure 2: Analog to digital conversion process (courtesy of Smaili et


al. 2008 [Smaili and Mrad, 2007])

2.6
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• The input signal Vi has to be between the low reference voltage VRL and
high reference voltage VRH of the ADC.
• The low reference voltage VRL is also called the offset of the ADC.
• The difference between VRL and VRH is called the range spam or full
Introduction
scale FS.
Fundamentals of A/D
• An input voltage Vi equal to VRL is to translated by the ADC into a binary Conversion
Resolution
output N = 000000 . . . 00 (all zeros). I/O Mapping

• An input voltage Vi = VRH is translated into N = 11111 . . . 11 (all ones). Conversion (Quantization)
Error

• When VRL and VRH have the same polarity, such as (0, +5V ) or (0, −5V ) A/D Conversion Using
PIC16F917
of instance, the ADC is said to be unipoler; otherwise it is bipolar, as in the
case of (VRL , VRH ) = (−2V , +5V ) for example. Digital to Analog
Converters (DACs)

DAC Through PWM

2.7
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Definition (Resolution) Conversion
Wail Gueaieb
The resolution of an ADC is the smallest variation in the analog input that
would cause the ADC output code to change by one level (one quantum).
When the ADC’s input spans its full scale, the resolution VQ is given by

FS
VQ = = 1 LSB
2k
Introduction

In other words, the resolution represents the magnitude of the quantum Fundamentals of A/D
Conversion
(one-step-size) and it corresponds to the value of the LSB in the output code. Resolution
I/O Mapping
Remark Conversion (Quantization)
Error

• When the ADC’s input deos not span its full scale, or when it is sampling a A/D Conversion Using
PIC16F917
voltage corresponding to a physical quantity of unit x (e.g., kg, ◦C, F, Ω,
Digital to Analog
etc.), then the ADC’s resolution can be measured in that unit (or inV) as Converters (DACs)

DAC Through PWM


ADC’s input span in unit x FS in V
VQ = · = 1 LSB
ADC’s input span in V 2k
• In some literature the number of output bits k of the ADC is referred to as
the resolution, but in this course we will be using the former convention.

2.8
Analog to Digital
I/O Mapping (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• There are two most common transfer functions to map an ADC’s analog
input Vi ∈ [VRL , VRH ] to a digital output N.

Type 1 I/O Mapping

• This type of mapping is illustrated in Fig. 3.


• This mapping is centered within the Full Scale (FS). Introduction

Fundamentals of A/D
• In this type, N is related to Vi by Conversion
Resolution
( " #) I/O Mapping
2k Conversion (Quantization)
(N)10 = Floor (Vi − VRL ) Error
FS
truncate to (2k −1) A/D Conversion Using
PIC16F917

• Given an output N, the exact ADC’s input Vi cannot be exactly determined Digital to Analog
Converters (DACs)
but it may be approximated by (Vi )est. . DAC Through PWM

 
1 FS
(Vi )est. = (N)10 + + VRL
2 2k

2.9
N Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
111
Wail Gueaieb

110

101

100
Introduction
VE
LSB Fundamentals of A/D
011 Conversion
VE VQ
Resolution
I/O Mapping
010 Conversion (Quantization)
Error

A/D Conversion Using


001 PIC16F917

Digital to Analog
Converters (DACs)
000 Vi
DAC Through PWM
0 FS/8 2FS/8 3FS/8 4FS/8 5FS/8 6FS/8 7FS/8 FS

Possible values of (Vi )est

Figure 3: 3-bit I/O mapping of type 1.

2.10
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Type 2 I/O Mapping

• This type of mapping is illustrated in Fig. 4.


• This mapping is not centered within the Full Scale (FS), but rather shifted
(biased) to the left by 1/2 LSB (1/2 VQ ).
• In this type, N is related to Vi by
Introduction

Fundamentals of A/D
( " #)
2k Conversion
(N)10 = Round (Vi − VRL ) Resolution
FS
truncate to (2k −1) I/O Mapping
Conversion (Quantization)
Error

• Given an output N, the exact ADC’s input Vi cannot be exactly determined A/D Conversion Using
PIC16F917
but it may be approximated by (Vi )est. .
Digital to Analog
Converters (DACs)
FS
(Vi )est. = (N)10 k + VRL DAC Through PWM
2

2.11
N Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
111 Wail Gueaieb

110

101

100
Introduction
VE LSB Fundamentals of A/D
011 Conversion
VQ Resolution
I/O Mapping
Conversion (Quantization)
010 Error
VE A/D Conversion Using
PIC16F917
001
Digital to Analog
Converters (DACs)
000 Vi DAC Through PWM
0 FS/8 2FS/8 3FS/8 4FS/8 5FS/8 6FS/8 7FS/8 FS

Possible values of (Vi )est

Figure 4: 3-bit I/O mapping of type 2.

2.12
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Example Wail Gueaieb

A unipolar 8-bit ADC of zero offset and 5 V full scale is characterized by a


type-2 I/O mapping.
1 Calculate the ADC’s output if it is fed with an input signal of 2 V.
( " #)
2k
The output is (N)10 = Round (Vi − VRL )
FS
truncate to (2k −1) Introduction
( " #)
8 Fundamentals of A/D
2 Conversion
= Round (2 V − 0)
5V 8
Resolution
truncate to (2 −1) I/O Mapping
Conversion (Quantization)
= {Round [102.4]}truncate to (28 −1) = 102 Error

A/D Conversion Using


PIC16F917
2 What is the estimated input corresponding to a binary output of
(01001110)2 ? Digital to Analog
Converters (DACs)

The output is N = (01001110)2 = (78)10 DAC Through PWM

FS 5V
(Vi )est. = (N)10 + VRL = 78 8 + 0 = 1.5234 V
2k 2

2.13
Analog to Digital
Conversion (Quantization) Error (A/D) and Digital to
Analog (D/A)
Conversion
• The conversion error (also called conversion uncertainty or quantization Wail Gueaieb
error) VE is the difference between the estimated (digitized) ADC’s analog
input signal (Vi )est. and its real value Vi .

VE = (Vi )est. − Vi

VE in type 1 I/O mapping Introduction

Fundamentals of A/D
• An example of the profile of VE for a 3-bit ADC with I/O mapping of type 1 Conversion
Resolution
is shown in Fig. 5. I/O Mapping
• Note how in this type of conversion VE is always enveloped in the interval Conversion (Quantization)
Error
[−1/2 LSB, +1/2 LSB]. A/D Conversion Using
PIC16F917

Digital to Analog
VE (in LSB) Converters (DACs)

+1/2 DAC Through PWM


Vi (in LSB)
1 2 3 4 5 6 7 8
−1/2

Figure 5: Profile of VE for a 3-bit ADC with I/O mapping of type 1.

2.14
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

VE in type 2 I/O mapping

• An example of the profile of VE for a 3-bit ADC with I/O mapping of type 2
is shown in Fig. 6.
• Note how in this type of conversion VE remains in the interval
[−1/2 LSB, +1/2 LSB], except in the last 1/2 LSB of Vi where
Introduction
VE ∈ [−1/2 LSB, −1 LSB].
Fundamentals of A/D
Conversion
Resolution
VE (in LSB) I/O Mapping
Conversion (Quantization)
+1/2 Error
Vi (in LSB)
1 2 3 4 5 6 7 8 A/D Conversion Using
−1/2 PIC16F917
−1 Digital to Analog
Converters (DACs)

Figure 6: Profile of VE for a 3-bit ADC with I/O mapping of type 2. DAC Through PWM

2.15
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Example
A 2-bit ADC of zero offset and 8 V full scale is characterized by a type-2 I/O Introduction
mapping. Fundamentals of A/D
Conversion
1 Compute the conversion error corresponding to an input of 4 V. Resolution

2 Compute the quantization error corresponding to an input of 4.99 V. I/O Mapping


Conversion (Quantization)
Error

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM

2.16
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Example [Smaili and Mrad, 2007]


A temperature sensor with a gain of 10 mV/◦C is used to measure the
temperature of a process within the range of −50 ◦C to 200 ◦C. An 8-bit ADC
with a range from −5 V to 5 V is used to sample the sensor’s output.
Introduction
1 Compute the ADC’s resolution in ◦C and V. Fundamentals of A/D
Conversion
2 Repeat the above question assuming that the sensor is interfaced with the Resolution
ADC through a proper signal-conditioning circuit. I/O Mapping
Conversion (Quantization)
3 With the signal-conditioning circuit in place, determine the ADC’s output Error

corresponding to a temperature of of 50 ◦C. Assume a type-2 I/O A/D Conversion Using


PIC16F917
mapping.
Digital to Analog
Converters (DACs)

DAC Through PWM

2.17
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Example
An ADC is needed to sample the output voltage of a pressure sensor gaged as
Introduction
0 V for 0 kPa and 10 V for 10 kPa.
Fundamentals of A/D
1 If the conversion error is not to exceed 0.01 kPa and the ADC uses type-1 Conversion
I/O mapping, determine the minimum number of bits required. Resolution
I/O Mapping

2 Repeat the above question for a type-2 I/O mapping. Conversion (Quantization)
Error

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM

2.18
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Example
A temperature sensor with a gain of 10 mV/◦C is used to measure the
temperature of an object which is in the range of 0 ◦C to 100 ◦C. The sensor’s
output is sampled by an 8-bit ADC with 0 V and 10 V as low and high reference Introduction

voltages, respectively. Fundamentals of A/D


Conversion
1 Compute the ADC’s resolution in ◦C and V. Resolution
I/O Mapping
2 Design a signal conditioning circuit to interface the sensor to the ADC. Conversion (Quantization)
Error
3 With the signal-conditioning circuit in place, compute the ADC’s resolution
A/D Conversion Using
in ◦C and V. PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM

2.19
Analog to Digital
A/D Conversion Using PIC16F917 (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• The PIC16F917 contains an integrated 10-bit ADC.


• The ADC accepts up to 8 analog inputs multiplexed into one sample and
hold amplifier, whose output is connected to the input of the ADC
(Fig. 12.1 of [PIC16F917 DataSheet, 2007]). Introduction

• The ADC uses the successive approximation conversion algorithm to Fundamentals of A/D
Conversion
convert an input voltage to a 10-bit binary value which is stored in two
A/D Conversion Using
8-bit registers. PIC16F917
• The successive approximation conversion technique computes the ADC’s ADC Configuration
Reference Voltage
binary output one bit at a time, starting from the MSB until reaching the Conversion Speed

LSB. Starting a Conversion


Accessing the ADC’s
• The reference voltage used in the conversion process is software Output
ADC Configuration
selectable.
Digital to Analog
Converters (DACs)

DAC Through PWM

2.20
Analog to Digital
ADC Configuration (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• The PIC16F917’s ADC is controlled through three registers: ANSEL, Introduction


ADCON0, ADCON1. Fundamentals of A/D
Conversion
• The channel selection bits (ADCON0<4:2>) control which channel is to be
A/D Conversion Using
connected to the sample and hold circuit (which analog pin is to be used PIC16F917
in the A/D conversion). ADC Configuration
Reference Voltage
Conversion Speed
Starting a Conversion
Accessing the ADC’s
Output
ADC Configuration

Digital to Analog
Converters (DACs)

DAC Through PWM

2.21
Analog to Digital
Reference Voltage (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• There are two possible options for each reference to the ADC, Vref+ and
Vref− .
Introduction
• Vref+ can be selected to be either the PIC’s powering voltage VDD or to an
Fundamentals of A/D
externally supplied voltage (connected to pin VHREF+ ). This is controlled Conversion
through a special bit called VCFG0, which is bit 5 of ADCON0. (Fig. 12.1
A/D Conversion Using
of [PIC16F917 DataSheet, 2007]). PIC16F917
ADC Configuration
• Similarly, Vref− can be connected to either Vss (ground) or to an externally Reference Voltage
supplied voltage (connected to pin VHREF− ). This is controlled through a Conversion Speed
Starting a Conversion
special bit called VCFG1, which is bit 6 of ADCON0. Accessing the ADC’s
Output
ADC Configuration

Digital to Analog
Converters (DACs)

DAC Through PWM

2.22
Analog to Digital
Conversion Speed (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• Let TAD denote the time needed to compute one bit of the 10-bit output.
Then the A/D conversion cycle requires little over 11 TAD (Fig. 12.2
of [PIC16F917 DataSheet, 2007]).
• TAD depends on the PIC’s frequency (controlled by ADCON0) and the
Introduction
value of bits ADCON1<6:4> (ADC’s prescaler).
Fundamentals of A/D
Possible ADC prescaler values: 2, 4, 8, 16, 32, 64. Conversion
This leads to seven possible conversion clock options listed in Table 12.1 A/D Conversion Using
of [PIC16F917 DataSheet, 2007]. PIC16F917
ADC Configuration
• For correct A/D conversion TAD should not be less than 1.6 µs. (why?!!) Reference Voltage
Conversion Speed

4 ADC’s prescaler ADC’s prescaler Starting a Conversion


TAD = · = Accessing the ADC’s
Fosc. 4 Fosc. Output
ADC Configuration

where prescaler ∈ {2, 4, 8, 16, 32, 64}. Digital to Analog


Converters (DACs)

DAC Through PWM

2.23
Analog to Digital
Starting a Conversion (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• The A/D conversion is initiated by setting bit ADCON0<1> (also known as Introduction

the GO/DONE bit). Fundamentals of A/D


Conversion
• When the conversion is complete (after TAD ), the GO/DONE bit is
11 A/D Conversion Using
automatically cleared, and an ADIF flag (PIR1M<6>) is automatically set. PIC16F917
ADC Configuration
Reference Voltage
Conversion Speed
Starting a Conversion
Accessing the ADC’s
Output
ADC Configuration

Digital to Analog
Converters (DACs)

DAC Through PWM

2.24
Analog to Digital
Accessing the ADC’s Output (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• When the A/D conversion is complete, the ADC’s output (10-bits) is stored
Introduction
in two registiers: ADRESH (for most significant bits) and ADRESL (for
Fundamentals of A/D
least significant bits). Conversion
• The 10-bit ADC output can be stored in ADRESH:ADRESL in two different A/D Conversion Using
configurations, based on the value of ADCON0<7> (the ADFM bit). This is PIC16F917
ADC Configuration
clearly illustrated in Fig. 12.3 of [PIC16F917 DataSheet, 2007]. Reference Voltage
Conversion Speed
Starting a Conversion
Accessing the ADC’s
Output
ADC Configuration

Digital to Analog
Converters (DACs)

DAC Through PWM

2.25
Analog to Digital
ADC Configuration (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

The PIC16F917 ADC can be configured through the following steps:


1. Initialize the ADC module
• Configure the analog/digital I/O pins (ANSEL)
• Set the ADC’s prescaler to control the conversion speed (ADCON1)
• Configure the voltage references (ADCON0)
• Select the analog input channel (ADCON0) Introduction
• Turn on the ADC module (ADCON0)
Fundamentals of A/D
Conversion
2. Wait for required acquisition time to give enough time for transient analog
signals to die out. A delay of 2 TAD should be enough. A/D Conversion Using
PIC16F917
3. Start the Conversion by setting the GO/DONE bit (ADCON0<1>) ADC Configuration
Reference Voltage
4. Wait for A/D conversion to complete by polling for the GO/DONE bit to be Conversion Speed

cleared Starting a Conversion


Accessing the ADC’s
Output
5. Read the A/D result registers ADRESH and ADRESL ADC Configuration

6. For the next acquisition, go to step 3 (or to step 1 if a different analog Digital to Analog
channel is to be sampled). Converters (DACs)

Note that a minimum of 2 TAD is required before the next acquisition starts. DAC Through PWM

2.26
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Case study
Write an assembly program to sample an analog signal at pin RA0 of a
PIC16F917 and store the ADC’s 10-bit output at M[0x21,0] (for high-order bits) Introduction
and M[0x20,1] (for low-order bits). The notation M[add,b] denotes the content Fundamentals of A/D
Conversion
of the register at address “add” of Bank “b”. Use a main oscillation frequency of
8 MHz and an ADC prescaler of 16. Right-justify the ADC’s output. Assume A/D Conversion Using
PIC16F917
you are provided with a subroutine SampleTime to introduce a delay of 2TAD . ADC Configuration
(solved in class) Reference Voltage
Conversion Speed
Starting a Conversion
Accessing the ADC’s
Output
ADC Configuration

Digital to Analog
Converters (DACs)

DAC Through PWM

2.27
Analog to Digital
Digital to Analog Converters (DACs) (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• A DAC converts a binary number (input) into an analog voltage (output)


• A common application of a DAC is to deliver time-varying voltage to drive
an actuator. Fig. 7 shows a block diagram of such a setup interfaced to a
microcontroller.

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC

DAC Through PWM

Figure 7: Block diagram of a simple control application (courtesy of Smaili et


al. 2008 [Smaili and Mrad, 2007])

2.28
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• For a varying binary word input, the DAC output signal is a staircase
continuous signal proportional to the binary input. The analog output
signal is often “Smoothened” by a signal conditioning circuit before
applying it to the actuator, as illustrated in Fig. 8.

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC

DAC Through PWM

Figure 8: Digital-to-analog conversion (DAC) process (courtesy of Smaili et


al. 2008 [Smaili and Mrad, 2007])

2.29
Analog to Digital
Components of a DAC (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• Fig. 9 shows a block diagram of a typical k-bit DAC.


• It includes a set of k latches to hold the binary input
N = (bk −1 bk −2 . . . b1 b0 ) to be converted to the analog output Vo .
Introduction
• a voltage reference used to map the input to the output.
• k switches that are ON or OFF depending on their respective corresponding Fundamentals of A/D
Conversion
bits in the binary input.
eg., if bit b1 = 1 then its corresponding switch in ON and vice versa (switch A/D Conversion Using
PIC16F917
closed).
• a resistor network to generate appropriate current/voltage levels depending on Digital to Analog
the states of the switches. Converters (DACs)
• an op-amp which acts as a summing amplifier to add the signals through the Components of a DAC
Output Voltage
activated switches. R-2R Ladder Network DAC

• This DAC construction is called binary weighted ladder. DAC Through PWM

2.30
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC
Figure 9: Block diagram of a typical k -bit DAC (courtesy of Smaili et
al. 2008 [Smaili and Mrad, 2007]) DAC Through PWM

2.31
Analog to Digital
Output Voltage (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• Fig. 10 shows the basic design of a k -bit unipolar binary-weighted resistor


network DAC. Rb is chosen to be quite high (Rb >> 0).
• The DAC’s output is
 
Rf Rf R R
bk −2 + · · · + f b1 + f b0
Introduction
V0 = −VR bk −1 +
R/2k −1 R/2k −2 R/2 R Fundamentals of A/D
Conversion

A/D Conversion Using


where VR is the voltage reference and N = (bk −1 bk −2 . . . b0 )2 is the PIC16F917
binary input. Digital to Analog
• Note that this is equivalent to Converters (DACs)
Components of a DAC
Output Voltage

R R-2R Ladder Network DAC


V0 = −VR f (N)10 , where (N)10 = bk −1 2k −1 + · · · + b1 21 + b0 DAC Through PWM
R

• The DAC gain can be adjusted by changing the values of Rf and R.

2.32
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC

DAC Through PWM

Figure 10: Basic weighted-resistor network DAC (courtesy of Smaili et


al. 2008 [Smaili and Mrad, 2007])

2.33
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• The maximum output voltage of a DAC (Vmax ), in absolute value,


corresponds to when all the input bits are 1
⇒ N = (11111 . . . 11)2 = (2k − 1)10
R
Hence |Vmax | = VR Rf (2k − 1). Introduction
• The output voltage of the DAC is minimum, in absolute value, (Vmin ) when Fundamentals of A/D
N = 0 ⇒ Vmin = 0 V . Conversion

• The output range of the DAC is Vmax − Vmin . A/D Conversion Using
PIC16F917
• The resolution of a DAC is the minimum nonzero voltage, in absolute Digital to Analog
Converters (DACs)
value, that can be generated by the DAC. This is obtained when N = 1.
Components of a DAC
R
Hence, the resolution VQ = VR Rf . Output Voltage
R-2R Ladder Network DAC

DAC Through PWM

2.34
Analog to Digital
R-2R Ladder Network DAC (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• A major disadvantage of a weighted-resistor network DAC is that its


resistor network requires k different values of resistances ranging from R
to R/2k −1 , which is difficult to achieve in most real-world cases.
Introduction
• The R-2R ladder network shown in Fig.11 overcomes this disadvantage Fundamentals of A/D
by using only two resistor values R and 2R, but at the expense of adding Conversion

a resistor to each input bit. A/D Conversion Using


PIC16F917
• Note that the actual value of the parameter R is not critical for the R-2R
Digital to Analog
ladder network DAC. Converters (DACs)
Components of a DAC
• The same equations of the weighted-resistor network DAC also apply for Output Voltage
the R-2R DAC with Rf = R/2k . R-2R Ladder Network DAC

DAC Through PWM

2.35
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC

DAC Through PWM

Figure 11: Basic R-2R DAC (courtesy of Smaili et al. 2008 [Smaili and Mrad, 2007])

2.36
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Example [Smaili and Mrad, 2007]


A unipolar 10-bit R-2R DAC has a reference voltage of 10 V.
1 Determine the DAC’s resolution, and its maximum and minimum nonzero Introduction

output (in abolute value). Fundamentals of A/D


Conversion
2 Compute the DAC’s output for an unsigned input of
A/D Conversion Using
(0100000101)2 = (261)10 . PIC16F917

3 What is the number of bits required to enhance the resolution to 2.5 mV? Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC

DAC Through PWM

2.37
Analog to Digital
Pulse Width Modulation (PWM) (A/D) and Digital to
Analog (D/A)
PWM Concept (Fig. 12) Conversion
Wail Gueaieb
• The PWM concept is based on converting a square wave, alternating
between a constant upper voltage reference Vref (logic high) and a
constant lower voltage reference (logic low), into an analog voltage
between the two voltage references.
• This can be accomplished by passing the square wave through a
low-pass filter.
• The lower voltage reference is usually taken as zero. Introduction

Fundamentals of A/D
• The op-amp buffer in Fig. 12 is not necessary. Conversion
However, it may be useful to amplify the signal’s power while maintaining A/D Conversion Using
its voltage, and to increase the filter’s output impedance. PIC16F917

Digital to Analog
Converters (DACs)

Low-pass filter DAC Through PWM


Pulse Width Modulation
(PWM)
Timer 2 Module on the
CCP PIC16F917 [PIC16F917 Data
Section 7]
micro- Analog Capture/Compare/PWM
signal
controller (CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]

Figure 12: Interfacing a square wave to a low-pass filter to generate an analog signal.

2.38
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Duty Cycle Ratio (Fig. 13) Wail Gueaieb

• The duty cycle ration is defined by

T0
d= , where, T ≡ Pulse period , T0 ≡ Pulse width
T

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM


Pulse Width Modulation
0 (PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Time Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Figure 13: PWM signal and duty cycle ratio. Section 15]

2.39
Controlling the analog output voltage (Fig. 14) Analog to Digital
(A/D) and Digital to
Analog (D/A)
• At steady state, the low-pass filter’s analog output signal v is proportional Conversion

to the duty cycle ratio. Wail Gueaieb

v = d · Vref (1)

Analog
voltage

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


0 PIC16F917
0 70% 100% Duty cycle
Digital to Analog
Converters (DACs)
Figure 14: Analog output voltage vs. duty cycle ratio DAC Through PWM
Pulse Width Modulation
(PWM)
Timer 2 Module on the
Remarks PIC16F917 [PIC16F917 Data
Section 7]

• In practice, the analog output v is controlled through controlling T0 of the Capture/Compare/PWM


(CCP) Mod-
PWM pulse, while keeping Vref and T constant. ule [PIC16F917 DataSheet, 2
Section 15]

• If T0 is controlled digitally, as with a microcontroller for example, the


relationship between v and d looks like a staircase (see Fig. 14).
However, by choosing a fine PWM resolution, it may be safely
approximated by a linear relationship.
2.40
Analog to Digital
Proof of equation (1) I (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

The relationship (1) between the filter’s output, the duty cycle ratio, and Vref ,
can be proven through the following steps:
1 Proving that the filter’s transfer function:

Vout (s) 1
G(s) = =
Vin (s) RCs + 1
Introduction

This should be easy to prove. Fundamentals of A/D


Conversion
2 Prove that the Laplace transform of the input square pulse (in Fig. 13) is A/D Conversion Using
PIC16F917

1 Digital to Analog
Vin (s) = Vref Converters (DACs)
s
DAC Through PWM
Pulse Width Modulation
One way to do that is to think of the n-th period of the pulse as step (PWM)
delayed by (nT ) minus a step delayed by (nT + T0 ). Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Thus, the Laplace transform of the n-th period of the pulse is Section 7]
Capture/Compare/PWM
  (CCP) Mod-
1 −s(nT ) 1 1 h i ule [PIC16F917 DataSheet, 2
Vref e − e−s(nT +T0 ) = Vref e−s(nT ) 1 − e−sT0 Section 15]
s s s

2.41
Analog to Digital
Proof of equation (1) II (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

The Laplace transform of the whole pulse is then

∞ ∞ 
!
X 1 h i 1h i X n
Vin (s) = Vref e−s(nT ) 1 − e−sT0 = Vref 1 − e−sT0 e−sT
s s
n=0 n=0
 
1 h
−sT0
i 1 −sT
Introduction
= Vref 1−e , for e <1
s 1 − e−sT Fundamentals of A/D
Conversion
" #
1 1 − e−sT0 A/D Conversion Using
= Vref PIC16F917
s 1 − e−sT
Digital to Analog
Converters (DACs)
3 Compute the filter’s steady-state output. DAC Through PWM
This can be achieved by Pulse Width Modulation
(PWM)

" # Timer 2 Module on the


PIC16F917 [PIC16F917 Data
1 1 − e−sT0 1 Section 7]
Vout (s) = Vin (s) G(s) = Vref Capture/Compare/PWM
s 1 − e−sT RCs + 1 (CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]

2.42
Analog to Digital
Proof of equation (1) III (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

The final-value theorem is applicable for R, C > 0. Hence, the filter’s


steady-state output is
" #
1 − e−sT0 Introduction
lim vout (t) = lim sVout (s) = lim Vref Fundamentals of A/D
t→∞ s→0 s→0 1 − e−sT Conversion
" #
A/D Conversion Using
T0 e−sT0 PIC16F917
= lim Vref , using L’Hopital’s rule
s→0 Te−sT Digital to Analog
Converters (DACs)
T0
= Vref = Vref · d DAC Through PWM
T Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]

2.43
QUCS Simulation (Figs. 15 and 16) Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
R = 4 kΩ C = 0.01 µF Vref = 5 V T = 1 µs (Freq. of 1 MHz)

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM


Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]

Figure 15: T0 = 0.8 µs ⇒ d = 0.8 ⇒ v = 0.8 × 5 V = 4 V 2.44


Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM


Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]

Figure 16: T0 = 0.2 µs ⇒ d = 0.2 ⇒ v = 0.2 × 5 V = 1 V

2.45
Analog to Digital
Timer 2 Module on the PIC16F917 [PIC16F917 DataSheet, 2007, Section 7] (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Timer 2 Overview (Figs. 17 and 18)

• The behavior of Timer 2 module is described by three 8-bit SFRs: TMR2,


PR2, and T2CON.
• The module’s input is a square signal of frequency Fosc. /4, where
Introduction
Fosc. PIC’s main oscillator’s frequency Fundamentals of A/D
Conversion
• The signal is fed to a prescaler which divides its frequency by 1, 4, or 16, A/D Conversion Using
before passing it on to register TMR2. PIC16F917

⇒ Possible prescaler values: 1, 4, 16 Digital to Analog


Converters (DACs)
• TMR2 is automatically initialized to zero when the module is turned on.
DAC Through PWM
• It is automatically incremented at the beginning of each cycle of its input Pulse Width Modulation
(PWM)
square signal until it matches the value in PR2. Timer 2 Module on the
PIC16F917 [PIC16F917 Data
• When a match occurs, two operations are performed: Section 7]

• TMR2 is reset to 0x00 on the next increment cycle. Capture/Compare/PWM


(CCP) Mod-
• Timer 2 postscaler is incremented. ule [PIC16F917 DataSheet, 2
Section 15]

2.46
Sets Flag Analog to Digital
TMR2
bit TMR2IF (A/D) and Digital to
Output
Analog (D/A)
Conversion
Wail Gueaieb

Prescaler Reset
FOSC/4 TMR2
1:1, 1:4, 1:16

2 Postscaler
Comparator
EQ 1:1 to 1:16
T2CKPS<1:0>
PR2 4

TOUTPS<3:0>

Introduction
Figure 17: Timer 2 block diagram [PIC16F917 DataSheet, 2007] Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

- Postscaler is incremented Digital to Analog


1 tick Converters (DACs)
- PIR1<TMR2IF> is set to 1 DAC Through PWM
Pulse Width Modulation
(PWM)
TMR2
© 2007 Microchip Technology Inc. DS41250F-page 107
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
0x00 0x01 PR2 Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
1 tick 1 tick 1 tick
Start

Figure 18: Timer 2 count cycle


2.47
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

• The postscaler can take values: 1, 2, 3, . . . , 16.


• The value of the postscaler can be used to know the number of times
Introduction
TMR2 has run through the cycle: 0x00→0x01→0x02→ · · · → PR2 →
Fundamentals of A/D
back to 0x00. Conversion
• The prescaler and the initial postscaler values can be set through the SFR A/D Conversion Using
T2CON. PIC16F917

Digital to Analog
• Timer 2 module is turned on or off by setting or clearing Converters (DACs)
T2CON<TMR2ON>, respectively. DAC Through PWM
Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]

2.48
Analog to Digital
Capture/Compare/PWM (CCP) Module [PIC16F917 DataSheet, 2007, (A/D) and Digital to
Section 15] Analog (D/A)
Conversion
Wail Gueaieb

CCP Overview
Introduction
• The CCP module is an integrated circuit which can be programmed to
Fundamentals of A/D
operate in one of three modes: Conversion
Capture mode: to time the duration of a certain event or signal (e.g., A/D Conversion Using
measure the time interval between two rising edges) PIC16F917

Compare mode: to continuously compare two registers and trigger an Digital to Analog
Converters (DACs)
event in the case of a match.
DAC Through PWM
PWM: to generate a PWM signal at a CCP pin. Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.49
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Activating the PWM mode Conversion
Wail Gueaieb
• The notation used to label the pins and SFRs of the CCP module is
described in Fig. 19.
For example, CCPx is used to denote CCP1 or CCP2, depending on the
context.
• The CCP module is put in PWM mode by setting CCPxCON<3:0> to
11xx (e.g., 1100, 1101, etc.)
Introduction

Fundamentals of A/D
Pins: CCP1 CCP2 Conversion
(pin 24) (pin 21) A/D Conversion Using
PIC16F917
CCPx Digital to Analog
Converters (DACs)
SFRs: CCP1CON CCP2CON DAC Through PWM
Pulse Width Modulation
CCPxCON (PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
CCPR1L CCPR2L Capture/Compare/PWM
(CCP) Mod-
CCPRxL ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
Figure 19: CCP pin notation at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.50
Analog to Digital
Generating a PWM Pulse at Pin CCPx (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

CCPx

• The PWM mode generates a PWM pulse at pin CCPx.


• Pin 24 is labeled: RC5/TICK/CCP1/SEG10
• Pin 21 is labeled: RD2/CCP2
Introduction
• Hence, generating a PWM pulse at pin CCP1 requires configuring the pin
Fundamentals of A/D
as an output pin by clearing TRISC<5>. Conversion
• Likewise, generating a PWM pulse at pin CCP2 requires configuring the A/D Conversion Using
pin as an output pin by clearing TRISD<2>. PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM


Pulse Width Modulation
(PWM)
4 SFRs do it all!
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
• The control of the PWM module is accomplished through 4 SFRs: Section 7]
Capture/Compare/PWM
• PR2 and T2CON to control Timer 2; and (CCP) Mod-
• CCPxCON and CCPRxL. ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.51
Analog to Digital
(A/D) and Digital to
Timing Analog (D/A)
Conversion

• Fig. 20 describes the timing of the PIC-generated PWM pulse. Wail Gueaieb

• When TMR2 value matches that of PR2, the following three events occur in
the next increment cycle:
• TMR2 is cleared.
• Pin CCPx is toggled to logic high; i.e., Vref = 5 V, except if the duty cycle ratio
is 0%
• The value of CCPRxL is latched by being copied to the read-only register
CCPRxH [PIC16F917 DataSheet, 2007, Fig. 15-3].
Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


First rising edge A rising edge A falling edge PIC16F917
occurs when occurs after that occurs every time
TMR2=0 every time TMR2=CCPRxL Digital to Analog
Converters (DACs)
TMR2=PR2
DAC Through PWM
Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
Pulse width (CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
Pulse period Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Figure 20: PWM pulse timing Module to PWM Operation

2.52
Analog to Digital
(A/D) and Digital to
Formulas Analog (D/A)
Conversion
Wail Gueaieb

PWM Period ≡ T = [PR2 + 1] × 4Tosc. × (Timer 2 prescaler)


Pulse Width ≡ T0 = (CCPRxL:CCPxCON<5:4>) × Tosc. × (Timer 2 prescaler)
T0 (CCPRxL:CCPxCON<5:4>)
Duty Cycle Ratio ≡ =
T 4 × [PR2 + 1]

Introduction

Fundamentals of A/D
Conversion
• In this sense, the PWM module on the PIC16F917 along with the A/D Conversion Using
low-pass filter milled on the mechatronics board, together, act as 10-bit PIC16F917

DAC, as depicted in Fig. 21. Digital to Analog


Converters (DACs)

DAC Through PWM


Pulse Width Modulation
(PWM)
Timer 2 Module on the

CCPRxL:CCPxCON<5:4> CCP Low-pass Analog PIC16F917 [PIC16F917 Data


Section 7]
module filter output
Capture/Compare/PWM
10 bits (CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
10-bit DAC
Generating a PWM Pulse
at Pin CCPx
Figure 21: PWM + low-pass-filter ≡ DAC Configuring the CCP
Module to PWM Operation

2.53
Analog to Digital
Configuring the CCP Module to PWM Operation (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

The following is the procedure to configure the CCP module of the PIC16F917
to operate in PWM mode:
1. Disable the PWM pin CCPx (temporarily) by setting its associated TRIS
bit (the pin will be enabled again later at the end of the configuration).
2. Load the proper value into PR2. Introduction
3. Configure the CCP module for PWM mode by setting CCPxCON<3:0> to Fundamentals of A/D
11xx (e.g., 1100). Conversion

A/D Conversion Using


4. Set the PWM duty cycle by initializing CCPRxL and CCPxCON<5:4>. PIC16F917
5. Configure and start Timer 2: Digital to Analog
• Clear bit PIR1<TMR2IF> (optional step) Converters (DACs)
• Set Timer 2 prescaler by loading T2CON<1:0> DAC Through PWM
• Enable Timer 2 by setting bit T2CON<TMR2ON> Pulse Width Modulation
(PWM)
6. Enable the PWM pin CCPx through the following steps: Timer 2 Module on the
PIC16F917 [PIC16F917 Data
• Wait until bit PIR1<TMR2IF> is set (optional step) Section 7]
• Enable the PWM pin CCPx (which was temporarily disabled above) by clearing Capture/Compare/PWM
(CCP) Mod-
its associated TRIS bit. ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.54
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Example
Introduction
Write an assembly program for a PIC16F917 to generate a PWM signal of
Fundamentals of A/D
31.2 kHz at pin CCP2 with a PIC’s main oscillator frequency of 8 MHz and a Conversion
duty cycle ratio of 80%. A/D Conversion Using
PIC16F917

Digital to Analog
Converters (DACs)

DAC Through PWM


Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.55
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
PWM Resolution Wail Gueaieb

• The PWM resolution is the minimum possible increment in the duty cycle
ratio (see Fig. 22).

1 1
PWM resolution = ≡ Vref V
4[PR2 + 1] 4[PR2 + 1]

⇒ It is often best to choose the highest possible value for PR2 (better Introduction

resolution). Fundamentals of A/D


Conversion
• It can also be expressed in bits. In that case, it is the minimum number of
A/D Conversion Using
bits required to implement all the digital duty cycles encoded in PR2 (i.e., PIC16F917
0 → 1 → · · · → 4[PR2 + 1] − 1). Digital to Analog
Converters (DACs)
PWM Resolution = dlog2 (4[PR2 + 1])e bits (datasheet is inaccurate) DAC Through PWM
Pulse Width Modulation
(PWM)
• For example, a 10-bit resolution results in 210 = 1, 024 discrete duty Timer 2 Module on the
1 2
, . . . , 1,023
PIC16F917 [PIC16F917 Data
cycles: 0, 1,024 , 1,024 1,024
. Section 7]
Capture/Compare/PWM
• Similarly, an 8-bit resolution results in 28 = 256 discrete duty cycles: (CCP) Mod-
ule [PIC16F917 DataSheet, 2
1 2 255
0, 256 , 256 , . . . , 256 . Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.56
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Analog
voltage

Introduction

Fundamentals of A/D
Conversion

A/D Conversion Using


PIC16F917

Digital to Analog
Converters (DACs)
0
DAC Through PWM
0 70% 100% Duty cycle Pulse Width Modulation
(PWM)
Timer 2 Module on the
Figure 22: PWM resolution PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.57
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

Example
What is the PWM resolution if PR2 = 2? What does it mean?

Introduction

Fundamentals of A/D
Example Conversion

A/D Conversion Using


• What are the possible analog values of the low-pass filter’s output when PIC16F917

PR2 = 0? Digital to Analog


Converters (DACs)
• What about when PR2 = 255?
DAC Through PWM
Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.58
Analog to Digital
References (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb

[PIC16F917 DataSheet, 2007] PIC16F917 DataSheet (2007).


PIC16F913/914/916/917/946 Data Sheet. Introduction

Microchip Technology Inc., f edition. Fundamentals of A/D


Conversion
http://ww1.microchip.com/downloads/en/DeviceDoc/41250F.pdf.
A/D Conversion Using
[Smaili and Mrad, 2007] Smaili, A. and Mrad, F. (2007). PIC16F917

Applied Mechatronics. Digital to Analog


Converters (DACs)
Oxford University Press.
DAC Through PWM
Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation

2.59

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