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Chapter 2 Conversion
Wail Gueaieb
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
Wail Gueaieb
EECS
University of Ottawa
2.1
Analog to Digital
Outline (A/D) and Digital to
Analog (D/A)
1 Introduction Conversion
Wail Gueaieb
2 Fundamentals of A/D Conversion
Resolution
I/O Mapping
Conversion (Quantization) Error
3 A/D Conversion Using PIC16F917
ADC Configuration
Reference Voltage
Introduction
Conversion Speed
Fundamentals of A/D
Starting a Conversion Conversion
Accessing the ADC’s Output A/D Conversion Using
ADC Configuration PIC16F917
2.3
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Digital Analog
Reference
Input r(t) r(k) u(k) u(t) Output c(t)
Digital Analog
ADC DAC
Processor Plant Introduction
Fundamentals of A/D
Conversion
Analog Signal Analog
ADC
cs (k) cs (t) Sensor A/D Conversion Using
Digital Signal PIC16F917
Digital to Analog
Converters (DACs)
Figure 1: Configuration of a digital control system. DAC Through PWM
2.4
Analog to Digital
Fundamentals of A/D Conversion (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
2.5
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Introduction
Fundamentals of A/D
Conversion
Resolution
I/O Mapping
Conversion (Quantization)
Error
Digital to Analog
Converters (DACs)
2.6
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• The input signal Vi has to be between the low reference voltage VRL and
high reference voltage VRH of the ADC.
• The low reference voltage VRL is also called the offset of the ADC.
• The difference between VRL and VRH is called the range spam or full
Introduction
scale FS.
Fundamentals of A/D
• An input voltage Vi equal to VRL is to translated by the ADC into a binary Conversion
Resolution
output N = 000000 . . . 00 (all zeros). I/O Mapping
• An input voltage Vi = VRH is translated into N = 11111 . . . 11 (all ones). Conversion (Quantization)
Error
• When VRL and VRH have the same polarity, such as (0, +5V ) or (0, −5V ) A/D Conversion Using
PIC16F917
of instance, the ADC is said to be unipoler; otherwise it is bipolar, as in the
case of (VRL , VRH ) = (−2V , +5V ) for example. Digital to Analog
Converters (DACs)
2.7
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Definition (Resolution) Conversion
Wail Gueaieb
The resolution of an ADC is the smallest variation in the analog input that
would cause the ADC output code to change by one level (one quantum).
When the ADC’s input spans its full scale, the resolution VQ is given by
FS
VQ = = 1 LSB
2k
Introduction
In other words, the resolution represents the magnitude of the quantum Fundamentals of A/D
Conversion
(one-step-size) and it corresponds to the value of the LSB in the output code. Resolution
I/O Mapping
Remark Conversion (Quantization)
Error
• When the ADC’s input deos not span its full scale, or when it is sampling a A/D Conversion Using
PIC16F917
voltage corresponding to a physical quantity of unit x (e.g., kg, ◦C, F, Ω,
Digital to Analog
etc.), then the ADC’s resolution can be measured in that unit (or inV) as Converters (DACs)
2.8
Analog to Digital
I/O Mapping (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• There are two most common transfer functions to map an ADC’s analog
input Vi ∈ [VRL , VRH ] to a digital output N.
Fundamentals of A/D
• In this type, N is related to Vi by Conversion
Resolution
( " #) I/O Mapping
2k Conversion (Quantization)
(N)10 = Floor (Vi − VRL ) Error
FS
truncate to (2k −1) A/D Conversion Using
PIC16F917
• Given an output N, the exact ADC’s input Vi cannot be exactly determined Digital to Analog
Converters (DACs)
but it may be approximated by (Vi )est. . DAC Through PWM
1 FS
(Vi )est. = (N)10 + + VRL
2 2k
2.9
N Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
111
Wail Gueaieb
110
101
100
Introduction
VE
LSB Fundamentals of A/D
011 Conversion
VE VQ
Resolution
I/O Mapping
010 Conversion (Quantization)
Error
Digital to Analog
Converters (DACs)
000 Vi
DAC Through PWM
0 FS/8 2FS/8 3FS/8 4FS/8 5FS/8 6FS/8 7FS/8 FS
2.10
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Type 2 I/O Mapping
Fundamentals of A/D
( " #)
2k Conversion
(N)10 = Round (Vi − VRL ) Resolution
FS
truncate to (2k −1) I/O Mapping
Conversion (Quantization)
Error
• Given an output N, the exact ADC’s input Vi cannot be exactly determined A/D Conversion Using
PIC16F917
but it may be approximated by (Vi )est. .
Digital to Analog
Converters (DACs)
FS
(Vi )est. = (N)10 k + VRL DAC Through PWM
2
2.11
N Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
111 Wail Gueaieb
110
101
100
Introduction
VE LSB Fundamentals of A/D
011 Conversion
VQ Resolution
I/O Mapping
Conversion (Quantization)
010 Error
VE A/D Conversion Using
PIC16F917
001
Digital to Analog
Converters (DACs)
000 Vi DAC Through PWM
0 FS/8 2FS/8 3FS/8 4FS/8 5FS/8 6FS/8 7FS/8 FS
2.12
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Example Wail Gueaieb
FS 5V
(Vi )est. = (N)10 + VRL = 78 8 + 0 = 1.5234 V
2k 2
2.13
Analog to Digital
Conversion (Quantization) Error (A/D) and Digital to
Analog (D/A)
Conversion
• The conversion error (also called conversion uncertainty or quantization Wail Gueaieb
error) VE is the difference between the estimated (digitized) ADC’s analog
input signal (Vi )est. and its real value Vi .
VE = (Vi )est. − Vi
Fundamentals of A/D
• An example of the profile of VE for a 3-bit ADC with I/O mapping of type 1 Conversion
Resolution
is shown in Fig. 5. I/O Mapping
• Note how in this type of conversion VE is always enveloped in the interval Conversion (Quantization)
Error
[−1/2 LSB, +1/2 LSB]. A/D Conversion Using
PIC16F917
Digital to Analog
VE (in LSB) Converters (DACs)
2.14
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• An example of the profile of VE for a 3-bit ADC with I/O mapping of type 2
is shown in Fig. 6.
• Note how in this type of conversion VE remains in the interval
[−1/2 LSB, +1/2 LSB], except in the last 1/2 LSB of Vi where
Introduction
VE ∈ [−1/2 LSB, −1 LSB].
Fundamentals of A/D
Conversion
Resolution
VE (in LSB) I/O Mapping
Conversion (Quantization)
+1/2 Error
Vi (in LSB)
1 2 3 4 5 6 7 8 A/D Conversion Using
−1/2 PIC16F917
−1 Digital to Analog
Converters (DACs)
Figure 6: Profile of VE for a 3-bit ADC with I/O mapping of type 2. DAC Through PWM
2.15
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Example
A 2-bit ADC of zero offset and 8 V full scale is characterized by a type-2 I/O Introduction
mapping. Fundamentals of A/D
Conversion
1 Compute the conversion error corresponding to an input of 4 V. Resolution
Digital to Analog
Converters (DACs)
2.16
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
2.17
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Example
An ADC is needed to sample the output voltage of a pressure sensor gaged as
Introduction
0 V for 0 kPa and 10 V for 10 kPa.
Fundamentals of A/D
1 If the conversion error is not to exceed 0.01 kPa and the ADC uses type-1 Conversion
I/O mapping, determine the minimum number of bits required. Resolution
I/O Mapping
2 Repeat the above question for a type-2 I/O mapping. Conversion (Quantization)
Error
Digital to Analog
Converters (DACs)
2.18
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Example
A temperature sensor with a gain of 10 mV/◦C is used to measure the
temperature of an object which is in the range of 0 ◦C to 100 ◦C. The sensor’s
output is sampled by an 8-bit ADC with 0 V and 10 V as low and high reference Introduction
Digital to Analog
Converters (DACs)
2.19
Analog to Digital
A/D Conversion Using PIC16F917 (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• The ADC uses the successive approximation conversion algorithm to Fundamentals of A/D
Conversion
convert an input voltage to a 10-bit binary value which is stored in two
A/D Conversion Using
8-bit registers. PIC16F917
• The successive approximation conversion technique computes the ADC’s ADC Configuration
Reference Voltage
binary output one bit at a time, starting from the MSB until reaching the Conversion Speed
2.20
Analog to Digital
ADC Configuration (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Digital to Analog
Converters (DACs)
2.21
Analog to Digital
Reference Voltage (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• There are two possible options for each reference to the ADC, Vref+ and
Vref− .
Introduction
• Vref+ can be selected to be either the PIC’s powering voltage VDD or to an
Fundamentals of A/D
externally supplied voltage (connected to pin VHREF+ ). This is controlled Conversion
through a special bit called VCFG0, which is bit 5 of ADCON0. (Fig. 12.1
A/D Conversion Using
of [PIC16F917 DataSheet, 2007]). PIC16F917
ADC Configuration
• Similarly, Vref− can be connected to either Vss (ground) or to an externally Reference Voltage
supplied voltage (connected to pin VHREF− ). This is controlled through a Conversion Speed
Starting a Conversion
special bit called VCFG1, which is bit 6 of ADCON0. Accessing the ADC’s
Output
ADC Configuration
Digital to Analog
Converters (DACs)
2.22
Analog to Digital
Conversion Speed (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• Let TAD denote the time needed to compute one bit of the 10-bit output.
Then the A/D conversion cycle requires little over 11 TAD (Fig. 12.2
of [PIC16F917 DataSheet, 2007]).
• TAD depends on the PIC’s frequency (controlled by ADCON0) and the
Introduction
value of bits ADCON1<6:4> (ADC’s prescaler).
Fundamentals of A/D
Possible ADC prescaler values: 2, 4, 8, 16, 32, 64. Conversion
This leads to seven possible conversion clock options listed in Table 12.1 A/D Conversion Using
of [PIC16F917 DataSheet, 2007]. PIC16F917
ADC Configuration
• For correct A/D conversion TAD should not be less than 1.6 µs. (why?!!) Reference Voltage
Conversion Speed
2.23
Analog to Digital
Starting a Conversion (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• The A/D conversion is initiated by setting bit ADCON0<1> (also known as Introduction
Digital to Analog
Converters (DACs)
2.24
Analog to Digital
Accessing the ADC’s Output (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• When the A/D conversion is complete, the ADC’s output (10-bits) is stored
Introduction
in two registiers: ADRESH (for most significant bits) and ADRESL (for
Fundamentals of A/D
least significant bits). Conversion
• The 10-bit ADC output can be stored in ADRESH:ADRESL in two different A/D Conversion Using
configurations, based on the value of ADCON0<7> (the ADFM bit). This is PIC16F917
ADC Configuration
clearly illustrated in Fig. 12.3 of [PIC16F917 DataSheet, 2007]. Reference Voltage
Conversion Speed
Starting a Conversion
Accessing the ADC’s
Output
ADC Configuration
Digital to Analog
Converters (DACs)
2.25
Analog to Digital
ADC Configuration (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
6. For the next acquisition, go to step 3 (or to step 1 if a different analog Digital to Analog
channel is to be sampled). Converters (DACs)
Note that a minimum of 2 TAD is required before the next acquisition starts. DAC Through PWM
2.26
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Case study
Write an assembly program to sample an analog signal at pin RA0 of a
PIC16F917 and store the ADC’s 10-bit output at M[0x21,0] (for high-order bits) Introduction
and M[0x20,1] (for low-order bits). The notation M[add,b] denotes the content Fundamentals of A/D
Conversion
of the register at address “add” of Bank “b”. Use a main oscillation frequency of
8 MHz and an ADC prescaler of 16. Right-justify the ADC’s output. Assume A/D Conversion Using
PIC16F917
you are provided with a subroutine SampleTime to introduce a delay of 2TAD . ADC Configuration
(solved in class) Reference Voltage
Conversion Speed
Starting a Conversion
Accessing the ADC’s
Output
ADC Configuration
Digital to Analog
Converters (DACs)
2.27
Analog to Digital
Digital to Analog Converters (DACs) (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC
2.28
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• For a varying binary word input, the DAC output signal is a staircase
continuous signal proportional to the binary input. The analog output
signal is often “Smoothened” by a signal conditioning circuit before
applying it to the actuator, as illustrated in Fig. 8.
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC
2.29
Analog to Digital
Components of a DAC (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• This DAC construction is called binary weighted ladder. DAC Through PWM
2.30
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC
Figure 9: Block diagram of a typical k -bit DAC (courtesy of Smaili et
al. 2008 [Smaili and Mrad, 2007]) DAC Through PWM
2.31
Analog to Digital
Output Voltage (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
2.32
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC
2.33
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
• The output range of the DAC is Vmax − Vmin . A/D Conversion Using
PIC16F917
• The resolution of a DAC is the minimum nonzero voltage, in absolute Digital to Analog
Converters (DACs)
value, that can be generated by the DAC. This is obtained when N = 1.
Components of a DAC
R
Hence, the resolution VQ = VR Rf . Output Voltage
R-2R Ladder Network DAC
2.34
Analog to Digital
R-2R Ladder Network DAC (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
2.35
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC
Figure 11: Basic R-2R DAC (courtesy of Smaili et al. 2008 [Smaili and Mrad, 2007])
2.36
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
3 What is the number of bits required to enhance the resolution to 2.5 mV? Digital to Analog
Converters (DACs)
Components of a DAC
Output Voltage
R-2R Ladder Network DAC
2.37
Analog to Digital
Pulse Width Modulation (PWM) (A/D) and Digital to
Analog (D/A)
PWM Concept (Fig. 12) Conversion
Wail Gueaieb
• The PWM concept is based on converting a square wave, alternating
between a constant upper voltage reference Vref (logic high) and a
constant lower voltage reference (logic low), into an analog voltage
between the two voltage references.
• This can be accomplished by passing the square wave through a
low-pass filter.
• The lower voltage reference is usually taken as zero. Introduction
Fundamentals of A/D
• The op-amp buffer in Fig. 12 is not necessary. Conversion
However, it may be useful to amplify the signal’s power while maintaining A/D Conversion Using
its voltage, and to increase the filter’s output impedance. PIC16F917
Digital to Analog
Converters (DACs)
Figure 12: Interfacing a square wave to a low-pass filter to generate an analog signal.
2.38
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Duty Cycle Ratio (Fig. 13) Wail Gueaieb
T0
d= , where, T ≡ Pulse period , T0 ≡ Pulse width
T
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
2.39
Controlling the analog output voltage (Fig. 14) Analog to Digital
(A/D) and Digital to
Analog (D/A)
• At steady state, the low-pass filter’s analog output signal v is proportional Conversion
v = d · Vref (1)
Analog
voltage
Introduction
Fundamentals of A/D
Conversion
The relationship (1) between the filter’s output, the duty cycle ratio, and Vref ,
can be proven through the following steps:
1 Proving that the filter’s transfer function:
Vout (s) 1
G(s) = =
Vin (s) RCs + 1
Introduction
1 Digital to Analog
Vin (s) = Vref Converters (DACs)
s
DAC Through PWM
Pulse Width Modulation
One way to do that is to think of the n-th period of the pulse as step (PWM)
delayed by (nT ) minus a step delayed by (nT + T0 ). Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Thus, the Laplace transform of the n-th period of the pulse is Section 7]
Capture/Compare/PWM
(CCP) Mod-
1 −s(nT ) 1 1 h i ule [PIC16F917 DataSheet, 2
Vref e − e−s(nT +T0 ) = Vref e−s(nT ) 1 − e−sT0 Section 15]
s s s
2.41
Analog to Digital
Proof of equation (1) II (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
∞ ∞
!
X 1 h i 1h i X n
Vin (s) = Vref e−s(nT ) 1 − e−sT0 = Vref 1 − e−sT0 e−sT
s s
n=0 n=0
1 h
−sT0
i 1 −sT
Introduction
= Vref 1−e , for e <1
s 1 − e−sT Fundamentals of A/D
Conversion
" #
1 1 − e−sT0 A/D Conversion Using
= Vref PIC16F917
s 1 − e−sT
Digital to Analog
Converters (DACs)
3 Compute the filter’s steady-state output. DAC Through PWM
This can be achieved by Pulse Width Modulation
(PWM)
2.42
Analog to Digital
Proof of equation (1) III (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
2.43
QUCS Simulation (Figs. 15 and 16) Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
R = 4 kΩ C = 0.01 µF Vref = 5 V T = 1 µs (Freq. of 1 MHz)
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
2.45
Analog to Digital
Timer 2 Module on the PIC16F917 [PIC16F917 DataSheet, 2007, Section 7] (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
2.46
Sets Flag Analog to Digital
TMR2
bit TMR2IF (A/D) and Digital to
Output
Analog (D/A)
Conversion
Wail Gueaieb
Prescaler Reset
FOSC/4 TMR2
1:1, 1:4, 1:16
2 Postscaler
Comparator
EQ 1:1 to 1:16
T2CKPS<1:0>
PR2 4
TOUTPS<3:0>
Introduction
Figure 17: Timer 2 block diagram [PIC16F917 DataSheet, 2007] Fundamentals of A/D
Conversion
Digital to Analog
• Timer 2 module is turned on or off by setting or clearing Converters (DACs)
T2CON<TMR2ON>, respectively. DAC Through PWM
Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
2.48
Analog to Digital
Capture/Compare/PWM (CCP) Module [PIC16F917 DataSheet, 2007, (A/D) and Digital to
Section 15] Analog (D/A)
Conversion
Wail Gueaieb
CCP Overview
Introduction
• The CCP module is an integrated circuit which can be programmed to
Fundamentals of A/D
operate in one of three modes: Conversion
Capture mode: to time the duration of a certain event or signal (e.g., A/D Conversion Using
measure the time interval between two rising edges) PIC16F917
Compare mode: to continuously compare two registers and trigger an Digital to Analog
Converters (DACs)
event in the case of a match.
DAC Through PWM
PWM: to generate a PWM signal at a CCP pin. Pulse Width Modulation
(PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation
2.49
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Activating the PWM mode Conversion
Wail Gueaieb
• The notation used to label the pins and SFRs of the CCP module is
described in Fig. 19.
For example, CCPx is used to denote CCP1 or CCP2, depending on the
context.
• The CCP module is put in PWM mode by setting CCPxCON<3:0> to
11xx (e.g., 1100, 1101, etc.)
Introduction
Fundamentals of A/D
Pins: CCP1 CCP2 Conversion
(pin 24) (pin 21) A/D Conversion Using
PIC16F917
CCPx Digital to Analog
Converters (DACs)
SFRs: CCP1CON CCP2CON DAC Through PWM
Pulse Width Modulation
CCPxCON (PWM)
Timer 2 Module on the
PIC16F917 [PIC16F917 Data
Section 7]
CCPR1L CCPR2L Capture/Compare/PWM
(CCP) Mod-
CCPRxL ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
Figure 19: CCP pin notation at Pin CCPx
Configuring the CCP
Module to PWM Operation
2.50
Analog to Digital
Generating a PWM Pulse at Pin CCPx (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
CCPx
Digital to Analog
Converters (DACs)
2.51
Analog to Digital
(A/D) and Digital to
Timing Analog (D/A)
Conversion
• Fig. 20 describes the timing of the PIC-generated PWM pulse. Wail Gueaieb
• When TMR2 value matches that of PR2, the following three events occur in
the next increment cycle:
• TMR2 is cleared.
• Pin CCPx is toggled to logic high; i.e., Vref = 5 V, except if the duty cycle ratio
is 0%
• The value of CCPRxL is latched by being copied to the read-only register
CCPRxH [PIC16F917 DataSheet, 2007, Fig. 15-3].
Introduction
Fundamentals of A/D
Conversion
2.52
Analog to Digital
(A/D) and Digital to
Formulas Analog (D/A)
Conversion
Wail Gueaieb
Introduction
Fundamentals of A/D
Conversion
• In this sense, the PWM module on the PIC16F917 along with the A/D Conversion Using
low-pass filter milled on the mechatronics board, together, act as 10-bit PIC16F917
2.53
Analog to Digital
Configuring the CCP Module to PWM Operation (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
The following is the procedure to configure the CCP module of the PIC16F917
to operate in PWM mode:
1. Disable the PWM pin CCPx (temporarily) by setting its associated TRIS
bit (the pin will be enabled again later at the end of the configuration).
2. Load the proper value into PR2. Introduction
3. Configure the CCP module for PWM mode by setting CCPxCON<3:0> to Fundamentals of A/D
11xx (e.g., 1100). Conversion
2.54
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Example
Introduction
Write an assembly program for a PIC16F917 to generate a PWM signal of
Fundamentals of A/D
31.2 kHz at pin CCP2 with a PIC’s main oscillator frequency of 8 MHz and a Conversion
duty cycle ratio of 80%. A/D Conversion Using
PIC16F917
Digital to Analog
Converters (DACs)
2.55
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
PWM Resolution Wail Gueaieb
• The PWM resolution is the minimum possible increment in the duty cycle
ratio (see Fig. 22).
1 1
PWM resolution = ≡ Vref V
4[PR2 + 1] 4[PR2 + 1]
⇒ It is often best to choose the highest possible value for PR2 (better Introduction
2.56
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Analog
voltage
Introduction
Fundamentals of A/D
Conversion
Digital to Analog
Converters (DACs)
0
DAC Through PWM
0 70% 100% Duty cycle Pulse Width Modulation
(PWM)
Timer 2 Module on the
Figure 22: PWM resolution PIC16F917 [PIC16F917 Data
Section 7]
Capture/Compare/PWM
(CCP) Mod-
ule [PIC16F917 DataSheet, 2
Section 15]
Generating a PWM Pulse
at Pin CCPx
Configuring the CCP
Module to PWM Operation
2.57
Analog to Digital
(A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
Example
What is the PWM resolution if PR2 = 2? What does it mean?
Introduction
Fundamentals of A/D
Example Conversion
2.58
Analog to Digital
References (A/D) and Digital to
Analog (D/A)
Conversion
Wail Gueaieb
2.59