A Control Strategy for Shunt Active Filter
Maurício Aredes and Luís F. C. Monteiro
UFRJ − Federal University of Rio de Janeiro
COPPE/POLI – Electrical Engineering Department
PO Box 68504; 21945-970 Rio de Janeiro RJ, Brazil − E-mail: aredes@ufrj.br
ABSTRACT: This paper describes a novel control strategy for
shunt active filters − the Sinusoidal Fryze Currents Control
Strategy. The control strategy considers the presence of har-
monics in the system voltage and load current simultaneously.
Although the fundaments of the pq Theory is used to better ex-
plain the proposed control strategy, it is not directly used, since
the Clarke Transformation (abc to αβ 0 transformation) is
avoided. In fact, the fundaments of the pq Theory is inserted in a
minimization method − the Generalized Fryze Currents, which to-
gether with a robust synchronizing circuit (PLL control circuit),
form a concise controller for shunt active filter. The shunt active
filter provides current compensation, such that the compensated
current drawn from the network is sinusoidal and balanced, cor-
responding to the fundamental positive-sequence component of
the load current, plus an additional fundamental positive-
sequence component to cover losses in the power circuit of the
shunt active filter. Simulation results are presented to validate
the control strategy.
Keywords: Active Filters; Active Power Line Conditioners; Instan-
taneous Active and Reactive Power.
I. INTRODUCTION
A CTIVE power filters have being developed since 1983,
when one of the first prototypes based on instantaneous
power theory was reported [1][2]. One author of the present
paper works on control strategies for active filters and active
power line conditioners based on instantaneous active and re-
active power theories, since 1991 [3][4]. Since then, almost
all controllers, developed by the authors, for active power line
conditioners and FACTS controllers use the pq Theory, as in-
troduced in [1], and expanded for three-phase four-wire sys-
tems in [5].
On the other hand, several works on active filter control-
lers based on synchronous reference frame transformation, like
in [6] and [7], or expressions derived from current minimiza-
tion methods, like in [8][9][10][11], present alternatives to
avoid the use of the pq Theory. In fact, the algorithms based
on the synchronous reference frame can be considered as a
subset of those based on the pq Theory if the fundamental
positive-sequence voltage component is extracted and consid-
ered in the shunt active filter controller.
The major oppositions in accepting the active filter con-
trollers based on the pq Theory are firmed on the following
arguments.
1. controllers based on the pq Theory need low-pass fil-
ters to separate the instantaneous real and imaginary
powers into average and oscillating parts, which intro-
duces time delays that degenerate the active filter dy-
namic performance;
2. controllers based on the pq Theory demand more cal-
culations, since they need the use of Clark Transfor-
mation;
3. under distorted and/or unbalanced system voltages, the
shunt active filter does not compensate properly the
load currents and injects harmonic currents into the
network, which are not originated from the non linear
load.
The first above argument is really a problem, but not only for
the pq-theory-based controllers. The synchronous-reference-
frame-based controller needs also low-pass filters to separate
the average portions of the direct (id) and quadrature (iq) cur-
rent components. Under non-sinusoidal system voltages, the
current minimization methods also need some kind of filtering
to obtain an average load conductance to determine the in-
stantaneous active portion of the load current. The second ar-
gument above represents a cost that should be paid to gain
flexibility to compensate independently the average or oscil-
lating portion of the real (active) and imaginary (reactive)
powers, as well as the instantaneous zero-sequence power.
Without the use of Clarke Transformation it is impossible to
compensate positive and negative-sequence current compo-
nents, included in the real and imaginary power, separately
from the zero-sequence current component. Finally, the third
argument contains a little of misinterpretation of the original
control algorithm as proposed by Akagi et al. [1]. This algo-
rithm compensates the load current to guarantee constant in-
stantaneous real power drained from the network. Therefore,
under non-sinusoidal voltage conditions, the compensated cur-
rent cannot become sinusoidal [12].
Some specialists have the opinion that "the best control
strategy" is that guarantees compensated currents drained from
the network, that are proportional (same waveform) to the
system voltages. Under balanced, undistorted system volt-
ages, this strategy compensates load current to force the com-
pensated current to become sinusoidal and in phase with the
system voltage. Otherwise, the compensated currents become
the same waveform as the system voltages, suggesting that the
network is "supplying a pure-resistive equivalent load".
 In summary, under non-sinusoidal and/or unbalanced sys-
tem voltages, it is impossible to implement a shunt active filter
that satisfies simultaneously: i) constant real power drained
from the network; ii) sinusoidal compensated current; and iii)
proportionality between the system voltage and the compen-
sated current.
This paper proposes a novel control algorithm to overcome
two of the three concerns mentioned above. The Clarke
Transformation is no longer used and the power definitions of
the pq Theory are not directly used. The concepts learned
from this theory are used in a method of current minimization.
This method uses the abc-line currents, which avoids the
Clarke Transformation. The measured currents from the non-
linear load, together with a robust synchronizing circuit (PLL
control circuit) forms a concise controller for shunt active fil-
ter. The proposed controller forces the shunt active filter to
compensate the load current such that the current drained from
the network becomes sinusoidal and balanced (contain only
the fundamental positive-sequence component), even under
distorted and/or unbalanced system voltage.
If cost reduction is the principal goal, the power converter
(normally a Voltage-Sourced PWM Inverter is used) of the
active filter should have low power rating. Hence, the active
filter should not be designed for power factor correction − it
demands relatively high compensating currents. If this con-
straint is considered, further cost reduction is possible. As is
shown later, the system voltage sensors and signal condition-
ers can be eliminated.
A detailed modeling of the shunt active filter controller is
implemented in a digital simulator. Simulation results are pre-
sented to validate the proposed control strategy, named as Si-
nusoidal Fryze Currents Control Strategy.
II. SYSTEM CONFIGURATION
Fig. 1 shows the system that was implemented in a digital
simulator for electromagnetic circuits. For simplicity, a three-
phase three-wire system is considered (there are no zero-
sequence current components). The shunt active filter gener-
ates the compensating currents ica, icb and icc to compensate the
load currents ia, ib and ic in order to guarantee sinusoidal, bal-
anced, compensated currents isa, isb and isc drawn from the
network. This goal is achieved even under non-sinusoidal
system voltages. Note that the active filter controller does not
need any information about the system voltage and they are
not measured. In fact, the control algorithm needs only infor-
mation about the load current. For three-phase ungrounded
system only two current sensors could be used, since ic=-ia-ib.
The measurement of the active filter currents (ica, icb and icc) is
needed only in the PWM current control, and the dc voltage
measurement is used in the dc voltage regulator.
III. ACTIVE FILTER CONTROLLER
The controller of the shunt active filter is concise and re-
quires less computational efforts than many others found in the
literature. It is formed by a dc voltage regulator, a synchro-
nizing circuit and a compensating current reference box.
Here, the PWM current control is considered as part of the
power converter.

isa ia
isb ib
isc ic

ica icb icc Non-linear

S1 S3 S5 load

vc L

Voltage
Regulator S6
S4 S2
C
R
Glos
ica* ifa
ia icb* ifb
PLL circuit & Ge Gc reference PWM
ib current Current ifc
positive-sequence icc* Control
ic calculation calculation

vNa
vNb
vNc
Fig. 1: System configuration.
A. The dc voltage regulator
The dc voltage vc (Fig. 1) is used in the voltage regulator
to generate the control signal Glos. It forces the shunt active
filter to draw additional active current from the network, to
compensate for losses in the power circuit of the shunt active
filter. Fig. 2 shows the dc voltage regulator. In several cases,
it is possible to eliminate the low-pass filter and to build a dc
voltage regulator consisting only of a PI-Controller
[G(s) = KP+KI/s]. In Fig. 1, the control signal Gc corresponds
to the sum of two dynamic, equivalent conductances, that is,
Gc = G e + G los . (1)
In fact, the control signal Gc is used as a factor in the control-
ler that corresponds to the sum of two amplitudes of funda-
mental positive-sequence currents. The signal Ge is the am-
plitude of the positive-sequence load current and Glos is an ad-
ditional positive-sequence current that is drawn by the shunt
active filter, to realize dc voltage regulation. Since no ac volt-
age measurement is provided to the active filter controller, this
additional positive-sequence current has the same power factor
as the positive-sequence current of the load, that is, they are in
phase.
The dc voltage regulator realizes a slower feedback control
loop that is useful to correct compensation errors that arise
during transients. The intrinsic dynamic of the synchronizing
circuit (PLL circuit) and of some low-pass filters included in
the controller introduces temporary compensation errors that
affect the dc voltage.
Another "permanent" compensation error can also arise if
the system voltage is unbalanced and/or distorted. For in-
stance, suppose that the system voltage is sinusoidal, but un-
balanced due to a fundamental negative-sequence voltage
component. If the non-linear load is also unbalanced, it drains
fundamental negative-sequence current, which is compensated
by the shunt active filter. Not only products of positive-
sequence components, but also products of negative-sequence
components, that may be present simultaneously in the system
voltage and load current, contribute to the average active
three-phase power [12]. The network supplies the fundamen-
tal positive-sequence power of the load, but the shunt active
filter supplies the fundamental negative-sequence power to the
load, which tends to discharge the dc capacitor. The dc volt-
age regulator senses this voltage variation and adjusts the dy-
namic conductance Glos to force the shunt active filter to draw
more positive-sequence current from the network. Thus, the
0.2
vcref
low-pass
PI Controller
filter
+ _
vc – 0.2
Fig. 2: The dc voltage regulator.
active filter supplies average negative-sequence power to the
load and drains positive-sequence power from the network in
the same magnitude, to keep the dc voltage regulated around
its reference value.
B. The synchronizing circuit − PLL circuit
The PLL circuit tracks continuously the fundamental fre-
quency of the load current. The design of the PLL circuit
should allow proper operation under high distorted and unbal-
anced load currents. An interesting design of PLL circuit, that
is almost insensitive to unbalances and distortions, is shown in
Fig. 3. This synchronizing circuit (PLL circuit) determines
quickly the frequency and phase angle of the fundamental
positive-sequence component of the measured load currents ia,
ib, and ic. In Fig. 3, inputs are iab = ia – ib and icb = ic – ib. This
circuit has proved to be very effective, even under very high
distorted and/or unbalanced input waveforms.
The algorithm is based on the instantaneous active three-
phase power expression:
p3φ = v a ia + vb ib + vc ic = v a ia − v a ib − vc ib + vc ic =
= v a iab + vc icb . (2)
Note that the relation va + vb + vc = 0 is considered in (2). As
no voltage is measured from the power circuit, one may find
difficult to understand how the PLL circuit works. The volt-
age feedback signals of Fig. 3: va(ω t) = sin(ω t) and
vc(ω t) = sin(ω t+2π/3) are built up by the PLL circuit, just us-
ing the time integral of output ω of the PI-Controller. Note
that they have unity amplitude and vc(ω t) leads 120o va(ω t).
Thus, they represent a feedback from a positive-sequence
component at frequency ω. The PLL circuit can reach a stable
point of operation only if the input p3φ of the PI-Controller
has zero average value ( p3φ = 0) and has minimized low fre-
quency oscillating portions in ~ p3φ ( p3φ = p3φ + ~
p3φ ). Re-
calling that the average three-phase power (P3φ = p3φ ), in
terms of phasors, is given by
P3φ = p3φ = 3V+1I +1 cos φ , (3)
a stable point of operation is found only if ω equals the system
frequency and the feedback signal corresponding to a auxiliary
voltage signal va(ω t) becomes orthogonal to the fundamental
positive-sequence component of the measured load current ia.
However, if the point where ia leads the feedback signal va(ω t)
by 90o is reached, this is still an unstable point of operation.
va(ω t) ωt vNa
sin(ω t ) sin(ω t – π/2)
iab
X
Glos p3 φ ω vNb
1
Σ PI-Controller
s sin(ω t – π/2 – 2π
π/3)
icb
X
vNc
sin(ω t + 2π
π/3) sin(ω t – π/2 + 2π
π/3)
vc(ω t)
Fig. 3: The synchronizing circuit − PLL circuit.
At this point, an eventual disturbance that slightly increases i pa = G ⋅ v Na = G sin ωt − π
 e e ( 2
)
( )
the system frequency (the frequency of iab and icb in Fig. 3) 
will make the current phasor ( I&+1 ) to rotate faster than the i pb = G e ⋅ v Nb = G e sin ωt − 2 − 2π 3
π
voltage phasor built up from the feedback voltage signals
va(ω t) and vc(ω t). Hence, the displacement angle between ia

(
i pc = G e ⋅ v Nc = G e sin ωt − π 2 + 2π 3 ) . (4)

and va(ω t), given by cosφ in (3), becomes greater than 90o.
This results in negative average input ( p3φ < 0) and conse-
quently to a decreasing output ω, making the phase angle be-
tween ia and va(ω t) even greater. This characterizes an unsta-
ble point of operation. Thus, the PLL has only one stable
point of operation, that is the feedback signal va(ω t) leading
90º the load current ia. Now, if the same disturbance is veri-
fied, the displacement angle between the voltage and current
phasors will be reduced and the average power in (3) will be
positive. This will make the voltage phasor to rotate faster,
keeping the orthogonality (lagging currents) between the gen-
erated V&+1 [va(ω t)] and the measured I&+1 . This fundamental
characteristic of the PLL circuit shown in Fig. 3 can be ex-
ploited to compose the needed sinusoidal functions. If
va(ω t) = sin(ω t) leads 90º the fundamental positive-sequence
component of the load current, then, vNa(ω t) = sin(ω t–π/2)
must be in phase with I&+1 . In other words, the signals vNa, vNb
and vNc are sinusoidal time functions with unity amplitude,
have the same frequency, and are in phase with the funda-
To achieve a valid expression for Ge, the fundaments
learned from the pq Theory [5] is introduced into a control al-
gorithm based on minimization method [8]. The general ex-
pressions of the pq Theory, in terms of symmetrical compo-
nents, presented in [5], can help to clarify the following dis-
cussion.
Only a constant real (active) power ( p ) is generated, if
only a fundamental positive-sequence component in the sys-
tem voltage and load current are considered and they are in
phase with each other. If they are orthogonal, only a constant
imaginary (reactive) power ( q ) would be generated. Other-
wise, both p and q have non-zero values. On the other hand,
generic load current can be minimized (compensated) by de-
termining its active portion given by
iwa = Ge ⋅ va

iwb = Ge ⋅ vb , (5)
i = G ⋅ v
 wc e c

mental positive-sequence component of the measured load where va, vb, vc are phase voltages and Ge is a real variable,
current. To fully determine the positive-sequence current representing a real conductance determined as
component of the load, its amplitude, represented by the dy- p3φ vaia + vbib + vc ic . (6)
namic conductance Ge in Fig. 1, should also be calculated. Ge = =
vΣ
2
va2 + vb2 + vc2
This is described in the following section.
In (6), ia, ib, ic are load currents, and iwa, iwb, iwc in (5) are the
minimized (active) currents, which transfer the same energy as
C. Compensating currents calculation the load currents, that is,
p3φ = v a ia + vb ib + vc ic = va iwa + vb iwb + vc i wc . (7)
As mentioned, the proposed control strategy has as objec-
tive to compensate load currents to guarantee balanced, sinu- Due this reason, some authors call them as active currents, and
soidal currents drawn from the network. This objective can be their complements: iqa = ia – iwa, iqb = ib – iwb, iqc = ic – iwc as
easily realized if the fundamental positive-sequence compo- non-active currents.
nent of the load current is accurately and “instantaneously” Now, if va, vb, vc in (6) are replaced by the signals vNa, vNb
determined. In this case, the difference between the funda- and vNc determined by the PLL (Fig. 3), a new conductance
mental positive-sequence current and the actual load current Ge′ is obtained and from it, the conductance Ge, needed in (4),
comprise all those components of the load current that should can be determined. Moreover, if vNa, vNb and vNc (synchro-
be compensated. Note that this strategy agrees with the previ- nized, fundamental, positive-sequence signals with unity am-
ous constraint that the shunt active filter should not compen- plitudes) replace the voltages and Ge replaces Ge in (5), this
sate the reactive power produced by the fundamental positive- expression and (4) become equivalent. Further simplification
sequence current. Information about the system voltage would in (6) is possible, because vNa, vNb and vNc are pure-sinusoidal
be necessary to compensate the fundamental reactive power of and balanced waves. Hence, the instantaneous aggregate
the positive-sequence current. value is a constant value, that is,
It is assumed that the conductance Ge in Fig. 1 corresponds 2 3 . (8)
v NΣ = v Na
2 + v2 + v2 =
Nb Nc
to the amplitude of the fundamental positive-sequence compo- 2
nent of the load current. If Ge is the amplitude of I&+1 of the Therefore, the modified, instantaneous conductance becomes
load, the instantaneous values of the fundamental positive- 2
sequence component of the load current can be determined by Ge′ = (v Na i a + v Nb ib + v Nc ic ) . (9)
3
multiplying the auxiliary "voltages" vNa, vNb and vNc from the Since the signals vNa, vNb and vNc are from positive-sequence
PLL circuit by the signal Ge, that is, component at the fundamental frequency, it is possible to af-
firm that the average value of Ge′ comprises only the funda- is connected at t = 0.1 s and the shunt active filter is started at
mental positive-sequence component ( I&+1 ) of ia, ib and ic. t = 0.2 s, as can be seen in Fig. 5. It shows the actual current
Moreover, since vNa, vNb and vNc are in phase with the funda- (already filtered) ica drawn by the shunt active filter, the load
mental positive-sequence component of ia, ib and ic, no aver- current and the current drawn from the network. The determi-
age imaginary power is produced and the average value of Ge′ nation of the currents ipa, ipb and ipc in Fig. 4 is influenced by
comprises the total amplitude of I&+1 of the load current. The the dynamic of the dc regulator (Glos), the PLL circuit (vNa,
average value of Ge′ is the conductance Ge, needed in (4) and vNb, vNc) and the low-pass filter that determines Ge. They af-
in Fig. 1. The above ideas are summarized in Fig. 4, which fect the magnitude of ipa, ipb and ipc, whereas the frequency and
together with Fig. 2 and Fig. 3 completes the proposed active phase angles of these currents are dictated only by vNa, vNb, vNc.
filter controller. The dynamic conductance Ge is added to Glos At t = 0.48 s, the thyristor converter is blocked and at
(amplitude of the positive-sequence current drawn by the ac- t = 0.5 s a three-phase, linear, balanced, capacitive load is
tive filter to regulate the dc voltage) to form a total positive- connected (R = 0.866 Ω, C = 6.4 mF, Y-connected). This
sequence amplitude represented by Gc. From Gc, the positive- represents a very hard load change, since 1 pu, non-linear load
sequence currents ipa, ipb, ipc are formed and the compensating with power factor cos(30º) inductive is suddenly disconnected.
current references can be determined, as shown in Fig. 4. During 20 ms there is no load connected. Then, a 1 pu, linear
load with power factor cos(30º) capacitive is connetec, as can
IV. SIMULATION RESULTS be seen in Fig. 6. Since the supply voltage is balanced and si-
nusoidal and a linear load is connected, after 0.5 s, the load
A power system corresponding to Fig. 1 was implemented current becomes sinusoidal and the active filter currents
in a digital simulator. The "per unit" (pu) system cannot be should be ideally zeroed. In a real implementation, it only
used directly in the simulator. Thus, 1 V (phase to ground) drains small current to regulate the dc voltage. However, the
and 1 A (line current) were used as the basis of the system. A
balanced, 1 V, three-phase, voltage source is used. The sys- 2.0
tem impedance is R = 0.02 Ω (2%) and L = 160 µH (5%). A 1.0
isa
0.0
three-phase thyristor converter with 30º firing angle, 1 A dc -1.0
current and 160 µH commutation inductance is used as non- -2.0
linear load. The commutation inductance L of the shunt active 2.0 ia ipa
1.0
filter (Fig. 1) is equal to 400 µH and the high-pass filter is 0.0
C = 168.8 µF and R = 0.5 Ω. The dc voltage reference value -1.0
(vcref in Fig. 2) is 3.8 V and a 2.4 mF capacitor is used as en- -2.0
2.0
ergy storage element. To give an idea how small is the dc ca- 1.0
pacitor, the Unit Capacitor Constant (UCC) is calculated: 0.0 ica
1 CV 2 1 ⋅ 0.0024 ⋅ 3.8 2 -1.0
UCC = 2 = 2 = 5.8 ms . (10) -2.0
S 3 ⋅1⋅1 0.08 0.12 0.16 0.2 0.24 0.28 0.32
The total simulation time is 0.8 s. The thyristor converter t(s)

G los Fig. 5: Connecting of the thyristor converter and shunt active filter.
ia
G′e Ge 2.0
ib 2
c (v Na ia + v Nb ib + v Nc ic ) low-pass
Σ
1.0
0.0
isa
ic 3 filter
-1.0
-2.0
vNa Gc ipa
2.0 ia
vNb 1.0
0.0
vNc -1.0
ipa ica -2.0
2.0
 i pa = G ⋅v ica*

c Na
ipb  i ca = i pa − i a icb 1.0
  0.0
 i pb = G c ⋅v Nb  i cb = i pb − i b
 ipc  i cc = i pc − i c icc -1.0
ica
 i pc = G
 c ⋅v Nc  -2.0
6.0
4.0 vc
2.0
ia ib ic 0.0
0.45 0.50 0.55 0.60 0.65 0.70
c t(s)
Fig. 6: Disconnecting of the thyristor converter and connecting of a
Fig. 4: Compensating currents calculation. balanced, capacitive load.
controller takes more than 150 ms correcting the compensating
currents and adapting to the new situation of loading, as well
as regulating the dc voltage. It is possible to see partial loss of
controllability during low dc-voltage levels. During this peri-
ods, the actual compensating current (ica) does not track accu-
rately its reference value (ica*).
V. CONCLUSIONS
The fundaments of the pq Theory was exploited to develop
a new control strategy, the Sinusoidal Fryze Currents Control,
based on minimization method equations, together with a ro-
bust synchronizing circuit (PLL circuit). The number of
equations is reduced, since it does not use any reference frame
transformation. The number of measurements is reduced,
since it does not use information about the system voltage.
The controller calculates compensating currents that comprise
all components that differ from the fundamental positive-
sequence current. Thus, it includes zero-sequence components
and is able to be used in three-phase four-wire systems.
The controller is able to determine the fundamental posi-
tive-sequence component of the load current under very high
distortion conditions and does not care if the system voltage is
balanced or not. The shunt active filter compensates the dif-
ference between the measured load current and the determined
fundamental positive-sequence current. Thus, it compensates
also unbalances from negative sequence and zero sequence at
the fundamental frequency. However, the controller cannot
determine/compensate the reactive power generated by the
fundamental, positive-sequence, load current. The author are
working to extend the proposed Sinusoidal Fryze Currents
Control to make possible fundamental reactive power com-
pensation, besides all compensation characteristics presented
here.
VI. REFERENCES
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[2] H. Akagi, Y. Kanazawa and A. Nabae, "Instantaneous Reactive Power
Compensator Comprising Switching Devices Without Energy Storage
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no. 3, pp. 625-630, 1984.
[3] M. Aredes, "New Concepts of Power and its Application on Active
Filters," (in portuguese) M.Sc. Thesis, COPPE – Federal University of
Rio de Janeiro, Brazil, Nov. 1991.
[4] E.H. Watanabe, R.M. Stephan and M. Aredes, "New Concepts of
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VII. BIOGRAPHIES
Maurício Aredes (S’94, M’97) was born in São
Paulo State, Brazil, on August 14, 1961. He re-
ceived the B.Sc. degree from Fluminense Federal
University, Rio de Janeiro State in 1984, the
M.Sc. degree in Electrical Engineering from Fed-
eral University of Rio de Janeiro in 1991, and the
Dr.-Ing. degree (honors) from Technische Uni-
versität Berlin in 1996. From 1985 to 1988 he
worked at the Itaipu HVDC Transmission System
and from 1988 to 1991 in the SCADA Project of
Itaipu Power Plant. From 1996 to 1997 he
worked within CEPEL–Centro de Pesquisas de
Energia Elétrica, Rio de Janeiro, as R&D Engineer. In 1997, he became an
Associate Professor at the Federal University of Rio de Janeiro, where he
teaches Power Electronics. His main research area includes HVDC and
FACTS systems, active filters and static var compensators. Dr. Aredes is a
member of the Brazilian Society for Automatic Control and the Brazilian
Power Electronics Society.
Luís F.C.Monteiro was born in Rio de Janeiro
State on March 1975. He is finishing his gradua-
tion on Electrical Engineering at Federal Univer-
sity of Rio de Janeiro. He is enrolled in M.Sc. at
COPPE/UFRJ in Power Electronics and, with Dr.
Aredes, is developing new control strategies for
active filters since 2000. He is a student member
of the Brazilian Power Electronics Society.