PD - 95531

AUTOMOTIVE MOSFET IRF540ZPbF

IRF540ZSPbF
IRF540ZLPbF
Features HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance D
l 175°C Operating Temperature VDSS = 100V
l Fast Switching
l Repetitive Avalanche Allowed up to Tjmax RDS(on) = 26.5mΩ
l Lead-Free G

Description ID = 36A
S
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low on-
resistance per silicon area. Additional features of
this design are a 175°C junction operating tempera-
ture, fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety
TO-220AB D2Pak TO-262
IRF540Z IRF540ZS IRF540ZL
of other applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 36
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 25 A
IDM Pulsed Drain Current c 140
PD @TC = 25°C Power Dissipation 92 W
Linear Derating Factor 0.61 W/°C
VGS Gate-to-Source Voltage ± 20 V
d
EAS (Thermally limited) Single Pulse Avalanche Energy 83 mJ
EAS (Tested ) Single Pulse Avalanche Energy Tested Value h 120
IAR Avalanche Current c See Fig.12a, 12b, 15, 16 A
EAR Repetitive Avalanche Energy g mJ
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting Torque, 6-32 or M3 screw i y
10 lbf in (1.1N m)y
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.64 °C/W
RθCS Case-to-Sink, Flat Greased Surface i 0.50 –––
RθJA Junction-to-Ambient i ––– 62
RθJA Junction-to-Ambient (PCB Mount) j ––– 40
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Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.093 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 21 26.5 mΩ VGS = 10V, ID = 22A e
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 36 ––– ––– V VDS = 25V, ID = 22A
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 100V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Qg Total Gate Charge ––– 42 63 ID = 22A
Qgs Gate-to-Source Charge ––– 9.7 ––– nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– 15 ––– VGS = 10V e
td(on) Turn-On Delay Time ––– 15 ––– VDD = 50V
tr Rise Time ––– 51 ––– ID = 22A
td(off) Turn-Off Delay Time ––– 43 ––– ns RG = 12 Ω
tf Fall Time ––– 39 ––– VGS = 10V e
LD Internal Drain Inductance ––– 4.5 ––– Between lead, D

nH 6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package G

and center of die contact S

Ciss Input Capacitance ––– 1770 ––– VGS = 0V

Coss Output Capacitance ––– 180 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 100 ––– pF ƒ = 1.0MHz
Coss Output Capacitance ––– 730 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 110 ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 170 ––– VGS = 0V, VDS = 0V to 80V f
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 36 MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current ––– ––– 140 integral reverse
(Body Diode) c p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 22A, VGS = 0V e
trr Reverse Recovery Time ––– 33 50 ns TJ = 25°C, IF = 22A, VDD = 50V
Qrr Reverse Recovery Charge ––– 41 62 nC di/dt = 100A/µs e
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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 IRF540Z/S/LPbF

1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
100 5.0V
100 5.0V
BOTTOM 4.5V BOTTOM 4.5V

4.5V
10 10

4.5V
60µs PULSE WIDTH 60µs PULSE WIDTH
Tj = 25°C Tj = 175°C
1 1
0.1 1 10 100 0.1
0 1 10 100
100
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 80

T J = 175°C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (Α)

60
100
T J = 175°C

40
T J = 25°C
10
T J = 25°C
20
VDS = 25V
VDS = 10V
60µs PULSE WIDTH
380µs PULSE WIDTH
1
4.0 5.0 6.0 7.0
0
0 10 20 30 40 50
VGS, Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

Vs. Drain Current
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 IRF540Z/S/LPbF

3000 20
VGS = 0V, f = 1 MHZ ID= 22A
C iss = C gs + C gd, C ds SHORTED
VDS= 80V

VGS, Gate-to-Source Voltage (V)

2500 C rss = C gd
16 VDS= 50V
C oss = C ds + C gd
VDS= 20V
C, Capacitance (pF)

2000
Ciss
12

1500

8
1000

4
500 Coss FOR TEST CIRCUIT
Crss SEE FIGURE 13
0
0
1 10 100 0 10 20 30 40 50 60
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000.0 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ISD, Reverse Drain Current (A)

ID, Drain-to-Source Current (A)

100.0 100

T J = 175°C
10.0 10 100µsec

1.0 1
T J = 25°C 1msec
Tc = 25°C
VGS = 0V Tj = 175°C 10msec
Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1 10 100 1000
VSD, Source-toDrain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRF540Z/S/LPbF

40 3.0
ID = 22A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V
2.5
30
ID , Drain Current (A)

(Normalized)
2.0

20

1.5

10
1.0

0 0.5
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

T J , Junction Temperature (°C) T J , Junction Temperature (°C)

Fig 9. Maximum Drain Current Vs. Fig 10. Normalized On-Resistance

Case Temperature Vs. Temperature

10
Thermal Response ( Z thJC )

1
D = 0.50
0.20
0.10
0.1 0.05
0.02
0.01

0.01 SINGLE PULSE

( THERMAL RESPONSE )

0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF540Z/S/LPbF

180
15V
ID

EAS , Single Pulse Avalanche Energy (mJ)

160
TOP 8.3A
L DRIVER 140 14A
VDS
BOTTOM 20A
120
RG D.U.T +
V
- DD 100
IAS A
VGS
20V
0.01Ω
80
tp

60
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS 40

tp
20

0
25 50 75 100 125 150 175

Starting T J , Junction Temperature (°C)

I AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
QG

10 V
QGS QGD 4.0
VGS(th) Gate threshold Voltage (V)

VG
3.5

ID = 250µA
Charge 3.0

Fig 13a. Basic Gate Charge Waveform

2.5

2.0
L
VCC
DUT
0 1.5
1K -75 -50 -25 0 25 50 75 100 125 150 175

T J , Temperature ( °C )

Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature
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 IRF540Z/S/LPbF

1000
Duty Cycle = Single Pulse

100
Allowed avalanche Current vs
Avalanche Current (A)

avalanche pulsewidth, tav

0.01 assuming ∆ Tj = 25°C due to
avalanche losses
10
0.05
0.10
1

0.1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

100 Notes on Repetitive Avalanche Curves , Figures 15, 16:

TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
90 BOTTOM 10% Duty Cycle 1. Avalanche failures assumption:
80 ID = 20A Purely a thermal phenomenon and failure occurs at a
EAR , Avalanche Energy (mJ)

temperature far in excess of Tjmax. This is validated for

70 every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
60 not exceeded.
3. Equation below based on circuit and waveforms shown in
50
Figures 12a, 12b.
40 4. PD (ave) = Average power dissipation per single
avalanche pulse.
30 5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
20 6. Iav = Allowable avalanche current.
10 7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T J , Junction Temperature (°C)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

Fig 16. Maximum Avalanche Energy Iav = 2DT/ [1.3·BV·Zth]
Vs. Temperature EAS (AR) = PD (ave)·tav
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IRF540Z/S/LPbF

Driver Gate Drive

P.W.
D.U.T P.W.
Period D=
Period
+

ƒ
*
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

RD
VDS

VGS
D.U.T.
RG
+
-VDD

10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

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 IRF540Z/S/LPbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

10.54 (.415) 3.78 (.149) -B-

2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045) LEAD ASSIGNMENTS
MIN HEXFET IGBTs, CoPACK
1 - GATE
1 2 3 2 - DRAIN
1- GATE 1- GATE
2- DRAIN
3 - SOURCE 2- COLLECTOR
3- SOURCE
4 - DRAIN 3- EMITTER
4- DRAIN 4- COLLECTOR
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)

3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

E XAMPL E : T HIS IS AN IR F 1010

L OT CODE 1789
AS S E MB L E D ON WW 19, 1997 INT E R NAT IONAL PAR T NU MB E R
IN T H E AS S E MB L Y L INE "C" R E CT IF IE R
L OGO
Note: "P" in assembly line
position indicates "Lead-Free" DAT E CODE
YE AR 7 = 1997
AS S E MB L Y
L OT CODE WE E K 19
L INE C

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IRF540Z/S/LPbF

D2Pak Package Outline

Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information (Lead-Free)

T H IS IS AN IR F 5 3 0 S W IT H P AR T N U M B E R
L OT COD E 8 0 24 IN T E R N AT IO N AL
AS S E M B L E D O N W W 0 2 , 2 0 0 0 R E C T IF IE R F 530S
IN T H E AS S E M B L Y L IN E "L " L O GO
D AT E C O D E
N ote: "P " in as s em bly line Y E AR 0 = 2 0 0 0
pos ition in dicates "L ead-F ree" AS S E M B L Y
L O T CO D E WE E K 02
L IN E L

OR
P AR T N U M B E R
IN T E R N AT IO N AL
R E C T IF IE R F 530S
L O GO
D AT E CO D E
P = D E S IG N AT E S L E AD - F R E E
AS S E M B L Y P R O D U C T (O P T IO N AL )
L OT COD E Y E AR 0 = 2 0 0 0
WE E K 02
A = AS S E M B L Y S IT E C O D E

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 IRF540Z/S/LPbF
TO-262 Package Outline

IGBT
1- GATE
2- COLLECTOR
3- EMITTER

TO-262 Part Marking Information

EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789 PART NUMBER
INT ERNAT IONAL
AS S EMBLED ON WW 19, 1997
RECTIFIER
IN T HE AS S EMBLY LINE "C" LOGO
Note: "P" in as s embly line DAT E CODE
pos ition indicates "Lead-Free" YEAR 7 = 1997
AS S EMBLY
LOT CODE WEEK 19
LINE C

OR
PART NUMBER
INT ERNATIONAL
RECTIFIER
LOGO
DATE CODE
P = DES IGNAT ES LEAD-FREE
AS S EMBLY PRODUCT (OPT IONAL)
LOT CODE YEAR 7 = 1997
WEEK 19
A = AS S EMBLY S IT E CODE

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IRF540Z/S/LPbF
D2Pak Tape & Reel Infomation

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
‚ Limited by TJmax, starting TJ = 25°C, L = 0.46mH † This value determined from sample failure population. 100%
RG = 25Ω, IAS = 20A, VGS =10V. Part not
recommended for use above this value.
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
„ Coss eff. is a fixed capacitance that gives the
same charging time as Coss while VDS is rising
from 0 to 80% VDSS .
… Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
tested to this value in production.
‡ This is only applied to TO-220AB pakcage.
ˆ This is applied to D2Pak, when mounted on 1" square PCB (FR-
4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994.

TO-220AB package is not recommended for Surface Mount Application.

Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 7/04
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