REAL TIME 3D GRAPHICS PROCESSOR ON FPGA

Soorej G Kamal1, Nisha B2 and Mathew K3

1
Dept. of ECE, MACE Kothamangalam, India
soorejgkamal@gmail.com
2
Dept. of ECE, MACE Kothamangalam, India
bnishaaa@gmail.com
3
Dept. of ECE, MACE Kothamangalam, India
kmathewmace@gmail.com

Abstract
Three dimensional graphics processing need complex algebraic and In my work, I created an object memory which contains
matrix based calculations. Excess overhead will occur on the triangle model of objects. So this memory contains
microcontroller when executing three dimensional graphics operation. coordinates of lot of triangles. Each triangle consists of 3 vertices
So we need an extra hardware to avoid this overhead. Use of ASIC will and each vertex contains 3 points. Also each point has 8 bit width.
eliminate this overhead but it will increase the cost of design if we are For simplicity I created object memory in FPGA which is 72 bit
designing custom applications. So in this project I focused on a
width and depth of memory is related to number of triangles in
hardware design on FPGA, which is capable of processing 3D
graphical operations. The implemented real time 3D graphics the objects.
processor can render 3D object in a 2D display with added effect like The output of my work is a rendered object in a VGA
shading and hidden surface removal. FPGA used is spartan6 and host monitor, with shading and hidden surface removal which will
controller is LPC1769 arm processor. help to give 3D effects. I also interfaced an external keyboard to
FPGA to control transformation of objects like rotation, scaling
Keywords: and translation in real time.
3D graphics processing, transformation unit, shading, z buffer
algorithm, frame buffer
2. THE TASK
1. INTRODUCTION
Here I am describing a hardware design in Spartan6
FPGA, which can render the 3D object. Test objects are stored in
The graphics processing is an essential process of
an object memory which is accessed by the 3D GPU and output is
manipulating and accelerating the building of image to be
projected to a VGA monitor. My host controller is LPC1769
displayed. This process is needed in embedded systems, mobile
ARM controller and it can control GPU via SPI communication.
phones, computers and game consoles. In all these cases ASICs
A graphical LCD panel connect to the host controller will display
will help to render 3D graphics. But when we are trying to design
the current direction of rotation and angle of rotation. Also I
a custom application and we want to show output to a display, we
created a user interface in Visual Basic, which communicates to
can’t afford ASICs due to its cost of design flow. In this case we
host controller via UART protocol. This user interface helps the
can use Field Programmable Gate Arrays (FPGAs) to obtain our
user to choose the object, color of the object and direction in
need without giving overhead to our host controller.
which the object to be rotated. So corresponding to user choice,
The FPGA technology is improving and it can clearly act the host controller give instructions to the 3D GPU and it process
as an alternative to the ASIC design. The developments in FPGA the corresponding object in the object memory. The final result
technology is in such a way that the performance of ASIC and will be displayed in VGA monitor. An external keyboard
FPGA has become comparable. Reusability of FPGA is one of its interfaced to FPGA helps the user to rotate the object in real time.
major advantages. Unlike ASICs, FPGA's have special hardwares
such as Block-RAM, DCM modules, MACs, memories and high
speed I/O, embedded CPU etc inbuilt, which can be used to get
better performance. Modern FPGAs are packed with these
features [1].
In 3D graphics processing, the virtual “world” is made
up of 3 axis of coordinates (x, y, z), just like the world we are
living in. However, in order to display this 3D world onto a 2D
display of (x, y) coordinates, 3D transformation is needed to
transform 3D world into 2D image frame to be displayed on the
monitor. In 3D graphics processing, triangle primitive is one of
the basic building blocks of an object where a single object can be
made from few up to thousands of triangles, depending on the
details. Each triangle consists of three coordinates in the 3D Fig.1. Stages in 3D graphics processing
world. These 3 coordinates are connected to form a triangle.
Models can be created using few or many triangles; with fewer Fig.1 shows various stages in 3D graphics processing. In
triangles, the model will look bulky; with more triangles, the the modeling stage, a triangular model of the object is stored in
model will look smoother. the object memory. In the viewing stage, the triangular model for
a particular object is transformed to a new one with respect to the
transformation information provided. In the clipping stage, the
information outside the 3D viewing angle of the object is
removed. In the projecting stage, data values needed for
displaying 3D image on a 2D screen is obtained. It is in this stage
the 3D effects are added to the object. Last stage is the display
stage where a 3D image of the object is displayed on the display.
3. BLOCK DIAGRAM
Fig.2. Block diagram of entire system
The block level design of my entire work is shown in
Fig.3.Here host controller and FPGA communicates via SPI
protocol. Similarly Graphical LCD (GLCD) and controller also
use SPI protocol for communication. The keyboard interfaced to
transformation unit uses I2C protocol for communication. The
Visual Basics (VB) application in PC communicates with PC
through UART protocol.
Fig.2.Block diagram of 3D GPU
4. IMPLEMENTATION
The graphics processing unit will handle all 3D-
rendering operations on a 3D-model.To update the image the
graphic processing unit accesses the frame buffer. By using x and
y coordinates it computes the corresponding address value of the
frame buffer. It also computes the value of each pixel with its
intensity. In this way it updates the image.
The important units in the three dimensional graphics
processor are,
4.1 TRANSFORMATION UNIT
Geometric transformations can be used to move objects in
virtual environment. A basic transformation type involves scaling,
rotation and translation [2]. A set of points which defines an
object can be transformed into another set of points by geometric
calculations. Here I am representing an object with lot of
triangles, so transformation of all triangles gives the feeling that
the entire object is moving in the virtual world.Fig.3 shows the
structure of transformation unit.
Fig.3.Transformation unit
The direct hardware implementation of this unit becomes
more complex because rotation of an object in an arbitrary axis
needed complex trigonometric calculations. So in order to avoid
floating point calculations due to sine and cosine term, I used
lookup table method. In this method, all the sine and cosine
values are converted to another form and stored in a block
memory in FPGA. Also used some special calculations techniques
in the processing so that the rotation of one point always results
with an integer value [3]
4.2 KEY BOARD INTERFACE UNIT
An interface to keyboard is added in transformation unit
which helps to change the angle of rotation in real time. The PS/2
keyboard is interfaced through an interface unit implemented on
FPGA. I2C is the protocol used for the communication between
keyboard and FPGA. It has got mainly two lines, data line and
clock line, for communication. The synchronizer module in the
interfacing unit synchronizes the keyboard with the system clock
[4].
Fig.4.Keyboard interfacing unit
 The debounce logic is implemented to avoid false
triggering from the keyboard. Shift register is used to store the
data received from the keyboard. Its output is given to the output
unit. The output unit will provide the ASCII value corresponding
to this received data. It will provide the output value only when it
is enabled by the error checking unit. The error checking unit will
take the parity bit of the received data as input and will enable or
disable the output unit. Output unit also gives a flag bit which
indicates the time when a new valid ASCII value is available at
the ASCII bus.
4.3 SHADING MODULE
The purpose of the shader module is to rasterize each triangle
of the 3D object being rendered. The transformation units outputs
three vertices representing the points of a triangle to be projected
onto a 2D screen and it is given to the shader module. This unit
processes each triangle and supply result to the next stage.
Fig.4.Shading Module block diagram
A special type of shading algorithm is used in this
module. The purpose of this algorithm is to determine the outline
of the triangle as well as fill the pixels horizontally from left-to-
right until the entire triangle is shaded [5]. The depth of each pixel
needs to be calculated.Fig.4.shows the all stages in the shader
module. Initially I sorted all the triangle coordinates according to
its y coordinate value. Then I found some gradient values from
sorted coordinates. Proper interpolation gave the boundary points
of triangle in each horizontal pixel values. I drew line between
these boundary values points to fill the triangle, also interpolation
in Z level give the depth information of each pixel.
4.4 HIDDEN SURFACE REMOVING UNIT
While displaying a 3D object, there are some parts of the
scene which are not visible from a chosen viewing position.
Identification and removal of such parts is a major consideration
in the generation of realistic images for 3D objects. To solve back
face elimination, many approaches and algorithms are there. In
different types of applications, to identify the invisible objects or
parts of them, many algorithms have been implemented. These
various algorithms are called as visible surface detection or
hidden surface elimination methods. Among these, some methods
require more memory, some involve more processing time, and
some apply only to special types of objects.
Very common and simple method used is hidden surface
removal is Z-buffering. This algorithm takes the depth of each
pixel and compare against the depth of the old pixel at the same
location. If the new pixel has less “depth” than the existing pixel
it will be output to the screen. This preserves the “depth” effect of
3D objects when rendered onto a 2D screen. This technique is
known as Z buffering [6]. Hidden surface removing unit stores the
Z values of each pixel location, obtained after the Z buffering, on
the frame buffer. The address location in which these z values to
be stored is calculated by using the x any y values. This module
also read data from frame buffer for comparing the existing
values of the corresponding pixel.
4.5 FRAME BUFFFER
A frame buffer is a large, contiguous piece of memory.
At a minimum there is one memory bit for each pixel in the raster;
this amount of memory is called a bit plane. Here I am using a
large external SRAM as my frame buffer. So I can represent
entire screen effectively and also give enough depth for each
pixel. The SRAM used in my purpose is AS7C38098A.It is an
8M-bit high speed CMOS static random access memory
organized as 512K words by 16 bits [7].
4.6 VGA CONTROLLER
It is a controller used to transfer the data for display on to
the monitor by synchronizing the display timing. It generates the
horizontal and vertical synchronizing signals and also the current
vertical and horizontal positions. It is by using these signals the R,
G and B values are accessed correctly from the frame buffer. The
R, G and B digital data so obtained is given to a DAC to obtain
the analog signal for R, G and B [8].Fig.5 shows the designed
VGA driver and VGA display interface in my project. In this
work I used a resolution of 640*480 with 60Hz refresh rate. The
pixel clock needed is 25 MHz, so the entire system is clocking
with a frequency of 25 MHz.
Fig.5.VGA controller
5. RESULT
The fig.6 shows rotation of a simple object in different
directions. This object was initially defined only with four
triangles. The implemented system generated a 3D projection of
this object and displayed on the VGA monitor. The object is
rotated in x and y direction with angle of 600. We can observe the
shading effect and hidden surface removal in the given figure. It
is also possible to change the angle of rotation through keyboard
and also change the color of shading by using the GUI created in
visual basic.

Fig.6. Object rotation
6. CONCLUSION
The given design is implemented in custom Spartan6
FPGA board. The implemented 3D GPU is capable of rendering
any object in the object memory. The host controller connected to
the FPGA can gave proper instruction for 3D processing. So the
implemented system could reduce the overhead in LPC1769
ARM controller when executes 3D rendering alone. The design
was coded in VHDL, simulated in Xilinx ISE Design Suit 14.1
and was implemented in Spartan6 FPGA custom board.
REFFERENCES
[1] James Ryan Warner, Real Time 3-D Graphics Processing Hardware Design
Using Field-Programmable GateArrays, M.Sc. of Science in Electrical
Engineering , University of Pittsburgh , Pittsburgh, Pennsylvania,
UnitedStates, 2008.
[2] Fakhrulddin Hamid Ali , Transformation Matrix for 3D computer Graphics
Based on FPGA, Al-RafidainEngineeringJournal,Vol.20 , No.5 , October
2012.
[3] Dr. Basma Mohammed Kamal Younis1, Ne'am Salim Mohammed Sheet,” A
Real Time Dynamic 3D Graphics Processor Using FPGA”, Department of
Computer Technology Engineering/ Technical College, Mosul, Iraq.
[4] Scott larson,”ps/2 key board interface”,Avilable at:www.eewiki.net.
[5] Earvin Caceres,Gautham Vunnam,Garvit Singh,Annjana Ramesh ,”3D
rendering in FPGA”,CSEE 4840, Embedded system design Spring 2014
[6] John Vince, Mathematics for Computer Graphics, 3rd edition, Springer, Inc.
2010.
[7] AS7C38098A,”512k*16 bit high speed cmos sram”,data sheet,Alliace
memory
[8] V.Kasik,A.kurecka,P. Pospech,”3D Graphics Processing Unit with
VGA”,12th IFAC conference on programmable device and embedded
syystems,2013.