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APPARTUS:
IC 741, Bread board, CRO, Function Generator, Resistors, Connecting wires, CRO,
CRO Probes, Multimeter, etc.
CIRCUIT DIAGRAM:
INVERTING AMPLIFIER
NON-INVERTING AMPLIFIER
PROCEDURE:
INVERTING AMPLIFIER
1. Connect output of the Function generator at the input terminal of the inverting
amplifier
4. Set input voltage 0.5Vp-p or you can take any value that output cannot reach at
saturation.
NON-INVERTING AMPLIFIER
1. Connect output of the Function Generator at the input terminal of the non-inverting
amplifier.
2. Connect CRO at output terminal.
3. Set offset preset so that output voltage becomes merely zero.
4. Set input voltage 0.5Vp-p or you can take any value that output cannot reach at
saturation.
5. Vary frequency starting from 50 Hz to 1 MHz and measure output voltage.
CONCLUSION:
_______________________
APPARTUS:
IC 741, Bread board, CRO, Function Generator, Resistors, Connecting wires, CRO,
CRO Probes, Multimeter, etc.
CIRCUIT DIAGRAM:
INVERTING AMPLIFIER
NON-INVERTING AMPLIFIER
PROCEDURE:
INVERTING AMPLIFIER
6. Connect output of the Function generator at the input terminal of the inverting
amplifier
10. Set input voltage 0.5Vp-p or you can take any value that output cannot reach at
saturation.
11. Vary frequency starting from 50 Hz to 1 MHz and measure output voltage.
NON-INVERTING AMPLIFIER
6. Connect output of the Function Generator at the input terminal of the non-inverting
amplifier.
7. Connect CRO at output terminal.
8. Set offset preset so that output voltage becomes merely zero.
9. Keep feedback resistor switch to 10K position.
10. Set input voltage 0.5Vp-p or you can take any value that output cannot reach at
saturation.
11. Vary frequency starting from 50 Hz to 1 MHz and measure output voltage.
CONCLUSION:
_______________________
APPARTUS:
IC-741, bread board, power supply, function generator, resister, connecting wires,
CRO, CRO Probe, etc.
THEORY:
Summing amplifier
CIRCUIT DIAGRAM:
PROCEDURE:
CONCLUSION:
_______________________
CIRCUIT DIAGRAM:
THEORY:
Oscillator is defined as a circuit that generates an A.C output signal without requiring
any externally applied input signal. This is a sine wave oscillator in which feedback
network is R and C. They are used not only to provide feedback but also set the
frequency of oscillations. The circuit diagram of RC oscillator is as shown in fig. In this
circuit the basic amplifier provides 180 degree of phase shift, other phase shift that is
needed for positive feedback is provided by phase shift network consisting of three
identical RC sections. Thus each section provides a phase shift of 60 degree.
PROCEDURE:
OBSERVATIONS:
GRAPH:
CONCLUSION:
_______________________
Remark with Sign & Date
CIRCUIT DIAGRAM:
THEORY:
One of the most important advantages of negative feedback is that it increases the
bandwidth of the amplifier. For any amplifier the product of voltage gain and
bandwidth always remains constant.
As with the negative feedback, gain reduces therefore to keep the value of the
product constant, bandwidth of the amplifier increases proportionally. So with
increases the bandwidth measure the gain
PROCEDURE:
Without Feedback:
OBSERVATIONS:
Applied Input Voltage Vi = _______________.
10
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19
CALCULATIONS:
CONCLUSION:
____________________
APPARTUS:
IC-741, bread board, power supply, function generator, resister, connecting wires,
CRO, CRO Probe, Diode etc.
THEORY:
Rectifier circuits are used in the design of power supply circuits. In such applications,
the voltage being rectified is usually much greater than the diode voltage drop,
rendering the exact value of the diode drop unimportant to the proper operation of the
rectifier.
Show in fig.1, the resultant circuit can rectify signals with peak values down to a few
mill volts, unlike conventional diodes. This is possible because the high open-loop gain
of the op-amp automatically adjust the voltage drive to the diode D1 so that the rectified
output peak is the same as the input.
In fact, the diode acts as an ideal diode, since the voltage drop across the on diode is
divided by the open loop gain of the op amp. As Vin starts increasing in the positive
direction, the V’0 also starts increasing positively until diode D1 is forward biased.
When D1 is biased, it closes a feedback loop and the op-amp works as a voltage
follower. Therefore the output voltage V’0 follows the input voltage Vin during the
positive half-cycle, as in fig.1. However, when Vin starts increasing in the negative
direction, V’0 also increases negatively until it is equal to the negative saturation voltage
(-VEE). This reverse biases diode D1 and opens the feedback loop. Therefore, during the
negative half-cycle of the input signal, V’0 is 0V
Fig. 1 Positive small signal half wave rectifier and its input & output waveforms.
Fig.2 Negative small signal half wave rectifier and its input & output waveforms.
Yet another negative half wave rectifier is shown in fig.3. In this circuit two diodes are
used so that the output V’0 of the op-amp does not saturate.
The minimizes the response time and increase the operating frequency range of the op-
amp. However, notice that the op-amp is used in the inverting configuration and the
output is measured at the anode of diode D1 with respect to ground. Also, the output
resistance is non uniform since it depends on the sate of diode D1. In other words, the
output impedance is low when D1 is on and high when D1 is off. This problem, however,
can be cured by connecting a voltage follower stage at the output. During the positive
half-cycle of Vin, output V’0 is negative, which forward biases diode D1and close the
feedback loop through Rf.
Fig. 3 Negative half wave rectifier and its input & output waveforms.
Since R1= Rf , V0=Vin. However, on the negative alternation of Vin, output V’0 is
positive; hence diodeD2 is forward biased. In fact, it is this diode that prevents the op-
amp from going positive saturation. Since diode D1 is off, output V0=0 V. To obtain
positive half-wave rectified outputs, diodes D1 and D2 must be reserved. to low
frequencies.
CIRCUIT DIAGRAM:
GRAPH:
PROCEDURE:
1. Connect the circuit as shown in circuit diagram.
2. Apply sine wave as input (2Vpp,100Hz) to the circuit from function generator and
obtain the output on output pin V0
3. Connect CRO at output terminal.
4. Draw the o/p waveform for circuit shown on figure.
CONCLUSION:
_______________
APPARTUS:
IC-741, bread board, power supply, function generator, resister, connecting wires,
CRO, CRO Probe etc.
THEORY:
below Vlt. The hysteresis voltage is, of course, equal to the difference between Vut and
Vlt. Therefore,
𝑉ℎ𝑦=𝑉𝑢𝑡−𝑉𝑙𝑡 =𝑅1𝑅1+𝑅2[+𝑉𝑠𝑎𝑡—𝑉𝑠𝑎𝑡] -----------(c)
DESIGN:
CIRCUIT DIAGRAM:
PROCEDURE:
1. Connect the circuit as shown in circuit diagram.
2. Apply sine wave as input (2Vpp,100Hz) to the circuit from function generator and
obtain the output on output pin V0
3. Connect CRO at output terminal.
4. Draw the o/p waveform for ckt shown on figure.
GRAPH: Plot the Graph of input and output waveform & hysteresis loop with proper
scale on Graph paper.
CONCLUSION:
_______________________
Remark with Sign & Date
APPARTUS:
IC-741, breadboard, power supply, function generator, resisters, capacitors of desire
value, connecting wires, CRO, CRO probes, etc.
THEORY:
The most common and easily understood active filter is the Active Low Pass Filter. Its
principle of operation and frequency response is exactly the same as those for the
previously seen passive filter, the only difference this time is that it uses an op-amp for
amplification and gain control. The simplest form of a low pass active filter is to connect
an inverting or non-inverting amplifier, the same as those discussed in the Op-amp
tutorial, to the basic RC low pass filter circuit as shown. This first-order low pass active
filter, consists simply of a passive RC filter stage providing a low frequency path to the
input of a non-inverting operational amplifier. The amplifier is configured as a voltage-
follower (Buffer) giving it a DC gain of one, Av = +1 or unity gain as opposed to the
previous passive RC filter which has a DC gain of less than unity.
The advantage of this configuration is that the op-amps high input impedance prevents
excessive loading on the filters output while its low output impedance prevents the
filters cut-off frequency point from being affected by changes in the impedance of the
load.
While this configuration provides good stability to the filter, its main disadvantage is
that it has no voltage gain above one. However, although the voltage gain is unity the
power gain is very high as its output impedance is much lower than its input impedance.
If a voltage gain greater than one is required we can use the following filter circuit.
The frequency response of the circuit will be the same as that for the passive RC filter,
except that the amplitude of the output is increased by the pass band gain, AF of the
amplifier. For a non-inverting amplifier circuit, the magnitude of the voltage gain for
the filter is given as a function of the feedback resistor ( R2 ) divided by its
corresponding input resistor ( R1 ) value and is given as:
Therefore, the gain of an active low pass filter as a function of frequency will be:
Where:
AF = the pass band gain of the filter, (1 + R2/R1)
ƒ = the frequency of the input signal in Hertz, (Hz)
ƒc = the cut-off frequency in Hertz, (Hz)
Thus, the operation of a low pass active filter can be verified from the frequency gain
equation above as:
Thus, the Active Low Pass Filter has a constant gain AF from 0Hz to the high frequency
cut-off point, ƒC. At ƒC the gain is 0.707AF, and after ƒC it decreases at a constant rate
as the frequency increases. That is, when the frequency is increased tenfold (one
decade), the voltage gain is divided by 10.
In other words, the gain decreases 20dB (= 20log 10) each time the frequency is
increased by 10. When dealing with filter circuits the magnitude of the pass band gain
of the circuit is generally expressed in decibels or dB as a function of the voltage gain,
and this is defined as:
This cascading together of the individual low and high pass passive filters produces a
low “Q-factor” type filter circuit which has a wide pass band. The first stage of the filter
will be the high pass stage that uses the capacitor to block any DC biasing from the
source. This design has the advantage of producing a relatively flat asymmetrical pass
band frequency response with one half representing the low pass response and the other
half representing high pass response as shown.
The higher corner point ( ƒH ) as well as the lower corner frequency cut-off point ( ƒL )
are calculated the same as before in the standard first-order low and high pass filter
circuits. Obviously, a reasonable separation is required between the two cut-off points
to prevent any interaction between the low pass and high pass stages. The amplifier also
provides isolation between the two stages and defines the overall voltage gain of the
circuit.
The bandwidth of the filter is therefore the difference between these upper and lower -
3dB points. For example, suppose we have a band pass filter whose -3dB cut-off points
are set at 200Hz and 600Hz. Then the bandwidth of the filter would be given as:
Bandwidth (BW) = 600 – 200 = 400Hz.
The normalised frequency response and phase shift for an active band pass filter will be
as follows.
CIRCUIT DIAGRAM:
PROCEDURE:
GRAPH: Draw the gain versus frequency graph on semi log and find out the cut off
frequency for Low Pass and Band Pass filter.
CONCLUSION:
______________________
_
Remark with Sign & Date
AIM: To design monostable and astable multi-vibrators using 555 timer IC and
verify their operation using measurements.
APPARTUS:
IC-555, breadboard, power supply, function generator, resisters, capacitors, connecting
wires, CRO, CRO probes, etc.
THEORY:
The 555 IC is a monolithic timing ckt that can produce accurate and highly stable time
delays or oscillations. The timer basically operates in one of the two modes: either as
an Astable (free - running) Multivibrator or Monostable (one - shot) Multivibrator.
MONOSTABLE OPERATION:
Initially when the o/p is low that is the ckt is in the stable state, transistor Q 1 is on and
capacitor C is shorted out to gnd. However, upon application of a negative trigger pulse
to pin 2, Q1 is turned off, which releases the short circuit across the capacitor C and
drives the o/p high. Capacitor C now is charging up towards Vcc through RA. However,
when the voltage across the capacitor equals the 2/3 Vcc, comparator 1’s o/p switches
from low to high, which in turn drive the o/p to its low state via the o/p of the flip-flop.
At the same time, the o/p of the flip-flop turns Q1 on, and hence C rapidly discharges
through the transistor. The o/p of the Monostable remains low until a pulse is again
applied. Then the cycle repeats. The pulse width of the trigger i/p must be smaller than
the expected pulse width of the o/p waveform. Also the trigger pulse must be a negative-
going i/p signal with an amplitude larger than 1/3 Vcc.
The time during which the o/p remains high is given by,
tp = 1.1 RAC
ASTABLE OPERATION:
Initially when the o/p is high, C starts charging toward Vcc through RA and RB. However
as soon as voltage across the C equals to the 2/3 Vcc comparator 1 triggers the flip-flop
and the o/p switches low. Now C starts discharging through RB and Q1. When the
voltage across C equals 1/3 Vcc, comparator 2’s o/p triggers the flip-flop, and the o/p
goes high. Then the cycle repeats.
Here the C is periodically charged and discharged between 2/3 Vcc and 1/3 Vcc,
respectively. The timing during which C charges from 1/3 Vcc to 2/3 Vcc is equal to
the time the o/p is high and is given by,
tc = 0.69(RA+ RB) C.
Similarly, the time during which C discharges from 2/3 Vcc to 1/2 Vcc is equal to time
the o/p is low and is given by
td = 0.69 RBC
T = tc + td
= 0.69 (RA+2RB)C
1
Fo =
T
1.45
=
(RA+2RB)C
and the duty cycle is given by the ratio of the time tc for which the o/p is high to the
total time period T.
tc (RA+RB)
% duty cycle = 100 = [ ] 100
T (RA+2RB)
DESIGN:
CIRCUIT DIAGRAM:
MONOSTABLE MULTIVIBRATOR
ASTABLE MULTIVIBRATOR
PROCEDURE:
1. Connect the circuit as per the circuit dia. For each of Monostable Multivibrator and
Astable Multivibrator ckts.
2. Give trigger i/p in Monostable Multivibrator configuration and observe o/p on CRO
in each case.
3. See that both the circuit act as precision Multivibrator.
4. Draw the waveform on graph paper with proper scale that has been observed on
CRO.
OBSERVATION:
GRAPH: Draw the waveform on graph paper with proper scale that has been observed
on CRO.
CONCLUSION:
_______________________
APPARTUS:
IC-741, breadboard, power supply, function generator, resisters, capacitors of desire
value, connecting wires, CRO, CRO probes, etc.
THEORY:
The output waveform of the integrator is triangular if its input is a square wave. This
means that a triangular wave generator can be formed by simply connecting an
integrator to the square wave generator. The resultant circuit requires a dual op-amp,
two capacitors, and at least five resistors.
The generator consists of a comparator A1 and an integrator A2. To illustrate the circuit
operation, let us set the output of A1 at positive saturation +Vsat (≅+Vcc). This +Vsat is
an input of the integrator A2. The output of A2, therefore, will be a negative-going ramp.
Thus one end of the voltage divider R2-R3 is the positive saturation voltage +Vsat of A1
and the other is the negative-going ramp attains a certain value –VRamp, point P is
slightly below 0V;hence the output of A1 will switch from positive saturation to negative
saturation –Vsat(≅-VEE). This means that the output of A2 will now stop going
negatively and will begin to go positively. The output of A2 will continue to increase
until it reaches +VRamp. At this time the point P is slightly above 0V; therefore, the
output of A1 is switched back to the positive saturation level +Vsat.. The sequence then
repeats.
The amplitude and the frequency of the triangular wave can be determined as follows:
When the output of the comparator A1 is +Vsat, the output of the integrator A2 steadily
decreases until it reaches –VRamp. At this time the output of A1 switches from +Vsat to -
Vsat. Just before this switching occurs, the voltage at point P(+input) is 0V.This means
that the -VRamp must be developed across R2, and +Vsat must be developed across R3.
That is,
𝑉𝑅𝑎𝑚𝑝 +𝑉𝑠𝑎𝑡
− = −
𝑅2 𝑅3
OR
𝑅2
−𝑉𝑅𝑎𝑚𝑝= − (+𝑉𝑠𝑎𝑡 ) -------------
𝑅3
(1a)
Similarly, +VRamp , the output voltage of A2 at which the output of A1 switches from –
Vsat to +Vsat, is given by
𝑅2
+𝑉𝑅𝑎𝑚𝑝= − (−𝑉𝑠𝑎𝑡 ) ------------ (1b)
𝑅3
Thus, from equations (1a) and (1b), the peak-to-peak (pp) output amplitude of the
triangular wave is
𝑅2
𝑉𝑜 (𝑝𝑝) = (2) (𝑉𝑠𝑎𝑡 )
𝑅3
Where Vsat=|+Vsat|=|-Vsat|. Equation (2) indicates that the amplitude of the triangular
wave decreases with an increase in R3.
The time it takes for the output waveform to swing from –VRamp to +VRamp is equal to
half the time period T/2.This time can be calculated from the integrator output equation.
Therefore, the time period of the triangular wave is,
4𝑅1 𝐶1 𝑅2
𝑇= --------------- (3a)
𝑅3
𝑅3
𝑓𝑜 = -------------- (3b)
4𝑅1 𝐶1 𝑅2
Equation (3b) shows that the frequency of oscillation f o increases with an increase in
R3.
Triangular wave generator is designed for a desired amplitude and frequency fo by using
equations (2) and (3b).
CIRCUIT DIAGRAM:
PROCEDURE:
1. Calculate the value of resistors and capacitors from given data by using formula of
theory.
2. Connect the circuit on bread board as per the circuit diagram.
3. Connect CRO at Triangular wave outputs and observes it. Also observes frequency.
4. Draw the waveform on graph paper with proper scale that has been observed on
CRO.
GRAPH: Draw the waveform on graph paper with proper scale that has been
observed on CRO.
CONCLUSION:
______________________