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Abstract— A compact class-AB variable gain amplifier has linearity and wide bandwidth with low supply voltage and low
been proposed. The amplifier structure is based on two- power consumption.
stage architecture comprising a linear transconductor
Recently, a compact low supply voltage and low power
cascaded by a current amplifier-based feedback
consumption VGA in [6] has been designed to achieve high
transimpedance amplifier. The major advantage of such
linearity and wide bandwidth with acceptable power
VGA circuit is its ability to offer a good degree of signal
dissipation. However, since its operation is limited at class-A
linearity without sacrificing the original advantages of its
amplifier, signal swing is small compared to class-AB
predecessor on both aspects of the power consumption and
amplifier. This paper presents an improved VGA to the circuit
circuit complexity. Superiority of the proposed VGA has
in [6]. It will be shown that the proposed circuit operates in
been confirmed by circuit simulation employing 0.18 m class-AB manner outperforms its predecessor (class-A),
standard CMOS technology in designing a 50-MHz VGA
especially, in terms of signal swing and linearity while
under 1V supply voltage draining static power maintaining the same static power consumption and silicon
consumption less than 60 W. area.
This work has been financially supported by Thailand Research Fund (under
grant no. RSA4680027).
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swing is restricted by constant current sources, i.e. the VGA a class-AB operation allowing larger signal swing compared to
operates in a class-A manner. This would prohibit the VGA to its predecessor presented in [6], [7]. Thus the major advantage
achieve a rail-to-rail output voltage swing. of such VGA circuit is its ability to offer excellent signal
linearity without sacrificing the original advantages on both
aspects of the power consumption and circuit complexity.
A small-signal transconductance of the first stage is simply
expressed as
gm
Gm
(2)
1 g m RS sRS C gs
where gm and Cgs are respectively transconductance and gate-
source capacitance of N1 and N2. The amplifier differential
current gain Ai and input resistance Rin have been analysed to
be
g mx g my
Ai
1 (3)
g mi sC x
g my sC y
(a) and
1
Rin
(4)
g mi sC x
where gmi, gmx and gmy are transconductance of P1 – P2, P3 –
P6 and N3 – N6 respectively. The parameters Cx and Cy are
equivalent total capacitance (referred to ground) at gates of P1
(P2) and N3 (N4) whose values are mainly contributed from
gate-source capacitance. At low frequency, since gmx =
gmi(/2), thus Ai of Fig. 2 equals to , which is the same as
what obtained from the original circuit in Fig. 1b. Thus, by
substituting (3) and (4) into (1), a small-signal transimpedance
gain could be obtained to be
1 Cy
1
2 R f s
R f
(b) g mx g my
g mx
(5)
Rm
Fig. 1 VGA proposed in [6], [7] (a) architecture (b) circuit C y Cx 2 CxC y
2 1 s 1 s
realisation with CMOS. g 2 g mi g mi g my
my
III. PROPOSED CLASS-AB VARIABLE GAIN AMPLIFIER
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The feedback resistor Rf is selected to set a voltage gain range 1V with identical static power and occupy same silicon area.
whereas a source degeneration resistor Rs is tuned to vary the By using a periodic steady-state analysis within Cadence IC
amplifier gain. The minimum value of Rs sets the maximum design platform, Fig. 4 show simulated output signal swing and
gain for a specific gain range (as previously set by Rf) and it total harmonic distortion (THD) compared between two VGA
also defines the maximum static current consumed by the circuits at the same voltage gain of 20dB where we can see that
VGA. The similar technique proposed in [8] can be used to the linearity improvement of over 13dB can be achieved. The
tune the grounded resistor Rs. THD improvement at various gain values for differential
output amplitude of -10dBVp at 1MHz and at other
IV. SIMULATION RESULTS frequencies are depicted in Fig. 5. Other performances are
summarized in Table II indicating that the proposed VGA is
The improved VGA circuit was designed to operate with a more superior specifically in terms of linearity.
single 1V power supply voltage. The circuit was simulated by
using Spectre employing a 0.18-m standard CMOS
technology where device threshold voltages were 0.49V and - Proposed VGA
0.46V for NMOS and PMOS respectively. With = 5,
transistor sizing of the VGA circuit in Fig. 2 is listed in Table I.
Original VGA
The minimum value of Rs is chosen to be 500 Ohms to ensure
a maximum current consumption not exceeding 60A for a
bandwidth over 50MHz.
Table I: Transistor sizing within the VGA operating under a
1V supply voltage.
: Proposed VGA
-80
-100
-120
-140
-160
-180
-50 -40 -30 -20 -10
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20 V. CONCLUSION
A compact class-AB variable gain amplifier has been
proposed. The amplifier structure is based on two-stage
THD Improvement (dB)
15
architecture comprising a linear transconductor cascaded by a
current amplifier-based feedback transimpedance amplifier.
10 The major advantage of such VGA circuit is its ability to offer
a good degree of signal linearity without sacrificing the
original advantages of its predecessor on both aspects of the
5
power consumption and circuit complexity. Superiority of the
proposed VGA has been confirmed by circuit simulation
0 employing 0.18m standard CMOS technology in designing a
-20 -10 0 10 20 30 40 50MHz VGA under 1V supply voltage draining static power
Voltage gain (dB)
consumption less than 60W.
(a)
20
ACKNOWLEDGEMENT
5
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0
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