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A B C D E

http://hobi-elektronika.net
1 1

Compal Confidential
2
Schematics Document 2

INTEL Auburndale BGA with IBEX core logic


Fossil 2.0 UMA
LA-6161P
3 3

2010-05-24
REV:1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title
SCHEMATICS, MB A6161
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 1 of 41
A B C D E
A B C D E

Compal Confidential
File Name : LA-6161P http://hobi-elektronika.net
Fossil 2.0 UMA XDP Conn.
Page 4
Accelerometer

LIS302DLTR
DDR3 1066/1333MHz 1.5V DDR3-SO-DIMM X 1
Mobile BANK 2, 3 Page 9 Page 22

1 Single Channel 1

Arrandale CPU Fan Control


Page 4
BGA 1288pins

Page 4,5,6,7,8
LVDS
Page 18

Display port DDI_D FDI DMI X4


Page 17
BT(SoftBreeze) Conn USB x 1
page 26

CRT
Page 19 USB conn x 3(For I/O)
DDI daughter board
page 24
2 2

USB2.0
WWAN CardReader Controller
+SIM Card
USB2.0
Intel Ibex Peak M SD/MMC Slot
USB*1 Azalia RealTek RTS5159
Page 22

PCI-E BUS 1071pins


sub/B Page 3
25mm*27mm
SATA0
USB x1(Camara)
Page 18
10/100/1000 LAN WLAN Card
Page 11,12,13,14,15,16
RTL8151DH-GR FPR conn x1
PCIE*1 Page 19
Page 21 Page 22 ONFI Interface

daughter board

RJ45 CONN Audio CKT


3 IDT 92HD80 Page 23 Audio Jack sub/B Page 2 3

Page 21

SATA HDD Connector


SPI BUS Page 19

RTC CKT. LED


Page 11 LED Board
SMSC KBC 1098
Page 20 page 28

Power OK CKT.
Page 29
Touch Pad CONN. Int.KBD CK505
Page 25
Page 25
Clock Generator
4 SLG8SP585VTR 4
Power On/Off CKT. SPI BUS
Page 25 SPI ROM 4MB Page 11
MX25L6445EM2I-10G Page 27
Security Classification Compal Secret Data Compal Electronics, Inc.
2008/09/15 2009/09/03 Title
DC/DC Interface CKT. Issued Date Deciphered Date
SCHEMATICS, MB A6161
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Page 30 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 2 of 41
A B C D E
A

Voltage Rails ( O MEANS ON X MEANS OFF )


http://hobi-elektronika.net
Symbol Note :
+RTCVCC +B +5VALW +1.5V +5VS
+3VL +3VALW +0.75V +3VS
+1.5VS : means Digital Ground
power
plane +VCCP
+CPU_CORE
+1.05VS : means Analog Ground
+1.8VS
@ : means just reserve , no build

State ULV@ : means just install for ULV CPU


CONN@ : means ME part.

L Layout Notes

07/24 update

S0
O O O O O : Question Area Mark.(Wait check)

S1
O O O O O
S3
O O O O X Install below 45 level BOM structure for ver. 0.1
S5 S4/AC 45@ : means just put it in the BOM of 45 level.
O O O X X
S5 S4/ Battery only
O O X X X
S5 S4/AC & Battery
don't exist
O X X X X Install below 43 level BOM structure for ver. 0.1
1 1

Remove before MP
DEBUG@ : means just build when PCIE port 80 CARD function enable.

SMBUS Control Table

THERMAL
SOURCE BATT XDP SODIMM CLK CHIP MINI CARD DOCK NIC SENSOR G-SENSOR

SMB_EC_CK1
SMB_EC_DA1
SMSC1098 V X X X X X X X X
SMBCLK
SMBDATA
Calpella X V V V V V X X V
SML0CLK
SML0DATA
Calpella X X X X X X V X X
SML1CLK
SML1DATA
Calpella X X X X X X X V V

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 3 of 41
A
1 2 3 4 5

http://hobi-elektronika.net
Layout rule:10mil width trace
length < 0.5", spacing 20mil
U1B
20_0402_1% 1 R2 2 H_COMP3 AD71 COMP3 CLK_CPU_BCLK
BCLK AK7 CLK_CPU_BCLK <14>

Misc
20_0402_1% 1 R5 2 H_COMP2 AC70 AK8 CLK_CPU_BCLK#
COMP2 BCLK# CLK_CPU_BCLK# <14>
49.9_0402_1% 1 R7 2 H_COMP1 AD69 K71 CLK_CPU_XDP
COMP1 BCLK_ITP

Clocks
J70 CLK_CPU_XDP#
49.9_0402_1% 1 R9 H_COMP0 BCLK_ITP#
2 AE66 COMP0
L21 CLK_EXP
PEG_CLK CLK_EXP <12>
J21 CLK_EXP#
PEG_CLK# CLK_EXP# <12> +1.5V
PAD T48 TP_SKTOCC# M71 PROC_DETECT R1093
Y2 R46 0_0402_5%
A DPLL_REF_SSCLK CLK_DP <12> A
W4 1 @ 2 2 1
DPLL_REF_SSCLK# CLK_DP# <12>
H_CATERR# N61 CATERR# 1K_0402_5%
SM_DRAMRST# 1 6 DRAMRST# <9>

Thermal
BJ12 SM_DRAMRST#
SM_DRAMRST#
<14> H_PECI 1 R14 2 H_PECI_ISO N19 PECI
Q52A
0_0402_5% BV33 SM_RCOMP0 2 R1092 1 2N7002DW-7-F_SOT363-6

2
SM_RCOMP[0] SM_RCOMP1
SM_RCOMP[1] BP39 PCH_DDR_RST <14>
to power; PU to VCCP at power side also BV40 SM_RCOMP2 @ 100K_0402_5%
SM_RCOMP[2]

DDR3
Misc
<37> H_PROCHOT# 1 R15 2 H_PROCHOT#_D N67 PROCHOT#
C6 1 2 470P_0402_50V7K
0_0402_5% AV66 PM_EXTTS#0 T49 PAD
PM_EXT_TS#[0] PM_EXTTS#1
PM_EXT_TS#[1] AV64 1 R16 2 PM_EXTTS#1_R <9>
0_0402_5% from DDR
<14> H_THERMTRIP# 1 R17 2 H_THERMTRIP#_R N17 THERMTRIP#
Intel S3 power reduction circuit for Calpella. 11/09
0_0402_5%

U71 XDP_PRDY# @ R1493 1 2 0_0402_5% XDP_PREQ#_R


PRDY# XDP_PREQ# @ R1494 0_0402_5% XDP_PRDY#_R
PREQ# U69 1 2

H_CPURST# @ 1 R18 2 H_CPURST#_R N70 T67 XDP_TCK


0_0402_5% RESET_OBS# TCK XDP_TMS reserve for ESD, Compal SI 1/19
TMS N65

Power Management
<13> H_PM_SYNC 1 R19 2 H_PM_SYNC_R M17 PM_SYNC TRST# P69 XDP_TRST#
0_0402_5%
T69 XDP_TDI
TDI
TDO T71
P71
XDP_TDO
XDP_TDI_M
CPU XDP Connector

JTAG & MBP


H_CPUPWRGD TDI_M
1 R21 2 SYS_AGENT_PWROK AM7 VCCPWRGOOD_1 TDO_M T70 XDP_PREQ#_R JP4
0_0402_5% XDP_PRDY#_R 1 2
XDP_DBRESET# GND0 GND1
DBR# W71 3 OBSFN_A0 OBSFN_C0 4 CFG8 <5>
<14> H_CPUPWRGD 1 R22 2 VCCPWRGOOD_0 Y67 VCCPWRGOOD_0
XDP_BPM#0 R23 1 2 0_0402_5% 5 OBSFN_A1 OBSFN_C1 6 CFG9 <5>
0_0402_5% @ R24 1 2 0_0402_5% 7 8
<5> CFG12 GND2 GND3
J69 XDP_BPM#0 XDP_BPM#1 R25 1 2 0_0402_5% 9 10
B BPM#[0] OBSDATA_A0 OBSDATA_C0 CFG0 <5> B
<13> PM_DRAM_PWRGD 1 R26 2 VDDPWRGOOD_R AM5 SM_DRAMPWROK BPM#[1] J67 XDP_BPM#1
<5> CFG13
@ R27 1 2 0_0402_5% 11 OBSDATA_A1 OBSDATA_C1 12 CFG1 <5>
0_0402_5% J62 XDP_BPM#2 XDP_BPM#2 R28 1 2 0_0402_5% 13 14
from power BPM#[2] XDP_BPM#3 @ R29 0_0402_5% GND4 GND5
BPM#[3] K65 <5> CFG14 1 2 15 OBSDATA_A2 OBSDATA_C2 16 CFG2 <5>
<29> VTTPWRGOOD H15 K62 XDP_BPM#4 XDP_BPM#3 R30 1 2 0_0402_5% 17 18
VTTPWRGOOD BPM#[4] OBSDATA_A3 OBSDATA_C3 CFG3 <5>
J64 XDP_BPM#5 @ R31 1 2 0_0402_5% 19 20
BPM#[5] <5> CFG15 GND6 GND7 +3VS
K69 XDP_BPM#6 21 22
BPM#[6] <5> CFG17 OBSFN_B0 OBSFN_D0 CFG10 <5>
H_PWRGD_XDP 1 R32 2 H_PWRGD_XDP_R Y70 M69 XDP_BPM#7 ESD request to add 23 24
TAPPWRGOOD BPM#[7] <5> CFG16 OBSFN_B1 OBSFN_D1 CFG11 <5>
@ 0_0402_5% 25 26
GND8 GND9
<14> BUF_PLT_RST# 1 2R33 PLT_RST#_R G3 RSTIN#
XDP_BPM#4 0_0402_5% 1 2 R43 XDP_BPM#4_R 27 OBSDATA_B0 OBSDATA_D0 28 CFG4 <5>

2
XDP_BPM#5 0_0402_5% 1 2 R48 XDP_BPM#5_R 29 30
OBSDATA_B1 OBSDATA_D1 CFG5 <5>
1.5K_0402_1% 31 32 R34
GND10 GND11
1

+VCCP XDP_BPM#6 0_0402_5% 1 2 R40 XDP_BPM#6_R 33 34 1K_0402_5%


OBSDATA_B2 OBSDATA_D2 CFG6 <5>
XDP_BPM#7 0_0402_5% 1 2 R41 XDP_BPM#7_R 35 36
OBSDATA_B3 OBSDATA_D3 CFG7 <5>
R35 INTEL_AUBURNDALE_1288 1 37 38

1
750_0402_1% H_CPUPWRGD R36 2 H_CPUPWRGD_R GND12 GND13 CLK_CPU_XDP
1 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40
C1 1K_0402_5% PM_PWRBTN#_R CLK_CPU_XDP# +VCCP
2nd Source : <13> PM_PWRBTN#_R 41 42
2

0.1U_0402_16V4Z HOOK1 ITPCLK#/HOOK5 @ 1K_0402_5%


43 44
SV - i5-540M CPU : 2.53G (K0) @ 2 H_PWRGD_XDP 1 R37 2 45
VCC_OBS_AB VCC_OBS_CD
46 XDP_RST#_R R38 1 2 H_CPURST#
0_0402_5% HOOK2 RESET#/HOOK6 XDP_DBRESET#_R XDP_DBRESET#
47 HOOK3 DBR#/HOOK7 48 1 2 XDP_DBRESET# <13>
49 50 R39 0_0402_5%
SV - i5-450M CPU : 2.4G (K0) 51
GND14 GND15
52 XDP_TDO
PAD T112 SDA TD0
SV - i3-350M CPU : 2.26G (K0) PAD T113 53 54 XDP_TRST#
SCL TRST# XDP_TDI
55 56
SV- i3-370M CPU : 2.4G (K0) Add test points XDP_TCK 57
TCK1 TDI
58 XDP_TMS
TCK0 TMS
ULV -U3400 CPU : 1.06G (K0) 59 GND16 GND17 60
SAMTE_BSH-030-01-L-D-A CONN@ @
XDP_RST#_R 1 2 PLT_RST# PLT_RST# <14,21,22,27>
R42 0_0402_5%

Intel S3 power reduction circuit for Calpella. 11/09


PWM Fan Control circuit
C C

@
PM_PWRBTN#_R 1 2 VDDPWRGOOD_R 1 2 +5VS
+VCCP VCCP_1.5VSPWRGD <29>
R20 1K_0402_5% R12 1.5K_0402_1%
1 2
R13 750_0402_1%

Processor Pullups +3VS


DDR3 Compensation Signals DDR Pullups C3
1 2
SM_RCOMP0 1 2 +VCCP @ 0.1U_0402_10V6K

5
R52 100_0402_1% U50 JFAN1
SM_RCOMP1 1 2 H_CATERR# R44 1 2 49.9_0402_1% +VCCP FAN_PWM 1 R891 0_0402_5% 1 1

P
<28> FAN_PWM INB
R56 24.9_0402_1% 4 2 1 2 2 G1 4
SM_RCOMP2 H_PROCHOT#_D PM_EXTTS#0 10K_0402_5% O
1 2 1 2 1 2 2 INA 3 3 G2 5

G
R58 130_0402_1% R45 68_0402_5% R1
H_CPURST#_R 1 2 PM_EXTTS#1 1 2 10K_0402_5% TC7SH00FUF_SSOP5 1 ACES_85204-03001

3
R47 @ 68_0402_5% R3 CONN@
Layout Note:Please these +VCCP +3VS for RF
resistors near Processor C1316 @
2 47P_0402_50V8J

2
R896
0112 Remove uninstall parts 10K_0402_5%

2
B
D Q26 D

1
E

C
XDP_TRST# 1 2 H_PROCHOT# 3 1
R59 51_0402_5%
PMBT3904_SOT23
Close to XDP

+VCCP Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title
XDP_TDO 1 2
R10 51_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
This shall place near XDP Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 4 of 41
1 2 3 4 5
1 2 3 4 5

U1A
PEG_ICOMPI
PEG_ICOMPO
B12
A13
EXP_ICOMPI
http://hobi-elektronika.net
49.9_0402_1%
1 R64 2

<13> DMI_CRX_PTX_N0 F7 DMI_RX#[0] PEG_RCOMPO D12


<13> DMI_CRX_PTX_N1 J8 B11 EXP_RBIAS 1 R65 2 U1E
DMI_RX#[1] PEG_RBIAS 750_0402_1%
<13> DMI_CRX_PTX_N2 K8 DMI_RX#[2]
<13> DMI_CRX_PTX_N3 J4 DMI_RX#[3] PEG_RX#[0] G40 RSVD32 W66 T116 PAD
PEG_RX#[1] G38 RSVD33 W64 T117 PAD
<13> DMI_CRX_PTX_P0 F9 DMI_RX[0] PEG_RX#[2] H34
<13> DMI_CRX_PTX_P1 J6 DMI_RX[1] PEG_RX#[3] P34

DMI
A K9 G28 AC69 A
<13> DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4] RSVD34
<13> DMI_CRX_PTX_P3 J2 DMI_RX[3] PEG_RX#[5] H25 RSVD35 AC71 T118 PAD
PEG_RX#[6] H24
<13> DMI_CTX_PRX_N0 H17 DMI_TX#[0] PEG_RX#[7] D29 RSVD36 AA71 T119 PAD
<13> DMI_CTX_PRX_N1 K15 DMI_TX#[1] PEG_RX#[8] B26 RSVD37 AA69
<13> DMI_CTX_PRX_N2 J13 DMI_TX#[2] PEG_RX#[9] D26
F10 B23 CFG0 AL4 R66
<13> DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] <4> CFG0 CFG[0] RSVD38
D22 CFG1 AM2 R64
PEG_RX#[11] <4> CFG1 CFG[1] RSVD39
G17 A20 CFG2 AK1
<13> DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12] <4> CFG2 CFG[2]
M15 D19 CFG3 AK2
<13> DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] <4> CFG3 CFG[3]
G13 A17 CFG4 AK4
<13> DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] <4> CFG4 CFG[4]
J11 B14 CFG5 AJ2 BT5
<13> DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] <4> CFG5 CFG[5] RSVD_NCTF[3]
CFG6 AT2 BR5 T120 PAD
<4> CFG6 CFG[6] RSVD_NCTF[4]
F40 CFG7 AG7
PEG_RX[0] <4> CFG7 CFG[7]
J38 CFG8 AF4 BV6
PEG_RX[1] <4> CFG8 CFG[8] RSVD_NCTF[2]
G34 CFG9 AG2 BV8
PEG_RX[2] <4> CFG9 CFG[9] RSVD_NCTF[1]
FDI_CTX_PRX_N0 L2 M34 CFG10 AH1
<13> FDI_CTX_PRX_N0 FDI_TX#[0] PEG_RX[3] <4> CFG10 CFG[10]
FDI_CTX_PRX_N1 N7 J28 CFG11 AC2 AV69
<13> FDI_CTX_PRX_N1 FDI_TX#[1] PEG_RX[4] <4> CFG11 CFG[11] RSVD45
FDI_CTX_PRX_N2 M4 G25 CFG12 AC4 AK71
<13> FDI_CTX_PRX_N2 FDI_TX#[2] PEG_RX[5] <4> CFG12 CFG[12] RSVD46
FDI_CTX_PRX_N3 P1 K24 CFG13 AE2 AN69
<13> FDI_CTX_PRX_N3 FDI_TX#[3] PEG_RX[6] <4> CFG13 CFG[13] RSVD47
FDI_CTX_PRX_N4 N10 B28 CFG14 AD1 AP66
<13> FDI_CTX_PRX_N4 FDI_TX#[4] PEG_RX[7] <4> CFG14 CFG[14] RSVD48
Intel(R) FDI
FDI_CTX_PRX_N5 R7 A27 CFG15 AF8 AH66
<13> FDI_CTX_PRX_N5 FDI_TX#[5] PEG_RX[8] <4> CFG15 CFG[15] RSVD49
FDI_CTX_PRX_N6 U7 B25 CFG16 AF6 AK66
<13> FDI_CTX_PRX_N6 FDI_TX#[6] PEG_RX[9] <4> CFG16 CFG[16] RSVD50
FDI_CTX_PRX_N7 W8 A24 CFG17 AB7 AR71
<13> FDI_CTX_PRX_N7 FDI_TX#[7] PEG_RX[10] <4> CFG17 CFG[17] RSVD51
PEG_RX[11] B21 RSVD52 AM66
PEG_RX[12] B19 RSVD53 AK69
FDI_CTX_PRX_P0 K1 B18 AU71
<13> FDI_CTX_PRX_P0 FDI_TX[0] PEG_RX[13] RSVD54
FDI_CTX_PRX_P1 N5 B16 AT70
<13> FDI_CTX_PRX_P1 FDI_TX[1] PEG_RX[14] RSVD55
FDI_CTX_PRX_P2 N2 D15 AR69
<13> FDI_CTX_PRX_P2 FDI_TX[2] PEG_RX[15] RSVD56
FDI_CTX_PRX_P3 R2 AU69
<13> FDI_CTX_PRX_P3 FDI_TX[3] RSVD57

RESERVED
PCI EXPRESS -- GRAPHICS

FDI_CTX_PRX_P4 N9 N40 AT67


<13> FDI_CTX_PRX_P4 FDI_TX[4] PEG_TX#[0] RSVD58
FDI_CTX_PRX_P5 R8 L38
B <13> FDI_CTX_PRX_P5
FDI_CTX_PRX_P6 U6
FDI_TX[5] PEG_TX#[1]
M32 AU1 AP2 B
<13> FDI_CTX_PRX_P6 FDI_TX[6] PEG_TX#[2] PAD T50 RSVD_TP[0] RSVD_TP[2] T51 PAD
FDI_CTX_PRX_P7 W10 D40 AN7 T52 PAD
<13> FDI_CTX_PRX_P7 FDI_TX[7] PEG_TX#[3] RSVD_TP[1]
PEG_TX#[4] A38
<13> FDI_FSYNC0 FDI_FSYNC0 AC7 G32 T4 AV4
FDI_FSYNC1 FDI_FSYNC[0] PEG_TX#[5] RSVD15 RSVD62
<13> FDI_FSYNC1 AC9 FDI_FSYNC[1] PEG_TX#[6] B33 T2 RSVD16 RSVD63 AU2
PEG_TX#[7] B35
<13> FDI_INT FDI_INT AB5 L30 U1 BE69
FDI_INT PEG_TX#[8] RSVD17 RSVD64
PEG_TX#[9] A31 V2 RSVD18 RSVD65 BE71
<13> FDI_LSYNC0 FDI_LSYNC0 AA1 B32
FDI_LSYNC1 FDI_LSYNC[0] PEG_TX#[10]
<13> FDI_LSYNC1 AB2 FDI_LSYNC[1] PEG_TX#[11] L28 AV71 RSVD19
PEG_TX#[12] N26 AW70 RSVD20
PEG_TX#[13] M24 DC_TEST_BV71 BV71
PEG_TX#[14] G21 AY69 RSVD21 DC_TEST_BV69 BV69
PEG_TX#[15] J20 BB69 RSVD22 DC_TEST_BV68 BV68
DC_TEST_BV5 BV5
PEG_TX[0] L40 D8 RSVD23 DC_TEST_BV3 BV3
PEG_TX[1] N38 B7 RSVD24 DC_TEST_BV1 BV1
PEG_TX[2] N32 DC_TEST_BT71 BT71
PEG_TX[3] B39 A10 RSVD26 DC_TEST_BT69 BT69
PEG_TX[4] B37 B9 RSVD27 DC_TEST_BT3 BT3
PEG_TX[5] H32 DC_TEST_BT1 BT1
PEG_TX[6] A34 C5 RSVD_NCTF[7] DC_TEST_BR71 BR71 VSS_NCTF2_R <8>
PEG_TX[7] D36 A6 RSVD_NCTF[8] DC_TEST_BR1 BR1 VSS_NCTF6_R <8>
PEG_TX[8] J30 DC_TEST_E71 E71
PEG_TX[9] B30 E3 RSVD_NCTF[6] DC_TEST_E1 E1
PEG_TX[10] D33 F1 RSVD_NCTF[5] DC_TEST_C71 C71
PEG_TX[11] N28 DC_TEST_C69 C69
PEG_TX[12] M25 DC_TEST_C3 C3
PEG_TX[13] N24 DC_TEST_A71 A71
PEG_TX[14] F21 DC_TEST_A69 A69
PEG_TX[15] L20 DC_TEST_A68 A68 VSS_NCTF1_R <8>
DC_TEST_A5 A5 VSS_NCTF7_R <8>
C C

INTEL_AUBURNDALE_1288 INTEL_AUBURNDALE_1288

CFG Straps for PROCESSOR


CFG0 R68 1 2 @ 3.01K_0402_1%

PCI-Express Configuration Select


1: Single PEG
CFG0 0: Bifurcation enabled
Not applicable for Clarksfield Processor

CFG3 R69 1 2 @ 3.01K_0402_1%

CFG3-PCI Express Static Lane Reversal


1: Normal Operation
CFG3 0: Lane Numbers Reversed
15 -> 0, 14 ->1, .....

CFG4 R70 1 2 3.01K_0402_1%


D D
ES1 sample need negative voltage
ES2 sample contact to GND
CFG4-Display Port Presence
1: Disabled; No Physical Display Port
attached to Embedded Display Port
CFG4
0: Enabled; An external Display Port
device is connected to the Embedded
Display Port
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 5 of 41
1 2 3 4 5
1 2 3 4 5

http://hobi-elektronika.net U1D

U1C

SB_CK[0] BU33
SB_CK#[0] BV34
A BM34 BA2 BT26 A
SA_CK[0] M_CLK_DDR0 <9> SB_DQ[0] SB_CKE[0]
<9> DDR_A_D[0..63] SA_CK#[0] BP35 M_CLK_DDR#0 <9> AW2 SB_DQ[1]
SA_CKE[0] BF20 DDR_CKE0_DIMMA <9> BD1 SB_DQ[2]
DDR_A_D0 AT8 BE4 BV38
DDR_A_D1 SA_DQ[0] SB_DQ[3] SB_CK[1]
AT6 SA_DQ[1] AY1 SB_DQ[4] SB_CK#[1] BU39
DDR_A_D2 BB5 BC2 BT24
DDR_A_D3 SA_DQ[2] SB_DQ[5] SB_CKE[1]
BB9 SA_DQ[3] SA_CK[1] BK36 M_CLK_DDR1 <9> BF2 SB_DQ[6]
DDR_A_D4 AV7 BH36 BH2
SA_DQ[4] SA_CK#[1] M_CLK_DDR#1 <9> SB_DQ[7]
DDR_A_D5 AV6 BK24 BG4
SA_DQ[5] SA_CKE[1] DDR_CKE1_DIMMA <9> SB_DQ[8]
DDR_A_D6 BE6 BG1
DDR_A_D7 SA_DQ[6] SB_DQ[9]
BE8 SA_DQ[7] BR6 SB_DQ[10] SB_CS#[0] BP46
DDR_A_D8 BF11 BR8 BT43
DDR_A_D9 SA_DQ[8] SB_DQ[11] SB_CS#[1]
BE11 SA_DQ[9] SA_CS#[0] BH40 DDR_CS0_DIMMA# <9> BJ4 SB_DQ[12]
DDR_A_D10 BK5 BJ47 BK2
SA_DQ[10] SA_CS#[1] DDR_CS1_DIMMA# <9> SB_DQ[13]
DDR_A_D11 BH13 BU9
DDR_A_D12 SA_DQ[11] SB_DQ[14]
BF9 SA_DQ[12] BV10 SB_DQ[15] SB_ODT[0] BV45
DDR_A_D13 BF6 BR10 BU49
DDR_A_D14 SA_DQ[13] SB_DQ[16] SB_ODT[1]
BK7 SA_DQ[14] SA_ODT[0] BF43 M_ODT0 <9> BT12 SB_DQ[17]
DDR_A_D15 BN8 BL47 BT15
SA_DQ[15] SA_ODT[1] M_ODT1 <9> SB_DQ[18]
DDR_A_D16 BN11 BV15
DDR_A_D17 SA_DQ[16] SB_DQ[19]
BN9 SA_DQ[17] BV12 SB_DQ[20]
DDR_A_D18 BG17 BP12 BB4
DDR_A_D19 SA_DQ[18] SB_DQ[21] SB_DM[0]
BK15 SA_DQ[19] BV17 SB_DQ[22] SB_DM[1] BL4
DDR_A_D20 BK9 BU16 BT13
DDR_A_D21 SA_DQ[20] SB_DQ[23] SB_DM[2]
BG15 SA_DQ[21] DDR_A_DM[0..7] <9> BP15 SB_DQ[24] SB_DM[3] BP22
DDR_A_D22 BH17 BB10 DDR_A_DM0 BU19 BV47
DDR_A_D23 SA_DQ[22] SA_DM[0] DDR_A_DM1 SB_DQ[25] SB_DM[4]
BK17 SA_DQ[23] SA_DM[1] BJ10 BV22 SB_DQ[26] SB_DM[5] BV57
DDR_A_D24 BN20 BM15 DDR_A_DM2 BT22 BU65
DDR_A_D25 SA_DQ[24] SA_DM[2] DDR_A_DM3 SB_DQ[27] SB_DM[6]
BN17 SA_DQ[25] SA_DM[3] BN24 BP19 SB_DQ[28] SB_DM[7] BF67
DDR_A_D26 BK25 BG44 DDR_A_DM4 BV19
DDR_A_D27 SA_DQ[26] SA_DM[4] DDR_A_DM5 SB_DQ[29]
BH25 SA_DQ[27] SA_DM[5] BG53 BV20 SB_DQ[30]
DDR_A_D28 BJ20 BN62 DDR_A_DM6 BT20
B DDR_A_D29 SA_DQ[28] SA_DM[6] DDR_A_DM7 SB_DQ[31] B
BH21 SA_DQ[29] SA_DM[7] BH59 BT48 SB_DQ[32]
DDR_A_D30 BG24 BV48
SA_DQ[30] SB_DQ[33]
DDR SYSTEM MEMORY A

DDR_A_D31 BG25 BV50 BE2


DDR_A_D32 SA_DQ[31] SB_DQ[34] SB_DQS#[0]
BJ40 SA_DQ[32] BP49 SB_DQ[35] SB_DQS#[1] BM3
DDR_A_D33 BM43 BT47 BU12
SA_DQ[33] DDR_A_DQS#[0..7] <9> SB_DQ[36] SB_DQS#[2]
DDR_A_D34 BF47 AY5 DDR_A_DQS#0 BV52 BT19
DDR_A_D35 SA_DQ[34] SA_DQS#[0] DDR_A_DQS#1 SB_DQ[37] SB_DQS#[3]
BF48 SA_DQ[35] SA_DQS#[1] BJ7 BV54 SB_DQ[38] SB_DQS#[4] BT52
DDR_A_D36 BN40 BN13 DDR_A_DQS#2 BT54 BV55
DDR_A_D37 SA_DQ[36] SA_DQS#[2] DDR_A_DQS#3 SB_DQ[39] SB_DQS#[5]
BH43 SA_DQ[37] SA_DQS#[3] BL21 BP53 SB_DQ[40] SB_DQS#[6] BU63
DDR_A_D38 BN44 BH44 DDR_A_DQS#4 BU53 BG69
DDR_A_D39 SA_DQ[38] SA_DQS#[4] DDR_A_DQS#5 SB_DQ[41] SB_DQS#[7]
BN47 BK51 BT59

DDR SYSTEM MEMORY - B


DDR_A_D40 SA_DQ[39] SA_DQS#[5] DDR_A_DQS#6 SB_DQ[42]
BN48 SA_DQ[40] SA_DQS#[6] BP58 BT57 SB_DQ[43]
DDR_A_D41 BN51 BE62 DDR_A_DQS#7 BP56
DDR_A_D42 SA_DQ[41] SA_DQS#[7] SB_DQ[44]
BH53 SA_DQ[42] BT55 SB_DQ[45]
DDR_A_D43 BJ55 BU60
DDR_A_D44 SA_DQ[43] SB_DQ[46]
BH48 SA_DQ[44] BV59 SB_DQ[47]
DDR_A_D45 BJ48 BV61 BD4
SA_DQ[45] DDR_A_DQS[0..7] <9> SB_DQ[48] SB_DQS[0]
DDR_A_D46 BM53 AY7 DDR_A_DQS0 BP60 BN4
DDR_A_D47 SA_DQ[46] SA_DQS[0] DDR_A_DQS1 SB_DQ[49] SB_DQS[1]
BN55 SA_DQ[47] SA_DQS[1] BJ5 BR66 SB_DQ[50] SB_DQS[2] BV13
DDR_A_D48 BF55 BL13 DDR_A_DQS2 BR64 BT17
DDR_A_D49 SA_DQ[48] SA_DQS[2] DDR_A_DQS3 SB_DQ[51] SB_DQS[3]
BN57 SA_DQ[49] SA_DQS[3] BN21 BR62 SB_DQ[52] SB_DQS[4] BT50
DDR_A_D50 BN65 BK44 DDR_A_DQS4 BT61 BU56
DDR_A_D51 SA_DQ[50] SA_DQS[4] DDR_A_DQS5 SB_DQ[53] SB_DQS[5]
BJ61 SA_DQ[51] SA_DQS[5] BH51 BN68 SB_DQ[54] SB_DQS[6] BV62
DDR_A_D52 BF57 BM60 DDR_A_DQS6 BL69 BJ69
DDR_A_D53 SA_DQ[52] SA_DQS[6] DDR_A_DQS7 SB_DQ[55] SB_DQS[7]
BJ57 SA_DQ[53] SA_DQS[7] BE64 BJ71 SB_DQ[56]
DDR_A_D54 BK64 BF70
DDR_A_D55 SA_DQ[54] SB_DQ[57]
BK61 SA_DQ[55] BG71 SB_DQ[58]
DDR_A_D56 BJ63 BC67
DDR_A_D57 SA_DQ[56] SB_DQ[59]
BF64 SA_DQ[57] DDR_A_MA[0..15] <9> BK70 SB_DQ[60]
DDR_A_D58 BB64 BT36 DDR_A_MA0 BK67
DDR_A_D59 SA_DQ[58] SA_MA[0] DDR_A_MA1 SB_DQ[61]
BB66 SA_DQ[59] SA_MA[1] BP33 BD71 SB_DQ[62]
DDR_A_D60 BJ66 BV36 DDR_A_MA2 BD69 BT34
C DDR_A_D61 SA_DQ[60] SA_MA[2] DDR_A_MA3 SB_DQ[63] SB_MA[0] C
BF65 SA_DQ[61] SA_MA[3] BG34 SB_MA[1] BP30
DDR_A_D62 AY64 BG32 DDR_A_MA4 BV29
DDR_A_D63 SA_DQ[62] SA_MA[4] DDR_A_MA5 SB_MA[2]
BC70 SA_DQ[63] SA_MA[5] BN32 SB_MA[3] BU30
BK32 DDR_A_MA6 BV31
SA_MA[6] DDR_A_MA7 SB_MA[4]
SA_MA[7] BJ30 BV43 SB_BS[0] SB_MA[5] BT33
BN30 DDR_A_MA8 BV41 BT31
SA_MA[8] DDR_A_MA9 SB_BS[1] SB_MA[6]
<9> DDR_A_BS0 BT38 SA_BS[0] SA_MA[9] BF28 BV24 SB_BS[2] SB_MA[7] BP26
BH38 BH34 DDR_A_MA10 BV27
<9> DDR_A_BS1 SA_BS[1] SA_MA[10] SB_MA[8]
BF21 BH30 DDR_A_MA11 BT27
<9> DDR_A_BS2 SA_BS[2] SA_MA[11] SB_MA[9]
BJ28 DDR_A_MA12 BU46 BU42
SA_MA[12] DDR_A_MA13 SB_CAS# SB_MA[10]
SA_MA[13] BF40 BT40 SB_RAS# SB_MA[11] BU26
BN28 DDR_A_MA14 BT41 BT29
SA_MA[14] DDR_A_MA15 SB_WE# SB_MA[12]
<9> DDR_A_CAS# BK43 SA_CAS# SA_MA[15] BN25 SB_MA[13] BT45
<9> DDR_A_RAS# BL38 SA_RAS# SB_MA[14] BV26
<9> DDR_A_WE# BF38 SA_WE# SB_MA[15] BU23

INTEL_AUBURNDALE_1288

INTEL_AUBURNDALE_1288

D D

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 6 of 41
1 2 3 4 5
1 2 3 4 5

http://hobi-elektronika.net
+GFX_CORE
330U_D2_2.5VM_R6M Follow SCH check list 1 2 +VCCP

330U_D2_2.5VM_R6M

1U_0402_6.3V6K

1U_0402_6.3V6K

22U_0805_6.3V6M

22U_0805_6.3V6M
@ R1483 4.7K_0402_5%
1 1 C1313 GFX_DPRSLPVR

C16

C17

C18

C19
C1312 1 1 1 1 1 2 GFXVR_EN 1 2
+ + R700 4.7K_0402_5% @ R1484 4.7K_0402_5%

+CPU_CORE U1H
2 2 2 2 2 2 U1G
AF57 VCC_1
AN32 VAXG1 AF55 VCC_2
AN30 AF12 VCC_AXG_SENSE AF53 +VCAP0
VAXG2 VAXG_SENSE VCC_AXG_SENSE <39> VCC_3 +VCCP
AN28 AF10 VSS_AXG_SENSE AF51 U1F

SENSE
LINES
VAXG3 VSSAXG_SENSE VSS_AXG_SENSE <39> VCC_4
AN26 VAXG4 AF50 VCC_5 VCAP0_1 BD55
AN24 VAXG5 AF48 VCC_6 VCAP0_2 BD51 VTT0_11 AW14
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6KZ
A AN23 AF46 BD48 AW12 A
VAXG6 VCC_7 VCAP0_3 VTT0_12
AN21 VAXG7 AF44 VCC_8 VCAP0_4 BB55 VTT0_13 AU60
C212

C179

C214

C213
1 1 1 1 AN19 VAXG8 GFX_VID[0] AF71 GFXVR_VID_0 <39> AF42 VCC_9 VCAP0_5 BB51 VTT0_14 AU59
AL32 VAXG9 GFX_VID[1] AG67 GFXVR_VID_1 <39> AF41 VCC_10 VCAP0_6 BB48 <37> PSI# F68 PSI# VTT0_15 AU12
AL30 AG70 AD55 AY57 AR60

GRAPHICS VIDs
VAXG10 GFX_VID[2] GFXVR_VID_2 <39> VCC_11 VCAP0_7 <37> H_VID[0..6] VTT0_16
AL28 AH71 AD51 AY53 H_VID0 A61 AR59
2 2 2 2 VAXG11 GFX_VID[3] GFXVR_VID_3 <39> VCC_12 VCAP0_8 VID[0] VTT0_17

CPU VIDS
AL26 AN71 AD48 AY50 H_VID1 D61 AR12
VAXG12 GFX_VID[4] GFXVR_VID_4 <39> VCC_13 VCAP0_9 VID[1] VTT0_18
AL24 AM67 AD44 AW57 H_VID2 D62 AN60
VAXG13 GFX_VID[5] GFXVR_VID_5 <39> VCC_14 VCAP0_10 VID[2] VTT0_19

GRAPHICS
AL23 AM70 AD41 AW53 H_VID3 A62 AN59
VAXG14 GFX_VID[6] GFXVR_VID_6 <39> VCC_15 VCAP0_11 VID[3] VTT0_20
AL21 @ R705 1 2 4.7K_0402_5%
+VCCP AB55 AW50 H_VID4 B63 AN35
VAXG15 VCC_16 VCAP0_12 H_VID5 VID[4] VTT0_21
AL19 VAXG16 GFXVR_EN <39> AB51 VCC_17 VCAP0_13 AU55 D64 VID[5] VTT0_22 AN33
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

AK14 AH69 AB48 AU51 H_VID6 D66 AN17


VAXG17 GFX_VR_EN GFX_DPRSLPVR VCC_18 VCAP0_14 VID[6] VTT0_23
AK12 VAXG18 GFX_DPRSLPVR AL71 AB44 VCC_19 VCAP0_15 AU48 VTT0_24 AN15
C216

C215

C218

C217

1 1 1 1 AJ10 AL69 12/05 HP AB41 AR55 T135 H_VTTVID1 AN1 AN14


VAXG19 GFX_IMON VCC_20 VCAP0_16 PAD VTT_SELECT[1] VTT0_25
AH14 VAXG20 2 1 GFXVR_IMON <39> AA55 VCC_21 VCAP0_17 AR51 VTT0_26 AN12
AH12 VAXG21
R1478 0_0402_5% AA51 VCC_22 VCAP0_18 AR48 <37> PROC_DPRSLPVR 2 R72 1PM_DPRSLPVR_R F66 PROC_DPRSLPVR VTT0_27 AM10
AF28 BU40 +1.5VS_CPU_VDDQ AA48 AN57 0_0402_5% AL60
2 2 2 2 VAXG22 VDDQ1 VCC_23 VCAP0_19 VTT0_28
AF26 BU35 AA44 AN53 AL59
VAXG23 VDDQ2 VCC_24
POWER VCAP0_20 VTT0_29

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
AF24 VAXG24 VDDQ3 BU28 AA41 VCC_25 VCAP0_21 AN50 VTT0_30 AL17

C20

C21

C22

C23

C24
AF23 BN38 W55 AL57 AL15

1.1V RAIL POWER


VAXG25 VDDQ4 1 1 1 1 1 VCC_26 VCAP0_22 VTT0_31
AF21 VAXG26 VDDQ5 BM25 W51 VCC_27 VCAP0_23 AL53 VTT0_32 AL14
AF19 BL30 W48 AL50 A41 AL12

- 1.5V RAILS
VAXG27 VDDQ6 VCC_28 VCAP0_24 <37> IMVP_IMON ISENSE VTT0_33
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

AF17 VAXG28 VDDQ7 BJ38 W44 VCC_29 VCAP0_25 AK57 VTT0_34 AK35
2 2 2 2 2
AF15 VAXG29 VDDQ8 BH32 W41 VCC_30 VCAP0_26 AK53 VTT0_35 AK33
C220

C219

C380

C221

SENSE LINES
1 1 1 1 AF14 VAXG30 VDDQ9 BH28 U55 VCC_31 VCAP0_27 AK50 VTT0_36 AF39
AD28 VAXG31 VDDQ10 BG43 U51 VCC_32 VTT0_37 AF37
AD26 BF16 U48 0_0402_5% AF35
VAXG32 VDDQ11 VCC_33 VTT0_38

330U_B2_2.5VM_R15M

22U_0805_6.3V6M

22U_0805_6.3V6M
AD24 BF15 U44 VCCSENSE 2 R73 1 F64 AF33
2 2 2 2 VAXG33 VDDQ12 VCC_34 <37> VCCSENSE VCC_SENSE VTT0_39
AD23 BD35 1 U41 CPU CORE SUPPLY VSSSENSE 2 1 F63 AF32
VAXG34 VDDQ13 VCC_35 <37> VSSSENSE VSS_SENSE VTT0_40

C25

C26

C27
AD21 BD33 1 1 R55 R74 0_0402_5% AF30
VAXG35 VDDQ14 + VCC_36 VTT0_41
AD19 VAXG36 VDDQ15 BD32 R51 VCC_37 VTT0_42 AD39
AD17 VAXG37 VDDQ16 BD30 R48 VCC_38 <34> VTT_SENSE N13 VTT_SENSE VTT0_1 BF60
B BD28 @ R44 BF59 B
VDDQ17 2 2 2 VCC_39 VSS_SENSE_VTT VTT0_2
VDDQ18 BD26 R41 VCC_40 2 1 R12 VSS_SENSE_VTT VTT0_3 BD60
+VCCP W21 BD24 P60 R1481 0_0402_5% BD59
VTT1_1 VDDQ19 VCC_41 VTT0_4
W19 BD23 N55 BB60
DDR3
VTT1_2 VDDQ20 VCC_42 +VCAP1 VTT0_5
PEG & DMI

U21 VTT1_3 VDDQ21 BD21 N51 VCC_43 VTT0_6 BB59


10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

U19 VTT1_4 VDDQ22 BD19 N48 VCC_44 VTT0_7 AY60


U17 BD17 N44 BD44 AW60
POWER

VTT1_5 VDDQ23 VCC_45 VCAP1_1 +CPU_CORE VTT0_8


C28

C29

C30

C31

1 1 1 1 U15 VTT1_6 VDDQ24 BD15 N42 VCC_46 VCAP1_2 BD41 Close to CPU VTT0_9 AW35
U14 VTT1_7 VDDQ25 BB35 M60 VCC_47 VCAP1_3 BD37 VTT0_10 AW33
U12 BB33 M51 BB44 VCCSENSE 1 2 AD37
VTT1_8 VDDQ26 VCC_48 VCAP1_4 R75 100_0402_1% VTT0_43
R21 VTT1_9 VDDQ27 BB32 M44 VCC_49 VCAP1_5 BB41 VTT0_44 AD35
2 2 2 2 VSSSENSE
R19 VTT1_10 VDDQ28 BB30 L55 VCC_50 VCAP1_6 BB37 1 2 VTT0_45 AD33
R17 BB28 +VCCP K60 AY46 R76 100_0402_1% AD32
VTT1_11 VDDQ29 VCC_51 VCAP1_7 VTT0_46
VDDQ30 BB26 K51 VCC_52 VCAP1_8 AY42 VTT0_47 AD30

POWER
VDDQ31 BB24 K44 VCC_53 VCAP1_9 AY39 VTT0_48 W35
VDDQ32 BB23 J55 VCC_54 VCAP1_10 AW46 VTT0_49 W33

1
BB21 H60 AW42 +1.8VS 22U_0805_6.3V6M W39 W32
+VCAP2 VDDQ33 VCC_55 VCAP1_11 VCCPLL1 VTT0_50

1.8V
BB19 L31 H51 AW39 W37 W30
VDDQ34 VCC_56 VCAP1_12 VCCPLL2 VTT0_51
VDDQ35 BB17 0_0805_5% H44 VCC_57 VCAP1_13 AU44 1 1 U37 VCCPLL3 VTT0_52 W28
AK62 VCAP2_1 VDDQ36 BB15 G60 VCC_58 VCAP1_14 AU41 R39 VCCPLL4 VTT0_53 W26
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

AK60 G55 AU37 4.7U_0603_6.3V6K C37 C38 R37 W24

2
VCAP2_2 VCC_59 VCAP1_15 VCCPLL5 VTT0_54
C32

C33

C34

C35

C36

1 1 1 1 1 AK59 VCAP2_3 G51 VCC_60 VCAP1_16 AR44 VTT0_55 W23


+VTT_DDR 2 2
AH60 VCAP2_4 VTT0_DDR AW32 G44 VCC_61 VCAP1_17 AR41 VTT0_56 U35
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
AH59 VCAP2_5 VTT0_DDR[1] AW30 F55 VCC_62 VCAP1_18 AR37 VTT0_57 U33
AF60 VCAP2_6 VTT0_DDR[2] AW28 E60 VCC_63 VCAP1_19 AN46 VTT0_58 U32
2 2 2 2 2
C42

C43

C44
AF59 VCAP2_7 VTT0_DDR[3] AW26 1 1 1 E57 VCC_64 VCAP1_20 AN42 VTT0_59 U30
AD60 VCAP2_8 VTT0_DDR[4] AW24 E53 VCC_65 VCAP1_21 AN39 VTT0_60 U28
AD59 VCAP2_9 VTT0_DDR[5] AW23 E50 VCC_66 VCAP1_22 AL46 VTT0_61 U26
AB60 VCAP2_10 VTT0_DDR[6] AW21 E46 VCC_67 VCAP1_23 AL42 VTT0_62 U24
+VCCP 2 2 2
AB59 VCAP2_11 VTT0_DDR[7] AW19 E42 VCC_68 VCAP1_24 AL39 VTT0_63 U23
AA60 VCAP2_12 VTT0_DDR[8] AW17 D59 VCC_69 VCAP1_25 AK46 VTT0_64 R35
AA59 VCAP2_13 VTT0_DDR[9] AW15 D57 VCC_70 VCAP1_26 AK42 VTT0_65 R33
+1.5VS_CPU_VDDQ
10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C W60 D55 AK39 R32 C


for RF VCAP2_14 +VCCP VCC_71 VCAP1_27 L32 VTT0_66
W59 VCAP2_15 VTT1_12 AD15 D54 VCC_72 VTT0_67 R30
+GFX_CORE
C59

C60

C61

C62

1 1 1 1 U60 AD14 D52 2 1 +VDDQ_CK BB14 R28


VCAP2_16 VTT1_13 VCC_73 0_0805_5% VDDQ_CK[1] VTT0_68
U59 VCAP2_17 VTT1_14 AD12 D50 VCC_74 BB12 VDDQ_CK[2] VTT0_69 R26
10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

R60 VCAP2_18 VTT1_15 AB12 D48 VCC_75 VTT0_70 R24


R59 VCAP2_19 VTT1_16 AA12 D47 VCC_76 1 VTT0_71 R23
2 2 2 2
C46

C47

C48

C49

VTT1_17 W17 1 1 1 1 D45 VCC_77


C50
VTT0_72 AY10 VTT0_72
12P_0402_50V8J

12P_0402_50V8J

W15 D43 1U_0402_6.3V6K AN9 VTT0_73


VTT1_18 VCC_78 VTT0_73
1 1 VTT1_19 W14 B60 VCC_79 2
C1325

C1326

VTT1_20 W12 B56 VCC_80


2 2 2 2 INTEL_AUBURNDALE_1288
VTT1_21 R15 B53 VCC_81
@ @ B49
2 2 INTEL_AUBURNDALE_1288 VCC_82
B46 VCC_83
B42 VCC_84
A57 VTT0_72 R77 1 2 0_0402_5% +VCCP
VCC_85 VTT0_73 R78
A54 VCC_86 1 2 0_0402_5%
A50 VCC_87
for RF A47
+CPU_CORE VCC_88
A43 VCC_89
+GFX_CORE for RF +CPU_CORE
C55

47P_0402_50V8J

C56

47P_0402_50V8J

C57

47P_0402_50V8J

C58

47P_0402_50V8J

INTEL_AUBURNDALE_1288
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
12P_0402_50V8J

12P_0402_50V8J

12P_0402_50V8J

12P_0402_50V8J

C381

C382

C533

C534

C383

C613

C614

C612

1 1 1 1 1 1 1 1 1 1 1 1
+VCAP0 +VCAP1
1 1 1 1 add 7pcs Caps to follow Design guide add 7pcs Caps to follow Design guide
C1319

C1320

C1321

C1322

@ @ @ @ 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
@ @ @ @ 2 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C68 C69 C70 C71 C72 C93 C114 C113 C94 C92 C140 C115 C63 C64 C65 C66 C67 C86 C89 C88 C87 C85 C91 C90
1U_0402_6.3V6K 1U_0402_6.3V6K
D 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 D
+VCCP
+CPU_CORE 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
C51

C52

C53

C54

C615

C616

C623

C643

C617

C645

C646

C644

C647

C649

C650

C648

C652

C653

C651

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

@ @ @ @
Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 7 of 41
1 2 3 4 5
1 2 3 4 5

BU62
U1I

VSS1
VSS90
VSS91
AY24
AY23 U1J
http://hobi-elektronika.net
+VCCP Add to follow design guide

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K


CPU CORE
+CPU_CORE
BU58 VSS2 VSS92 AY21
BU55 VSS3 VSS93 AY19 AH53 VSS202 VSS404 A40 1 1 1 1 1 1
BU51 VSS4 VSS94 AY17 AH51 VSS203 VSS405 A36

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
BU48 AY15 AH50 A33 C189 C142 C191 C141 C190 C201
VSS5 VSS95 VSS204 VSS406 1U_0402_6.3V6K
BU44 VSS6 VSS96 AY14 AH48 VSS205 VSS407 A29
2 2 2 2 2 2

C73

C74 ULV@

C75

C76

C77

C78

C79

C80

C81

C82 ULV@

C83 ULV@

C84 ULV@
BU37 VSS7 VSS97 AY12 AH46 VSS206 VSS408 A26 1 1 1 1 1 1 1 1 1 1 1 1
BU32 VSS8 VSS98 AY8 AH44 VSS207 VSS409 A22
A BU25 AY4 AH42 A19 1U_0402_6.3V6K 1U_0402_6.3V6K A
VSS9 VSS99 VSS208 VSS410
BU21 VSS10 VSS100 AW67 AH41 VSS209 VSS411 A15
2 2 2 2 2 2 2 2 2 2 2 2
BU18 VSS11 VSS101 AW62 AH39 VSS210 VSS412 A12
BU14 VSS12 VSS102 AW59 AH37 VSS211 VSS413 A8
BU11 AW55 AH35 B62 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
VSS13 VSS103 VSS212 VSS393
BU7 VSS14 VSS104 AW51 AH33 VSS213 VSS394 B58
BP42 AW48 AH32 B55
BN64
VSS15
VSS16
VSS105
VSS106 AW44 AH30
VSS214
VSS215
VSS395
VSS396 B51
1 1 1 1 1 1
Inside cavity
BN6 AW41 AH28 B48 C304 C303 C302 C192 C306 C305
VSS17 VSS107 VSS216 VSS397
BM70 VSS18 VSS108 AW37 AH26 VSS217 VSS398 B44
2 2 2 2 2 2
BM51 VSS19 VSS109 AV9 AH24 VSS218 VSS399 A59

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M
BM44 VSS20 VSS110 AV1 AH23 VSS219 VSS400 A55

C95

C96

C97

C98
BM32 AU70 AH21 A52 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1 1 1 1
VSS21 VSS111 VSS220 VSS401
BM24 VSS22 VSS112 AU62 AH19 VSS221 VSS402 A48
BM17 AU57 AH17 A45 + + + +
VSS23 VSS113 VSS222 VSS403

ULV@
BL57 VSS24 VSS114 AU53 AH15 VSS223 VSS288 AA17
BL55 VSS25 VSS115 AU50 AH4 VSS224 VSS289 AA15
2 2 2 2
BL48 VSS26 VSS116 AU46 AG64 VSS225 VSS290 AA14
BL40 AU42 AG9 AA4 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
VSS27 VSS117 VSS226 VSS291
BL28 VSS28 VSS118 AU39 AG6 VSS227 VSS292 W69
BL20 VSS29 VSS119 AU35 AF69 VSS228 VSS293 W62 1 1 1 1 1 1
BK63 AU33 AF62 W57
BK60
VSS30
VSS31
VSS120
VSS121 AU32 AF1
VSS229
VSS230
VSS294
VSS295 W53 C510 C509 C508 C307 C512 C511 Under cavity
BK53 VSS32 VSS122 AU30 AE70 VSS231 VSS296 W50
2 2 2 2 2 2
BK34 VSS33 VSS123 AU28 AE64 VSS232 VSS297 W46
BK10 VSS34 VSS124 AU26 AD62 VSS233 VSS298 W42

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
BJ64 AU24 AD57 W6 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
VSS35 VSS125 VSS234 VSS299
BJ21 VSS36 VSS126 AU23 AD53 VSS235 VSS300 W1

C101

C102 ULV@

C103

C104

C105

C106 ULV@

C107

C108

C109

C110
BJ9 AU21 AD50 V70 1 1 1 1 1 1 1 1 1 1
BJ1
BH70
VSS37
VSS38
VSS39
VSS VSS127
VSS128
VSS129
AU19
AU17
AD46
AD42
VSS236
VSS237
VSS238 VSS
VSS301
VSS302
VSS303
U64
U62
BH57 AU15 AD4 U57 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
B VSS40 VSS130 VSS239 VSS304 2 2 2 2 2 2 2 2 2 2 B
BH55 VSS41 VSS131 AU14 AC67 VSS240 VSS305 U53
BH47 VSS42 VSS132 AU4 AC64 VSS241 VSS306 U50 1 1 1 1 1 1
BH24 VSS43 VSS133 AT64 AC10 VSS242 VSS307 U46
BH20 AT10 AC5 U42 C619 C618 C515 C513 C636 C628
VSS44 VSS134 VSS243 VSS308
BH15 AR62 AC1 U39
BG51
VSS45
VSS46
VSS135
VSS136 AR57 AB70
VSS244
VSS245
VSS309
VSS310 U9
2 2 2 2 2 2 Under cavity
BG36 VSS47 VSS137 AR53 AB62 VSS246 VSS311 U4
BF62 AR50 AB57 T1 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
VSS48 VSS138 VSS247 VSS312
BF30 VSS49 VSS139 AR46 AB53 VSS248 VSS313 R70
BF13 VSS50 VSS161 AN51 AB50 VSS249 VSS314 R62
BF8 VSS51 VSS162 AN48 AB46 VSS250 VSS315 R57
BE70 VSS52 VSS163 AN44 AB42 VSS251 VSS316 R53
BE65 VSS53 VSS164 AN41 AB39 VSS252 VSS317 R50
BE9 VSS54 VSS165 AN37 AB37 VSS253 VSS318 R46
BE1 VSS55 VSS166 AN5 AB35 VSS254 VSS319 R42
BD57 VSS56 VSS167 AN4 AB33 VSS255 VSS320 R5
BD53 VSS57 VSS168 AM64 AB32 VSS256 VSS321 P4
BD50 VSS58 VSS169 AM8 AB30 VSS257 VSS322 N63
BD46 VSS59 VSS170 AL62 AB28 VSS258 VSS323 N57
BD42 VSS60 VSS171 AL55 AB26 VSS259 VSS324 N53
BD39 VSS61 VSS172 AL51 AB24 VSS260 VSS325 N50
BD14 VSS62 VSS173 AL48 AB23 VSS261 VSS326 N46
BB71 VSS63 VSS174 AL44 AB21 VSS262 VSS327 N30
BB62 VSS64 VSS175 AL41 AB19 VSS263 VSS328 N21
BB57 VSS65 VSS176 AL37 AB17 VSS264 VSS329 N15
BB53 VSS66 VSS177 AL35 AB15 VSS265 VSS330 M53
BB50 VSS67 VSS178 AL33 AB14 VSS266 VSS331 M42
BB46 AL1 AB9 M36
BB42
BB39
VSS68
VSS69
VSS179
VSS180 AK70
AK64
AA66
AA64
VSS267
VSS268
VSS332
VSS333 M1
L70
BGA Ball Cracking Prevention and Detection
VSS70 VSS181 VSS269 VSS334
BB7 VSS71 VSS182 AK55 AA62 VSS270 VSS335 L57
BB1 VSS72 VSS183 AK51 AA57 VSS271 VSS336 L48
C BA70 AK48 AA53 L47 C
VSS73 VSS184 VSS272 VSS337 +3VS
AY71 VSS74 VSS185 AK44 AA50 VSS273 VSS338 L13
AY66 VSS75 VSS186 AK41 AA46 VSS274 VSS339 K64
AY62 AK37 AA42 K53 +3VS
VSS76 VSS187 VSS275 VSS340
AY59 VSS77 VSS188 AK32 AA39 VSS276 VSS341 K43

1
AY55 VSS78 VSS189 AK30 AA37 VSS277 VSS342 K36

1
AY51 AK28 AA35 K34 R79
VSS79 VSS190 VSS278 VSS343 R80
AY48 VSS80 VSS191 AK26 AA33 VSS279 VSS344 K32 100K_0402_5% CRACK_BGA <16,28>
AR42 AK24 AA32 K25 CRACK_BGA
100K_0402_5%
VSS140 VSS192 VSS280 VSS345

6
AR39 AK23 AA30 K17

2
VSS141 VSS193 VSS281 VSS346

3
AR35 AK21 AA28 K11 Q3A

2
VSS142 VSS194 VSS282 VSS347 Q3B
AR33 VSS143 VSS195 AK19 AA26 VSS283 VSS348 K6 2N7002DW-T/R7_SOT363-6
AR32 VSS144 VSS196 AK17 AA24 VSS284 VSS349 K4 2
AR30 VSS145 VSS197 AK15 AA23 VSS285 VSS350 J65 5
AR28 AJ70 AA21 J57 2N7002DW-T/R7_SOT363-6

1
VSS146 VSS198 VSS286 VSS351
AR26 AH62 AA19 J48

4
VSS147 VSS199 VSS287 VSS352
AR24 VSS148 VSS200 AH57 F20 VSS374 VSS353 J47 <5> VSS_NCTF1_R <5> VSS_NCTF2_R
AR23 VSS149 VSS201 AH55 F4 VSS375 VSS354 J40
AR21 VSS150 VSS202 BV66 E37 VSS376 VSS355 J9
AR19 VSS151 VSS203 BV64 E33 VSS377 VSS356 H53
AR17 VSS152 VSS204 BT68 E30 VSS378 VSS357 H43
AR15 BR69 E16 H36 +3VS +3VS
VSS153 VSS205 VSS379 VSS358
AR14 VSS154 VSS206 BR68 E12 VSS380 VSS359 H1
AR4 VSS155 VSS207 BR3 D41 VSS381 VSS360 G70
AR1 VSS156 VSS208 BN71 D38 VSS382 VSS361 G57

1
AP70 BN1 D34 G53 CRACK_BGA
VSS157 VSS209 VSS383 VSS362 R81 R82 CRACK_BGA
AP64 VSS158 VSS210 BL71 D31 VSS384 VSS363 G48
AN62 VSS159 VSS211 BL1 D27 VSS385 VSS364 G47 100K_0402_5% 100K_0402_5%

3
AN55 VSS160 VSS212 R14 D24 VSS386 VSS365 G43
AY44 H71 D20 G30 Q4A Q4B

2
VSS81 VSS213 VSS387 VSS366
AY41 VSS82 VSS214 F71 D17 VSS388 VSS367 G24 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
AY37 VSS83 VSS215 E69 D13 VSS389 VSS368 G20 2 5
D AY35 E68 D10 G15 D
VSS84 VSS216 VSS390 VSS369
AY33 A66 D6 F61

4
VSS85 VSS217 VSS391 VSS370
AY32 VSS86 VSS218 A64 B65 VSS392 VSS371 F48 <5> VSS_NCTF6_R <5> VSS_NCTF7_R
AY30 VSS87 VSS219 E5 B40 VSS415 VSS372 F47
AY28 VSS88 VSS220 C68 VSS373 F28
AY26 VSS89
INTEL_AUBURNDALE_1288 INTEL_AUBURNDALE_1288
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 8 of 41
1 2 3 4 5
1 2 3 4 5

DDR3 SO-DIMM A
+V_DDR_CPU_REF
+1.5V

1
3A@1.5V
JDIMM1
VREF_DQ VSS 2
+1.5V
http://hobi-elektronika.net
3 4 DDR_A_D0
VSS DQ4
0.1U_0402_16V4Z

2.2U_0805_16V4Z
DDR_A_D2 5 6 DDR_A_D1
DQ0 DQ5
C111

C112
1 1 DDR_A_D5 7 8
DQ1 VSS DDR_A_DQS#0
9 VSS DQS0# 10
DDR_A_DM0 11 12 DDR_A_DQS0
DM0 DQS0
13 VSS VSS 14
2 2 DDR_A_D6 DDR_A_D4
15 DQ2 DQ6 16
A DDR_A_D7 17 18 DDR_A_D3 A
DQ3 DQ7
19 VSS VSS 20
DDR_A_D9 21 22 DDR_A_D12
DDR_A_D11 DQ8 DQ12 DDR_A_D13
23 DQ9 DQ13 24
25 VSS VSS 26
DDR_A_DQS#1 27 28 DDR_A_DM1
DDR_A_DQS1 DQS1# DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# <4>
31 VSS VSS 32
DDR_A_D8 33 34 DDR_A_D14
DDR_A_D10 DQ10 DQ14 DDR_A_D15
35 DQ11 DQ15 36
37 VSS VSS 38
DDR_A_D17 39 40 DDR_A_D19
DQ16 DQ20 <6> DDR_A_D[0..63]
DDR_A_D20 41 42 DDR_A_D21
DQ17 DQ21
43 VSS VSS 44 <6> DDR_A_DM[0..7]
DDR_A_DQS#2 45 46 DDR_A_DM2
DDR_A_DQS2 DQS2# DM2
47 DQS2 VSS 48 <6> DDR_A_DQS[0..7]
49 50 DDR_A_D22
DDR_A_D16 VSS DQ22 DDR_A_D18
51 DQ18 DQ23 52 <6> DDR_A_DQS#[0..7]
DDR_A_D23 53 54
DQ19 VSS DDR_A_D25
55 VSS DQ28 56 <6> DDR_A_MA[0..15]
DDR_A_D24 57 58 DDR_A_D28
DDR_A_D31 DQ24 DQ29
59 DQ25 VSS 60
61 62 DDR_A_DQS#3
DDR_A_DM3 VSS DQS3# DDR_A_DQS3
63 DM3 DQS3 64
65 VSS VSS 66
DDR_A_D26 67 68 DDR_A_D29
DDR_A_D27 DQ26 DQ30 DDR_A_D30
69 DQ27 DQ31 70
71 VSS VSS 72

<6> DDR_CKE0_DIMMA DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA


CKE0 CKE1 DDR_CKE1_DIMMA <6>
75 VDD VDD 76
B 77 78 DDR_A_MA15 B
DDR_A_BS2 NC A15 DDR_A_MA14
<6> DDR_A_BS2 79 BA2 A14 80
81 VDD VDD 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
87 VDD VDD 88
DDR_A_MA8 89 90 DDR_A_MA6
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD VDD 94
DDR_A_MA3 DDR_A_MA2 +1.5V
95 A3 A2 96
DDR_A_MA1 97 98 DDR_A_MA0
A1 A0
99 VDD VDD 100

1
<6> M_CLK_DDR0 M_CLK_DDR0 101 102 M_CLK_DDR1
CK0 CK1 M_CLK_DDR1 <6>
<6> M_CLK_DDR#0 M_CLK_DDR#0 103 104 M_CLK_DDR#1 R83
CK0# CK1# M_CLK_DDR#1 <6>
105 106 1K_0402_1%
DDR_A_MA10 VDD VDD DDR_A_BS1
DDR_A_BS0
107 A10/AP BA1 108
DDR_A_RAS#
DDR_A_BS1 <6> Layout Note:
<6> DDR_A_BS0 109 110 DDR_A_RAS# <6>

2
BA0 RAS# +V_DDR_CPU_REF Place near JDIMM1
111 VDD VDD 112
<6> DDR_A_WE# DDR_A_WE# 113 114 DDR_CS0_DIMMA#
WE# S0# DDR_CS0_DIMMA# <6>
<6> DDR_A_CAS# DDR_A_CAS# 115 116 M_ODT0
CAS# ODT0 M_ODT0 <6>

1
117 VDD VDD 118
DDR_A_MA13 M_ODT1 +VREF_CA +V_DDR_CPU_REF
119 A13 ODT1 120 M_ODT1 <6>
<6> DDR_CS1_DIMMA# DDR_CS1_DIMMA# 121 122 R86
S1# NC 1K_0402_1%
123 VDD VDD 124
125 126 R94 1 2 0_0402_5% +1.5V

2
TEST VREF_CA
127 VSS VSS 128

2.2U_0805_16V4Z
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
0.1U_0402_16V4Z

330U_B2_2.5VM_R15M
DDR_A_D33 131 132 DDR_A_D38
DQ33 DQ37

C117

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C118
133 VSS VSS 134 1 1
C116

C121

C122

C123

C124

C125

C126
DDR_A_DQS#4 135 136 DDR_A_DM4 1 1 1 1 1 1 1
DDR_A_DQS4 DQS4# DM4 +
137 DQS4 VSS 138
139 140 DDR_A_D37
C DDR_A_D34 VSS DQ38 DDR_A_D39 2 C
141 DQ34 DQ39 142
DDR_A_D35 2 +3VS 2 2 2 2 2 2 2
143 DQ35 VSS 144
145 146 DDR_A_D41
DDR_A_D44 VSS DQ44 DDR_A_D40
147 DQ40 DQ45 148
DDR_A_D45 149 150
DQ41 VSS DDR_A_DQS#5
151 VSS DQS5# 152
DDR_A_DM5 153 154 DDR_A_DQS5 @
DM5 DQS5 +3VS

0.1U_0402_16V4Z
155 VSS VSS 156

C1338
DDR_A_D42 157 158 DDR_A_D46 @ 1
DDR_A_D43 DQ42 DQ46 DDR_A_D47 R1495
159 DQ43 DQ47 160
161 VSS VSS 162 10K_0402_5%

2
DDR_A_D50 163 164 DDR_A_D55
DDR_A_D49 DQ48 DQ52 DDR_A_D53 @ U59 2 @ R1496 open
165 166

1
DQ49 DQ53
DDR_A_DQS#6
167 VSS VSS 168
DDR_A_DM6
0_0402_5% Layout Note:
169 DQS6# DM6 170
DDR_A_DQS6 171 172 SMB_DATA_S3 1 8 Place near JDIMB1

1
DQS6 VSS DDR_A_D52 SDA +VS
173 VSS DQ54 174
DDR_A_D54 175 176 DDR_A_D48 SMB_CLK_S3 2 7
DDR_A_D51 DQ50 DQ55 SCL A0
177 DQ51 VSS 178
179 180 DDR_A_D60 3 6
VSS DQ60 T_CRIT_A A1

2
DDR_A_D56 181 182 DDR_A_D57 +0.75VS
DDR_A_D61 DQ56 DQ61 PM_EXTTS#1_R @ R1497
183 DQ57 VSS 184 4 GND INT 5
185 186 DDR_A_DQS#7 0_0402_5%
DDR_A_DM7 VSS DQS7# DDR_A_DQS7
187 DM7 DQS7 188
189 190

1
VSS VSS

10U_0603_6.3V6M

10U_0603_6.3V6M

C131

1U_0402_6.3V6K

C132

1U_0402_6.3V6K

C133

C134

1U_0402_6.3V6K

C135

10U_0805_6.3V6M
1U_0402_6.3V6K
DDR_A_D62 191 192 DDR_A_D59 NS_LM77CIMMX_3_MSOP8P
DQ58 DQ62

C1314

C1315
DDR_A_D58 193 194 DDR_A_D63 1 1 1 1 1 1 1
DQ59 DQ63
1 R95 2 195 VSS VSS 196
10K_0402_5% 197 198 PM_EXTTS#1_R
SA0 EVENT# PM_EXTTS#1_R <4>
199 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 <10,12,22> 2 2 2 2 2 2 2
2.2U_0402_6.3V6M

0.1U_0402_16V4Z

1 R96 2 201 202 SMB_CLK_S3 reserve for memory thermal sensor, HP.
SA1 SCL SMB_CLK_S3 <10,12,22>
C136

C137

1 1 10K_0402_5% 203 204 +0.75VS


D VTT VTT D
205 GND1 BOSS1 206
207 GND2 BOSS2 208
2 2 0.65A@0.75V

FOX_AS0A626-U4SN-7F~D
CONN@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 9 of 41
1 2 3 4 5
1 2 3 4 5

http://hobi-elektronika.net
A A

+3VS_CK505_G +3VS_CK505
U6

1 32 SMB_CLK_S3 SMB_CLK_S3 <9,12,22>


VDD_DOT SCL SMB_DATA_S3
2 VSS_DOT SDA 31 SMB_DATA_S3 <9,12,22>
CLK_BUF_DOT96 R106 1 2 0_0402_5% L_CLK_BUF_DOT96 3 30 REF_0/CPU_SEL R107 1 2 33_0402_5% CLK_14M_PCH
<12> CLK_BUF_DOT96 DOT_96 REF_0/CPU_SEL CLK_14M_PCH <12>
CLK_BUF_DOT96# R108 1 2 0_0402_5% L_CLK_BUF_DOT96# 4 29
<12> CLK_BUF_DOT96# DOT_96# VDD_REF
+3VS_CK505 5 28 CLK_XTAL_IN 1
VDD_27 XTAL_IN CLK_XTAL_OUT
6 27MHZ XTAL_OUT 27
7 26 C163
27MHZ_SS VSS_REF CK_PWRGD @ 10P_0402_50V8C
8 VSS_27 CKPWRGD/PD# 25
2
9 VSS_SATA VDD_CPU 24
CLK_BUF_CKSSCD R109 1 2 0_0402_5% L_CLK_BUF_CKSSCD 10 23 R_CLK_BUF_BCLK R110 1 2 0_0402_5% CLK_BUF_BCLK
<12> CLK_BUF_CKSSCD SRC_1/SATA CPU_0 CLK_BUF_BCLK <12>
CLK_BUF_CKSSCD# R111 1 2 0_0402_5% L_CLK_BUF_CKSSCD# 11 22 R_CLK_BUF_BCLK# R112 1 2 0_0402_5% CLK_BUF_BCLK#
<12> CLK_BUF_CKSSCD# SRC_1#/SATA# CPU_0# CLK_BUF_BCLK# <12>
12 VSS_SRC VSS_CPU 21
CLK_DMI R113 1 2 0_0402_5% L_CLK_DMI 13 20
<12> CLK_DMI SRC_2 CPU_1
CLK_DMI# R114 1 2 0_0402_5% L_CLK_DMI# 14 19
<12> CLK_DMI# SRC_2# CPU_1#
+1.05VS_CK505 15 VDD_SRC_IO VDD_CPU_IO 18 +1.05VS_CK505
CPU_STOP# 16 17 +3VS_CK505_G
CPU_STOP# VDD_SRC

TGND
B B
SLG8LV595VTR_QFN_32P_5X5

33
+1.05VS

PIN 30 CPU_0 CPU_1 2nd Source : R115


1 2 REF_0/CPU_SEL CK_PWRGD 1 2 +3VS_CK505
R1465 @ 10K_0402_5% IDT ICS9LVS3197BKLFT MLF 32P 10K_0402_5%
0 (Default) 133MHz 133MHz REALTEK RTM890N-632-VB-GRT QFN 32P

6
1 2
R1466 10K_0402_5% Q7A
1 100MHz 100MHz
2 CLK_EN# <37>
2N7002DW-7-F_SOT363-6

1
+3VS +3VS_CK505 +3VS_CK505_G +3VS +1.5VS
+3VS_CK505
1 2
+1.05VS +1.05VS_CK505 R117 @ R143 0_0603_5%
Close to U6
Close to U6 R116
CPU_STOP# 1 2 1 2 1 2
1 2 10K_0402_5% R120 0_0603_5%

47P_0402_50V8J

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0805_10V4Z
R118 0_0603_5% FBMA-L11-160808-301LMA20T_0603~D CLK_XTAL_OUT
10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

47P_0402_50V8J

C170

C165

C166

C167

C168

C169

C164
1 1 1 1 1 1 1
C171

C172

C173

C174

C175

C176

1 1 1 1 1 1 CLK_XTAL_IN
EMI request, Compal SI, 1/19 install R120 for low power CLKGEN

2 2 2 2 2 2 2
C 2 2 2 2 2 2 C

14.318MHZ 16PF 7A14300083 Y1


2 1

2 2
C177 C178
33P_0402_50V8J 33P_0402_50V8J
1 1

Close to U2 within 500mil

D D

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 10 of 41
1 2 3 4 5
1 2 3 4 5

http://hobi-elektronika.net
+RTCVCC +3VS

PCH_RTCX1 1 2 SM_INTRUDER# R122 1 2 10K_0402_5% SIRQ


R121 1M_0402_5%
1 2 PCH_RTCX2 1 2 PCH_INTVRMEN R125 2 @ 1 10K_0402_5% SB_SPKR
R123 10M_0402_5% R124 330K_0402_5%

32.768KHZ_12.5PF_Q13MC14610002
U7A

C180 1 PCH_RTCX1 B13 D33


RTCX1 FWH0 / LAD0 LPC_LAD0 <27,28>
1

1
+RTCVCC
18P_0402_50V8J

1U_0603_10V4Z CLRP1 PCH_RTCX2 D13 B33


RTCX2 FWH1 / LAD1 LPC_LAD1 <27,28>
1 1 @ SHORT PADS C32
OSC

OSC

FWH2 / LAD2 LPC_LAD2 <27,28>


C181 C182 A32 LPC_LAD3 <27,28>

2
A 18P_0402_50V8J 2 PCH_RTCRST# FWH3 / LAD3 A
1 2 C14 RTCRST#
R126 20K_0402_1% C34
2 2 FWH4 / LFRAME# LPC_LFRAME# <27,28>
PCH_SRTCRST#
NC

NC

1 2 D17 SRTCRST#
Y2 R127 20K_0402_1% 1 A34 R1460 10K_0402_5%

RTC

LPC
LDRQ0#

1
SM_INTRUDER# A16 F34 GPIO23 2 1 11/20 HP
+3VS
2

C183 CLRP2 INTRUDER# LDRQ1# / GPIO23


1U_0603_10V4Z @ SHORT PADS PCH_INTVRMEN A14 AB9 SIRQ
SIRQ <27,28>

2
2 INTVRMEN SERIRQ

R130 1 2 33_0402_5% HDA_BIT_CLK A30


<23> HDA_BIT_CLK_CODEC HDA_BCLK
AK7 SATA_PRX_DTX_N0
SATA0RXN SATA_PRX_DTX_N0 <19>
@ 1 2 HDA_BIT_CLK_CODEC <23> HDA_SYNC_CODEC
R132 1 2 33_0402_5% HDA_SYNC D29 HDA_SYNC SATA0RXP AK6 SATA_PRX_DTX_P0
SATA_PRX_DTX_P0 <19>
C186 47P_0402_50V8J AK11 SATA_PTX_DRX_N0
SATA0TXN SATA_PTX_DRX_N0 <19>
SB_SPKR P1 AK9 SATA_PTX_DRX_P0
<23> SB_SPKR SPKR SATA0TXP SATA_PTX_DRX_P0 <19>
@ 1 2 HDA_SDOUT_CODEC R134 1 2 33_0402_5% HDA_RST# C30
<23> HDA_RST#_CODEC HDA_RST# +RTCVCC +VREG_51125
C188 47P_0402_50V8J AH6 JBATT1

<23> HDA_SDIN0 HDA_SDIN0 G30 HDA_SDIN0


SATA1RXN
SATA1RXP
SATA1TXN
AH5
AH9 D36
+ -
for RF AH8 3 R261
SATA1TXP R234 1
F30 HDA_SDIN1 2 0_0402_5% 1 1K_0402_5%
AF11 2 RTC1 1 2 RTC2 1 2
SATA2RXN + -
E32 AF9 1

IHDA
HDA_SDIN2 SATA2RXP C210 CHN202UPT_SC-70
SATA2TXN AF7
L W=20mils
F32 HDA_SDIN3 SATA2TXP AF6
1U_0603_10V4Z
2
SATA3RXN AH3
<23> HDA_SDOUT_CODEC R137 1 2 33_0402_5% HDA_SDOUT B29 AH1 LOTES_AAA-BAT-019-K01_2P
HDA_SDO SATA3RXP
SATA3TXN AF3 CONN@
SATA3TXP AF1
AQUAWHITE_BATLED 1 2 PCH_GPIO33 H32

SATA
B for i-AMT setting. 11/20 HP R1457 1K_0402_5% HDA_DOCK_EN# / GPIO33 B
SATA4RXN AD9
+3VALW R1461 1 2 100K_0402_5% J30 AD8
HDA_DOCK_RST# / GPIO13 SATA4RXP
SATA4TXN AD6
11/20 HP AD5
SATA4TXP
PCH_JTAG_TCK M3 AD3
PAD T147 JTAG_TCK SATA5RXN
SATA5RXP AD1
PCH_JTAG_TMS K3 AB3
PAD T148 JTAG_TMS SATA5TXN
SATA5TXP AB1
PCH_JTAG_TDI K1
PAD T149 JTAG_TDI

JTAG
PCH_JTAG_TDO J2 AF16
PAD T150 JTAG_TDO SATAICOMPO
PCH_TRST# J4 AF15 SATAICOMPI 1 2 +3VS
JTAG_RST# SATAICOMPI +1.05VS
PAD T121 R142 37.4_0402_1%

<28> KBC_SPI_CLK_R BA2 SPI_CLK

2
1 2 KBC_SPI_CS0# AV3 R145 1 2 10K_0402_5% +3VS R147
<28> KBC_SPI_CS0#_R SPI_CS0#
R144 0_0402_5% 10K_0402_5%
1 2 KBC_SPI_CS1# AY3 T3
<28> KBC_SPI_CS1#_R SPI_CS1# SATALED# SATA_LED# <20>
R148 0_0402_5%

1
AY1 Y9 GPIO21
<28> KBC_SPI_SI_R SPI_MOSI SATA0GP / GPIO21

SPI
<28> KBC_SPI_SO AV1 V1 HDD_HALTLED GPIO21
SPI_MISO SATA1GP / GPIO19 HDD_HALTLED <20>

IBEXPEAK-M_FCBGA1071
+3VALW +3VALW +3VALW

C C
2

for i-AMT setting. 11/20 HP


@ R158 R157 @ R156

200_0402_5% @ 200_0402_5% 200_0402_5%


iAMT setting
1

PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS +3VS


1

@ R167 R166 @ R165

2
1 2 PCH_JTAG_TCK
R176 51_0402_5% 100_0402_1% @ 100_0402_1% 100_0402_1% @ R1458

2
R1459 10K_0402_5%
2

@ 330K_0402_5%

1
AQUAWHITE_BATLED

6
Pre-Production Units Production Q86A
<25,28> AQUAWHITE_BATLED# 2 2N7002DWH 2N SOT363-6
PCH Pin Ref. ES1 ES2 All

1
R157 Unstuff 200 ohm Unstuff
PCH_JTAG_TDO
R166 Unstuff 100ohm Unstuff
GPIO33 iAMT Enable /Disable
R158 200 ohm 200 ohm Unstuff
PCH_JTAG_TDI Hi Enable (Default)
D R167 100ohm 100ohm Unstuff D

Lo Disable
R156 200 ohm 200 ohm Unstuff
PCH_JTAG_TMS
R165 100ohm 100ohm Unstuff

PCH_JTAG_TCK R176 51 ohm 5% 51 ohm 5% 51 ohm 5%


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 11 of 41
1 2 3 4 5
1 2 3 4 5

http://hobi-elektronika.net
SMB_CLK_S3 R183 1 2 10K_0402_5% +3VS SMBCLK 1 2 +3VALW
R184 2.2K_0402_5%
SMB_DATA_S3 R185 1 2 10K_0402_5% SMBDATA 1 2
R186 2.2K_0402_5%
SML0CLK 1 2
R187 2.2K_0402_5%
SML0DATA 1 2
R188 2.2K_0402_5%
SML1CLK 1 2
R189 2.2K_0402_5%
SML1DATA 1 2
U7B R191 2.2K_0402_5%
SML0ALERT# R192 1 2 10K_0402_5%
BG30 B9 LID_SW_PCH#
PERN1 SMBALERT# / GPIO11
BJ30 PERP1
A BF29 H14 SMBCLK A
PETN1 SMBCLK SML1ALERT# R194 1
BH29 PETP1 2 10K_0402_5%
C8 SMBDATA
SMBDATA LID_SW_PCH# R199 1
AW30 PERN2 2 10K_0402_5%
BA30 PERP2
BC30 J14 SML0ALERT#
PETN2 SML0ALERT# / GPIO60
BD30 PETP2
C6 SML0CLK
SML0CLK
AU30

SMBus
change from poert2 to port4. 11/20 HP PERN3 SML0DATA
AT30 PERP3 SML0DATA G8
AU32 PETN3
AV32 PETP3
M14 SML1ALERT#
PCIE_PRX_DTX_N4 SML1ALERT# / GPIO74
<22> PCIE_PRX_DTX_N4 BA32 PERN4
<22> PCIE_PRX_DTX_P4 PCIE_PRX_DTX_P4 BB32 E10 SML1CLK
C193 1 PCIE_PTX_DRX_N4 PERP4 SML1CLK / GPIO58
2 0.1U_0402_16V4Z BD32
WLAN <22>
<22>
PCIE_PTX_C_DRX_N4
PCIE_PTX_C_DRX_P4
C194 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_P4 BE32
PETN4
PETP4 SML1DATA / GPIO75 G12 SML1DATA

PCI-E*
BF33 Q8A
PERN5 2N7002DW-T/R7_SOT363-6
BH33 PERP5 CL_CLK1 T13

Controller
BG32 SMBCLK 6 1 SMB_CLK_S3
PETN5 SMB_CLK_S3 <9,10,22>
BJ32 PETP5 CL_DATA1 T11

Link
<21> PCIE_PRX_DTX_N6 PCIE_PRX_DTX_N6 BA34 T9

2
PCIE_PRX_DTX_P6 PERN6 CL_RST1#
<21> PCIE_PRX_DTX_P6 AW34 PERP6 +3VS
C197 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_N6 BC34 11/20 HP
GLAN <21> PCIE_PTX_C_DRX_N6 PETN6

5
C198 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_P6 BD34
<21> PCIE_PTX_C_DRX_P6 PETP6
H1 R1462 1 2 10K_0402_5%
PCIE_PRX_DTX_N7 PEG_A_CLKRQ# / GPIO47 SMBDATA SMB_DATA_S3
<22> PCIE_PRX_DTX_N7 AT34 PERN7 3 4 SMB_DATA_S3 <9,10,22>
<22> PCIE_PRX_DTX_P7 PCIE_PRX_DTX_P7 AU34
C1301 1 PCIE_PTX_DRX_N7 PERP7 2N7002DW-T/R7_SOT363-6
2 0.1U_0402_16V4Z AU36 AD43
WWAN <22>
<22>
PCIE_PTX_C_DRX_N7
PCIE_PTX_C_DRX_P7
C1302 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_P7 AV36
PETN7
PETP7
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P AD45 Q8B
B B
BG34 PERN8 CLKOUT_DMI_N AN4 R_CLK_EXP# R195 1 2 0_0402_5% CLK_EXP# <4>

PEG
11/21 HP BJ34 AN2 R_CLK_EXP R196 1 2 0_0402_5%
PERP8 CLKOUT_DMI_P CLK_EXP <4>
BG36 PETN8
BJ36 Q2A
PETP8
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 R_CLK_DP# R197 1 2 0_0402_5% CLK_DP# <4>
2N7002DW-T/R7_SOT363-6
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 R_CLK_DP R198 1 2 0_0402_5% CLK_DP <4>
R263
+3VALW AK48 SML1CLK 1 6 1 2
CLKOUT_PCIE0N CAP_CLK <28>
AK47 0_0402_5%
CLKOUT_PCIE0P

From CLK BUFFER


CLKIN_DMI_N AW24 CLK_DMI# <10>
R200 1 2 10K_0402_5% P9 BA24 CLK_DMI <10>

2
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P
+3VALW

5
AM43 CLKOUT_PCIE1N CLKIN_BCLK_N AP3 CLK_BUF_BCLK# <10>
AM45 AP1 R264
CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK <10>
SML1DATA 4 3 1 2 CAP_DAT <28>
+3VS R202 1 2 10K_0402_5% U4 0_0402_5%
PCIECLKRQ1# / GPIO18
CLKIN_DOT_96N F18 CLK_BUF_DOT96# <10>
E18 2N7002DW-T/R7_SOT363-6
CLKIN_DOT_96P CLK_BUF_DOT96 <10> Q2B
AM47 CLKOUT_PCIE2N
AM48 +3VL
CLKOUT_PCIE2P 5.1K_0402_5%
CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_CKSSCD# <10>
+3VS R205 1 2 10K_0402_5% N4 AH12 R695 1 2 CAP_CLK
PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_CKSSCD <10>
12/05 HP R694 1 2 CAP_DAT
R1479 1 2 0_0402_5% CLK_PCIE_MCARD2#_R AH42 P41 5.1K_0402_5%
<22> CLK_PCIE_MCARD2# CLKOUT_PCIE3N REFCLK14IN CLK_14M_PCH <10>
R1480 1 2 0_0402_5% CLK_PCIE_MCARD2_R AH41
WWAN <22> CLK_PCIE_MCARD2 CLKOUT_PCIE3P
<22> CLKREQ_WWAN# A8 PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK J42 CLK_PCI_FB <14>

R208 1 2 0_0402_5% CLK_PCIE_MCARD#_R AM51 AH51 XTAL25_IN


C <22> CLK_PCIE_MCARD# CLKOUT_PCIE4N XTAL25_IN C
R209 1 2 0_0402_5% CLK_PCIE_MCARD_R AM53 AH53 XTAL25_OUT
WLAN <22> CLK_PCIE_MCARD CLKOUT_PCIE4P XTAL25_OUT XTAL25_IN
<22> CLKREQ_WLAN# M9 AF38 XCLK_RCOMP R211 1 2 90.9_0402_1% +1.05VS
PCIECLKRQ4# / GPIO26 XCLK_RCOMP XTAL25_OUT 1 2
R210 1M_0402_5%
AJ50 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T45 T55 PAD
AJ52 Y3
CLKOUT_PCIE5P
1 2
R213 1 2 10K_0402_5% H6 P43
Clock Flex

+3VALW PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 T56 PAD


25MHZ_20PF_7A25000012
AK53 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 T42 T139 PAD
AK51 CLKOUT_PEG_B_P 1 C199 1 C200

+3VALW R701 1 2 10K_0402_5% P13 N50 T140 PAD


PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 18P_0402_50V8J 18P_0402_50V8J
2 2
IBEXPEAK-M_FCBGA1071

D D

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 12 of 41
1 2 3 4 5
5 4 3 2 1

<5>
<5>
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N0 BC24
DMI_CTX_PRX_N1 BJ22
U7C

DMI0RXN
DMI1RXN
http://hobi-elektronika.net
FDI_RXN0
FDI_RXN1
FDI_RXN2
BA18
BH17
BD16
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
<5>
<5>
<5>
<18> ENABLT
<18> ENAVDD
T48
T47
U7D
L_BKLTEN
L_VDD_EN
SDVO_TVCLKINN
SDVO_TVCLKINP
BJ46
BG46

<5> DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 AW20 BJ16 FDI_CTX_PRX_N3 Y48 BJ48


DMI2RXN FDI_RXN3 FDI_CTX_PRX_N3 <5> <18> INV_PWM L_BKLTCTL SDVO_STALLN
<5> DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 BJ20 BA16 FDI_CTX_PRX_N4 BG48
DMI3RXN FDI_RXN4 FDI_CTX_PRX_N4 <5> SDVO_STALLP
BE14 FDI_CTX_PRX_N5 DDC2_CLK AB48
FDI_RXN5 FDI_CTX_PRX_N5 <5> <18> DDC2_CLK L_DDC_CLK
<5> DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 BD24 BA14 FDI_CTX_PRX_N6 DDC2_DATA Y45 BF45
DMI0RXP FDI_RXN6 FDI_CTX_PRX_N6 <5> <18> DDC2_DATA L_DDC_DATA SDVO_INTN
<5> DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BG22 BC12 FDI_CTX_PRX_N7 BH45
DMI1RXP FDI_RXN7 FDI_CTX_PRX_N7 <5> SDVO_INTP

SDVO
<5> DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BA20 +3VS 1 2 AB46
DMI_CTX_PRX_P3 DMI2RXP FDI_CTX_PRX_P0 L_CTRL_CLK
<5> DMI_CTX_PRX_P3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_CTX_PRX_P0 <5> 1 R771 2 10K_0402_5% V48 L_CTRL_DATA
BF17 FDI_CTX_PRX_P1 R772 10K_0402_5%
FDI_RXP1 FDI_CTX_PRX_P1 <5>
D DMI_CRX_PTX_N0 BE22 BC16 FDI_CTX_PRX_P2 R7731 2 2.37K_0402_1% AP39 T51 D
<5> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP2 FDI_CTX_PRX_P2 <5> LVD_IBG SDVO_CTRLCLK
DMI_CRX_PTX_N1 BF21 BG16 FDI_CTX_PRX_P3 PAD T57 AP41 T53
<5> DMI_CRX_PTX_N1 DMI1TXN FDI_RXP3 FDI_CTX_PRX_P3 <5> LVD_VBG SDVO_CTRLDATA

Display Port B
DMI_CRX_PTX_N2 BD20 AW16 FDI_CTX_PRX_P4
<5> DMI_CRX_PTX_N2 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P4 <5>
DMI_CRX_PTX_N3 BE18 BD14 FDI_CTX_PRX_P5 AT43
<5> DMI_CRX_PTX_N3 DMI3TXN FDI_RXP5 FDI_CTX_PRX_P5 <5> LVD_VREFH
BB14 FDI_CTX_PRX_P6 AT42 BG44
FDI_RXP6 FDI_CTX_PRX_P6 <5> LVD_VREFL DDPB_AUXN
DMI_CRX_PTX_P0 BD22 BD12 FDI_CTX_PRX_P7 Close PCH and mini space 20mil BJ44
<5> DMI_CRX_PTX_P0 DMI0TXP FDI_RXP7 FDI_CTX_PRX_P7 <5> DDPB_AUXP
DMI_CRX_PTX_P1 BH21 AU38
<5> DMI_CRX_PTX_P1 DMI1TXP DDPB_HPD

LVDS
DMI_CRX_PTX_P2 BC20 AV53
<5> DMI_CRX_PTX_P2 DMI2TXP <18> LVDS_ACLKN LVDSA_CLK#
DMI_CRX_PTX_P3 BD18 BJ14 FDI_INT AV51 BD42
<5> DMI_CRX_PTX_P3 DMI3TXP FDI_INT FDI_INT <5> <18> LVDS_ACLKP LVDSA_CLK DDPB_0N
BC42

DMI
FDI
FDI_FSYNC0 DDPB_0P
FDI_FSYNC0 BF13 FDI_FSYNC0 <5> <18> LVDS_A0N BB47 LVDSA_DATA#0 DDPB_1N BJ42
+1.05VS

Digital Display Interface


BH25 DMI_ZCOMP <18> LVDS_A1N BA52 LVDSA_DATA#1 DDPB_1P BG42
BH13 FDI_FSYNC1 AY48 BB40
FDI_FSYNC1 FDI_FSYNC1 <5> <18> LVDS_A2N LVDSA_DATA#2 DDPB_2N
1 2 DMI_IRCOMP BF25 AV47 BA40
R220 49.9_0402_1% DMI_IRCOMP FDI_LSYNC0 LVDSA_DATA#3 DDPB_2P
FDI_LSYNC0 BJ12 FDI_LSYNC0 <5> DDPB_3N AW38
<18> LVDS_A0P BB48 LVDSA_DATA0 DDPB_3P BA38
BG14 FDI_LSYNC1 BA50
FDI_LSYNC1 FDI_LSYNC1 <5> <18> LVDS_A1P LVDSA_DATA1
<18> LVDS_A2P AY49 LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
DDPC_CTRLDATA AB49

Display Port C
AP48 LVDSB_CLK#
AP47 LVDSB_CLK DDPC_AUXN BE44
DDPC_AUXP BD44
<4> XDP_DBRESET# 1 2 SYS_RST# T6 SYS_RESET# WAKE# J12 PCIE_WAKE#
PCIE_WAKE# <21,22> AY53 LVDSB_DATA#0 DDPC_HPD AV40
R223 0_0402_5% AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
<37> VGATE VGATE M6 Y1 PM_CLKRUN# AT53 BD40
SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUN# <28> LVDSB_DATA#3 DDPC_0P

System Power Management


DDPC_1N BF41
AY51 LVDSB_DATA0 DDPC_1P BH41
<28,37> PGD_IN R408 1 2 1K_0402_5% B17 AT48 BD38
PWROK LVDSB_DATA1 DDPC_2N
AU50 LVDSB_DATA2 DDPC_2P BC38
<19> M_BLUE M_BLUE AT51 BB36
M_PWROK M_GREEN LVDSB_DATA3 DDPC_3N
1 2 K5 MEPWROK SUS_STAT# / GPIO61 P8 T144 PAD <19> M_GREEN DDPC_3P BA36
R224 0_0402_5% <19> M_RED M_RED
C C
DPD_CTRLCLK <17>
1 2 AUXPWROK A10 LAN_RST# SUSCLK / GPIO62 F3 SUS_CLK T58 PAD AA52 CRT_BLUE DDPD_CTRLCLK U50 R226 2.2K_0402_5% +3VS
R225 10K_0402_5% delete R84, R66,R67 AB53 U52 R227 2.2K_0402_5%
11/20 HP CRT_GREEN DDPD_CTRLDATA
AD53 CRT_RED DPD_CTRLDATA <17>
PM_DRAM_PWRGD D9 E4 SLP_S5#
<4> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63
BC46 DPD_AUX#
DDPD_AUXN DPD_AUX# <17>
<33> RPGOOD 1 2 3VDDCCL V51 BD46 DPD_AUX
<19> 3VDDCCL CRT_DDC_CLK DDPD_AUXP DPD_AUX <17>
<28> PM_RSMRST# R228 1 2 0_0402_5% C16 H7 3VDDCDA V53 AT38
RSMRST# SLP_S4# SLP_S4# <30,36> <19> 3VDDCDA CRT_DDC_DATA DDPD_HPD DPD_HPD <17>
R229 10K_0402_5%
11/20 HP
+3VALW 1 2 10K_0402_5% BJ40 DPD_TXN0
DDPD_0N DPD_TXN0 <17>
<28> SUS_PWR_ACK R1467 M1 P12 <19> CRT_HSYNC CRT_HSYNC Y53 BG40 DPD_TXP0
SUS_PWR_ACK / GPIO30 SLP_S3# SLP_S3# <21,23,28,29,30,32,34,35> CRT_HSYNC DDPD_0P DPD_TXP0 <17>
<19> CRT_VSYNC CRT_VSYNC Y51 BJ38 DPD_TXN1
CRT_VSYNC DDPD_1N DPD_TXN1 <17>
<4> PM_PWRBTN#_R BG38 DPD_TXP1
DDPD_1P DPD_TXP1 <17>

CRT
<25,28> ON/OFFBTN# 1 2 P5 K8 BF37 DPD_TXN2
PWRBTN# SLP_M# DDPD_2N DPD_TXN2 <17>
R231 0_0402_5% DAC_IREF AD48 BH37 DPD_TXP2
DAC_IREF DDPD_2P DPD_TXP2 <17>
AB51 BE36 DPD_TXN3
CRT_IRTN DDPD_3N DPD_TXN3 <17>
<28> AC_PRESENT P7 N2 BD36 DPD_TXP3
ACPRESENT / GPIO31 TP23 DDPD_3P DPD_TXP3 <17>
R232
IBEXPEAK-M_FCBGA1071
LOW_BAT_R A6 BJ10 1K_0402_0.5%
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <4>

IBEX_R# F14 F6 SLP_LAN# DPD_HPD R235 1 2 100K_0402_5%


RI# SLP_LAN#

IBEXPEAK-M_FCBGA1071

VGATE 1 2
+3VS R236 10K_0402_5%

PM_CLKRUN# 1 2
B R237 10K_0402_5% B

+3VALW

SYS_RST# 1 2
@ R238 10K_0402_5%
LOW_BAT_R 1 2 SLP_S3# 1 2
R239 10K_0402_5% R240 @ 10K_0402_5%
SLP_LAN# 1 2 SLP_S4# 1 2
@ R241 10K_0402_5% R242 @ 10K_0402_5%
IBEX_R# 1 2 SLP_S5# 1 2
R243 10K_0402_5% R244 @ 10K_0402_5%
PCIE_WAKE# 1 2
R245 1K_0402_5%
AC_PRESENT 1 2
R246 10K_0402_5%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 13 of 41
5 4 3 2 1
5 4 3 2 1

http://hobi-elektronika.net
U7E U7F
Intel Anti-Theft Techonlogy
H40 AD0 NV_CE#0 AY9
N34 BD1 High=Endabled +3VS R250 1 2 PCH_XDP_GPIO0
10K_0402_5% Y3 AH45 CLK_PCIE_LAN#_R R251 2 1 0_0402_5% CLK_PCIE_LAN# <21>
AD1 NV_CE#1 T132 BMBUSY# / GPIO0 CLKOUT_PCIE6N CLK_PCIE_LAN_R
C44 AD2 NV_CE#2 AP15 NV_ALE CLKOUT_PCIE6P AH46 2 1
A38 BD8 Low=Disable(floating) PAD C38 R252 0_0402_5% CLK_PCIE_LAN <21>
C36
AD3
AD4
NV_CE#3 * <38> OCP# TACH1 / GPIO1
J34 AV9 <28> RUNSCI_EC# RUNSCI_EC# D37
AD5 NV_DQS0 +1.8VS TACH2 / GPIO6
A40 AD6 NV_DQS1 BG8 CLKOUT_PCIE7N AF48

MISC
D45 GPIO7 J32 AF47
AD7 NV_ALE @ R174 1 TACH3 / GPIO7 CLKOUT_PCIE7P
E36 AD8 NV_DQ0 / NV_IO0 AP7 2 1K_0402_5%
H48 AP6 <4> PCH_DDR_RST PCH_DDR_RST F10
AD9 NV_DQ1 / NV_IO1 GPIO8 R253
E40 AD10 NV_DQ2 / NV_IO2 AT6 1 2 +3VS
C40 AT9 DMI Termination Voltage <21> CB_IN# K9 U2 10K_0402_5%
AD11 NV_DQ3 / NV_IO3 LAN_PHY_PWR_CTRL / GPIO12 A20GATE GATEA20 <28>
M48 AD12 NV_DQ4 / NV_IO4 BB1
M45 AV6 Set to Vcc when HIGH GPIO15 T7
D AD13 NV_DQ5 / NV_IO5 GPIO15 D
F53 AD14 NV_DQ6 / NV_IO6 BB3 NV_CLE
M40 BA4 Set to Vss when LOW PCH_XDP_GPIO16 AA2 AM3
AD15 NV_DQ7 / NV_IO7 SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# <4>

NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
J36 BB6 Weak internal T134 ALS_EN# F38 AM1
AD17 NV_DQ9 / NV_IO9 +3VS TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK <4>
K48 BD6 PU,Do not pull low PAD 0_0402_5%
AD18 NV_DQ10 / NV_IO10 WWAN_DET# PCH_PECI_R R254 1
F40 AD19 NV_DQ11 / NV_IO11 BB7 <22> WWAN_DET# Y7 SCLOCK / GPIO22 PECI BG10 2 H_PECI <4>

GPIO
C42 BC8 NV_CLE @ R190 1 2 1K_0402_5% R260 1 2 +3VS
AD20 NV_DQ12 / NV_IO12 GPIO24 KB_RST# 10K_0402_5%
K46 AD21 NV_DQ13 / NV_IO13 BJ8 H10 MEM_LED / GPIO24 RCIN# T1 KB_RST# <28>
M51 AD22 NV_DQ14 / NV_IO14 BJ6
J52 BG6 WWAN_TRANSMIT_OFF# AB12 BE10
AD23 NV_DQ15 / NV_IO15 <20,22> WWAN_TRANSMIT_OFF# GPIO27 PROCPWRGD H_CPUPWRGD <4>

CPU
K51 AD24
L34 BD3 NV_ALE LAN_DIS# @ R1482 1 2 0_0402_5% V13 BD10 H_THERMTRIP#_L 1 2
AD25 NV_ALE <21> LAN_DIS# GPIO28 THRMTRIP# H_THERMTRIP# <4>
F42 AY6 NV_CLE R255 56_0402_5%
AD26 NV_CLE

1
J40 STP_PCI# M11
AD27 STP_PCI# / GPIO34
G46 AD28
F44 AD29 NV_RCOMP AU2 NV_RCOMP 1 2 1 @ 2SATA_CLKREQ# V6 SATACLKREQ# / GPIO35
R256
M47 @ R257 32.4_0402_1% R278 10K_0402_5% 56_0402_5%
AD30

PCI
H36 AV7 <28> NPCI_RST# AB7 BA22 T59 PAD

2
AD31 NV_RB# SATA2GP / GPIO36 TP1
+VCCP
J50 AY8 <18> WEBCAM_OFF WEBCAM_OFF AB13 AW22 T60 PAD
C/BE0# NV_WR#0_RE# SATA3GP / GPIO37 TP2
G42 C/BE1# NV_WR#1_RE# AY5
H47 T145 V3 BB22 T61 PAD
C/BE2# PAD SLOAD / GPIO38 TP3
G34 C/BE3# NV_WE#_CK0 AV11
BF5 T146 P3 AY45 T62 PAD
PCI_PIRQA# NV_WE#_CK1 PAD SDATAOUT0 / GPIO39 TP4
G38 PIRQA#
PCI_PIRQB# H51 CLK_PCIE_LAN_REQ# H3 AY46 T63 PAD
PIRQB# <21> CLK_PCIE_LAN_REQ# PCIECLKRQ6# / GPIO45 TP5
PCI_PIRQC# B37 H18 USB20_N0
PIRQC# USBP0N USB20_N0 <24>
PCI_PIRQD# A44 J18 USB20_P0 Power USB GPIO46 F1 AV43 T64 PAD
PIRQD# USBP0P USB20_P0 <24> 2/24 PCIECLKRQ7# / GPIO46 TP6
A18 USB20_N1
USBP1N USB20_N1 <24>
PCI_REQ0# F51 C18 USB20_P1 USB_SB GPIO48 AB6 AV45 T65 PAD
REQ0# USBP1P USB20_P1 <24> SDATAOUT1 / GPIO48 TP7
PCI_REQ1# A46 N20
PCI_REQ2# REQ1# / GPIO50 USBP2N T133 PCH_XDP_GPIO49
B45 REQ2# / GPIO52 USBP2P P20 AA4 SATA5GP / GPIO49 TP8 AF13 T66 PAD
C PCI_REQ3# M53 J20 USB20_N3 PAD C
REQ3# / GPIO54 USBP3N USB20_N3 <24>
L20 USB20_P3 USB_SB WLAN_TRANSMIT_OFF# F8 M18 T67 PAD
USBP3P USB20_P3 <24> <22> WLAN_TRANSMIT_OFF# GPIO57 TP9
PCI_GNT0# F48 F20
MODEM_DISABLE K45 GNT0# USBP4N
PAD T114 GNT1# / GPIO51 USBP4P G20 TP10 N18 T68 PAD
PAD T115 PCI_GNT2# F36 A20 USB20_N5 CLK_PCI_KBC
GNT2# / GPIO53 USBP5N USB20_N5 <24>
PCI_GNT3# H53 C20 USB20_P5 Card Reader A4 AJ24 T69 PAD 1
GNT3# / GPIO55 USBP5P USB20_P5 <24> +3VALW VSS_NCTF_1 TP11
M22 USB20_N6 A49

NCTF
USBP6N USB20_N6 <22> VSS_NCTF_2

RSVD
PCI_PIRQE# B41 N22 USB20_P6 WLAN A5 AK41 T70 PAD C635
PIRQE# / GPIO2 USBP6P USB20_P6 <22> VSS_NCTF_3 TP12
PCI_PIRQF# K53 B21 A50 12P_0402_50V8J
PIRQF# / GPIO3 USBP7N VSS_NCTF_4

1
PCI_PIRQG# 11/21 HP 2
A36 PIRQG# / GPIO4 USBP7P D21 A52 VSS_NCTF_5 TP13 AK42 T71 PAD
ACCEL_INT# A48 H22 USB20_N8 R430 A53
<22> ACCEL_INT# PIRQH# / GPIO5 USBP8N USB20_N8 <26> <16> PCH_NCTF6 VSS_NCTF_6
USB20_P8 10K_0402_5%
USBP8P J22 USB20_P8 <26> BT <16> PCH_NCTF7 B2 VSS_NCTF_7 TP14 M32 T72 PAD
USB

K6 E22 USB20_N9 B4
PCIRST# USBP9N USB20_N9 <22> VSS_NCTF_8
USB20_P9
F22 USB20_P9 <22> WWAN B52 N32 T73 PAD

2
PCI_SERR# USBP9P USB20_N10 GPIO46 VSS_NCTF_9 TP15 CLK_PCI_FB
<27,28> PCI_SERR# E44 SERR# USBP10N A22 USB20_N10 <19> B53 VSS_NCTF_10
PCI_PERR# USB20_P10
E50 PERR# USBP10P C22 USB20_P10 <19> FPR BE1 VSS_NCTF_11 TP16 M30 T74 PAD 1

1
USBP11N G24 BE53 VSS_NCTF_12
H24 R1504 BF1 N30 T75 PAD C658
PCI_IRDY# USBP11P USB20_N12 10K_0402_5% VSS_NCTF_13 TP17 12P_0402_50V8J
A42 IRDY# USBP12N L24 USB20_N12 <18> BF53 VSS_NCTF_14
PCI_PAR USB20_P12 @ 2
PAD T138
PCI_DEVSEL#
H44 PAR USBP12P M24 USB20_P12 <18> USB_CAM BH1 VSS_NCTF_15 TP18 H12 T76 PAD
F46 A24 BH2

2
PCI_FRAME# DEVSEL# USBP13N VSS_NCTF_16 for RF, SI
C46 FRAME# USBP13P C24 BH52 VSS_NCTF_17 TP19 AA23 T77 PAD
BH53 VSS_NCTF_18
PCI_LOCK# D49 BJ1 AB45 T78 PAD
PLOCK# <16> PCH_NCTF19 VSS_NCTF_19 NC_1
B25 USBRBIAS 1 2 2/24 BJ2
PCI_STOP#
PCI_TRDY#
D41 STOP#
USBRBIAS# R259 22.6_0402_1% L BJ4
VSS_NCTF_20
VSS_NCTF_21 NC_2 AB38 T79 PAD
C48 TRDY# USBRBIAS D25 CPU Type Detect : BJ49 VSS_NCTF_22
BJ5 AB42 T80 PAD
M7
High-->SV , Low-->ULV BJ50
VSS_NCTF_23 NC_3
PME# USB_OC#0 VSS_NCTF_24
OC0# / GPIO59 N16 BJ52 VSS_NCTF_25 NC_4 AB41 T81 PAD
<4,21,22,27> PLT_RST# D5 PLTRST# OC1# / GPIO40 J16 BT_OFF <26> <16> PCH_NCTF26 BJ53 VSS_NCTF_26
F16 USB_OC#2 D1 T39 T82 PAD
B CLK_PCI_KBC_R N52 OC2# / GPIO41 FPR_OFF VSS_NCTF_27 NC_5 B
CLKOUT_PCI0 OC3# / GPIO42 L16 FPR_OFF <19> D2 VSS_NCTF_28
CLK_PCI_FB_R P53 E14 USB_OC#4 D53
CLKOUT_PCI1 OC4# / GPIO43 ISO_PREP# VSS_NCTF_29
P46 CLKOUT_PCI2 OC5# / GPIO9 G16 E1 VSS_NCTF_30 INIT3_3V# P6 T83 PAD
P51 F12 LANLINK_STATUS# E53
CLKOUT_PCI3 OC6# / GPIO10 LANLINK_STATUS# <21> VSS_NCTF_31
CLK_PCI_DB_P P48 T15 CPPE# C10 T84 PAD
CLKOUT_PCI4 OC7# / GPIO14 TP24
IBEXPEAK-M_FCBGA1071
+3VS IBEXPEAK-M_FCBGA1071
+3VALW +3VS
PCI_PIRQE# 1 R1367 2 8.2K_0402_5%
PCI_STOP# 1 R1368 2 8.2K_0402_5% WLAN_TRANSMIT_OFF# R269 1 2 10K_0402_5% NPCI_RST# R268 1 2 10K_0402_5%
PCI_PIRQD# 1 R1369 2 8.2K_0402_5%
ACCEL_INT# 1 R1370 2 8.2K_0402_5% WWAN_TRANSMIT_OFF# R273 1 2 10K_0402_5% SATA_CLKREQ# R272 1 2 10K_0402_5%

GPIO24 R277 1 2 10K_0402_5% PCH_XDP_GPIO49 R275 1 2 10K_0402_5%

PCI_REQ2# 1 R1371 2 8.2K_0402_5% GPIO15 R280 1 2 1K_0402_5%


PCI_REQ1# 1 R1372 2 8.2K_0402_5%
PCI_FRAME# 1 R1374 2 8.2K_0402_5% ISO_PREP# R283 1 2 10K_0402_5% ALS_EN# R281 1 2 10K_0402_5%
PCI_TRDY# 1 R1376 2 8.2K_0402_5%
RUNSCI_EC# R285 1 2 10K_0402_5%
R266 1 2 22_0402_5% CLK_PCI_KBC_R GPIO15 R302 1 @ 2 10K_0402_5%
<28> CLK_PCI_KBC
USB_OC#0 R289 1 2 10K_0402_5% WEBCAM_OFF R287 1 2 @ 10K_0402_5%
PCI_IRDY# 1 R1379 2 8.2K_0402_5%
PCI_PERR# 1 R1380 2 8.2K_0402_5% PCH_DDR_RST R291 1 2 10K_0402_5% PCH_XDP_GPIO16 R290 1 2 10K_0402_5%
PCI_DEVSEL# 1 R1381 2 8.2K_0402_5% R274 1 2 22_0402_5% CLK_PCI_DB_P
<27> CLK_PCI_DB
PCI_SERR# 1 R1382 2 8.2K_0402_5% R276 1 2 22_0402_5% CLK_PCI_FB_R USB_OC#4 R293 1 2 10K_0402_5%
<12> CLK_PCI_FB
CPPE# R295 1 2 10K_0402_5%
R288 1 2 0_0402_5%
PCI_REQ0# 1 R1385 2 8.2K_0402_5% GPIO48 R296 1 2 10K_0402_5%
PCI_PIRQB# 1 R1387 2 8.2K_0402_5%
A PCI_PIRQF# 1 R1389 2 8.2K_0402_5% +3VS STP_PCI# R299 1 2 10K_0402_5% A
PCI_REQ3# 1 R1390 2 8.2K_0402_5%
GPIO7 R304 1 2 10K_0402_5%
5

U10 USB_OC#2 R301 1 2 10K_0402_5%


PCI_PIRQA# 1 R1383 2 8.2K_0402_5% 1 PLT_RST#
P

PCI_LOCK# R1384 8.2K_0402_5% IN1


1 2 <4> BUF_PLT_RST# 4 O
1

PCI_PIRQC# 1 R1386 2 8.2K_0402_5% PCI_GNT0# R267 1 2 @ 1K_0402_5% 2


IN2 Security Classification Compal Secret Data Compal Electronics, Inc.
G

PCI_PIRQG# 1 R1388 2 8.2K_0402_5% @


MODEM_DISABLE R271 1 2 @ 1K_0402_5% R1470 @ SN74AHC1G08DCKR_SC70-5 2008/09/15 2009/09/03 Title
Issued Date Deciphered Date
3

100K_0402_5%
PCI_GNT3# R300 1 2 @ 1K_0402_5% SCHEMATICS, MB A6161
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 14 of 41
5 4 3 2 1
1 2 3 4 5

PAD T123

U7J POWER
http://hobi-elektronika.net
+1.05VS
+1.05VS
U7G POWER 1 2
L7
+3VS

0.01U_0603_16V7K

10U_0805_6.3V6M
AB24 AE50 10UH_LB2012T100MR_20%_0805
VCCCORE[1] VCCADAC[1]

1U_0603_10V4Z

10U_0805_6.3V6M

0.1U_0402_16V4Z
AB26 @ @
VCCCORE[2]

C240

C241

C242

C243

C244
AP51 VCCACLK[1] VCCIO[5] V24 1 1 AB28 VCCCORE[3] 0.069A VCCADAC[2] AE52 1 1 1
0.052A VCCIO[6] V26 AD26 VCCCORE[4]1.524A

CRT
AP53 VCCACLK[2] VCCIO[7] Y24 1 AD28 VCCCORE[5] VSSA_DAC[1] AF53
Y26 C246 AF26
VCCIO[8] 2 2 VCCCORE[6] 2 2 2

VCC CORE
1U_0402_6.3V4Z AF28 AF51
VCCCORE[7] VSSA_DAC[2]
1 2 AF23 VCCLAN[1] VCCSUS3_3[1] V28 AF30 VCCCORE[8]
R1256 0_0402_5% 2
A
0.344A VCCSUS3_3[2] U28 AF31 VCCCORE[9] A
AF24 VCCLAN[2] VCCSUS3_3[3] U26 AH26 VCCCORE[10]
PAD T111 U24 AH28 +3VS
VCCSUS3_3[4] VCCCORE[11]
VCCSUS3_3[5] P28 AH30 VCCCORE[12]
1
C247
2
0.1U_0402_16V4Z
Y20 DCPSUSBYP VCCSUS3_3[6] P26 AH31 VCCCORE[13] 0.030A VCCALVDS AH38
VCCSUS3_3[7] N28 AJ30 VCCCORE[14]
VCCSUS3_3[8] N26 AJ31 VCCCORE[15] VSSA_LVDS AH39
AD38 VCCME[1] VCCSUS3_3[9] M28
M26 +3VALW L43
VCCSUS3_3[10]

0.01U_0603_16V7K

0.01U_0603_16V7K
AD39 L28 AP43 1 2

USB
+1.05VS VCCME[2] VCCSUS3_3[11] +1.05VS VCCTX_LVDS[1] +1.8VS
L26 0.059AVCCTX_LVDS[2] AP45 0.1UH_MLF1608DR10KT_10%
VCCSUS3_3[12]

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C998

C999

C1000

22U_0805_6.3V6M
AD41 J28 AT46 1 1 1

LVDS
VCCME[3] VCCSUS3_3[13] VCCTX_LVDS[3]

C250

C251
VCCSUS3_3[14] J26 1 1 AK24 VCCIO[24] VCCTX_LVDS[4] AT45

1U_0402_6.3V4Z
AF43 H28 Don't need extra-power
VCCME[4] VCCSUS3_3[15]
C252
1 H26 @ @
VCCSUS3_3[16] PAD T124 +1.05VS_APLL 2 2 2
AF41 VCCME[5] 0.163AVCCSUS3_3[17] G28
2 2
BJ24 0.042A
VCCAPLLEXP
VCCSUS3_3[18] G26 VCC3_3[2] AB34
AF42 VCCME[6] VCCSUS3_3[19] F28
2 +3VS
1.998A VCCSUS3_3[20] F26 AN20 VCCIO[25] VCC3_3[3] AB35
V39 E28 AN22

HVCMOS
VCCME[7] VCCSUS3_3[21] VCCIO[26]

Clock and Miscellaneous


VCCSUS3_3[22] E26 AN23 VCCIO[27] VCC3_3[4] AD35 1 2
1U_0402_6.3V4Z V41 C28 AN24 C254 0.1U_0402_16V4Z
VCCME[8] VCCSUS3_3[23] VCCIO[28]
VCCSUS3_3[24] C26 AN26 VCCIO[29]
V42 VCCME[9] VCCSUS3_3[25] B27 AN28 VCCIO[30]
1 1 1 VCCSUS3_3[26] A28 BJ26 VCCIO[31]
C255 C256 C257 Y39 A26 BJ28
VCCME[10] VCCSUS3_3[27] VCCIO[32]
AT26 VCCIO[33]
22U_0805_6.3V6M Y41 U23 +1.05VS AT28
2 2 2 VCCME[11] VCCSUS3_3[28] VCCIO[34]
AU26 VCCIO[35]
Y42 V23 AU28 +1.8VS
VCCME[12] VCCIO[56] +1.05VS VCCIO[36]

1U_0402_6.3V4Z

1U_0402_6.3V4Z
22U_0805_6.3V6M AV26 VCCIO[37]

C259

C260
>1mA F24 ICH_V5REF_SUS 1 1 AV28 AT24
C258 V5REF_SUS VCCIO[38] VCCVRM[2]
AW26 VCCIO[39]
B 1 2 +VCCRTCEXT V9 AW28 B
DCPRTC VCCIO[40] +VCCP

DMI
0.1U_0402_16V4Z BA26 AT16
2 2 VCCIO[41] VCCDMI[1]
ICH_V5REF_RUN
BA28 VCCIO[42] 0.061A
0.035A >1mA V5REF K49 BB26 VCCIO[43] VCCDMI[2] AU16 1
C261
2
1U_0603_10V4Z
+1.8VS AU24 BB28
PCI/GPIO/LPC

VCCVRM[3] VCCIO[44]
BC26 VCCIO[45]
+3VS

PCI E*
0.072A VCC3_3[8] J38 BC28 VCCIO[46]

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M
BB51 VCCADPLLA[1] BD26 VCCIO[47]
+V1.05S_VCCA_A_DPL BB53 L38 BD28
VCCADPLLA[2] VCC3_3[9] VCCIO[48]

C263

C264

C265
1 1 1 1 BE26 AM16 R671 1 2 0_0402_5% +1.8VS
VCCIO[49] VCCPNAND[1]

0.1U_0402_16V4Z
0.073A M36 C262 BE28 AK16
VCC3_3[10] VCCIO[50] VCCPNAND[2]

C266
+V1.05S_VCCA_B_DPL BD51 0.357A 0.1U_0402_16V4Z BG26 AK20 1
VCCADPLLB[1] VCCIO[51] VCCPNAND[3] @ R672
BD53 VCCADPLLB[2] VCC3_3[11] N36 BG28 VCCIO[52] VCCPNAND[4] AK19 1 2 0_0402_5% +3VS
+1.05VS 2 2 2 2
BH27 VCCIO[53] 0.156A VCCPNAND[5] AK15
AH23 VCCIO[21] VCC3_3[12] P36 VCCPNAND[6] AK13
2
AJ35 VCCIO[22] AN30 VCCIO[54] VCCPNAND[7] AM12
1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

NAND / SPI
AH35 VCCIO[23] VCC3_3[13] U35 AN31 VCCIO[55] VCCPNAND[8] AM13
+3VS +3VS
C267

C268

C269

1 1 1 VCCPNAND[9] AM15
AF34 3.208A 0.1U_0402_16V4Z C271
VCCIO[2]
VCC3_3[14] AD13 1 2 1 2 AN35 VCC3_3[1]
AH34 C270 0.1U_0402_16V4Z
2 2 2 VCCIO[3]
AF32 +1.8VS R303 1 2 0_0402_5% AT22 0.035A
VCCIO[4] T126 PAD VCCVRM[1]
VCCSATAPLL[1] AK3
1 2 +VCCSST V12 0.032A AK1 T127 PAD PAD T125 +1.05VS_VCCFDIPLL BJ18 6mA AM8 R673 1 2 0_0402_5% +3VS
DCPSST VCCSATAPLL[2] VCCFDIPLL VCCME3_3[1]

0.1U_0402_16V4Z
0.1U_0402_16V4Z AM9
VCCME3_3[2]

C275
FDI
C272 +1.05VS AM23 0.085A AP11 1
VCCIO[1] VCCME3_3[3]
VCCME3_3[4] AP9
1 2 +V1.1A_INT_VCCSUS Y22
0.1U_0402_16V4Z DCPSUS
VCCIO[9] AH22
C274 Don't need extra-power 2
IBEXPEAK-M_FCBGA1071
C +3VALW P18 AT20 C
VCCSUS3_3[29] VCCVRM[4] +1.8VS

1 2 0.2A@3.3V U19
SATA

VCCSUS3_3[30] +1.05VS
PCI/GPIO/LPC

0.1U_0402_16V4Z AH19
C278 VCCIO[10] +3VS +3VS
U20 VCCSUS3_3[31]
VCCIO[11] AD20
1U_0402_6.3V4Z

U22 VCCSUS3_3[32]
C279

VCCIO[12] AF22 1 1 1
+3VS +1.05VS
AD19 L10 C1337 C1336
0.4A@3.3V VCCIO[13] +V1.05S_VCCA_A_DPL
1 2 V15 VCC3_3[5] VCCIO[14] AF20 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z
0.1U_0402_16V4Z 2 10UH_LB2012T100MR_20%_0805 2 2
VCCIO[15] AF19 1
C280 V16 AH20 1
VCC3_3[6] VCCIO[16] @ C282 + C281
Y16 AB19 1U_0402_6.3V4Z 220U_B2_2.5VM_R35M
VCC3_3[7] VCCIO[17] add 0.1uf(0402) on +3VS to GND near D3 & R1386
VCCIO[18] AB20
+VCCP 2 2 and R1386 (for 33MHz harmonic)for EMI request, Compal SI, 1/19
VCCIO[19] AB22 <BOM Structure>
AD22 +1.05VS
0.1A@1.1V VCCIO[20]
AT18 V_CPU_IO[1]
4.7U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

AA34 +PCH_VCC1_1_20 1 R305 2 0_0402_5%


CPU

VCCME[13] +5VALW +3VALW +5VS +3VS


C284

C285

C286

1 1 1 >1mA Y34 +PCH_VCC1_1_21 1 R306 2 0_0402_5% L11


VCCME[14] +PCH_VCC1_1_22 R307 0_0402_5% +V1.05S_VCCA_B_DPL
AU18 V_CPU_IO[2] VCCME[15] Y35 1 2 1 2
AA35 +PCH_VCC1_1_23 1 R308 2 0_0402_5%
VCCME[16]

2
10UH_LB2012T100MR_20%_0805 1
2 2 2 R309 D2 R310 D3
1
RTC

R311 1 2 0_0402_5% @ C288 + C287


+RTCVCC
A12 VCCRTC 2mA 6mA VCCSUSHDA L30 +3VALW
HDA

1U_0402_6.3V4Z 220U_B2_2.5VM_R35M 100_0402_5% CH751H-40PT_SOD323-2 100_0402_5% CH751H-40PT_SOD323-2

1
2mA@3.3V IBEXPEAK-M_FCBGA1071 2 2
1
1U_0402_6.3V4Z

0.1U_0402_16V4Z

C289 ICH_V5REF_SUS ICH_V5REF_RUN


C291

1 1 20 mils 20 mils
C290

1U_0402_6.3V4Z 1 1
D 2 C292 C293 D
1U_0402_6.3V4Z 1U_0603_6.3V6M
2 2
2 2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 15 of 41
1 2 3 4 5
1 2 3 4 5

AY7
B11
B15
U7I
VSS[159]
VSS[160]
VSS[161]
VSS[259]
VSS[260]
VSS[261]
H49
H5
J24
http://hobi-elektronika.net
AB16

AA19
U7H
VSS[0]

VSS[1] VSS[80] AK30


B19 VSS[162] VSS[262] K11 AA20 VSS[2] VSS[81] AK31
B23 VSS[163] VSS[263] K43 AA22 VSS[3] VSS[82] AK32
B31 VSS[164] VSS[264] K47 AM19 VSS[4] VSS[83] AK34
B35 VSS[165] VSS[265] K7 AA24 VSS[5] VSS[84] AK35
B39 VSS[166] VSS[266] L14 AA26 VSS[6] VSS[85] AK38
B43 VSS[167] VSS[267] L18 AA28 VSS[7] VSS[86] AK43
B47 VSS[168] VSS[268] L2 AA30 VSS[8] VSS[87] AK46
A B7 L22 AA31 AK49 A
VSS[169] VSS[269] VSS[9] VSS[88]
BG12 VSS[170] VSS[270] L32 AA32 VSS[10] VSS[89] AK5
BB12 VSS[171] VSS[271] L36 AB11 VSS[11] VSS[90] AK8
BB16 VSS[172] VSS[272] L40 AB15 VSS[12] VSS[91] AL2
BB20 VSS[173] VSS[273] L52 AB23 VSS[13] VSS[92] AL52
BB24 VSS[174] VSS[274] M12 AB30 VSS[14] VSS[93] AM11
BB30 VSS[175] VSS[275] M16 AB31 VSS[15] VSS[94] BB44
BB34 VSS[176] VSS[276] M20 AB32 VSS[16] VSS[95] AD24
BB38 VSS[177] VSS[277] N38 AB39 VSS[17] VSS[96] AM20
BB42 VSS[178] VSS[278] M34 AB43 VSS[18] VSS[97] AM22
BB49 VSS[179] VSS[279] M38 AB47 VSS[19] VSS[98] AM24
BB5 VSS[180] VSS[280] M42 AB5 VSS[20] VSS[99] AM26
BC10 VSS[181] VSS[281] M46 AB8 VSS[21] VSS[100] AM28
BC14 VSS[182] VSS[282] M49 AC2 VSS[22] VSS[101] BA42
BC18 VSS[183] VSS[283] M5 AC52 VSS[23] VSS[102] AM30
BC2 VSS[184] VSS[284] M8 AD11 VSS[24] VSS[103] AM31
BC22 VSS[185] VSS[285] N24 AD12 VSS[25] VSS[104] AM32
BC32 VSS[186] VSS[286] P11 AD16 VSS[26] VSS[105] AM34
BC36 VSS[187] VSS[287] AD15 AD23 VSS[27] VSS[106] AM35
BC40 VSS[188] VSS[288] P22 AD30 VSS[28] VSS[107] AM38
BC44 VSS[189] VSS[289] P30 AD31 VSS[29] VSS[108] AM39
BC52 VSS[190] VSS[290] P32 AD32 VSS[30] VSS[109] AM42
BH9 VSS[191] VSS[291] P34 AD34 VSS[31] VSS[110] AU20
BD48 VSS[192] VSS[292] P42 AU22 VSS[32] VSS[111] AM46
BD49 VSS[193] VSS[293] P45 AD42 VSS[33] VSS[112] AV22
BD5 VSS[194] VSS[294] P47 AD46 VSS[34] VSS[113] AM49
BE12 VSS[195] VSS[295] R2 AD49 VSS[35] VSS[114] AM7
BE16 VSS[196] VSS[296] R52 AD7 VSS[36] VSS[115] AA50
BE20 VSS[197] VSS[297] T12 AE2 VSS[37] VSS[116] BB10
BE24 VSS[198] VSS[298] T41 AE4 VSS[38] VSS[117] AN32
BE30 VSS[199] VSS[299] T46 AF12 VSS[39] VSS[118] AN50
BE34 T49 Y13 AN52 +3VS
B VSS[200] VSS[300] VSS[40] VSS[119] B
BE38 VSS[201] VSS[301] T5 AH49 VSS[41] VSS[120] AP12
BE42 VSS[202] VSS[302] T8 AU4 VSS[42] VSS[121] AP42
BE46 VSS[203] VSS[303] U30 AF35 VSS[43] VSS[122] AP46

1
BE48 VSS[204] VSS[304] U31 AP13 VSS[44] VSS[123] AP49
BE50 VSS[205] VSS[305] U32 AN34 VSS[45] VSS[124] AP5 CRACK_BGA <8,28>
BE6 U34 AF45 AP8 R312
VSS[206] VSS[306] VSS[46] VSS[125]

6
BE8 VSS[207] VSS[307] P38 AF46 VSS[47] VSS[126] AR2 100K_0402_5%
BF3 V11 AF49 AR52 Q10A

2
VSS[208] VSS[308] VSS[48] VSS[127]
BF49 VSS[209] VSS[309] P16 AF5 VSS[49] VSS[128] AT11 2N7002DW-T/R7_SOT363-6
BF51 VSS[210] VSS[310] V19 AF8 VSS[50] VSS[129] BA12 <14> PCH_NCTF6 2
BG18 VSS[211] VSS[311] V20 AG2 VSS[51] VSS[130] AH48
BG24 V22 AG52 AT32

1
VSS[212] VSS[312] VSS[52] VSS[131]
BG4 VSS[213] VSS[313] V30 AH11 VSS[53] VSS[132] AT36
BG50 V31 AH15 AT41 +3VS
VSS[214] VSS[314] VSS[54] VSS[133]
BH11 VSS[215] VSS[315] V32 AH16 VSS[55] VSS[134] AT47
BH15 VSS[216] VSS[316] V34 AH24 VSS[56] VSS[135] AT7
BH19 VSS[217] VSS[317] V35 AH32 VSS[57] VSS[136] AV12

1
BH23 V38 AV18 AV16 CRACK_BGA
VSS[218] VSS[318] VSS[58] VSS[137]
BH31 VSS[219] VSS[319] V43 AH43 VSS[59] VSS[138] AV20
BH35 V45 AH47 AV24 R313
VSS[220] VSS[320] VSS[60] VSS[139]

3
BH39 VSS[221] VSS[321] V46 AH7 VSS[61] VSS[140] AV30 100K_0402_5%
BH43 V47 AJ19 AV34 Q10B

2
VSS[222] VSS[322] VSS[62] VSS[141]
BH47 VSS[223] VSS[323] V49 AJ2 VSS[63] VSS[142] AV38 2N7002DW-T/R7_SOT363-6
BH7 VSS[224] VSS[324] V5 AJ20 VSS[64] VSS[143] AV42 <14> PCH_NCTF7 5
C12 VSS[225] VSS[325] V7 AJ22 VSS[65] VSS[144] AV46
C50 V8 AJ23 AV49

4
VSS[226] VSS[326] VSS[66] VSS[145]
D51 VSS[227] VSS[327] W2 AJ26 VSS[67] VSS[146] AV5
E12 W52 AJ28 AV8 +3VS
VSS[228] VSS[328] VSS[68] VSS[147]
E16 VSS[229] VSS[329] Y11 AJ32 VSS[69] VSS[148] AW14
E20 VSS[230] VSS[330] Y12 AJ34 VSS[70] VSS[149] AW18
E24 VSS[231] VSS[331] Y15 AT5 VSS[71] VSS[150] AW2

1
E30 Y19 AJ4 BF9 CRACK_BGA
C VSS[232] VSS[332] VSS[72] VSS[151] C
E34 VSS[233] VSS[333] Y23 AK12 VSS[73] VSS[152] AW32
E38 Y28 AM41 AW36 R314
VSS[234] VSS[334] VSS[74] VSS[153]

6
E42 VSS[235] VSS[335] Y30 AN19 VSS[75] VSS[154] AW40 100K_0402_5%
E46 Y31 AK26 AW52 Q11A

2
VSS[236] VSS[336] VSS[76] VSS[155]
E48 VSS[237] VSS[337] Y32 AK22 VSS[77] VSS[156] AY11 2N7002DW-T/R7_SOT363-6
E6 VSS[238] VSS[338] Y38 AK23 VSS[78] VSS[157] AY43 <14> PCH_NCTF19 2
E8 VSS[239] VSS[339] Y43 AK28 VSS[79] VSS[158] AY47
F49 Y46

1
VSS[240] VSS[340] IBEXPEAK-M_FCBGA1071 +3VS
F5 VSS[241] VSS[341] P49
G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8

1
G2 P24 CRACK_BGA
VSS[245] VSS[345]
G22 VSS[246] VSS[346] T43
G32 AD51 R315
VSS[247] VSS[347]

3
G36 VSS[248] VSS[348] AT8 100K_0402_5%
G40 AD47 Q11B

2
VSS[249] VSS[349]
G44 VSS[250] VSS[350] Y47 2N7002DW-T/R7_SOT363-6
G52 VSS[251] VSS[351] AT12 <14> PCH_NCTF26 5
AF39 VSS[252] VSS[352] AM6
H16 AT13

4
VSS[253] VSS[353]
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
BGA Ball Cracking Prevention and Detection
IBEXPEAK-M_FCBGA1071

D D

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 16 of 41
1 2 3 4 5
5 4 3 2 1

http://hobi-elektronika.net +3VS

2
R1097
100K_0402_5%
Q22A Q22B
2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6

1
DPD_CTRLDATA 1 6 N29441921 3 4 DPD_C_AUX#
<13> DPD_CTRLDATA

5
D DDC_EN D

Q5A Q5B
2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6
DPD_CTRLCLK 1 6 N29441889 3 4 DPD_C_AUX
<13> DPD_CTRLCLK

2
DDC_EN
R1099
100K_0402_5%

1
+3VS

2
DP_EN
R1101
@ 100K_0402_5%

2
1
DPD_AUX# 1 6 DPD_AUX#_1 6 1
<13> DPD_AUX#
2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6
Q23A Q24A
DP_EN

5
+3VS DPD_AUX 4 3 DPD_AUX_1 3 4
<13> DPD_AUX
2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6

2
C Q23B Q24B +5VS +5VS C
R1105
@ 100K_0402_5%

2
1
R1106 R1107
10K_0402_5% 10K_0402_5%

1
DP_EN DDC_EN

3
2
Q21B
F1 2N7002DW-7-F_SOT363-6
DP_DCAD 2N7002DW-7-F_SOT363-6
2 5
NANOSMDC050F 0.5A 13.2V POLY-FUSE Q21A

4
+3VS_DP

C664

0.1U_0402_16V4Z

C665

10U_0805_10V4Z
1 1

2 2 JDP1 CONN@
20 +5VS
DP_PWR
19 RTN
B DP_HPD 18 B
DPD_TXP0 0.1U_0402_16V4Z C1304 DP_DATA0R_P DPD_C_AUX# HP_DET
<13> DPD_TXP0 2 1 17 AUX_CH-
16 GND

5
DPD_C_AUX 15
DPD_TXN0 0.1U_0402_16V4Z C1305 DP_DATA0R_N AUX_CH+
<13> DPD_TXN0 2 1 14 GND
5.1M_0402_5%

DP_DCAD 13 24 DP_HPD 0_0402_5% 2 1 R1117 3 4


CA_DET GND
1

DP_DATA3R_N 12 23 DPD_HPD <13>


LANE3- GND
1

<13> DPD_TXP1 DPD_TXP1 0.1U_0402_16V4Z 2 1 C1306 DP_DATA1R_P 11 22


LANE3_shield GND Q12B
R1114

DP_DATA3R_P 10 21
R1115 DP_DATA2R_N LANE3+ GND TR 2N7002DW-7-F 2N SOT-363
9 LANE2-
<13> DPD_TXN1 DPD_TXN1 0.1U_0402_16V4Z 2 1 C1307 DP_DATA1R_N 1M_0402_5% 8
2

DP_DATA2R_P LANE2_shield
7
2

DP_DATA1R_N LANE2+
6 LANE1-
<13> DPD_TXP2 DPD_TXP2 0.1U_0402_16V4Z 2 1 C1308 DP_DATA2R_P 5
DP_DATA1R_P LANE1_shield
4 LANE1+
DP_DATA0R_N 3
DPD_TXN2 0.1U_0402_16V4Z C1309 DP_DATA2R_N LANE0-
<13> DPD_TXN2 2 1 2 LANE0_shield
DP_DATA0R_P 1 LANE0+
<13> DPD_TXP3 DPD_TXP3 0.1U_0402_16V4Z 2 1 C1310 DP_DATA3R_P MOLEX_105062-0001_20P-T

<13> DPD_TXN3 DPD_TXN3 0.1U_0402_16V4Z 2 1 C1311 DP_DATA3R_N

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 17 of 41
5 4 3 2 1
5 4 3 2 1

http://hobi-elektronika.net
LED/PANEL BD. CONN.
D B+_LCD +3VS D

C666 2 1 0.1U_0603_50V

C667 2 1 68P_0402_50V8J

2 R1118

2 R1119
+3VS @ L38 JLVDS1
B+ 1 2 2 1
LQM21FN4R7N00L_0805 LVDS_A0N <13>
4 3

2
+3VS 6 5 LVDS_A0P <13>
R1120
8 7
100K_0402_5% LCDVDD 10 9 LVDS_A1N <13>
LVDS_A1P <13>

2.2K_0402_5% 1

2.2K_0402_5% 1
33_0402_5% 12 11

1
R1121 1 BLON_PWM_R 14 13
D4 <13> INV_PWM 2 16 15 LVDS_A2N <13>
5/24
18 17 LVDS_A2P <13>
1 2 DISPLAY_OFF#
<13> ENABLT 20 19
22 21 LVDS_ACLKN <13>
2 1 CH751H-40_SC76 +5V_WEBCAM 24 23 LVDS_ACLKP <13>
R1122 1
100K_0402_1% C1339 USB20_P12_R 26 25
28 27 DDC2_CLK <13>
0.1U_0402_16V4Z USB20_N12_R DDC2_DATA <13>
30 29
2 3/23 for EMI
32 31
D5
ACES_88242-3001_30P
1 2 CONN@
<25,28> LID_SW#
+3VALW 2 1 CH751H-40_SC76 B+_LCD Q90 B+
R1123 SI2307CDS-T1-GE3 1P
C 10K_0402_5% C

S
+3VL 2 1 1 3

0.22U_0603_25V7K
@ R1506 R1471 0_0402_5%

2
5/11 10K_0402_5% +5V_WEBCAM 1 2

G
2

C1332
1 R1487
@ L44 C1333 220K_0402_1%
INV_PWM 1 1 1 2

2
C1318 @D6
@ D6 2 USB20_P12_R 1U_0603_25V4Z

1
0.1U_0402_16V4Z USB20_P12_R <14> USB20_P12 USB20_N12_R 2
4 VIN IO1 2 <14> USB20_N12
4 4 3 3
2 USB20_N12_R 3 IO2 GND 1

1
WCM2012F2S-900T04_0805 R1488
for EMI CM1293A-02SR_SOT143-4 for RF
1 2 100K_0402_5%
for ESD R1472 0_0402_5%

2
12/10 HP

LCD POWER CIRCUIT


LCDVDD LCDVDD +3VS

for RF
1

B Q53 B
R1124 3 SI2301 1P_SOT23 +5VS +5V_WEBCAM
D

1
100_0402_1%
1

@ C1327 +5VS Q54


47P_0402_50V8J SI2301BDS_SOT23
G
6 2

R1125 1 2 1M_0402_5%
2

D
3 1

1U_0603_10V4Z

0.01U_0402_16V7K

0.1U_0402_16V4Z

4.7U_0805_10V4Z
Q6A 1 1 1 1

1
100K_0402_5%
2N7002DW-7-F_SOT363-6 R1126 2 47K_0402_5% C676 1 2 0.22U_0402_10V4Z @

G
2 1

47P_0402_50V8J
+3VS

C677

C678

C679

C680

C1328
1 1 1
1

2
C681 C682 C683 2 2 2 2

R1127
0.1U_0402_16V4Z @ 4.7U_0805_10V4Z

1
1

2.2U_0805_10V5R

2
2 2 2
OUT

R1128 1 2
5/18 10K_0402_5% R1129 47K_0402_5%
2 for RF
<13> ENAVDD IN

3
Q55
GND

1
DTC124EKAGZT146_SC59-3 Q6B 1
2

2N7002DW-7-F_SOT363-6 C684
R1130 5 0.1U_0402_16V4Z
<14> WEBCAM_OFF
3

100K_0402_1%
2 +5VS

4
1

12/05 HP

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 18 of 41
5 4 3 2 1
1 2 3 4 5

http://hobi-elektronika.net
Finger printer

+3VALW

ACES_87151-04051_4P
JFPR1
A A
SI2301BDS_SOT23 R638 1 1
<14> USB20_P10 2 0_0402_5% USB20_P10_R 2
<14> USB20_N10
R639 1 2 0_0402_5% USB20_N10_R 3

S
+FP_PWR

D
3 1 4

CONN@
C1299

C1300
5

0.1U_0402_10V6K

10U_0805_10V4K
Q87

G
1 1

2
6
2

R1463
10K_0402_5% 2 2 D35
+5VALW 4 2 USB20_P10_R
VIN IO1
1

USB20_N10_R +5VS +RCRT_VCC +CRTVDD


3 IO2 GND 1
R1464
220K_0402_1% PRTR5V0U2X_SOT143-4 D32 F2
<14> FPR_OFF 1 2 2 1 1 2 W=40mils
1 VGA_B
for ESD RB491D_SC59-3 1.1A_6VDC_FUSE VGA_G
VGA_R
0.1U_0402_16V4Z Place close to
C245 2
JCRT1 @ D17 @ D18 @ D34 JCRT1
close to JCRT1

1
6
0_0603_5%

DAN217T146_SC59-3

DAN217T146_SC59-3

DAN217T146_SC59-3
11
RED R1448 1 2 VGA_RE R1449 1 2 0_0603_5% VGA_R 1
7
0_0603_5% 12
GREEN R1450 1 2 VGA_GR R1451 1 2 0_0603_5% VGA_G 2

3
+CRTVDD
8 G 16
0_0603_5% 13 17
BLUE R1452 1 VGA_BL R1453 1 G
2 2 0_0603_5% VGA_B 3

@ 10P_0402_50V8J

@ 10P_0402_50V8J

@ 10P_0402_50V8J
B 9 B

C1296

C1297

C1298
14

2
R1454
75_0402_1%

R1455
75_0402_1%

R1456
75_0402_1%
1 1 1 4
10
15
+5VS +5VS 5
2 2 2

1
C273 C249 SUYIN_070546FR015S290ZR
0.1U_0402_16V4Z 0.1U_0402_16V4Z CONN@
1 2 1 2 +3VS
+CRTVDD +CRTVDD +3VS

5
1

1
1
U4
SN74AHCT1G125GW_SOT353-5 R217 0_0402_5% R218 R193 R215 R216

P
OE#
CRT_HSYNC 2 4 HSYNC_G_A 2 1 D_HSYNC 2.2K_0402_5% 2.2K_0402_5%
<13> CRT_HSYNC A Y

2
2.2K_0402_5% 2.2K_0402_5%

5
1

2
2
R206 0_0402_5% D_DDCDATA 6 1 3VDDCDA

P
OE#
3VDDCDA <13>

3
CRT_VSYNC 2 4 VSYNC_G_A 2 1 D_VSYNC
<13> CRT_VSYNC A Y
Q17A

5
U5 1 @ 1 @
SN74AHCT1G125GW_SOT353-5 C253 C276 2N7002DW-7-F_SOT363-6

3
D_DDCCLK 3 4 3VDDCCL
3VDDCCL <13>
5P_0402_50V8C 5P_0402_50V8C
2 2
Q17B
2N7002DW-7-F_SOT363-6
close to PCH (U7)
close to PCH (U7)
C C

2.5' SATA HDD Connector


CRT Termination/EMI Filter close to PCH (U7)
JHDD1
GND 1
2 SATA_TXP0_C C872 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P0
A+ SATA_PTX_DRX_P0 <11>
3 SATA_TXN0_C C873 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N0
A- SATA_PTX_DRX_N0 <11>
GND 4
5 SATA_RXN0 C870 1 2 0.01U_0402_16V7K SATA_PRX_DTX_N0
B- SATA_PRX_DTX_N0 <11>
6 SATA_RXP0 C871 1 2 0.01U_0402_16V7K SATA_PRX_DTX_P0 M_RED L2 1 2 RED
B+ SATA_PRX_DTX_P0 <11> <13> M_RED
7 HLC0603CSCC27NJT_0603
GND
M_GREEN L3 1 2 GREEN
<13> M_GREEN
8 HLC0603CSCC27NJT_0603
V33
V33 9
10 M_BLUE L4 1 2 BLUE
V33 <13> M_BLUE
11 HLC0603CSCC27NJT_0603
GND

27P_0402_50V8J

27P_0402_50V8J

27P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J
GND 12
GND 13
V5 14 1 1 1 1 1 1
26 15 +5VS
GND V5
25 GND V5 16
GND 17
2 2 2 2 2 2
Reserved 18
C211

C239

C238

C248

GND 19
D C235 C234 C237 C236 C233 C232 D
10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

V12 20
24 21 1 1 1 1 3/24 for EMI
NC V12
23 NC V12 22

SANTA_192701-1_22P-T 2 2 2 2
CONN@
Security Classification Compal Secret Data Compal Electronics, Inc.
Place component's Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

closely SATA THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
CONN.(JHDD1) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 19 of 41
1 2 3 4 5
5 4 3 2 1

http://hobi-elektronika.net

6
+3VS

Q13A
1 2 2 TR 2N7002DW-7-F 2N SOT-363
HDD active LED <14,22> WWAN_TRANSMIT_OFF#

1
R1140 0_0402_5%
D R1131 D

1
WW_LED# R1133 1 2 0_0402_5% 47K_0402_5%
<22> WW_LED#

2
+3VS WL_LED# R1132 1 2 0_0402_5% WL/BT_LED#
<22> WL_LED#

1
+3VS
R1135
R1134 255_0402_1%
255_0402_1%

4 2

2 2
1

3
R1136 HT-297UY5/BP5_YELLOW-WHITE
1K_0402_5% D7

YELLOW

WHITE
Q13B
BT_LED 5 TR 2N7002DW-7-F 2N SOT-363
<26> BT_LED

4
AMBER white
HDD_HALTLED#

Q12A
BT_LED R1138 1 2 100K_0402_5% <25> CAPS_LED#
6

TR 2N7002DW-7-F 2N SOT-363

C C
HDD_HALTLED 2 9/1 Del Q58
<11> HDD_HALTLED

2
R1137 12/04, HP
1
2

0_0402_5%

3
R1139
@ 10K_0402_5%

1
Q15B
SATA_LED# 5 TR 2N7002DW-7-F 2N SOT-363
<11> SATA_LED# <28> CAPS_LOCK_KBC
1

4
+3VS

1
APP_BUTTON_1_LED#

2
R1141
R1142
470_0402_5% 1M_0402_5%

3
2
To LED small board D8

1
Q14B
2 1 5 TR 2N7002DW-7-F 2N SOT-363

6
B +3VS Q14A B
1

4
CH751H-40_SC76 C685
1U_0402_6.3V6K
APP_BUTTON_1 2 TR 2N7002DW-7-F 2N SOT-363
2
2

1
JLED1 C686
0.22U_0402_10V4Z
1 1 1
2 2 WL_BLUE_BTN
3 3 WL/BT_LED#
WL_BLUE_BTN <28>
4 4 APP_BUTTON_1
5 5 APP_BUTTON_1_LED#
APP_BUTTON_1 <28>
+3VS
6 6 APP_BUTTON_2
7 7 APP_BUTTON_2_LED#
APP_BUTTON_2 <28>
8 8
9 9
1

APP_BUTTON_2_LED#
10 10

2
R1143
GND 11 1
C687 R1144
GND 12 470_0402_5% 1M_0402_5%

3
ACES_85201-1005N CONN@ 0.1U_0402_16V4Z
2

2
D9

1
Q16B
2 1 5 TR 2N7002DW-7-F 2N SOT-363
6

Q16A 1

4
CH751H-40_SC76 C688
1U_0402_6.3V6K
APP_BUTTON_2 2 TR 2N7002DW-7-F 2N SOT-363
2
2
1

C689
A 0.22U_0402_10V4Z A
1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 20 of 41
5 4 3 2 1
5 4 3 2 1

http://hobi-elektronika.net
+3V_LAN
+3VS
R1445
LAN Conn.

1
+3VS +3V_LAN 10K_0402_5%

1
R1145 JRJ45
+3V_LAN 11 Yellow LED+
10K_0402_5%

1
R1147 LAN_DI R1024 1 2 3.6K_0402_5% +3V_LAN LAN_ACTIVITY# R1165 1 2 LANLED_ACT# 12

2
R1148 Yellow LED-
1 15

2 2
10K_0402_5% C480 300_0603_5% RJ45_MIDI3- SHLD1
10K_0402_5% 8 PR4-

G
LAN_CS @ R1025 2 1 1K_0402_5% 0.1U_0402_16V4Z 13 CB_IN#
DETECT PIN1 CB_IN# <14>
RJ45_MIDI3+ 7 2

2
CLK_PCIE_LAN_REQ1# 2 PR4+
<14> CLK_PCIE_LAN_REQ# 3 1
RJ45_MIDI1- C719

D
6 PR2-
D @ 0.1U_0402_10V6K D
2N7002_SOT23-3 RJ45_MIDI2- 1
5 PR3-
Q60
RJ45_MIDI2+ 4 PR3+
RJ45_MIDI1+ 3
+3V_LAN PR2+
2 1
R1150 0_0402_5% RJ45_MIDI0- 2 PR1-
@
2 RJ45_MIDI0+ 1
C482 PR1+
SHLD1 14

2
0.1U_0402_16V4Z
Place Close to Chip U57 @ R258
+3V_LAN 9 Green LED+
LANLINK_STATUS# 1 R1166 LANLED_LINK#
10K_0402_5% 1 2 10 Green LED-
<12> PCIE_PRX_DTX_P6 C479 2 1 0.1U_0402_16V7K PCIE_RXP6_LAN 20 33
HSOP LED3/EEDO LAN_DI 300_0603_5% SANTA_130452-3_13P-T
34

1
C481 2 LED2/EEDI/AUX
<12> PCIE_PRX_DTX_N6 1 0.1U_0402_16V7K PCIE_RXN6_LAN 21 HSON LED1/EESK 35 LANLINK_STATUS# LANLINK_STATUS# <14>
32 LAN_CS
EECS
<12> PCIE_PTX_C_DRX_P6 15 HSIP
38 LAN_ACTIVITY#
LED0
<12> PCIE_PTX_C_DRX_N6 16 HSIN
RTL8111DL 2 LAN_MDI0+ LANLED_ACT#
MDIP0 LAN_MDI0-
<14> CLK_PCIE_LAN 17 REFCLK_P MDIN0 3
<14> CLK_PCIE_LAN# 18 5 LAN_MDI1+ LANLED_LINK#
REFCLK_N MDIP1 LAN_MDI1-
MDIN1 6
CLK_PCIE_LAN_REQ1# 25 8 LAN_MDI2+
CLKREQB MDIP2

2
9 LAN_MDI2-
MDIN2 LAN_MDI3+
<4,14,22,27> PLT_RST# 27 PERSTB MDIP3 11
12 LAN_MDI3- @ D43
MDIN3 PACDN042_SOT23~D
R1026 1 2 2.49K_0402_1% 46 4 +LAN_VDD12
RSET FB12

1
C 26 48 VCTRL12 C
<13,22> PCIE_WAKE#
<14> LAN_DIS# LAN_DIS# 28
LANWAKEB
ISOLATEB
SROUT12 +3V_LAN 10/100 and Giga Transformer
EVDD12 19 +EVDD12
LAN_X1 41 30 +LAN_VDD12
For ESD
LAN_X2 CKTAL1 DVDD12
42 CKTAL2 DVDD12 36

1
13 U56
+3VS +3V_LAN DVDD12 R1446
AVDD12 10
0_0805_5% C1042 1 2 0.01U_0402_16V7K 1 24 C1041 2 1 1000P_0402_50V7K R822 1 2 75_0402_1%
TCT1 MCT1
1

39 for internal regular LAN_MDI3- 2 23 RJ45_MIDI3-


AVDD12 TD1+ MX1+
1

R1028 @ R1492 0_0402_5% Close to Pin45,44 LAN_MDI3+ 3 22 RJ45_MIDI3+

2
R1027 0_0402_5% CB_IN# 1 TD1- MX1-
2 23 GPO VDDSR 44
1K_0402_5% 24 45 C1277 1 2 0.01U_0402_16V7K 4 21 C1039 2 1 1000P_0402_50V7K R821 1 2 75_0402_1%
NC VDDSR +3V_LAN TCT2 MCT2

C1247

C1248
LAN_MDI2- RJ45_MIDI2-

22U_0805_6.3V6M
0.1U_0402_25V6
5 20
2

CTRL15/VDD33 reserve for switch WLAN LAN_MDI2+ TD2+ MX2+ RJ45_MIDI2+


7 29 2 1 6 19
2

LAN_DIS# and on board LAN, GND VDD33 TD2- MX2-


14 GND VDD33 37
Compal SI 1/19 C1291 2 0.01U_0402_16V7K C1085 1 1000P_0402_50V7K R923 1 75_0402_1%

RJ45_GND
31 GND 1 7 TCT3 MCT3 18 2 2
1

47 1 LAN_MDI1- 8 17 RJ45_MIDI1-
@ R1030 GND AVDD33 1 2 LAN_MDI1+ TD3+ MX3+ RJ45_MIDI1+
AVDD33 40 9 TD3- MX3- 16
R1029 0_0402_5% 22 43 CTRL15/VDD33
15K_0402_5% EGND ENSR C1292 1 2 0.01U_0402_16V7K 10 TCT4 MCT4 15 C1083 2 1 1000P_0402_50V7K R922 1 2 75_0402_1%
LAN_MDI0- 11 14 RJ45_MIDI0-
2

RTL8111DL-VB-GR_LQFP48_7X7 LAN_MDI0+ TD4+ MX4+ RJ45_MIDI0+


12 TD4- MX4- 13 2
change to 22U by realtek request
C1045
1000P_1808_3KV7K
SUPERWORLD_SWG150401 1
2nd Source :
Y4 HDT BA30-A66 1G LAN
LAN_X1 2 1 LAN_X2

25MHZ_20PF_7A25000012 Swap the signal 0<-->3, 1<-->2 for layout routing, Compal SI 1/14
B B
1 1
C1249
C1276 27P_0402_50V8J
27P_0402_50V8J
2 2 +3V_LAN
+3VALW
Close to Pin39 for 8111DL Close to Pin40 for 8111DL

S
Q27A

D
3 1

1
2N7002DW-7-F_SOT363-6 Q59 370mA
<28,31,32,38> ADP_PRES 2 SI2301BDS_SOT23

1
+3V_LAN The +3V_LAN Rising time (10%~90%) need >1mS and <100mS
Close to Pin10,13,30,36 Close to Pin1,37,29

G
2
+LAN_VDD12 R1146
47K_0402_5%

6
C1278

C1279

C1280

C1281

R1149
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2
C1282

C1283

C1284

C1285

C1286
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2 2 2 2 2 1
2 2 2 2 2 47K_0402_5%

3
1 1 1 1
1 1 1 1 1
<13,23,28,29,30,32,34,35> SLP_S3# 5
Q27B
2N7002DW-7-F_SOT363-6

4
Close to Pin19 Close to Pin48
+EVDD12 L42 R817
VCTRL12 1 2 1 2 +EVDD12
4.7UH_1008HC-472EJFS-A_5%_1008 0_0603_5%
A
C1287

C1288

A
22U_0805_6.3V6M

0.1U_0402_16V4Z
C1289

C1290
1U_0402_6.3V4Z

1U_0402_6.3V4Z

1 2
1

2 2
R819
Note 1: The Trace length 0_0603_5%
2 1
1 1 between L1 and 8111DL's Pin
2

1 must be within 0.5 cm. C262


and C263 to L1 must be within
+LAN_VDD12
Security Classification Compal Secret Data Compal Electronics, Inc.
0.5cm. Refer to Layout guide Issued Date 2007/08/28 Deciphered Date 2006/10/06 Title
for more detail.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 21 of 41
5 4 3 2 1
A B C D E

http://hobi-elektronika.net +3VS +1.5VS


<27> SPI_HOLD#_0

<27> SPI_CLK_JP
SPI_HOLD#_0

SPI_CLK_JP
1
@ R1498
1
@ R1499
2

2
0_0402_5%

0_0402_5%
SPI_HOLD#_MB

SPI_CLK_DB

0.01U_0402_16V7K

0.01U_0402_16V7K
0.1U_0402_16V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

4.7U_0805_10V4Z
<27> SPI_SI_JP SPI_SI_JP 1 2 SPI_SI_DB
1 1 1 1 1 1 @ R1500 0_0402_5%
SPI_CS0#_JP 1 2 SPI_CS0#_DB
ACCELEROMETER <27> SPI_CS0#_JP
@ R1501 0_0402_5%

C726

C727

C728

C729

C730

C731
<27> SPI_SO_JP SPI_SO_JP 1 2 SPI_SO_R0_DB
2 2 2 2 2 2 @ R1502 0_0402_5%

02/23
1 +3VS
WWLAN/WiMax Mini-Express Card 1

half size +3VS

10U_0805_6.3V6M
0.1U_0402_16V4Z
C738

C739
JWLAN1
1 1 PCIE_WAKE# 1 2
<13,21> PCIE_WAKE# 1 2
3 3 4 4
+3VALW 2 R1476 110K_0402_5% 5 6 +1.5VS
5 6 SPI_SO_R0_DB
<12> CLKREQ_WLAN# 7 7 8 8
2 2
0011101b 9 9 10 10 SPI_CS0#_DB
SPI_SI_DB
<12> CLK_PCIE_MCARD# 11 11 12 12
U14 13 14 SPI_CLK_DB
<12> CLK_PCIE_MCARD 13 14 SPI_HOLD#_MB
LIS302DL 1 2
15
17
15 16 16
18 02/23
+3VL 17 18
+3VS 1 @ R1505 0_0402_5% delete port 80 19 20 XMIT_D_OFF#
VDD_IO 03/29 19 20 PLT_RST#
6 VDD GND 2 21 21 22 22 PLT_RST# <4,14,21,27>
4 <12> PCIE_PRX_DTX_N4 R1167 1 2 0_0402_5% PCIE_C_RXN4 23 24
GND 23 24
<14> ACCEL_INT# 8 INT 1 GND 5 <12> PCIE_PRX_DTX_P4 R1168 1 2 0_0402_5% PCIE_C_RXP4 25 25 26 26
9 INT 2 GND 10 27 27 28 28
29 29 30 30
12 SDO <12> PCIE_PTX_C_DRX_N4 31 31 32 32
<9,10,12> SMB_DATA_S3 13 SDA / SDI / SDO <12> PCIE_PTX_C_DRX_P4 33 33 34 34
<9,10,12> SMB_CLK_S3 14 SCL / SPC 35 35 36 36 USB20_N6 <14>
3 +3VS 37 38
RSVD +3VS 37 38 USB20_P6 <14>
R1176 2 1 10K_0402_5% 7 11 39 40 11/21 HP
+3VS CS RSVD 39 40
41 41 42 42
HP302DLTR8_LGA14_3X5 43 44 WL_LED# 12/04, HP
43 44 WL_LED# <20>
L Must be placed in the center of the system. 45 45 46 46
<28> SPI_RECOVERY 47 47 48 48
2 2
49 49 50 50
51 51 52 52
02/23
53 GND1 GND2 54

FOX_AS0B226-S40N-7F
CONN@

XMIT_D_OFF# 2 1 WLAN_TRANSMIT_OFF# <14>


D12 CH751H-40_SC76
Add to prevent leakage issue.

+3V_WWAN +3V_WWAN
Note2

Close to JP14
+3VALW
L Place C933 between R1077.1 and R1079.2 for limit inrush current.

Mini-Express Card--WWAN
10P_0402_25V8J

10P_0402_25V8J

39P_0402_50V8J

0.01U_0402_16V7K

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1
1 1 1 1 1 1 1
R1077 C933

10K_0402_5% 1000P_0402_50V7K
Full size

2
2 2 2 2 2 2 2
C732

C733

C734

C735

C736

C737

3
+3V_WWAN J3
@ @ @ <28> MC1_DISABLE 1 2 2 SHORT PADS

1
JWWAN1 R1079 220K_0402_1% +3V_WWAN
1 2 for RF 04/19
3 12/05 HP 1 2 3
3 3 4 4
+3VALW 2R207 1 10K_0402_5% 5 6 Q77 R1080

1
5 6 UIM_PWR SI2305DS-T1-E3_SOT23-3
<12> CLKREQ_WWAN# 7 7 8 8 2 1
9 10 UIM_DATA +3VS 0_0805_5%
9 10 UIM_CLK
<12> CLK_PCIE_MCARD2# 11 11 12 12
13 14 UIM_RST WWAN power control by F10. 11/09
<12> CLK_PCIE_MCARD2 13 14
1

15 16 UIM_VPP
11/21 HP 15 16 R1172
T129PAD 17 17 18 18
T130PAD 19 20 M_WXMIT_OFF# 10K_0402_5%
19 20
21 21 22 22
R1468 1 2 0_0402_5% PCIE_C_RXN7 23 24 Compal,SI 1/4 U13
<12> PCIE_PRX_DTX_N7
2

23 24
<12> PCIE_PRX_DTX_P7 R1469 1 2 0_0402_5% PCIE_C_RXP7 25 25 26 26 WWAN_DET# <14> 1 CH1 CH4 6
27 27 28 28
29 29 30 30 2 Vn Vp 5 +3V_WWAN
31 32 2 R1173 1 +3V_WWAN
<12> PCIE_PTX_C_DRX_N7 31 32
33 34 10K_0402_5% 3 4
<12> PCIE_PTX_C_DRX_P7 33 34 @ CH2 CH3 D13
35 35 36 36 USB20_N9 <14>
R1174 0_0603_5% 37 38 @ S DIO(BR) NUP4301MR6T1 TSOP-6 @ DAN217T146_SC59-3
37 38 USB20_P9 <14>
1 2 39 40 JSIM1 3
+3V_WWAN

39 40 WW_LED# UIM_PWR
1 2 41 41 42 42 WW_LED# <20> 4 GND VCC 1 1
R1175 0_0603_5% 43 44 UIM_VPP 5 UIM_RST
43 44 UIM_DATA VPP RST 2 UIM_CLK
2
45 45 46 46 6 I/O CLK 3
47 47 48 48 7 DET 1

18P_0402_50V8J
C740
49 50 12/04, HP
49 50
T131PAD 51 51 52 52

47K_0402_5%
2 R1177

4.7U_0805_10V4Z

0.1U_0402_16V4Z
2
53 GND1 GND2 54 GND 8 1 1
GND 9
CONN@ MOLEX_67910-5700
D14

C741

C742
M_WXMIT_OFF# 2 2
<14,20> WWAN_TRANSMIT_OFF# 1 2
@
4 CH751H-40_SC76 4

1
CONN@ TAITW_PMPAT6-06GLBS7N14N0

UIM_PWR

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

SCHEMATICS, MB A6161
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 22 of 41
A B C D E
A B C D E

http://hobi-elektronika.net
+AVDD_CODEC +VDDA_CODEC

R1442 0_0805_5%
2 1 Reserve CODEC LDO for Codec.
+3VS R1334 +3VS_DVDD
BLM18BD601SN1D_0603 +AVDD_CODEC +5VS
2 1

0.1U_0402_16V4Z
@ R1339 2 1 0_0805_5%

1U_0402_6.3V6K
1 1
+3VS +3VS_HDA for ESD

C876

C877

1U_0402_6.3V6K
0.1U_0402_16V4Z

1
R1340 1 2 0_0603_5% 1 1
2 2

C878

C879
1 1
0.1U_0402_16V4Z

D37 D38
U49 PJSOT05C_SOT23 PJSOT05C_SOT23
1

1U_0402_6.3V6K

10U_0805_10V4Z
0.1U_0402_16V4Z
2 2
C880

C881 2 1 10U_0805_10V4Z
1 27 1 1 1
DVDD_CORE AVDD

C882

C883

C884
38

3
2 AVDD
9 DVDD
39 JSPK1
@ C885 @ R1342 PVDD 2 2 2 SPKL+
3 DVDD_IO PVDD 45 1 1
2 1 2 1 SPKL- 2
33P_0402_50V8K 47_0402_5% SENSEA SPKR+ 2
SENSE_A 13 3 3
HDA_BIT_CLK_CODEC 6 14 R1345 2 1 100K_0402_5% +AVDD_CODEC SPKR- 4
<11> HDA_BIT_CLK_CODEC HDA_BITCLK SENSE_B 4
R1346 @C886
@ C886 1 2 1000P_0402_50V7K
<11> HDA_SDIN0 1 2 HDA_SDIN0_CODEC 8 HDA_SDI 5 GND1
33_0402_5% 28 MIC_EXTL C888 1 2 2.2U_0603_6.3V4Z MIC1 6
HP0_PORT_A_L MIC1 <24> GND2
HDA_SDOUT_CODEC 5 29 MIC_EXTR C889 1 2 2.2U_0603_6.3V4Z Ext MIC 1 1
<11> HDA_SDOUT_CODEC HDA_SDO HP0_PORT_A_R
23 +VREFOUT_EXTMIC E-T_3806K-F04N-03R_4P-T
VREFOUT_A_or_F +VREFOUT_EXTMIC <24>
HDA_SYNC_CODEC 10 C904 C905 CONN@
<11> HDA_SYNC_CODEC HDA_SYNC
31 HP_OUTL 220P_0402_50V7K 220P_0402_50V7K
1 1
HP1_PORT_B_L HP_OUTL <24> 2 2
HDA_RST#_CODEC 11 32 HP_OUTR HP Jack
<11> HDA_RST#_CODEC HDA_RST# HP1_PORT_B_R HP_OUTR <24>
C906 C907
+3VS_DVDD 2 R1360 1 2 1 C908 19 MIC_INL C890 1 2 2.2U_0603_6.3V4Z MIC_IN_L 220P_0402_50V7K 220P_0402_50V7K
PORT_C_L MIC_IN_L <24> 2 2
4.7K_0402_5% 0.01U_0402_16V7K 20 MIC_INR C891 1 2 2.2U_0603_6.3V4Z MIC_IN_R Int MIC
PORT_C_R MIC_IN_R <24>
24 +VREFOUT_INTMIC
VREFOUT_C +VREFOUT_INTMIC <24>
2 DMIC_CLK/GPIO1
4 40 SPKL+
DMIC0/GPIO2 SPKR_PORT_D_L+ SPKL-
SPKR_PORT_D_L- 41
MUTE_LED_CNTL R1349 1 2 0_0402_5% 46 Internal SPKR 92HD80 port define
DMIC1/GPIO0/SPDIF_OUT_1 SPKR- +AVDD_CODEC
SPKR_PORT_D_R- 43
48 44 SPKR+ Port A Ext MIC
SPDIF_OUT_0 SPKR_PORT_D_R+

2
+3VS R1350 1 2 10K_0402_5% 47 15 Port B Head phone
EAPD PORT_E_L R1351
PORT_E_R 16
2 EC_MUTE# 10K_0402_5% 2
<28> EC_MUTE# 1 2 Port C Int MIC
D15 17
CH751H-40PT_SOD323-2 PORT_F_L
2 35 18 Port D SPKR

1
delete D16, Compal, SI 1/5 CAP- PORT_F_R
C892 12 MONO_INR C893 2 1 0.1U_0402_16V4Z MONO_IN R1352 1 2 100K_0402_5%C894 1 2 0.1U_0402_16V4Z Port E X
4.7U_0603_6.3V6M PC_BEEP
36 CAP+
1
MONO_OUT 25 Port F X

3
2N7002DW-7-F_SOT363-6
0.1U_0402_16V4Z
7 DVSS DM0 Digital MIC

10K_0402_5%

Q72B
2

2
33 AVSS CAP2 22 5SB_SPKR SB_SPKR <11>

R1354
30 AVSS

C895
26 21

4
AVSS VREFFILT 1
+AVDD_CODEC 1 R1366 2
10K_0402_5% 42 34

1
MUTE_LED_CNTL PVSS V-
<28> MUTE_LED_CNTL

1U_0603_10V6K
10U_0805_10V4Z

10U_0805_10V4Z
49 DAP VREG 37
2 1 2 C900 1 2 1000P_0402_50V7K

2
4.7U_0603_6.3V6M
+AVDD_CODEC

C898

C899
92HD80B1X5NLGXYD38_QFN48_7X7 C901 1 2 1000P_0402_50V7K

C896

C897

1
1 2 1 C902 1 2 1000P_0402_50V7K

C903 1 2 1000P_0402_50V7K

1
+5VALW +VDDA_CODEC
W=40Mil
U58 R1361 R1355 1 2 0_0603_5%
C1293 1 2 1 +AVDD_CODEC 2.49K_0402_1%
0.1U_0402_16V4Z IN R1356 1
OUT 5 2 0_0603_5%
2 1

2
GND
1

2
C1294 2 R1364
1 SENSEA R1357 1 2 0_0603_5%
<13,21,28,29,30,32,34,35> SLP_S3# 3 4 R1363
SHDN BYP

3
R1443 @ 2.2U_0805_16V4Z 10K_0402_5% 39.2K_0402_1% R1358 1 2 0_0603_5%
3 2 GNDA <24> 3
G9191-475T1U_SOT23-5 0_0402_5%
CODEC POWER Q84B
2
2

1
5 C743
<24> MIC_SENSE
1 1000P_0402_50V7K_X7R
C1295 2N7002DW-7-F_SOT363-6 1 install for ESD request, Compal SI 1/19
(4.75V)

4
0.1U_0402_16V4Z
GND GNDA
300mA Reserve CODEC LDO for Codec.
2

R1362
HP_DET# 2 1

HP de pop circuit HP_OUTL HP_OUTR 20K_0402_1%


+AVDD_CODEC
2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2
+5VALW
6

R1365
Q70A

Q71A

10K_0402_5%
2 2 6
1
1

R1359 @ @ Q84A
1

10K_0402_5% HP_DET 2
<24> HP_DET
@
2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6
2

4 4
4

4
6

2N7002DW-7-F_SOT363-6

5 5
Q71B
Q70B
Q72A

EC_MUTE# 2
@ @
3

Security Classification Compal Secret Data


1

Issued Date 2007/08/28 Deciphered Date 2009/09/03 Title


SCHEMATICS, MB A6161
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 23 of 41
A B C D E
A B C D E

+5VALW 1
JUSB23
2
http://hobi-elektronika.net +5VALW
R1199
100K_0402_5% +AVDD_CODEC
+5VALW 3 4 +5VALW 1 2
<14> USB20_N1 USB20_N1 USB20_N5
5 6 USB20_N5 <14> <23> +VREFOUT_EXTMIC

2
<14> USB20_P1 USB20_P1 USB20_P5
7 8 USB20_P5 <14>
USB20_N3 9 10 To CODE-ext MIC Bias R1200
<14> USB20_N3 11 12 +3VS
<14> USB20_P3 USB20_P3 2 1 560K_0402_5%
13 14
+5VALW

1
15 16

5
+5VALW USB20_N0 1 2.2K_0402_5% U17
1 17 18 USB20_N0 <14> 1
USB20_P0 R1201 1

P
19 20 USB20_P0 <14> IN+
EXT_MIC C783 4
21 22 O MIC_SENSE <23>
HP_DET SLP_S4 SLP_S4 <30> 1U_0603_10V6K 3
<23> HP_DET 23 24 IN-

G
2
25 26

2
INT_MIC_1_2 HP_OUTR Place close to U18
HP_OUTR <23>

2
27 28

3
INT_MIC_2_2 HP_OUTL R1202
29 30 HP_OUTL <23>
CHN202UPT_SC-70 LMV331IDCKRG4_SC70-5~D
31 32 D19 47K_0402_5%

1
ACES_88242-3001_30P +AVDD_CODEC
CONN@

1
change from 120K to 47K, HP SI 1/28

2
R1203
10K_0402_5% EXT_MIC
USB I/O connx2 , Aduio JACK +CODEC_REF

Card reader transfer conn

1
1

C785
1 2 220P_0402_25V8J

0.1U_0402_16V4ZC786
0.1U_0402_16V4ZC786
R1204
10K_0402_5% C784 2

4.7U_0805_10V4Z
2 1

1
2 2

1 2
C787 15P_0402_50V8K
AMP. FOR EXTERNAL MICROPHONE
EXT_MICL_3 R1205 1 2 100K_0402_5%
+CODEC_REF

+AVDD_CODEC
100P_0402_50V8J
C788

4
3

P
+
4

OUT 1
2
5 2
P

+ -

G
L39 HLC0603CSCCR11JT_0603 7 MIC1 U18A
OUT MIC1 <23>
EXT_MIC 2 1 EXT_MIC_1 1 2 1 2 6 TLV2464_TSSOP14

11
-
G

C789 0.47U_0402_6.3V6K_X5R R1206 10K_0402_5% U18B To CODE-ext MIC input


TLV2464_TSSOP14
11

1
C790
68P_0402_50V8J

3 2 3

@
1 2
C791 100P_0402_50V8J
@
<23> +VREFOUT_INTMIC
1 2 INT_MIC_2_4 1 2
C792 100P_0402_50V8J R1207 100K_0402_5%

INT_MIC_1_4
R1208
1 2
100K_0402_5% AMP. FOR INTERNAL MICROPHONE +CODEC_REF
2

+AVDD_CODEC
R1209 R1210
3K_0402_5% 3K_0402_5% +CODEC_REF
+AVDD_CODEC

100P_0402_50V8J
C793

0.1U_0402_16V4Z
1
1

C794
1
+AVDD_CODEC
100P_0402_50V8J
C795

0.1U_0402_16V4Z

1 INT_MIC_2_2
INT_MIC_2_2 2
C796

INT_MIC_1_2 1

4
2
2 L40 R1213 10

P
R1211 R1212 +
HLC0603CSCCR10JT_0603 10K_0402_5% 8
OUT TLV2464_TSSOP14
4

+AVDD_CODEC 2
2 1 2 1 1 2INT_MIC_2_31 2 1 2 9 -

G
L41 12 C797 0.068U_0603_16V7K U18C
P

R1214 R1215 +
HLC0603CSCCR10JT_0603 R1216 14 3K_0402_5% 1 3K_0402_5% 1

11
4 OUT 4
2 1 2 1 1 2INT_MIC_1_31 2 1 2 13 -
@ @ C800 <23> MIC_IN_R
G

C798 0.068U_0603_16V7K 10K_0402_5% U18D @ C799 68P_0402_50V8J


3K_0402_5% 3K_0402_5% 1 TLV2464_TSSOP14 1U_0603_16V6K_X5R
11

@ @ C801 2 2
1 68P_0402_50V8J <23> MIC_IN_L
@ C802 2
1U_0603_16V7_X7R
2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 24 of 41
A B C D E
http://hobi-elektronika.net
For EMI

INT_KBD CONN. KSO11

KSO0
@ C620 1

@ C656 1
2 100P_0402_50V8J

2 100P_0402_50V8J

KSO2 @ C624 1 2 100P_0402_50V8J


JKB1
34 KSO5 @ C621 1 2 100P_0402_50V8J
GND2
33 GND1 KSI_D_14 @ C622 1 2 100P_0402_50V8J
KSO11 32
KSO[0..11] KSO0 32 KSI_D_8 @ C625 1
<28> KSO[0..11] 31 31 2 100P_0402_50V8J
KSO2 30
KSI[0..7] KSO5 30 KSI_D_12 @ C626 1
<28> KSI[0..7] 29 29 2 100P_0402_50V8J
KSI_D_14 28
KSI_D_8 28 KSI_D_10 @ C627 1
27 27 2 100P_0402_50V8J
KSI_D_12 26
KSI_D_10 26 KSI_D_0 @ C630 1
25 25 2 100P_0402_50V8J
KSI_D_0 24
KSI_D_4 24 KSI_D_4 @ C629 1
23 23 2 100P_0402_50V8J
KSI_D_2 22
KSI_D_1 22 KSI_D_2 @ C631 1
21 21 2 100P_0402_50V8J
KSI_D_3 20
KSO3 20 KSI_D_1 @ C632 1
19 19 2 100P_0402_50V8J
KSO8 18
+3VS KSO4 18 KSI_D_3 @ C633 1
17 17 2 100P_0402_50V8J
KSO7 16
KSO6 16 KSO3 @ C634 1
15 15 2 100P_0402_50V8J
KSO10 14
KSO1 14 KSO8 @ C641 1
1 13 13 2 100P_0402_50V8J
C803 KSI_D_5 12
0.1U_0402_16V4Z KSI_D_6 12 KSO4 @ C637 1
11 11 2 100P_0402_50V8J
KSI7 10
2 KSI_D_13 10 KSO7 @ C657 1
9 9 2 100P_0402_50V8J
KSI_D_11 8
KSI_D_9 8 KSO6 @ C638 1
7 7 2 100P_0402_50V8J
KSO9 6 6
20mil+3VS R1217 1 2 470_0402_5% 5 5
KSO10 @ C639 1 2 100P_0402_50V8J
4 4
3 KSO1 @ C640 1 2 100P_0402_50V8J
<20> CAPS_LED# 3
2 2
1 KSI_D_5 @ C660 1 2 100P_0402_50V8J
1
KB LED power
KSI_D_6 @ C642 1 2 100P_0402_50V8J
HRS_FH28-60(30)SB-1SH(86)
CONN@ KSI7 @ C659 1 2 100P_0402_50V8J

KSI_D_13 @ C654 1 2 100P_0402_50V8J

KSI_D_11 @ C744 1 2 100P_0402_50V8J

KSI_D_9 @ C745 1 2 100P_0402_50V8J

KSO9 @ C724 1 2 100P_0402_50V8J

Pin 1

Pin1 reserve , so net name is reserve


for Fossil down contact

D20
D21 2 KSI_D_3
2 KSI_D_0 KSI3 1
KSI0 1 3 KSI_D_11
3 KSI_D_8
DAP202U_SOT323-3
DAP202U_SOT323-3 D22
D23 2 KSI_D_4
2 KSI_D_1 KSI4 1
KSI1 1 3 KSI_D_12
3 KSI_D_9
DAP202U_SOT323-3
DAP202U_SOT323-3 D24
D25 2 KSI_D_5
2 KSI_D_2 KSI5 1
KSI2 1 3 KSI_D_13
3 KSI_D_10
DAP202U_SOT323-3
+3VL +3VL DAP202U_SOT323-3 D26
Power BTN/LED and Lid switch BD 2 KSI_D_6
100K_0402_5%

KSI6 1
1

JPWR1 3 KSI_D_14

T/P BOARD.
R1218

1 1 AMBER_BATLED# <28>
DAP202U_SOT323-3
2 2 AQUAWHITE_BATLED# <11,28>
3 3 LID_SW# +5VS
4 4 LID_SW# <18,28>
2

ACES_87151-04051_4P
STB_LED
5 5 STB_LED <28>
ON/OFFBTN_KBC# JTPB1
6 6 ON/OFFBTN_KBC# <28> +5VS
GND 7 +3VALW 1
GND 8 1
C1334
1 <28> TP_CLK 2
<28> TP_DATA 3 1
ACES_85201-06051CONN@ 0.1U_0402_16V4Z C805 C804
4

CONN@
1U_0603_10V4Z 1 2 0.1U_0402_16V4Z
2 2 @ R1219 100K_0402_5%
@D28
@ D28 5 2
6
1 2 ON/OFFBTN# <13,28>

2
add 0.1U for EMI request, Compal SI 1/19 CH751H-40_SC76 D27
PACDN042Y3R_SOT23-3
12/09 HP

1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 25 of 41
5 4 3 2 1

http://hobi-elektronika.net BT(SoftBreeze) Connector


@ D29
+3VAUX_BT 4 2 USB20_P8_R
VIN IO1 JBT1
USB20_N8_R 3 1 +3VAUX_BT
IO2 GND 1
CM1293A-02SR_SOT143-4 2 USB20_P8_R R1220 2
3 1 0_0402_5% USB20_P8 <14>
USB20_N8_R R1221 2 1 0_0402_5%
D 4 USB20_N8 <14> D
5 BT_LED <20>
6
For ESD 7
8
CONN@ ACES_87213-0800G_8P

+3VALW +3VAUX_BT
Q63
SI2301BDS_SOT23

D
3 1

C814

C815
0.1U_0402_10V6K

G
2
1

1
1
R1222 C1324 R1477 1 1
10K_0402_5% @ 470_0402_5%
2

2
2 2

0.1U_0402_16V4Z

2.2U_0805_10V5R
1
R1223 D

<14> BT_OFF 1 2 2
C G C
220K_0402_1% S

3
Q89
2N7002_SOT23-3

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 26 of 41
5 4 3 2 1
5 4 3 2 1

http://hobi-elektronika.net
D D

+3VL

C C

+3VL_SPI PWR

for RF
BIOS ROM(4MB) @C1323
@ C1323 1
0.1U_0402_16V4Z
1
SPI ROM SCKET
C581 20mils U35
47P_0402_50V8J 25mA
4MB SPI ROM 8 VCC VSS 4
2 2
SPI_WP# 3 W
+3VL
20mils 1 2 SPI_HOLD#_1 7
R629 3.3K_0402_5% HOLD
<28> SPI_CS0# SPI_CS0# 1 S

<28> SPI_CLK SPI_CLK 6 C

<28> SPI_SI SPI_SI 5 2 SPI_SO_R0 1 2 SPI_SO


D Q SPI_SO <28>
R630 33_0402_5%
MX25L3205DM2I-12G

2nd Source : LPC Debug Port +3VL


SPI_HOLD#_0 1 2 SPI_HOLD#_1 WINBOND 32M W25Q32BVSSIG CLK_PCI_DB
R633 0_0402_5% EON 32M EN25F32-100HIP 8051_RECOVER# R628 1 2 100K_0402_5%
SPI_CLK_JP 1 2 SPI_CLK 1
R634 0_0402_5%
B SPI_SI_JP SPI_SI @ C655 B
1 2
R635 0_0402_5% 39P_0402_50V8J B+_DEBUG
SPI_CS0#_JP SPI_CS0# 2
1 2
R636 0_0402_5% JP31
SPI_SO_JP 1 2 SPI_SO_R0 1
R637 0_0402_5% CLK_PCI_DB Ground
<14> CLK_PCI_DB 2 LPC_PCI_CLK
4MB SPI <11,28> LPC_LFRAME#
3
4
Ground
LPC_FRAME#
SIRQ 5
ROM +3VL
20mils 1 2 SPI_WP# 1 @ 2
<11,28>
<4,14,21,22>
SIRQ
PLT_RST# 6
+V3S
LPC_RESET#
R631 3.3K_0402_5% R632 0_0402_5% 7
<14,28> PCI_SERR# +V3S
<11,28> LPC_LAD0 8 LPC_AD0
<11,28> LPC_LAD1 9 LPC_AD1
SPI_CLK <11,28> LPC_LAD2 10 LPC_AD2
<11,28> LPC_LAD3 11 LPC_AD3
12 VCC_3VA
1

<28> 8051TX 13 PWR_LED#


R627 <28> 8051RX 14
8051_RECOVER# CAPS_LED#
<28> 8051_RECOVER# 15 NUM_LED#
@ 10_0402_5% <33> DEBUG_KBCRST DEBUG_KBCRST 16
SPI_CLK_JP VCC1_PWRGD
<22> SPI_CLK_JP 17
2

SPI_CS0#_JP SPI_CLK
<22> SPI_CS0#_JP 18 SPI_CS#
SPI_SI_JP 19
05/10 Delete SPI Socket for MV. <22> SPI_SI_JP SPI_SI
1 SPI_SO_JP 20
<22> SPI_SO_JP SPI_SO
C582 SPI_HOLD#_0 21
<22> SPI_HOLD#_0 SPI_HOLD#
4.7P_0402_50V8C <28> SPI_CS1# 22
@ Reserved
23 Reserved
2
24 Reserved

ACES_87216-2404_24P
CONN@
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 27 of 41
5 4 3 2 1
1 2 3 4 5

http://hobi-elektronika.net
+3VL

1
R1238
+3VL 0_0603_5%
L
07/01 update
1 2 +3VS

2
+3VL 0.1U_0402_16V4Z 0.1U_0402_16V4Z R1240 0_0402_5%

1
R1242 1 1 1 1 1 1 1
10K_0402_5% 2 R1395 1 KSI3 C836 C837
10K_0402_5% 2 R1396 1 KSI2 @ 100K_0402_5% C832 C833 C834 C835 0.1U_0402_16V4Z
10K_0402_5% 2 R1397 1 KSI1 C831 0.1U_0402_16V4Z

2
A 10K_0402_5% R1398 KSI0 ROM_CS#0 0.1U_0402_16V4Z 2 2 2 2 2 2 2 A
2 1

0.1U_0402_16V4Z 4.7U_0805_10V4Z

106

119
compal, SI 12/24

39
58
84

14

49
U21
10K_0402_5% 2 R1399 1 KSI7 1 2 ROM_DATOUT 128 15 C838 1 2 4.7U_0805_10V6K +3VL

VCC1
VCC1
VCC1
VCC1
VCC1

VCC1

VCC2
<27> SPI_SI FLDATAOUT CAP
10K_0402_5% 2 R1400 1 KSI6 <11> KBC_SPI_SI_R R1245 0_0402_5% 127
10K_0402_5% R1401 KSI5 ROM_CS#0 HSTDATAOUT/GPIO45 PAD T143
2 1 <27> SPI_CS0# 1 2 97 FLCS0# GPIO28 93
10K_0402_5% 2 R1402 1 KSI4 <11> KBC_SPI_CS0#_R R1246 0_0402_5% 96 98 SUS_PWR_ACK <13>
HSTCS0#/GPIO44 GPIO29 WL_BLUE_BTN R1489
<27> SPI_SO 95 FLDATAIN GPIO30 99 AC_PRESENT <13> 2 1 100K_0402_5%
<11> KBC_SPI_SO 1 2 ROM_DATIN 94 100 MUTE_LED_CNTL_R R1248 1 2 0_0402_5% MUTE_LED_CNTL MUTE_LED_CNTL <23> APP_BUTTON_1 R1490 2 1 100K_0402_5%
R1247 0_0402_5% HSTDATAIN/GPIO43 GPIO31 APP_BUTTON_2 R1491
GPIO32 126 PCI_SERR# <14,27> 2 1 100K_0402_5%
<25> KSO[0..11]
KSO0 21 124 KBC_PWR_ON <33>
KSO1 KSO0 OUT0/(SCI)
20 KSO1 OUT1/IRQ8# 125 AQUAWHITE_BATLED# <11,25>
KSO2 19
KSO3 KSO2
18 KSO3 CFETA/OUT7/nSMI 123
KSO4 17 122 KBRST# D31 1 2 KB_RST# <14>
KSO4 OUT8/KBRST

Keyboard/Mouse Interface
KSO5 16 121 CH751H-40PT_SOD323-2 FAN_PWM <4>

SMSC_1098-NU_TQFP-128P

General Purpose I/O Interface


KSO6 KSO5 OUT9/PWM2
13 KSO6 OUT10/PWM0 120 BAT_PWM_OUT <32>
KSO7 12 118 CHGCTRL <32>
KSO8 KSO7 PWM_CHRGCTL
10 KSO8
KSO9 9 107 APP_BUTTON_1_R R1290 1 2 0_0402_5% APP_BUTTON_1 APP_BUTTON_1 <20>
for ESD
KSO10 KSO9 GPIO01
8 KSO10 GPIO02 79 ON/OFFBTN_KBC# <25>
KSO11 7 80 CPU_SV_ID_DET WL_BLUE_BTN @ C1329 1 2 0.1U_0402_16V4Z
KSO11 GPIO03 SLP_S3#
6 KSO12/GPIO00/KBRST GPIO04/KSO14 81 SLP_S3# <13,21,23,29,30,32,34,35>
5 83 8051_RECOVER# <27> APP_BUTTON_1 @ C1330 1 2 0.1U_0402_16V4Z
KSO13/GPIO18 GPIO05/KSO15
T141 KSI0 <25> KSI[0..7] 85 PM_RSMRST# PM_RSMRST# <13> APP_BUTTON_2 @ C1331 1 2 0.1U_0402_16V4Z
PAD KSI0 GPIO07/PWM3 CRACK_BGA
29 KSI0 GPIO08/RXD 86 CRACK_BGA <8,16>
KSI1 28 87 BD_ID
T142 KSI1 KSI2 KSI1 GPIO09/TXD
27 KSI2
B PAD KSI3 26 88 AB2A_DATA R1249 1 2 0_0402_5% B
KSI3 GPIO11/AB2A_DATA CAP_DAT <12>
KSI4 25 89 AB2A_CLK R1250 1 2 0_0402_5% CAP_CLK <12>
BIOS request. 11/20 Compal KSI5 KSI4 GPIO12/AB2A_CLK R1251 1 0_0402_5%
24 KSI5 GPIO13/AB2B_DATA 90 2 CELLS <32>
KSI6 23 91 R1252 1 2 0_0402_5% EC_MUTE# <23>
KSI7 KSI6 GPIO14/AB2B_CLK
22 KSI7 GPIO15/FAN_TACH1 92 ADP_DET# <38>
101 BAT_ID# <31> C1335 0.1U_0402_16V4Z
GPIO16/FAN_TACH2 LID_SW#
GPIO17/A20M 102 GATEA20 <14> 1 2
<25> TP_CLK TP_CLK 35
TP_DATA IMCLK add 0.1U for EMI request, Compal SI 1/19
<25> TP_DATA 36 IMDAT GPIO20/PS2CLK 103
SP_CLK 61 105
SP_DATA KCLK GPIO21/PS2DAT PWRBTN_OUT# R1253 1
62 KDAT GPIO24/KSO16 4 2 0_0402_5% ON/OFFBTN# <13,25>
66 EMCLK ADP_PRES[CKT#2]/GPIO27/WK_SE05 74 ADP_PRES <21,31,32,38>
67 EMDAT

111 SMB_EC_DA1 SMB_EC_DA1 <31>


AB1A_DATA SMB_EC_CK1
AB1A_CLK 112 SMB_EC_CK1 <31>
Access Bus Interface
<13> PM_CLKRUN# 55 109 AB1B_DATA
CLKRUN# AB1B_DATA AB1B_CLK
<11,27> SIRQ 57 SER_IRQ AB1B_CLK 110
+5VS CLK_PCI_KBC
<14> CLK_PCI_KBC
RUNSCI_EC#
54
76
PCI_CLK Power Mgmt/SIRQ 73 APP_BUTTON_2_R R1307 1 2 0_0402_5% APP_BUTTON_2
<14> RUNSCI_EC# EC_SCI# GPIO25 APP_BUTTON_2 <20>
R525 10K_0402_5%
1 2 TP_CLK 108 CAPS_LOCK_KBC_R R1308 1 2 0_0402_5% CAPS_LOCK_KBC +3VL
GPIO26/KSO17 CAPS_LOCK_KBC <20>
R526 10K_0402_5% <11,27> LPC_LAD3 51 59
LAD[3] NC_CLOCKI

Miscellaneous
1 2 TP_DATA <11,27> LPC_LAD2 50 75 32K_CLK R1257 1 2 0_0402_5% ADP_EN <38>
@ R527 10K_0402_5% LAD[2] 32KHZ_OUT/GPIO22/WK_SE01 PGD_IN CPU_SV_ID_DET R1258 1
<11,27> LPC_LAD1 48 LAD[1] RESET_OUT#/GPIO06 60 PGD_IN <13,37> 2@ 100K_0402_5%
1 2 SP_CLK <11,27> LPC_LAD0 46 LPC 78 PWR_GD PWR_GD <29>
@ R528 10K_0402_5% LAD[0] PWRGD R1259 1
77 VCC1_PWRGD <33,38> 2@ 100K_0402_5%
1 2 SP_DATA 52
Bus VCC1_RST#
38 R248 1 2 0_0402_5%
<11,27> LPC_LFRAME# LFRAME# ADC_TO_PWM_OUT/GPIO19 OCP <38>
<14> NPCI_RST# 53 LRESET#
Compal, SI 1/18 69 TEST R1261 1 2 1K_0402_5%
C TEST PIN 02/23 C
L CPU Type Detect : High-->SV , Low-->LV
CRY1 70 116 SPI_RECOVERY_R 1 2 SPI_RECOVERY <22>
CRY2 XTAL1 CFETB/GPIO10 @ R1503 0_0402_5%
71 XTAL2 BAT_LED# 113 AMBER_BATLED# <25>
115 8051TX 8051TX <27> 8051TX R1306 1 2 0_0402_5% STB_LED STB_LED <25>
PWR_LED#/8051TX
+VCC0 68 VCC0 FDD_LED#/8051RX 114 8051RX <27>
Compal 12/24
T136 BAT_ALARM 1 R1262 1 2 100K_0402_5% +3VL +3VL
PAD Alarm [CKT#2]/GPIO36 @
<11> KBC_SPI_CLK_R 2 41 AC_ADP_PRES <31,32>
32.768KHZ 1TJS125DJ4A420P

HSTCLK/GPIO41 AC[CKT#2]/GPIO23
<27> SPI_CLK 1 2 ROM_CLK 3 FLCLK ADC2/GPIO40 42 ADC2 R1264 1 2 300_0402_5% ADP_A_ID <38> KBRST# R1265 1 2 10K_0402_5%
R1263 0_0402_5% 30 65
GPIO39 Q/GPIO33
1

<11> KBC_SPI_CS1#_R 31 64 LID_SW# LID_SW# <18,25> VCC1_PWRGDR1266 1 2 10K_0402_5%


HSTCS1#/GPIO42 GPIO34
22P_0402_50V8J

22P_0402_50V8J

Y5 1 2 ROM_CS1# 32 63 WL_BLUE_BTN_R R1268 1 2 0_0402_5% WL_BLUE_BTN


IN

OUT

<27> SPI_CS1# FLCS1# GPIO35 WL_BLUE_BTN <20>


C843

C844

<22> MC1_DISABLE R1267 0_0402_5% 33 40 +3VL CRACK_BGA R1269 1 2 10K_0402_5%


R1270 300_0402_5% GPIO38 AVCC
1 1 34 GPIO37
AGND

AVSS

<32> PMC 1 2 ADC1 43 1 2 1 2 0_0402_5% BD_ID R1272 1 2 10K_0402_5%


VSS
VSS
VSS
VSS
VSS
VSS
VSS

OCP_A_IN ADC1/GPIO46
2 ADC
NC

NC

<38> OCP_A_IN 1 44 ADC_TO_PWM_IN


R1273 300_0402_5% C1303 @ R1485
2 2 KBC1098-NU_VTQFP128_14X14 0.1U_0402_10V6K
2

72

11
37
47
56
104
82
117

45

12/10 HP KBC_PWR_ON R1274 1 2 10K_0402_5%


R1486 0_0402_5%
1 2
+RTCVCC

CLK_PCI_KBC
1

CAP_CLK SPI_CLK RP11 +3VL

4.7P_0402_50V8C

4.7P_0402_50V8C
2200P_0402_25V7K 2 1 C845 ADC @
1
R1255

10_0402_5%

R1276 PGD_IN R1277 1 2 10K_0402_5% 4.7K_0804_8P4R_5%

C841

C842
0_0402_5% 2200P_0402_25V7K 2 1 C846 ADC1 1 1 SMB_EC_CK1 1 8
PM_RSMRST# R1278 1 2 10K_0402_5% SMB_EC_DA1 2 7
2

@ ROM_CLK 2200P_0402_25V7K 2 1 C847 ADC2 AB1B_CLK 3 6


D R1275 @ @ AB1B_DATA 4 5 D
+VCC0
2

2 2
4.7P_0402_50V8C

1 1 1 C839 0_0402_5%
C840

1 R1279 C848 C849


2

@ 4.7P_0402_50V8C
@ 0_0402_5% 0.1U_0402_16V4Z
@ 2 2 2
2

2
1U_0603_10V4Z Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 28 of 41
1 2 3 4 5
1 2 3 4 5 6 7 8

http://hobi-elektronika.net
Intel S3 power reduction circuit for Calpella. 11/09
R1280
1 2 +3VS
1M_0402_1%

1
+5VALW SLP_S3# +3VALW
1 2 R1282
<35> 1.8VS_POK

1
R1281 3.3K_0402_5% 10K_0402_5%

8
U23A R1283
1 2 R1286 1 2 10K_0402_5% 3 J1 R1284

P
+5VS

2
+

5
R1285 76.8K_0402_1% 1 1 2 VCCP_EN <34> @ 0_0402_5% 8.2K_0402_5%
O
1 2 2VREF_393 2 U24

VCC
2VREF_51125

2
-

G
+0.75VS 1 2 R1287 34.8K_0402_1% SHORT PADS 1
R1288 11.5K_0402_1% LM393DT_SO8 IN1
4 VCCP_1.5VSPWRGD <4>

4
A OUT A
1 2 2

GND
R1289 49.9K_0402_1% IN2
+3VALW MC74VHC1G08DFT2G_SC70-5
1

3
D33 C850

5
<13,21,23,28,30,32,34,35> SLP_S3# 1 2 1 2 1000P_0402_50V7K U25
R1291 3.3K_0402_5%

VCC
CH751H-40PT_SOD323-2 2
1 IN1
1 OUT 4 PWR_GD <28>
C851 2

GND
<34> VCCP_POK IN2
R1292

1
3300P_0402_25V7K 1 2
2 1M_0402_1% MC74VHC1G08DFT2G_SC70-5 R1293

3
+1.5VS_CPU_VDDQ R1294 1 2 34K_0402_1% 4.99K_0402_1%

+5VALW

3300P_0402_25V7K

2
+3VS 1 2
R1295 75K_0402_1% VTTPWRGOOD <4>

8
U23B
1 2 R1297 1 2 10K_0402_5% 5

P
+1.5VS +

1
R1296 34K_0402_1% 7
O R1298
6 -

G
2.49K_0402_1%
1
R1299 1 2VREF_393 2VREF_393 LM393DT_SO8

4
C852

2
34.8K_0402_1%
2
2

B WWAN Card STANDOFF CPU support B


H1
HOLEA H3 H4 H5 H6
HOLEA HOLEA HOLEA HOLEA

1
WWLAN Card STANDOFF
H2
HOLEA

1
ZZZ

LA-6161P_PCB
H9 H10 H11 H12 H13 H14 H15
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
C C

1
H16 H19
HOLEA HOLEA

1
H20
H17 H18 HOLEA
HOLEA HOLEA

1
1

1
D D
FM1 FM2 FM3 FM4
1 1 1 1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 29 of 41
1 2 3 4 5 6 7 8
A B C D E

+3VALW to +3VS Transfer http://hobi-elektronika.net


+1.5V

SI7326DN-T1-E3_PAK1212-8
+1.5VS_CPU_VDDQ

L
Add C626,C664 close to JDIMA1;
C656,C657 close to JDIMB1.
+3VALW +3VS U45
B+ SI7326DN-T1-E3_PAK1212-8 1
U28 2 +1.5V +1.5VS_CPU_VDDQ
1 5 3
1

2 C1024 1 2 0.1U_0402_16V4Z

C1023

0.1U_0402_16V4Z

C1022

0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
1 5 3
R1322 1 1 1 1 C1025 1 2 0.1U_0402_16V4Z

4
1 330K_0402_5% C859 1
10U_0805_10V4Z C1026 1 2 0.1U_0402_16V4Z
2

4
2

C860

C861

1
R1323 0_0402_5% 2 2 2 2 C1027 1
1 2 0.1U_0402_16V4Z
RUNON 1 2 R1441 C505
1

Compal, SI 1/11 0_0402_5% @ 0.01U_0402_16V7K


2

2
6

R1324
470_0402_5% RUNON
Q30A
2

SLP_S3 2 1
C862
2N7002DW-7-F_SOT363-6 0.01U_0402_25V7K
1

+1.5VS_CPU_VDDQ

+0.75VS

1
R1440

1
+5VALW to +5VS Transfer 220_0402_5% R693

3 2
22_0402_5%
+5VALW +5VS

2
SI7326DN-T1-E3_PAK1212-8 Q52B
U29

6
1 SLP_S3 5
2
0.1U_0402_16V4Z

1 5 3 2N7002DW-7-F_SOT363-6 Q85A

4
2 SLP_S3 2
1 1 2
C863 C865 2N7002DW-7-F_SOT363-6
10U_0805_10V4M 10U_0805_10V4Z
4

1
2
C864

2 2

RUNON

Intel S3 power reduction circuit for Calpella. 11/09

+1.5V to +1.5VS Transfer


+1.5V +1.5VS +1.5VS_CPU_VDDQ +1.5VS +3VL

SI7326DN-T1-E3_PAK1212-8 J4
@

Q64 2 1

1
1
2 PAD-OPEN 2x2m R1444
@

5 3 100K_0402_5%
@

0.1U_0402_16V7K

0.1U_0402_16V7K
C866

10U_0805_6.3V4K

C867

C868

C869

10U_0805_6.3V4K

2
1 1 1 1 discharge circuit-2
4

SLP_S4
<24> SLP_S4
+VCCP +GFX_CORE +1.5V
@

R1327

3
2 2 2 2
1 2
1

1
3 Q85B 3
0_0402_5% R1473 R1474 R1475
RUNON 5
<13,36> SLP_S4#
470_0402_5% 470_0402_5% 470_0402_5%
2N7002DW-7-F_SOT363-6
6 2

3 2

32

4
Q88B Q86B
Q88A SLP_S3 5 2N7002DWH 2N SOT363-6
SLP_S3 2 SLP_S3 5

4
2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6
1

4
+3VL
Discharge circuit-1

1
+1.8VS +3VS +5VS +1.5VS R1326
100K_0402_5%
1

2
R1328 R1329 R1330 R1331
SLP_S3
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%
6 2

6 2

3 2

3 2

3
Q30B
Q15A Q9B Q7B
TR 2N7002DW-7-F 2N SOT-363 Q9A 5
<13,21,23,28,29,32,34,35> SLP_S3#
SLP_S3 2 SLP_S3 2 SLP_S3 5 SLP_S3 5
4 2N7002DW-7-F_SOT363-6 4

4
2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6
1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/08/03 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 30 of 41
A B C D E
A B C D

http://hobi-elektronika.net
PCN1 VIN
PL2
GND 6 B++ PD22 PR37 51125_PWR
1 5 HCB2012KF-121T50_0805 1SS355_SOD323-2 0_0402_5% 1
GND
4 4 1 2 2 1 1 2
3 PL1
3

1
2 ADP_SIGNAL <39> HCB2012KF-121T50_0805
2
1 1 ADPIN 1 2 VIN PD12
1SS355_SOD323-2 PD8

1000P_0402_50V7K
100P_0402_50V8J
2 1 RLZ27V
ACES_87302-0441

1000P_0402_50V7K

2
1

1
@15K_0402_5%
100P_0402_50V8J
1

1
PC1

PC2

PC4
BATT

PC3

PR1
PD1 PR23

2
@PJSOT24C_SOT23-3 PD7 100_0805_5%

2
2 1 1 2

2
CH751H-40PT_SOD323-2

1
B+_DEBUG
B+_DEBUG PC15
0.1U_0603_50V7K

2
2 2

VMB BATT_1 BATT

PL3
PH1 under CPU botten side :
HCB2012KF-121T50_0805
1 2 PQ1
CPU thermal protection at 90 +-3 degree C
PCN2 AO4407AL_SO8
ACES_51976-00571-001 1 8
Recovery at 47 +-3 degree C
1 1 EC_SMD PL4
1 2 2 7
2 2 EC_SMC HCB2012KF-121T50_0805
3 6
3 3 5
4 4 +3VL
@100P_0402_50V8J

@100P_0402_50V8J
PR4 1K_0402_1%

PR11 470K_0402_5%
5 5

4
PR6 210K_0402_1%
@100P_0402_50V8J

GND 6 2 1
1

1000P_0402_50V7K

0.01U_0402_50V7K

2VREF_51125
GND 7
PJSOT24CH_SOT23-3
1

1
470K_0402_5%

4.7K_0402_5%
CPU
2

1
PC8

PC9

PC6
2

VL
PC5

PR2
2

2
PC7

PR14

PR12
470K_0402_1%
2

2
1

1
1 2
1

100K_0402_5%
PH1
PD5

3 3
1

2
PR9
100_0402_5%

100K_0402_1%_TSM0B104F4251RZ
100_0402_5% VL
PQ2A
EN0 <34>

PR3
2

2
2N7002KDWH-2N_SOT363-6
PR8

2 PR5
2

8
PJSOT24CH_SOT23-3

53.6K_0603_1%

1
3

1
D
1 2 3

P
<29> SMB_EC_DA1
1

+3VL + PQ4
<29> BAT_ID# 2VREF_51125 O 1 2
G SSM3K7002FU_SC70-3
1 2 2 - PU103A

G
SMB_EC_DA1 +3VL S
PR7

3
1

1
LM393DR_SO8

1000P_0402_50V7K
21K_0402_1%
0.1U_0603_25V7K
75K_0402_1%

4
1

1
150K_0402_1%
SMB_EC_CK1 <29> PR13
1

1
PD6

PC11
SMB_EC_CK1 PU1 220K_0402_5%
1

PR15

PC12
74LVC1G14GW_SOT353-5
SSM3K7002FU_SC70-3

P
NC

2
PQ3

PR10
2 4 A 2
2

2
Y
BAV99WT1G_SC70-3

BAV99WT1G_SC70-3

BAV99WT1G_SC70-3

2
1

2N7002KDWH-2N_SOT363-6

S
3

3
PD2

PD3

PD4

PQ2B
@100P_0402_50V8J

<22,29,33>
1

ADP_PRES
PC10

5
2

+3VL <29,33>
4

AC_ADP_PRES

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/03/10 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 31 of 40
A B C D
A B C D

http://hobi-elektronika.net
VIN P2 B+ P4
P4
PQ100 PQ101 PQ102
AO4407L_SO8 AO4407AL_SO8 PR134 PL100 AO4407AL_SO8
1 8 8 1 0.01_2512_1% HCB2012KF-121T50_0805 1 8
2 7 7 2 1 4 1 2 CHG_B+ 2 7
3 6 6 3 3 6

4.7U_0805_25V6-K

4.7U_0805_25V6-K
5 5 2 3 5

4.7U_0805_25V6-K
PC100 PC101

4
1

1
PC103
ACDET

PC104
0.1U_0603_25V7K 1 2

PC102
+3VL

0.1U_0603_50V7K
1 2 1 2
1 1 2 1U_0603_6.3V6M
PR102 1

2
PR100 200K_0402_5% PR101

1
200K_0402_5% PC106 PR104

PC108
56K_0402_1%

1
1 2 @0.1U_0603_25V7K 0_0402_5%
CHG_B+
150K_0402_5%

PR103 PC107

2
1

150K_0402_5% 0.01U_0402_16V7K

1
PR105

PR106

1 2
PR143 CHGEN# 10_0805_1% P2
D 100K_0402_5% VL 1 2
PQ103 2 2 1
2

1
<39> ADP_EN# SSM3K7002FU_SC70-3 G

5
6
7
8
S PC109

ACP
LPREF

ACSET

ACDET

LPMD

ACN

CHGEN
3
1U_0805_25V6K
TP 29

AO4466L 1N SO8
PR108 1 2
PR142 <14,22,29,30,31,35> 0_0402_5%
1M_0402_5% SLP_S3# 1 2 8 IADSLP PVCC 28
BATT P2 PR137 PC110
1 2 4
0.1U_0402_10V7K

PQ105
PR135 8 0_0402_5%
100K_0402_1% 9 27 BST_CHG 1 2 1 2
AGND BTST
2 1 5 PC111
P

+ BQ24740VREF PR138
1U_0603_6.3V6M PU100
PR136 100K_0402_1% O 7 0_0402_5%

3
2
1
2 1 6 - PU103B 1 2 10 VREF
BQ24740RHDR_QFN28_5X5
HIDRV 26 DH_CHG 1 2 BATT
G

PL101 PR109
1

LM393DR_SO8 +3VL 10UH +-20% #919AQ-H-100M=P3 5.3A 0.01_1206_1%


4

11 25 LX_CHG 1 2 1 2
PR141 PR140 VDAC PH

4.7_1206_5%
453K_0402_1%
1

5
6
7
8
24.3K_0402_1% 23.7K_0402_1% PD101

1
VADJ REGN

PR110
12 24 2 1
2

VADJ REGN

PR139

@4.7U_0805_25V6-K
AO4468L_SO8

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
2 LL4148_LL34-2 2

<29> BAT_PWM_OUT 13 23 DL_CHG

2
EXTPWR LODRV

1
PC115

PC127
1 2 4

1 2
PQ106

PC112

PC113

PC114
PR111

1000P_0603_50V7K
1

PC126
422K_0402_1% 14 22

2
1 ISYNSET PGND
PR112

1U_0603_10V6K
DPMDET
1
PC116

IADAPT
1M_0402_1% 1 2

SRSET

CELLS

3
2
1

2
1
1U_0603_6.3V6M

PC118
SRN

SRP
2

BAT
PR113 PC117
2
P2 +3VL 43.2K_0402_1% CELLS 0.1U_0402_10V7K
1 2 AC Detector <29>

2
PR121

15

16

17

18

19

20

21
200K_0402_1%

255K_0402_1% High 13.277 PR114


1

100K_0402_5%
Low 10.770
PR124

100P_0402_50V8J
PR125 IADAPT

PC119

BATT

1
22K_0402_5% <39> IADAPT
8

1
2

1 2 5
P

+
PR127 7
41.2K_0402_1%

2
O
1

0_0402_5% 6 -
G

<22,29,32> ADP_PRES
PR131

PU102B
LM393DR_SO8

@0.1U_0603_25V7K
0.1U_0603_50V7K
SRSET <39>
4

1
2 1 CHGCTRL <29>

PC120
2VREF_51125

PC121
2

PR117 210K_0402_1%

2
1
PR118
PC122
1 2 Charge Detector 147K_0402_1%
1U_0603_6.3V6M
PR119

2
3 604K_0402_1% High 17.614 3
2

VIN VL Low 17.201 +3VL


0.1U_0402_10V7K

+3VL +3VL
PC124
76.8K_0402_1%
1

2
100K_0402_5%
1

PR133
PR123

22K_0402_1%
1

PR147
11K_0402_1% PU104 +5VALW
PR130
2

3
E
IADAPT 1 2 1
2

1
+IN
8

B PQ108

1U_0603_6.3V6M
2

1
PU102A MMBT3906_SOT23-3
3 5
P

+ C V+
O 1 2
10K_0603_0.1%

1
V-
1

PC128
2
220K_0402_5%

2
-
G

2
<29,32> AC_ADP_PRES PR122 4
PR120

PMC <29>
PR129

LM393DR_SO8 47K_0402_5% OUT


3
4

ACDET -IN
1 2
2

LMV321AS5X-G_SOT23-5
1

2
300K_0402_5%
CHGEN#

PR144
2VREF_51125 PR128 PD102
1

1K_0402_5% 1SS355_SOD323-2 D
CHGCTRL 1 2 2 1 2 1 2

49.9K_0402_1%
G PQ107
PR146

1
0.047U_0402_16V7K

S SSM3K7002FU_SC70-3 39.2K_0402_1%
3
470K_0402_5%

PR145
1

B+
PC123

PR132

12/2 For RF request


2

2
PC133 2200P_0402_50V7K

4 4
PC131 2200P_0402_50V7K

PC136 2200P_0402_50V7K

PC139 2200P_0402_50V7K
PC137 68P_0402_50V8J

PC140 68P_0402_50V8J
PC129 68P_0402_50V8J

PC134 68P_0402_50V8J

2
PC138 0.1U_0402_25V6
PC130 0.1U_0402_25V6

PC132 0.1U_0402_25V6

PC135 0.1U_0402_25V6
2

Security Classification Compal Secret Data Compal Electronics, Inc.


1

Issued Date 2007/05/29 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 32 of 40
A B C D
A B C D E

http://hobi-elektronika.net 2VREF_51125

1
PC300
1U_0603_16V7

2
1 1

PR300 PR301
13.7K_0402_1% 30.9K_0402_1%
+3VALWP 1 2 1 2 +5VALWP

SIS412DN-T1-GE3 1N POWERPAK1212-8
PR302 PR303
20K_0402_1% 20K_0402_1%
B++
1 2 1 2

B+ B++ +3VLP

ENTRIP2

ENTRIP1
PR304 PR305

2200P_0402_50V7K
PL300

4.7U_0805_25V6-K
105K_0402_1%

68P_0402_50V8J

0.1U_0402_25V6

4.7U_0805_25V6-K
115K_0402_1%
HCB2012KF-121T50_0805 1 2 1 2

SIS412DN-T1-GE3 1N POWERPAK1212-8
2

1
1 2
2200P_0402_50V7K

PC306

PC307
0.1U_0402_25V6

PC323

PC305
68P_0402_50V8J

4.7U_0805_25V6-K

PC308
1

2
5

5
2

1
PQ300
PC309
PC302

PC304

ENTRIP2

VREF

ENTRIP1
VFB2

TONSEL

VFB1
PC303

4.7U_0805_6.3V6K 25 P PAD
PC322
1

PQ301
4UG1_3V 7 VO2 VO1 24 4
2 8 23 PR307 PC311 2
VREG3 PGOOD 0_0402_5% 0.1U_0402_10V7K
PR306 0_0402_5%
PR308 1 2 1 2 BST_ 3V 9 22 BST_5V 1 2 1 2 PR309
1
2
3

3
2
1
0_0402_5% VBST2 VBST1 0_0402_5%
PL301 PC310 0.1U_0402_10V7K UG_3V 10 UG_5V PL302
1 2 DRVH2 PU300 DRVH1 21 1 2
4.7UH_FDVE0630-H-4R7M=P3_5.5A_20% 4.7UH_FDVE0630-H-4R7M=P3_5.5A_20%
LX_3V 11 TPS51125RGER QFN 24P LX_5V
+3VALWP 2 1 LL2 LL1 20 1 2 +5VALWP
LG_3V 12 19 LG_5V
AO4468L_SO8

DRVL2 DRVL1

5
6
7
8

1
SKIPSEL
8
7
6
5

IRF8707GTRPBF 1N SO8
PR316 PR311

VREG5

VCLK
604K_0402_1% +3VL @4.7_1206_5%

GND
1
PQ302

EN0
1

VIN
51125_PWR 1 2
PR310 +
1

2
@4.7_1206_5% PR312 4

13

14

15

16

17

18

1
PC312 + @499K_0402_1% PC313

PQ303
4

1
150U_B2_6.3VM_R45M 2 150U_B2_6.3VM_R45M
B+ 1 2 +5VLP
2

PR314
2 @100K_0402_5% PC315

100K_0402_1%

3
2
1

2
1

PC314 @680P_0603_50V8J
1
2
3

2
@680P_0603_50V8J
RPGOOD <14>
51125_PWR
2

1 +3VEXTLP

2VREF_51125
PR315
6 ENTRIP1

3 ENTRIP2

1
10U_0805_10V6K

10U_0805_10V6K
0.1U_0603_25V7K
3
+5VLP 3

2.2U_0805_10V6K
1
PC317
PU303

PC318
2

2
PC316

PC320
1 VIN
PQ304A PQ304B PR323

1
220K_0402_5%
2N7002KDWH-2N_SOT363-6 2N7002KDWH-2N_SOT363-6 PC319 5 64.9K_0402_1%

2
10U_0805_10V6K VOUT
2 5 2

2
GND

PR325
2
PJP300
(4.5A,180mils ,Via NO.= 9) 4
1

PR327 20K_0402_1%
FB
+5VALWP 1 2 +5VALW 3

2
EN

1
DEBUG_KBCRST
PAD-OPEN 4x4m P2

PR324 16.5K_0402_1%
PR317 APL5317
100K_0402_5% PJP301
(3A,120mils ,Via NO.= 6)
1 2 1 2 +5VLP PR326

255K_0402_1%
VL +3VALW

2
+3VALWP

1
470K_0402_5%

1
PR318 PU302

PR320
PAD-OPEN 4x4m

2
1

D 330K_0402_5% 1 +IN
PQ305 2 2 1 PJP302
SSM3K7002FU_SC70-3 G KBC_PWR_ON <29> 2 1 5
+3VLP +VREG_51125

2
V+
1

S 2
3

2
PAD-OPEN 2x2m V- PD304
PR331
PR321 4 1 2 2 1
OUT

1
11.5K_0402_1%
100K_0402_1% PJP303 3 680K_0402_5%
-IN

1
2 1 PC321 1SS355_SOD323-2

PR322
+5VLP VL
2

PAD-OPEN 2x2m 1U_0603_10V6K LMV321AS5X-G_SOT23-5


2

2
PJP304
2 1 +3VEXTLP 2 1 +3VL
4 DEBUG_KBCRST<28> 4

PD301 PAD-OPEN 2x2m


1SS355_SOD323-2
2 1
VCC1_PWRGD <29,39>
PD302
1SS355_SOD323-2 Security Classification Compal Secret Data Compal Electronics, Inc.
EN0 <32> Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 33 of 40
A B C D E
A B C D

http://hobi-elektronika.net
1 1

B+ PL401
HCB2012KF-121T50_0805
1 2 VCCP_B+

4.7U_0805_25V6-K

4.7U_0805_25V6-K
2200P_0402_50V7K

4.7U_0805_25V6-K
0.1U_0402_25V6
+3VS +VCCP
68P_0402_50V8J
2

10K_0402_5%

@10K_0402_5%
PR417

1
1 2
PC416
PC419

PC401

PC402

PC403

PC404

PR427

PR401
0_0603_5%
1

2
1 2 1 2
PR402

BST_VCCP
2.2_0603_5% PC405

DH_VCCP
2

LX_VCCP
0.22U_0603_10V7K
<30> +5VALW
VCCP_POK

0_0402_5%
1

DH_VCCP1

5
6
7
8
PR403
17

16

15

14

13
PU401

AO4474L_SO8
PR404
1 2

PHASE

BOOT
UG
GND

PGOOD
+6269_VCC

2
2.2_0603_5%
4

PQ401
1 VIN PVCC 12 1 2
+6269_VCC PC406
2.2U_0805_10V6K
(18A,720mils ,Via NO.= 36)
2.2U_0805_10V6K

3
2
1
2 11 DL_VCCP PL402
VCC LG 0.36UH 20% FDU1040J-H-R36M=P3 33A
1
PC407

2 PR405 1 2 +VCCP 2

0_0402_5%
1 2 3 10
2

FCCM PGND

330U_D2_2V_Y

330U_D2_2V_Y
5

1
1 1
PR408

AON6718L 1N DFN
2.2_1206_5% + +

PC409

PC410
1 2 4 9 SE_VCCP 1 2
<14,22,29,30,31,33> SLP_S3# EN ISEN
PR407
PR406
COMP

FSET
@0_0402_5% 8.06K_0402_1%

2
2 2

VO
FB
4
@0.1U_0402_10V7K

PQ402
1

2
1 2 ISL6269ACRZ-T_QFN16
<30> VCCP_EN
5

8
PR428 PC412
PC411

0_0402_5%
2

3
2
1

1
+VCCP 680P_0603_50V7K
FB_VCCP
25.5K_0402_1%

0.01U_0402_16V7K
1

1
PR409

49.9K_0402_1%
PR410
33P_0402_50V8J

PC413
2
1

2200P_0603_50V7K
PC414

2
2

1
PC415
2

3 3

1 2 1 2+VCCP
PR411 PR413
2.21K_0402_1% 10_0402_5%
1

PR412 1 2
2.94K_0402_1% VTT_SENSE <7>
PR414
@0.1U_0402_25V6

0_0402_5%
2

PC417
2

PJP401

+VCCP 1 2 +1.05VS

220U_B2_2.5VM_R25M
PAD-OPEN 4x4m

330U_D2_2V_Y
1 1
+ +

PC408

PC418
2 2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 34 of 40
A B C D
A B C D

+1.5VS_CPU_VDDQ
+1.5V 1

1
PR610
0_0805_5%
2

2
http://hobi-elektronika.net 1
PU601
VIN VCNTL 6 +5VALW
PR612

10U_0805_6.3V6M

10U_0805_6.3V6M
@0_0805_5% 2 GND NC 5
+1.5V

1U_0603_10V6K
1

1K_0402_1%
3 7

@1K_0402_1%
VREF NC

1
1

PR601
4 8

PR611
VOUT NC

PC601

PC602

PC603
1 1

2
9

2
+5VALW TP
G2992F1U_SO8

2
1

10K_0402_5%
PR602
+0.75VSP

0.1U_0402_10V7K

10U_0805_6.3V6M
SSM3K7002FU_SC70-3

1K_0402_1%
1
PD601 D

PR603
2

1
1SS355_SOD323-2 2
1 2 G

2
SSM3K7002FU_SC70-3

PC605
PC604
S

PQ601
<14,22,29,30,31,33>

2
1
D
1 2 2
SLP_S3# PR604 G

PQ602
.1U_0402_16V7K
20K_0402_1% S

3
1
PC606
2
2 2

PR605
0_0402_5%
1 2

@0.1U_0402_16V7K
2

1
316K_0402_1%

PC608
PR607

2
PR608
402K_0402_1% PU602
1

+1.8VSP 2 1 1 FB EN/SYNC 10
PC613 2 9 PL602
0.1U_0402_16V7K GND GND 1.2UH +-30% 1231AS-H-1R2N=P3 2.9A
PL601
1 2 3 SW SW 8 1 2 +1.8VSP
+5VALW HCB1608KF-121T30_0603
1 2 4 IN IN 7

22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_10V6K

10U_0805_10V6K
0.1U_0402_25V6

1 2 5 BS POK 6 1.8VS_POK

@B340A_SMA2
PR609 PR606
1

1
0_0402_5% 11 <30> 4.7_1206_5%
TP

2
PC611

PC610

PC609

PC615
MP2121DQ-LF-Z_QFN10_3X3

PC614
PD602
2

2
2

1
3 PC612 3

680P_0603_50V7K

2
PJP601
PJP602
+0.75VSP 1 2 +0.75VS (2A,80mils ,Via NO.= 4)
+1.8VSP 1 2 +1.8VS (1.5A,60mils ,Via NO.= 3)
PAD-OPEN 3x3m
PAD-OPEN 3x3m

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 35 of 40
A B C D
A B C D

http://hobi-elektronika.net
1 1

SIS412DN-T1-GE3 1N POWERPAK1212-8
PR801
0_0402_5% PL801
1 2 +1.5V_B+
<14,25> SLP_S4#
HCB1608KF-121T30_0603
1 2 B+

1
PC801

2200P_0402_50V7K

4.7U_0805_25V6-K
0.1U_0402_25V6
68P_0402_50V8J

4.7U_0805_25V6-K
@0.1U_0402_16V7K

1
PC813

PC802

PC803

PC804

PC805
PR802 PC806

2
5
2.2_0402_5% 0.1U_0402_10V7K

PQ801
BST_1.5V 1 2 1 2

15

14
1
PU801 4
PR803 PR804

EN/DEM

BOOT
NC
2 255K_0402_1% 0_0402_5% +1.5V 2

1 2 2 13 UG_1.5V 1 2 UG1_1.5V PL802


TON UGATE 2.2UH 20% FDVE0630-H-2R2M=P3 8.3A
+1.5V

3
2
1
PR806 1 2 3 12 LX_1.5V 1 2
316_0402_1% PR805 0_0402_5% VOUT PHASE
+5VALW 1 PR807 12.4K_0402_1%
+5VALW 2 4 11 1 2

IRFH3707TRPBF 1N PQFN
VDD CS

1
PR808 10K_0402_1%

220U_B2_2.5VM_R25M
1 2 5 10 +5VALW
FB VDDP

5
PR809
+1.5V 1

4.7U_0805_6.3V6K
1

1
6 9 LG_1.5V @4.7_1206_5%
PGOOD LGATE

1
PGND
PC807 PC808 +

GND
PR810 10K_0402_1%

2
1U_0603_10V6K 1 2 4.7U_0805_10V6K
2

PC810
PC809

PC811
2
1
@10P_0402_50V8J RT8209BGQW_WQFN14_3P5X3P5 2
4
7

8
1

PQ802
PC812
@680P_0603_50V8J

2
3
2
1
2

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/10/31 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 36 of 40
A B C D
8 7 6 5 4 3 2 1

H
http://hobi-elektronika.net H

+3VALW

PL201
HCB2012KF-121T50_0805

47K_0402_1%

@1K_0402_5%
2

1
1 2

PR201

PR202
CPU_B+ PL204
HCB2012KF-121T50_0805
PR203 0_0402_5% 1 2 B+

2
1 2
<12,14> VGATE
PR204 0_0402_5%

2200P_0402_50V7K
0.1U_0402_25V6

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

68U_25V_M_R0.36

68U_25V_M_R0.36
1 2
G <11> CLK_EN# G

68P_0402_50V8J
PR205 220_0402_5% 1 1

PC204

PC203
<14,29> PGD_IN

1
+ +

PC201

PC230

PC206

PC207

PC202
PC232
TPCA8030-H 1N SOP-ADV

PC205
1 2

+5VALW
PR206 @1K_0402_5%

2
5
2 2

PC208 2.2U_0603_10V6K

CPU_VREF
1 2

HGATE_CPU2 4

PR209 5.23K_0402_1%

PR213 0_0402_5%

PQ201
68P_0402_50V8J

PR210 249K_0402_1%

PR211 0_0402_5%
1

2
PR212 0_0402_5%
2

2
PL202

3
2
1
2

2
0.36UH 20% FDU1040J-H-R36M=P3 33A
PC209

Phase_CPU2 1 4 +CPU_CORE
1

1
2 3

4.7_1206_5%
TPCA8036-H 1N SOP-ADV
1

5
F CPU_CSP2-1 F

PR214
1

CPU_TONSEL 1

CPU_TRIPSEL

1
17.8K +-1% 0603
CPU_CLK_EN#

CPU_OSRSEL

PR215
CPU_PGOOD
CPU_DROOP

CPU_VR_ON
CPU_5VFILT

CPU_ISLEW
CPU_VREF

1 2

2
PC210 +5VALW PR216

CPU_SNB2
0.22U_0603_10V7K 4 69.8K_0402_1%

2
PQ203
1 2
PH201

680P_0402_50V7K
1SS355_SOD323-2
100K_0402_1%_TSM0B104F4251RZ

2
41

40

39

38

37

36

35

34

33

32

31

3
2
1
1 2 CPU_SN-2 1 2

PD201

1
PC211
1 2CPU_MODE PR217 28.7K_0402_1%
DROOP
VREF

V5FILT
GND

ISLEW

TONSEL

CLK_EN#
VR_ON

PGOOD

OSRSEL

TRIPSEL
PR219 0_0402_5%
1 2

2
PC215 33P_0402_50V8J 1 30 PC213
MODE DRVH2

CPU_CSN2
CPU_CSP2
PR220 470_0402_1% 1 2 0.033U_0402_16V7K
CPU_CSP2 2 1 CPU_CSP2-2 2 29 1 2 1 2
PC216 33P_0402_50V8J GND VBST2 PC214
PR218 2.2_0603_5%
1

PC212 1 2CPU_CSN2-1 3 28 0.22U_0603_10V7K


E CSP2 LL2 E
100P_0402_50V8J
PR221 470_0402_1% PC217 33P_0402_50V8J 4 27 LGATE_CPU2
2

CPU_CSN2 2 CSN2 DRVL2


1 1 2 +5VALW
CPU_CSN1-1 5 CSN1 V5IN 26 1 2
CPU_CSN1 2 1 PC218 4.7U_0603_10V6K
PR222 470_0402_1% PC219 33P_0402_50V8J 6 PU201 25
CSP1 PGND
1

1 2CPU_CSP1-2 TPS51621RHAR_QFN40_6X6 CPU_B+


PC220 LGATE_CPU1
7 GNDSNS DRVL1 24
100P_0402_50V8J
2

CPU_CSP1 2 1 CPU_GNDSNS 8 23 PHASE_CPU1


VSNS LL1
PR223 470_0402_1%

2200P_0402_50V7K
CPU_VSNS

68P_0402_50V8J

0.1U_0402_25V6

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
9 THERM VBST1 22 2 1 1 2
0_0402_5%

PC221
0_0402_5%

PR224 2.2_0603_5%
DPRSLPVR

0.22U_0603_10V7K

TPCA8030-H 1N SOP-ADV
CPU_THERM 10 VR_TT# DRVH1 21
1

1
PC233

PC222

PC223

PC231

PC224

PC225

PC226
5
IMON
2CPU_VR_TT#

1 2 +5VALW
VID6

VID5

VID4

VID3

VID2

VID1

VID0
PSI#
PR227 20K_0402_1%

2
PR229 68_0402_5%

PD202 1SS355_SOD323-2
PR225

PR226

D D
2

11

12

13

14

15

16

17

18

19

20
2

2
PR228 0_0402_5%

HGATE_CPU1 4

PQ205
PSI#_1
2 CPU_IMON
1

PL203

3
2
1
0.36UH 20% FDU1040J-H-R36M=P3 33A
1

0_0402_5%
0_0402_5%

1 4
2

4.7_1206_5%
CPU_CSP1-1 2 3

PR240
TPCA8036-H 1N SOP-ADV

1
17.8K +-1% 0603
+VCCP

<4>

PR241
H_PROCHOT#

PR230

PR267

1CPU_SNB1
<7> VSSSENSE

<7> VCCSENSE

2
PR242
<7> H_VID0
<7> H_VID5
<7> H_VID6

<7> H_VID2

<7> H_VID1
<7> H_VID4

<7> H_VID3
<7> PROC_DPRSLPVR

4 69.8K_0402_1%

2
680P_0402_50V7K
PQ207
1 2
C C
PH202
100K_0402_1%_TSM0B104F4251RZ
3
2
1

PC227
2
<7> PSI#

1 2CPU_SN-1 1 2
1

0.033U_0402_16V7K

PR245 28.7K_0402_1%
12.4K_0402_1%

1
@0_0402_5%

<7> IMVP_IMON
PR244

PC228
PR243

1 2
2

PC229
2

CPU_CSN1
CPU_CSP1
0.033U_0402_16V7K

+VCCP

H_VID0 2 1PR246 1K_0402_5% H_VID0 2 1PR247 @1K_0402_5%


VSSSENSE

H_VID1 2 1PR248 1K_0402_5% H_VID1 2 1PR249 @1K_0402_5%

H_VID2 2 1PR250 1K_0402_5% H_VID2 2 1PR251 @1K_0402_5%


B B
H_VID3 2 1PR252 @1K_0402_5% H_VID3 2 1PR253 1K_0402_5%

H_VID4 2 1PR254 @1K_0402_5% H_VID4 2 1PR255 1K_0402_5%

H_VID5 2 1PR256 1K_0402_5% H_VID5 2 1PR257 @1K_0402_5%

H_VID6 2 1PR258 @1K_0402_5% H_VID6 2 1PR259 1K_0402_5%


PR264 @0_0402_5%
PSI#_1 1 2 CPU_5VFILT PROC_DPRSLPVR 2 1PR260 1K_0402_5% PROC_DPRSLPVR 2 1PR261 @1K_0402_5%

PR265 @0_0402_5% PSI# 2 1PR262 @1K_0402_5% PSI# 2 1PR263 1K_0402_5%


CPU_CSN2-1 1 2

PR266 @0_0402_5%
CPU_CSP2-2 1 2

Arrandale
A A
SV VID(6-0): 0100111 Security Classification Compal Secret Data Compal Electronics, Inc.
LV VID(6-0): 0011111 Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title
ULV VID(6-0): 0010111 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 401860
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 37 of 40
8 7 6 5 4 3 2 1
5 4 3 2 1

http://hobi-elektronika.net
BQ24740VREF
VL

511K_0402_1%
1

1
C
ADP_PRES PQ1009

PR1000
2
B MMBT3904WH SOT323-3
E PR1067 PC1000

3
110K_0402_1% 0.1U_0603_16V7K

2
1 2 1 2
PR1013
10K_0402_1% PU1000 +5VS

0.01U_0402_16V7K
<33> IADAPT 1 2 1 +IN
D D
V+ 5
2 V-

PC1001
OUT 4
3

2
-IN

1
D

1
<33> ADP_PRES 2
G LMV321AS5X-G_SOT23-5

1
S PR1017

3
PQ1008 2K_0402_5%
@SSM3K7002FU_SC70-3 PR1018

2
105K_0402_1%

2
PD1001
1SS355_SOD323-2
+3VS
SRSET <33>

1
PR1022 PD1000 PR1028
<32> ADP_SIGNAL

1
1SS355_SOD323-2 100K_0402_5% C
100_0402_5%
PQ1005

D
1 2 3 1 2 1 1 2 2

2
PQ1003 B MMBT3904WH SOT323-3

3900P_0402_50V7K
1
3.9K_0402_5%
NDS0610_NL_SOT23-3 1 E

3
PR1019

PC1003
PR1025
2
10K_0402_5%
1 2OCP_A_IN OCP_A_IN <29>

1
2
PR1032

1
100_0402_5% 1 2 OCP# <15>
PR1020
C 0_0402_5% C
PD1003

1
GLZ4.7B_LL34-2 PR1033 @0_0402_1% D

2
1 2 2
<29> OCP G
VIN PR1034 200K_0402_1% S

80.6K_0402_1%

3
1
1 2 PQ1004

PR1031
SSM3K7002FU_SC70-3
1

68K_0402_5%
PR1030

PR1029

8
100K_0402_1% PR1035
1 2 3 10K_0402_5%

P
2

+
ADP_EN# <33> O 1 1 2 +3VS
2

0.01U_0402_16V7K
-

G
1

PU1001A

1
PR1040 LM393DR_SO8 <BOM Structure>

4
PC1004
33K_0402_5%
8.06K_0402_1%

2N7002KDW-2N_SOT363-6

2
1
2

3
1 2
PR1042

+3VL

PQ1007B
PR1027 100K_0402_1%

100K_0402_1%
4.7K_0402_5%

5 VCC1_PWRGD <29,34>
2

PR1026
1
PR1045

4
+3VL

2
1

E
8.66K_0402_1%
2

B
PR1046

B
2 B
C PQ1006
MMBT3906_SOT23-3
2

2N7002KDW-2N_SOT363-6

2 1 ADP_A_ID
6
PQ1007A

PD1004
45.3K_0402_1%
1

1SS355_SOD323-2
PR1059

2 ADP_EN <29>
1
2

PR1062
1M_0402_5%
2VREF_51125
1 2
+3VL
10K_0402_1% 130K_0402_1%
1

22K_0402_5%
1

VL
PR1063

PR1064
8
2

5
P

+
O 7 ADP_DET# <29>
1

6 -
G
PR1065

A PU1001B A
LM393DR_SO8
4
2

1 2ADP_A_ID ADP_A_ID <29>


PR1066
10K_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 38 of 40
5 4 3 2 1
5 4 3 2 1

http://hobi-elektronika.net

GFXVR_VID_0 <7>

GFXVR_VID_1 <7>

GFXVR_VID_2 <7>

GFXVR_VID_3 <7>

GFXVR_VID_4 <7>

GFXVR_VID_5 <7>

GFXVR_VID_6 <7>
GFXVR_EN <7>
D D

+GFX_CORE

PR701 @10K_0402_1%
1

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%
+5VALW

2
+GFX_B+ PL701

2
@0_0402_5%
HCB2012KF-121T50_0805

PR706
PR703

PR704

PR705

PR707

PR708

PR709

PR710

PR711
PR712 1 2 B+

2200P_0402_50V7K
10_0603_1%

4.7U_0805_25V6-K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
68P_0402_50V8J

0.1U_0402_25V6
1

1
+VCCP

PC703

PC704

PC705

PC706
PC720
GFX_EN

PC702
31 GFX_VID0

30 GFX_VID1

29 GFX_VID2

28 GFX_VID3

27 GFX_VID4

26 GFX_VID5

25 GFX_VID6
1

2
PR713

1
PR714 @300K_0402_1%

GFX_VCC

5
6
7
8
0_0402_5% PC701
1U_0805_25V6K

32
<7> GFXVR_IMON 1 2
2

AO4474L_SO8
VID0

VID1

VID2

VID3

VID4

VID5

VID6
EN
0.056U_0402_16V7K

6.98K_0402_1%

PQ701
24 PR716 PC709 4
VCC
1

PC708

2.2_0603_5% 0.22U_0603_25V7K
PR715
1000P_0402_50V7K

1 PWRGD
BST 23 GFX_BOOST 1 2GFX_BOOST-1 1 2
1

GFX_IMON 2
2

IMON GFX_DRVH PL702


22
PC710

3
2
1
DRVH .56UH +-20% ETQP4LR56 WFC 21A
3
2

CLKEN# GFX_SW
21 1 4
C 4
SW +GFX_CORE C
FBRTN

1
PVCC 20 +5VALW 2 3

5
1 2 GFX_FB 5 PU701
FB ADP3211AMNR2G_QFN32_5X5 GFX_DRVL PR717
19 2 1

AON6718L_DFN8-5
DRVL
1

PC711 PC713 GFX_COMP 6 4.7_1206_5%


220P_0402_50V7K 47P_0402_50V8J COMP PC712
18

2
GFX_VCC 7 PGND 2.2U_0603_10V6K
2

GPU

PQ702
1 2 1 2GFX_COMP-11 2 AGND 17 4

1
GFX_ILIM 8

CSCOMP
PR718 PR719 ILIM
PC714 33 PC715

CSREF
1K_0402_1% 20K_0402_1%
PR720 10.7K_0402_1%

AGND

RAMP

LLINE

CSFB
470P_0402_50V8J 680P_0603_50V7K

IREF

RPM

2
RT

3
2
1
9

10

11

12

13

14

15

16
2

GFX_IREF

GFX_CSCOMP

GFX_CSCOMP
GFX_RAMP

GFX_CSFB
GFX_RT
2 GFX_RPM
GFX_CSCOMP 1

237K_0402_1%

PR723 340K_0402_1%
PR721 80.6K_0402_1%

PH701 220K_0402_5%_ERTJ0EV224J~D
1 2
2

2
0_0402_5%

0_0402_5%

PR726 422K_0402_1%

PR727
2

PR722

71.5K_0402_1%
1

2 1
1

1
PR724

PR725

1
1

PR728
2

2
PC716 PC717 165K_0402_1%

2
1200P_0402_50V7K 680P_0402_50V7K

2
2 1
PR729
+GFX_B+ 2 1 GFX_RAMP-1 54.9K_0603_1%
PR731 100_0402_5%

PR730 1K_0402_1%
PR732 100_0402_5%

B B
2
2

<7> VSS_AXG_SENSE

<7> VCC_AXG_SENSE

PC718 PC719
1

1000P_0402_50V7K 1000P_0402_50V7K
1

2
+GFX_CORE

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 401860
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 39 of 40
5 4 3 2 1
5 4 3 2 1

http://hobi-elektronika.net
Version change list (P.I.R. List) Power section Page 1 of 1

Item Reason for change PG# Modify List Date Phase

1 Tune Loadline and transient response of GFX. P39 Change PR729 to 54.9k, PC716 to 1200pF, 01/27 SI
and PC717 to 680pF.
2 Tune Loadline and transient response of CPU. P37 Change PR209 to 5.23k. 01/27 SI
D D
3 Add boost resistance for RF team. P36 Change PR802 to 2.2ohm. 01/28 SI

4 Modify the throttling setting level and P38 Change PR1013 to 10k, PR1000 to 511k, 01/28 SI
action speed. PR1018 to 105k, and PC1000 to 0.1uF.

5 IN AC mode, the performance will reduce P38 Add PQ1008. 01/29 SI


through IADAPT without PQ1008.
6 OTP setting is setted same with other project. P31 Change PR5 to 53.6k and PR10 to 19.1k. 02/01 SI

7 330uF ESR=9mOhm can pass VCCP rippe spec. P34 Change PR408, PR409, and PR410 to 02/02 SI
330uF_9mOhm.
8 CPU thermal protection fine-tune. P31 Change PR10 to 21K from 19.1K 03/26 PV

9 For ULV CPU, need reserved some components. P37 Add PR264, PR265, PR266 locations which is 03/26 PV
reserved.

10 For CPU accuracy get better. P37 Change PR215 and PR241 to 0603 size 03/26 PV
and keep 17.8K

C C
11 For Electrical Noise Issue. P37 Add PC204, whcih is 68u 03/31 PV

11 For EMI request. P32 Add snabber, PR139 to 4.7ohm, PC126 to 1n 03/31 PV

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/03/10 Deciphered Date 2009/09/03 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401860
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 40 of <Page Count>
5 4 3 2 1
5 4 3 2 1

Version Change List ( P. I. R. List http://hobi-elektronika.net


) for HW Circuit
Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 1 28 Quick look/web 12/24 Compal The LED Status about Wireless/QuickLook3/ APP_BUTTON_1 APP_BUTTON_2 add 100k ohm pull 0.2 D

QuickWeb is abnormal . OTS#603778 high to +3VL


2 28 PWR LED 12/24 Compal PWR LED can't flash in S3. OTS#603774 Change STB_LED signal from KBC pin105 to pin115 0.2
3 22 WWAN 1/4 Compal the LED panel was auto turn on whhen plug in AC. correct the JWWAN1 pin24 power rail from 0.2
OTS#603786 +3VS to +3V_WWAN
4 23 Audio 1/5 Compal audio no functtion. OTS#603777 delet D16 0.2
5 22 WLAN 1/6 Compal Debug port 80 is not used delete signal of PCI_RST#,CLK_PCI_DEBUG, 0.2
LPC_LFRAME#,LPC_LAD3,2,1,0 and remove C1317, R270
6 11, 21 1/6 Compal resistance too small will impact the SMT line change R1457, R1458,R1027 from 0201 to 0402 0.2
yield rate
C 7 23 Audio 1/6 Compal PC_BEEP no sound in DOS mode. OTS#604314 install Q72 and change R1352 from 4.7K to 100K, 0.2 C

change C895 from 0.1U to 0.01U


8 30 DC-DC 1/11 Compal power down sequence havv problem with +5VS & change R1323 from 330K to 0 ohm 0.2
+3VS. (+5VS goes to low after +3VS)
9 14 GLAN 1/13 Compal System can't wake up from S3 & S5.OTS#605647 remove R1482 0.2
10 14 Transformer 1/14 Compal EMI noise Swap the signal of MID0 <-->3, MID1<-->2 to improve 0.2
the layout routing. (avoid the trace routing under the T)
11 9 Transformer 1/21 HP reserve memory thermal sensor by HP request reserve U59,R1496,R1497,C1338,R1495 0.2
12 24 Audio 1/28 HP for the mic detection comparator change R1202 from 120K to 47K 0.2
13 22 SPI 2/23 Compal For SPI ROM Recovery Reserve R1498, R1499, R1500, R1501, R1502 , R1503. 0.3
Add R1504 which is pull down to GND and connect to
B
14 14 CPU 2/24 Compal For CPU Type Detect 0.3 B

GPIO46.
15 22 SPI 3/12 Compal Can't power on with Intel's WLAN card. Change power pin +3VL from pin 47 to 51. 0.4
16 18 LCD 3/23 Compal For EMI's request add 0.1uF (C1339) on ENABLT to GND near R1122. 0.4

17 19 CRT 3/24 Compal For EMI's request Change C232, C233, C236 from 6.8pF to 18pF. 0.4
18 18 LCD 5/18 Compal Fine tune LED power on sequence. Change C676 to 0.22 uF and C682 to 2.2 uF. 0.5

19 18 LCD 5/24 Compal Panel will flash once before HP LOGO while Change R1120 from 10K to 100K Ohm. 0.5
cold boot the unit. OTS#625876

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/08/02 Deciphered Date 2009/09/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6161
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401860 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 29, 2010 Sheet 41 of 41
5 4 3 2 1

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