This is an example CV.

Name
Signal Processing Engineer

PROFILE
Result-oriented professional with 15+ years of comprehensive experience on Algorithm
development , design and development of firmware and software realized as embedded
signal processing ( Audio , Speech , Acoustic , Video and Image , Physical Layer ) and
packet processing ( L1/L2 data plane ) system.
Passionate traveler and loves to explore new historical places around the globe.

TOOL BOX
Tools MATLAB / FDA(Filter Design Automation / Voice Box/Image
processing Tool box /CCS
OS Windows and Linux
Programming Languages C/C+++, m-script, Assembly of various Embedded
Architectures (RISC /VLIW/SIMD).
Languages English (fluent in speech and writing), Bengali ( Native) , Hindi
( Speaking )

WORK EXPERIENCE
2016.01 - Till date Principal Engineer (Architect), HARMAN
INTERNATIONAL, Bangalore, India
Audio DSP (Digital Signal Processing) framework design and
implementation on complex SoC for Audio Amplifier in car
environment. Support and enhancement activities on Audio, Video,
Image processing algorithm of media server (MCU) to enable video
conferencing application.
Onsite Experience: Travelling to US for 1 month (Nov 2016),
Harman International.
Programming languages and tools: C/C++.

2015.04– 2016.01 Logic Fruit Technologies, R&D Engineer (Expert) ,

Gurgaon , India
Image processing algorithm (2D image stitching and blending of
100X100 images, Decovolution , Vigentt effect removal,
autofocusing) and software development for digital
pathology/Virtual Microscope application.
Video stitching, object detection and tracking using PTZ (pan–tilt–
zoom camera) camera for wide area video survellienace .
Programming languages and tools: Matlab /Open CV /C/C++/QT

2014.04 – 2015.03 Senior Architect, Videonetics Technologies, Kolkata ,

India
Conceptualize, Architect the audio analytic engine and software
design in C/C++.
Real time demonstration with OpenAL audio driver and GUI to
display audio event through socket.
Successful integration with existing ONVIF compliant (s-profile )
Video Management Software(VMS).
Programming languages and tools: Matlab/C/C++

2013.06 – 2014.02 DSP Algorithm Consultant, Rebaca Technologies,

Kolkata, India
Algorithm development of VQA (Voice Quality Assurance by
removing impairments: echoes, noise and speech level fluctuations,
howling and degradation due to low bit rate, network
impairments :packet reorder, packet loss, jitter), Speech codec
(G.729/G729.1) and Video algorithm (H.264 Baseline Profile/
scalable Video Coding , Scaling) for Desktop based Video
Conferencing application using FF-MPEG(it’s a software), IPP(Intel
Performance Primitives) and DirectShow framework. Developing
non-intrusive speech quality assessment tool (SNR estimate, PESQ
score, and enhanced modified bark scaled spectrum distortion) in
Matlab and C/C++.
Programming languages and tools: CC++, Matlab.

2012.05 – 2013.05 DSP Architect, DITECHNETWORKS/ Nuance

communication, Gurgaon, India
Algorithm development of VQA (Voice Quality Assurance by
removing impairments: echoes(AEC), noise (NR) and speech level
fluctuations(AGC) , and degradation due to low bit rate, Tandem due
to cascaded encoding and decoding, network impairments :packet
reorder, packet loss, jitter ) product for Ethernet Voice processor
(EVP) in the data center application. Worked on developing multi-
channel ITU-T Speech CODEC (G.729), the development of trans-
coding, partial encoding algorithm and integration of these
components with an RTP layer of platform realized on Multi-core
(x86_64:SIMD/ SSEx) platforms of ATCA .
Programming languages and tools: C/C++, Matlab

2011.07 – 2012.05 System Architect/Team Lead, Cornet Technology,

Chennai, India
Designing Priority Enforcing Edge Device (PEED) for secure
communication targeted for defense application. This device aims
to handle Ethernet traffic(16 GE) and TDM traffic (V.35 , E1)
as per predefined flow and policy table, sends concatenated
FEC adopted and compressed (ITU –V.44) traffic over low
bandwidth single wire line channel
(Either of these five options: Ethernet -100 Mbps, STM1, E1,
E3, V.35).
Defining SW specification’s and high level design of this system
which comprises of these modules :System software-Device
drivers/Interrupt scheduler, Packet Processing, data compression
and concatenated FEC, dynamic link adaptation, Link quality
monitoring and reporting, Generic Framing procedure (GFP-F –ITU-T:
G.7041) , L1 controller and L2 Framer driver for LAN and WAN
interfaces , TDMoIP etc.
Onsite: 3 months to
Programming languages and tools: C/C++
 EDUCATION
2010 - 2011 Nanyang Technological University, Singapore,
MS.
Graduated in 2011 - Masters of Science in Signal Processing.

1992-1997 The Institution of Engineers ( India ) , Kolkata ,BE ( AMIE –

ECE)
Graduated in 1998 – Bachelors of Engineering In Electronics and
Communication Engineering.

OTHER
Citizenship Indian
Year of Birth 1969
Publications Automated bank check processing realizable on a programmable
single DSP chip, International Signal Processing Conference (GSPx-
ISPC), Texas, March 31 - April 3, 2003
Low Cost Automotive Hands-free Speakerphone Solution on
Programmable Fixed Point DSP, International Signal Processing
Conference (ISPC-GSPx), Texas, March 31 - April 3, 2003
Efficient packet processing: Evaluation of data cache on Network
processor, Infineon Embedded Software Design (IESD) conference,
Sept 27-28,2007.
Advanced Course DSP Advance Algorithm, NSIT-NetaJi Subhas Institute of Technology, New Delhi, 2001, April-
2001, Nov
Driving License Indian License (Equivalent to B)