Session 0 PEMP VSD529

Introduction to

Field Reconfigurable Hardware Systems

Session Speaker :
Selva Kumar R.

© M.S Ramaiah School of Advanced Studies - Bangalore 1

 PEMP VSD529

Module Code:VSD529
Module Title: Field Reconfigurable Hardware Systems

Module start date : 4th October 2010

Module end date : 30th October 2010

Full Time: 2010 Batch

© M.S Ramaiah School of Advanced Studies - Bangalore 2

 Module Objectives PEMP VSD529

After undergoing this module, delegates will be able to:

• Describe the methodology involved in designing

reconfigurable hardware systems
• Develop efficient HDL coding for optimal hardware
realization of complex digital systems
• Design, implement and debug digital designs on
reconfigurable hardware with proper constraints for
achieving better area, timing and power
• Proficiently use industry standard CAD tools such as
Xilinx ISE, ChipScopePro and ModelSim to build and
verify reconfigurable hardware systems

© M.S Ramaiah School of Advanced Studies - Bangalore 3

 Module Syllabus PEMP VSD529

• Introduction
• RTL Coding for Synthesis
• Advanced Digital Design
• FPGA Architectures
• FPGA Implementation
• Constraints
• Distributed Arithmetic
• Image Compression Algorithms using FPGA
• FPGA Debugging and Advanced FPGA

© M.S Ramaiah School of Advanced Studies - Bangalore 4

 Teaching and Learning Methods PEMP VSD529

• Lecture Sessions
• Guest lectures
• Practical case studies
• Demos
• Lab session
• Homework/assignments

© M.S Ramaiah School of Advanced Studies - Bangalore 5

 Module Evaluation PEMP VSD529

• Examination: 50% Weightage

• Written Examination (60 marks)
– 3 questions to be answered out of 4 questions (each question
carries 20 marks)
• Lab exam (20 Marks)
• Presentation (20 Marks)
• Assignment: 50% Weightage
• Important Dates:
– Lab Exam Date : 20/10/2010
– Presentation Date : 22/10/2010
– Assignment submission Date : 30/10/2010

© M.S Ramaiah School of Advanced Studies - Bangalore 6

 Module Resources PEMP VSD529

• Module Notes
• Reference Books
– Philip R Moorby and Donald E.Thomas, “Verilog Hardware Description
Language”, 4th edition, Kluwer Academic Pubilshers, 1996
– Michael D. Ciletti, “Advanced Digital Design with the Verilog HDL”, 3rd edition,
Pearson Education, 2007
– Shivakumar S. and N. B. Balachander, ”Verilog FAQ”, Springer International,
2007
– Wayne Wolf, “FPGA Based System Design”, Kluwer Academic Pubilshers, 1992
– Ken Coffman, Real World FPGA Design with Verilog, Prentice Hall, 2000
– Stephen D. Brown, Robert J. Francis , Jonathan Rose and Zvonko G. Vranesic,
“Field-Programmable Gate Arrays”, Kluwer Academic Publishers, 1992
– R. Gajski, “Principles of Digital Design”, Prentice Hall, 1997
– Steven Kilts, “Advanced FPGA Design”, John Wiley & Sons, 2007
– Clive Max Filed, “The Design.Warriors Guide to FPGA”, Elsevier, 2004
– U. Meyer Baese, “Digital Signal Processing with Field Programmable Gate
Arrays”, Springer Publications, 2006
– Keshab K Parhi, “VLSI Digital Signal Processing Systems-Design and
Implementation”, John Wiley & Sons, 1999

© M.S Ramaiah School of Advanced Studies - Bangalore 7

 Module Resources PEMP VSD529

• Websites
– www.xilinx.com
– www.sunburst-design.com
– www.sutherland-hdl.com
– www.edu.com
– www.dsprelated.com
• Softwares
– Xilinx ISE 10.1
– ModelSim 6.3c
– Xilinx System Generator 10.1
– MATLAB R2007b
– ChipScopePro

© M.S Ramaiah School of Advanced Studies - Bangalore 8