1 2 3 4 5 6 7 8

MS01(915PM/GM+Gfx Block Diagram)

4Mx32bx2pcs
Clock Gen.
DDR Video-RAM CPU
PAGE 15,16 CK-410M
Dothan/Yonah (IDT-CV125/ X,TAL
A Panel Connector LVDS 14.318MHZ A

WSXGA+ nVIDIA ICS954206BG)

PAGE 13 NV44M
Processor TSSOP-56
Micro-FCBGA-478 PAGE 4
VGA CRT BGA-701 (Socket 479 Pin)
D-type-15p PAGE 10,11,12,13,14
PAGE 13 PAGE 2,3 SO-DIMM 0
FSB 333 MHZ
Ext. Mic In 533 MHZ
Jack DDR
(4.3GB/S)
PCIE X16 200 pin
HEAD PAGE 18
PHONE LVDS North Bridge
JACK CRT Alviso(915PM/GM) 333 MHZ SO-DIMM 1
LM4863
Amplifier PCBGA 1257 333 MHZ 333 MHZ
Int. Speaker ALC260
Codec 4X133MHZ DDR
1.0 Walt x 2 TSSOP-20
B
PAGE 29
LQFP-48 PAGE 5,6,7,8,9
200 pin B
CRT PAGE 29 PAGE 18
Line in / Line out / SPDIF
USB 2.0
MDC 1.5 CONN.X3
RJ11 Modem DMI USB 2.0 X 3
12 pin (Direct Media Interface) PAGE 23
PAGE 23 AZALIA
PCMCIA
Conn. 33MHZ, 3.3V PCI BUS South Bridge PATA HDD
PAGE 24 (Master)
TI PCI7420B ICH6-M PAGE 22
Port CardBus MINI-PCI BGA 609
MS PRO/DUO IDE ATA 100
Replicator CardReader TYPE IIIB PATA ODD
Connector PAGE 25 i.LINK PAGE 27 (Slave)
PAGE 19,20,21
PAGE 22
C C

i.LINK
GHK 288 LPC Thermal Sensor
PAGE 24,25 F75384S
PAGE 25 INTEL LAN PHY SMB Channel 1 (CPU/Alviso)
82562ET ENE KB3910
Magnetics SWITCH 10/100M SO-8
RJ45
Pluse H0068 PI3L110Q SSOP-48
EC+KBC PAGE 4

PAGE 28 PAGE 28 PAGE 28 LQFP-176 Thermal Sensor

Ethernet F75383M
USB 2.0 X 3 SMB Channel 2 (VGA)
PAGE 30
uSOP8
PAGE 23 PAGE 14
XBUS
PS/2 Thermal Sensor
LM75BIM-3
BOM configuration (DDR)
D
FAN for FAN for Lid Switch Int. K/B(89Keys) Power Flash BIOS BATT CONN. D
SO-8
Symbol ahead of value for VGA CPU & LED & 2 X Quick Keys Button 1MB PAGE 32 PAGE 17
NC components Touchpad
PAGE 23 PAGE 23 PAGE 30 PAGE 30 PAGE 30 PAGE 30 PAGE 30
NC_ HON HAI PRECISION IND. CO., LTD.
BOTH FOXCONN
Title
CPBG - R&D Division
915GM + AL_
NV44M MS01 Block Diagram
Size Document Number Rev
915GM NV_ Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 1 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

U30A

5 H_A#[31..3] H_D#[63..0] 5
H_A#3 P4 A19 H_D#0
H_A#4 A3# D0# H_D#1
U4 A25
H_A#5
H_A#6
V3
A4#
A5#
Dothan D1#
D2# A22 H_D#2
H_D#3
R3 A6# D3# B21
H_A#7 V2 A24 H_D#4
H_A#8 A7# D4# H_D#5
H_A#9
W1
T4
A8# 1 OF 3 D5# B26
A21 H_D#6
H_A#10 A9# D6# H_D#7
W2 A10# D7# B20
H_A#11 Y4 C20 H_D#8
H_A#12 A11# D8# H_D#9
A Y1 A12# D9# B24 A
H_A#13 U1 D24 H_D#10
H_A#14 A13# D10# H_D#11
AA3 A14# D11# E24
H_A#15 Y3 C26 H_D#12
H_A#16 A15# D12# H_D#13
AA2 A16# D13# B23
H_A#17 AF4 E23 H_D#14
H_A#18 A17# D14# H_D#15
AC4 A18# D15# C25
H_A#19 AC7 H23 H_D#16
H_A#20 A19# D16# H_D#17
AC3 A20# D17# G25
H_A#21 AD3 L23 H_D#18
H_A#22 A21# D18# H_D#19
AE4 A22# D19# M26
H_A#23 AD2 H24 H_D#20
H_A#24 A23# D20# H_D#21
AB4 A24# D21# F25
H_A#25 AC6 REQUEST DATA G24 H_D#22
H_A#26 A25# D22# H_D#23 +ECVCC
AD5 A26# PHASE PHASE D23# J23
H_A#27 AE2 SIGNALS SIGNALS M23 H_D#24
H_A#28 A27# D24# H_D#25
AD6 A28# D25# J25
H_A#29 AF3 L26 H_D#26
H_A#30 A29# D26# H_D#27 R447
AE1 A30# D27# N24
H_A#31 AF1 M25 H_D#28
A31# D28# H_D#29 8.2K
D29# H26
N25 H_D#30
D30# H_D#31
D31# K25 H_PROCHOT# 30
H_ADSTB#0 U3 Y26 H_D#32
5 H_ADSTB#0 ADSTB0# D32#
H_ADSTB#1 AE5 AA24 H_D#33 +VCCP
5 H_ADSTB#1 ADSTB1# D33#
T25 H_D#34 +VCCP
D34# H_D#35
5 H_REQ#[4..0] D35# U23

3
H_REQ#0 R2 V23 H_D#36 Q26
H_REQ#1 REQ0# D36# H_D#37 R444 NC_MMBT3904
P3 REQ1# D37# R24 1
H_REQ#2 T2 R26 H_D#38 56
H_REQ#3 REQ2# D38# H_D#39 R441 NC_2.2K
P1 REQ3# D39# R23
B H_REQ#4 H_D#40

2
T1 AA23 B
REQ4# D40# H_D#41 PROCHOT#
D41# U26
V24 H_D#42
H_ADS# ERROR D42# H_D#43
5 H_ADS# N2 ADS# D43# U25
+VCCP SIGNALS V26 H_D#44
D44# H_D#45
D45# Y23
R428 56 AA26 H_D#46
H_IERR# H_IERR# D46# H_D#47
A4 IERR# D47# Y25
AB25 H_D#48 +ECVCC
R142 150 H_BREQ#0 D48# H_D#49
Place near 5 H_BREQ#0 N4 BREQ0# D49# AC23
XDP_TDI H_BPRI# J3 ARBITRATION AB24 H_D#50
CPU. 5 H_BPRI#
H_BNR# L1
BPRI#
PHASE
D50#
AC20 H_D#51
5 H_BNR# BNR# D51#
R135 39 H_LOCK# J2 SIGNALS AC22 H_D#52 R322
5 H_LOCK# LOCK# D52#
XDP_TMS AC25 H_D#53
H_HIT# D53# H_D#54 47K
5 H_HIT# K3 HIT# D54# AD23
R420 200/F H_HITM# K4 SNOOP PHASE AE22 H_D#55
5 H_HITM# HITM# D55#
H_PWRGD H_DEFER# L4 SIGNALS AF23 H_D#56 THERMTRIP1#
5 H_DEFER# DEFER# D56# THERMTRIP1# 30,33
AD24 H_D#57
R438 NC_54.9/F XDP_BPM#0 D57# H_D#58
T21 PAD C8 BPM0# D58# AF20
XDP_TDO T158 PAD XDP_BPM#1 B8 RESPONSE AE21 H_D#59
BPM1# D59#

3
T157 PAD XDP_BPM#2 A9 PHASE AD21 H_D#60
R436 NC_54.9/F XDP_BPM#3 BPM2# D60# H_D#61 Q27 C478
T160 PAD C9 BPM3# SIGNALS D61# AF25
H_CPURST# H_TRDY# M3 AF22 H_D#62 0.1U/16V
5 H_TRDY# TRDY# D62#
H1 AF26 H_D#63 1
5 H_RS#[2..0] RS0# D63# 6,10,19,22,30 PLT_RST#
H_RS#0 K1
H_RS#1 RS1#
L2 RS2#
H_RS#2
H_A20M# C2 C23 H_DSTBN#0 2N7002
19 H_A20M# A20M# DSTBN0# H_DSTBN#0 5
H_FERR# PC C22 H_DSTBP#0

2
19 H_FERR# D3 FERR# DSTBP0# H_DSTBP#0 5
H_IGNNE# A3 COMPATIBILITY K24 H_DSTBN#1 +VCCP
19 H_IGNNE# IGNNE# DSTBN1# H_DSTBN#1 5

3
H_PWRGD E4 SIGNALS L24 H_DSTBP#1 Q28
C 19 H_PWRGD PWRGOOD DSTBP1# H_DSTBP#1 5 C
H_SMI# B4 W25 H_DSTBN#2 1 MMBT3904
19 H_SMI# SMI# DSTBN2# H_DSTBN#2 5
DSTBP2# W24 H_DSTBP#2 H_DSTBP#2 5
XDP_TCK A13 AE24 H_DSTBN#3 R503 2.2K
TCK DSTBN3# H_DSTBN#3 5
XDP_TDO DIAGNOSTIC AE25 H_DSTBP#3

2
A12 TDO DSTBP3# H_DSTBP#3 5
XDP_TDI C12 & TEST PM_THRMTRIP#
R146 27.4/F XDP_TMS TDI
C11 TMS SIGNALS
XDP_TCK XDP_TRST# B13 D25 H_DINV#0
CLK_XDP_BCLK A16 TRST# DINV0# H_DINV#0 5
4 CLK_XDP_BCLK ITP_CLK0 DINV1# J26 H_DINV#1 H_DINV#1 5
R144 680 CLK_XDP_BCLK# A15 T24 H_DINV#2
4 CLK_XDP_BCLK# XDP_BPM#5 ITP_CLK1 DINV2# H_DINV#2 5
XDP_TRST# T25 PAD B10 AD20H_DINV#3
PREQ# DINV3# H_DINV#3 5
T159 PAD XDP_BPM#4 A10 PRDY# H_DBSY#
20 PM_SYSRST# A7 DBR# DBSY# M2 H_DBSY# 5
H2 H_DRDY#
DRDY# H_DRDY# 5
H_INTR D1
19 H_INTR LINT0
H_NMI D4 EXECUTION
19 H_NMI LINT1
H_STPCLK# C6 CONTROL B14 CLK_CPU_BCLK#
19 H_STPCLK# STPCLK# BCLK1 CLK_CPU_BCLK# 4
H_CPUSLP# A6 SIGNALS B15 CLK_CPU_BCLK
5,19 H_CPUSLP# SLP# BCLK0 CLK_CPU_BCLK 4
H_DPSLP# B7
19 H_DPSLP# DPSLP#
H_DPRSTP# G1
19 H_DPRSTP# DPRSTP#
H_THERMDA B18 B5 H_INIT#
4 H_THERMDA THERMDA INIT# H_INIT# 19
H_THERMDC A18
4 H_THERMDC THERMDC
PM_THRMTRIP# RESET# B11 H_CPURST# H_CPURST# 5
PM_THRMTRIP# C17
should connect to 6,19 PM_THRMTRIP# THERMTRIP# THERMAL DIODE C19 H_DPWR#
DPWR# H_DPWR# 5
ICH6-M and ALVISO PROCHOT# B17 PROCHOT#
without T-ing (No
stub) Dothan Processor

D D

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division

DOTHAN (HOST BUS) 1/2

Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 2 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

COMP0
COMP1
COMP2
COMP3 U30B
Place pulldown resistors +VCCP

R468 R467 R103 R99 within 0.5" of COMP pins COMP0 P25 A2
27.4/F 54.9/F 27.4/F 54.9/F COMP1 COMP0 VSS00
P26 COMP1 VSS01 A5
R181 COMP2 AB2 A8
1K/F COMP3 COMP2 VSS02
AB1 COMP3 VSS03 A11
A14
A
H_GTLREF
Dothan VSS04
VSS05 A17 +VCCP
U30C A
AD26 GTLREF0 VSS06 A20
Max Length 0.5 inch 2 OF 3 VSS07 A23
TEST1 A26 W23
TEST2 R180 TEST1 VSS08 VSS120
C5 TEST1 VSS09 B3 D10 VCCP0 VSS121 W26
2K/F TEST2 F23 B6 D12 Y2
TEST2 VSS10 VCCP1 VSS122
VSS11 B9 D14 VCCP2 VSS123 Y5
VSS12 B12 D16 VCCP3 VSS124 Y21
R116 R170 T155PAD TP_CPU_NC1 B2 B16 E11 Y24
NC_1K NC_1K
T11 PAD TP_NC_2
NC1 VSS13
VSS14 B19 E13
VCCP4
VCCP5
Dothan VSS125
VSS126 AA1
C3 RSVD2 VSS15 B22 E15 VCCP6 VSS127 AA4
T153PAD TP_NC_3
T152PAD TP_NC_4
AF7
AC1
RSVD3 POWER, VSS16 B25
C1
F10
F12
VCCP7 3 OF 3 VSS128 AA6
AA8
+1_5VRUN TP_NC_5 RSVD4 VSS17 VCCP8 VSS129
T169 PAD E26 RSVD5 GROUND, VSS18 C4 F14 VCCP9 VSS130 AA10
RESERVED VSS19 C7 F16 VCCP10 VSS131 AA12
1

C681 C692 C10 K6 POWER, GROUND AND NC AA14

TP_VCCA3 SIGNALS VSS20 VCCP11 VSS132
T167 PAD AC26 VCCA3 VSS21 C13 L5 VCCP12 VSS133 AA16
0.01U/16V 10U/6.3V_0805 T3 PAD TP_VCCA2 N1 C15 L21 AA18
TP_VCCA1 VCCA2 VSS22 VCCP13 VSS134
2

T154 PAD B1 VCCA1 VSS23 C18 M6 VCCP14 VSS135 AA20

+1_5VRUN F26 VCCA0 VSS24 C21 M22 VCCP15 VSS136 AA22
VSS25 C24 N5 VCCP16 VSS137 AA25
VHCORE D2 N21 AB3
VSS26 VCCP17 VSS138
VSS27 D5 P6 VCCP18 VSS139 AB5
VHCORE VHCORE D6 D7 P22 AB7
VCC00 VSS28 VCCP19 VSS140
D8 VCC01 VSS29 D9 R5 VCCP20 VSS141 AB9
D18 VCC02 VSS30 D11 R21 VCCP21 VSS142 AB11
D20 VCC03 VSS31 D13 T6 VCCP22 VSS143 AB13
1

1
C190 C187 C194 C221 C612 C676 C191 C255 C251 C182 D22 D15 T22 AB15
VCC04 VSS32 VCCP23 VSS144
E5 VCC05 VSS33 D17 U21 VCCP24 VSS145 AB17
10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 E7 D19 AB19
VCC06 VSS34 VSS146
2

2
E9 VCC07 VSS35 D21 P23 VCCQ0 VSS147 AB21
B E17 D23 W4 AB23 B
VCC08 VSS36 VCCQ1 VSS148
E19 VCC09 VSS37 D26 VSS149 AB26
VHCORE VHCORE E21 E3 AC2
VCC10 VSS38 H_VID0 R88 0 VSS150
F6 VCC11 VSS39 E6 35 H_VID0 E2 VID0 VSS151 AC5
F8 E8 H_VID1 R87 0 F2 AC8
VCC12 VSS40 35 H_VID1 VID1 VSS152
F18 E10 H_VID2 R86 0 F3 AC10
VCC13 VSS41 35 H_VID2 VID2 VSS153
1

1
C220 C177 C249 C170 C631 C252 C213 C241 C137 C181 H_VID3 R85 0
F20
F22
VCC14
VCC15
VSS42
VSS43
E12
E14
35
35
H_VID3
H_VID4
H_VID4 R84 0
G3
G4
VID3
VID4
VID VSS154
VSS155
AC12
AC14
10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 G5 E16 H_VID5 R83 0 H4 AC16
VCC16 VSS44 35 H_VID5 VID5 VSS156
2

2
G21 VCC17 VSS45 E18 Same VSS157 AC18
H6 VCC18 VSS46 E20 Length VSS158 AC21
H22 VCC19 VSS47 E22 VSS159 AC24
VHCORE VHCORE J5 E25 R633 NC_54.9/F AD1
VCC20 VSS48 VCCSENSE AE7 VSS160
J21 VCC21 VSS49 F1 VCCSENSE VSS161 AD4
K22 F4 VSSSENSE AF6 AD7
VCC22 VSS50 VSSSENSE VSS162
U5 VCC23 VSS51 F5 VSS163 AD9
1

1
C123 C152 C178 C112 C169 C155 C254 C156 C138 C628 V6 F7 R634 NC_54.9/F AD11
VCC24 VSS52 R442 0 VSS164
V22 VCC25 VSS53 F9 VSS165 AD13
10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 W5 F11 C16 AD15
VCC26 VSS54 4,6 CPU_BSEL0 BSEL0 VSS166
2

2
W21 VCC27 VSS55 F13 4,6 CPU_BSEL1 C14 BSEL1 VSS167 AD17
Y6 VCC28 VSS56 F15 VSS168 AD19
Y22 F17 R440 0 AD22
VHCORE VCC29 VSS57 PSI# VSS169
AA5 VCC30 VSS58 F19 35 PSI# E1 PSI VSS170 AD25
AA7 VCC31 VSS59 F21 VSS171 AE3
AA9 F24 R6 AE6
Total caps = 2633 uF AA11
VCC32
VCC33
VSS60
VSS61 G2 R22
VSS100
VSS101
VSS172
VSS173 AE8
1

C189 C216 C614 C139 C675 AA13 G6 R25 AE10

VCC34 VSS62 VSS102 VSS174
AA15 G22 T3 AE12
10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805 ESR = 15m ohm/5 // 5m ohm/25 // 5m ohm/15 AA17
VCC35
VCC36
VSS63
VSS64 G23 T5
VSS103
VSS104
VSS175
VSS176 AE14
2

AA19 VCC37 VSS65 G26 T21 VSS105 VSS177 AE16

AA21 VCC38 VSS66 H3 T23 VSS106 VSS178 AE18
C C
AB6 VCC39 VSS67 H5 T26 VSS107 VSS179 AE20
AB8 VCC40 VSS68 H21 U2 VSS108 VSS180 AE23
AB10 VCC41 VSS69 H25 U6 VSS109 VSS181 AE26
AB12 VCC42 VSS70 J1 U22 VSS110 VSS182 AF2
AB14 VCC43 VSS71 J4 U24 VSS111 VSS183 AF5
AB16 VCC44 VSS72 J6 V1 VSS112 VSS184 AF9
AB18 VCC45 VSS73 J22 V4 VSS113 VSS185 AF11
AB20 VCC46 VSS74 J24 V5 VSS114 VSS186 AF13
AB22 VCC47 VSS75 K2 V21 VSS115 VSS187 AF15
AC9 VCC48 VSS76 K5 V25 VSS116 VSS188 AF17
AC11 VCC49 VSS77 K21 W3 VSS117 VSS189 AF19
AC13 VCC50 VSS78 K23 W6 VSS118 VSS190 AF21
AC15 VCC51 VSS79 K26 W22 VSS119 VSS191 AF24
AC17 VCC52 VSS80 L3
AC19 VCC53 VSS81 L6
AD8 VCC54 VSS82 L22
AD10 L25 Dothan Processor
VCC55 VSS83
AD12 VCC56 VSS84 M1
AD14 VCC57 VSS85 M4
AD16 VCC58 VSS86 M5
AD18 VCC59 VSS87 M21
AE9 VCC60 VSS88 M24
AE11 VCC61 VSS89 N3
AE13 VCC62 VSS90 N6
AE15 VCC63 VSS91 N22
AE17 VCC64 VSS92 N23
AE19 VCC65 VSS93 N26
AF8 VCC66 VSS94 P2
AF10 VCC67 VSS95 P5
AF12 VCC68 VSS96 P21
D AF14 VCC69 VSS97 P24 D
AF16 VCC70 VSS98 R1
AF18 VCC71 VSS99 R4
+VCCP
+VCCP

Dothan Processor HON HAI PRECISION IND. CO., LTD.

FOXCONN CPBG - R&D Division
1

C143 C217 C242 C114 C144 C113 C142 C218 C248 C219
+ C707 Title
0.1U/50V_0603 0.1U/50V_0603 0.1U/50V_0603 0.1U/50V_0603 0.1U/50V_0603 150U/10V_7343 0.1U/50V_0603 0.1U/50V_0603 0.1U/50V_0603 0.1U/50V_0603 0.1U/50V_0603 DOTHAN (POWER/GROUND) 2/2
2

Size Document Number Rev

2

Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 3 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

FSC FSB FSA CPU SRC PCI +V3.3S_CLKVDD

1 0 1 100 100 33
0 0 1 133 100 33 +3VRUN

0 1 1 166 100 33 R182

0 1 0 200 100 33 2.2/F

L13
0 0 0 266 100 33 R_+V3.3S_CLKVDD 1 2
HCB2012K-121T30
1 0 0 333 100 33
A 1 1 0 400 100 33 A

1
C260 C261 C258 C259 C265 C256 C257
1 1 1 RSVD 100 33 0.047U/10V 10U/16V_1206 0.047U/10V 0.047U/10V 0.047U/10V 0.047U/10V 10U/16V_1206

2
L14
L_+3VRUN_410M 1 2
HCB2012K-121T30

L5030-14.318MHZ/+-30ppm/20pF
Placed within

1
C266 C268
Y4
500mils of Y1

1
R207 C274 C270 C710
1 2 2.2/F 0.047U/10V 10U/16V_1206
R474 0.047U/10V 0.047U/10V 10U/16V_1206

2
U33

1
2.2/F

2
21 11 CLK_XDP_BCLK R460 NC_49.9/F

VDD_PCI1

VDD_PCI0
VDD_SRC0 VDD_48

1
C705 C704 C695 CLK_XDP_BCLK# R458 NC_49.9/F
28 VDD_SRC1
34 48 1 2 CLK_MCH_BCLK R465 49.9/F
+3VRUN 33P 33P VDD_SRC2 VDD_REF CLK_MCH_BCLK# R463 49.9/F
0.047U/10V CLK_CPU_BCLK R471 49.9/F

2
42 VDD_CPU
55 CLK_CPU_BCLK# R469 49.9/F
PCI_STOP# PM_STPPCI# 20
37 54 CLK_MCH_3GPLL R457 49.9/F
VDD_A CPU_STOP# STP_CPU# 20,35
R646 CLK_MCH_3GPLL# R455 49.9/F
R206 124 38
10K VSS_A
Length as short CPU1 41 CPU1 3 2 RP73 CLK_MCH_BCLK 5 Alviso Chip
as possible. 40 CPU#1 4 1 CLK_MCH_BCLK# 5
CLK_PCIE_ICH R459 49.9/F
CPU1# 4P2R-S-33 HOST CLK_PCIE_ICH# R456 49.9/F
R473 12.1/F U2_XTALIN 50 XTAL_IN
24 CLK_CB48 CPU0 44 CPU0 3 2 RP75 CLK_CPU_BCLK 2
U2_XTALOUT 43 CPU#0
R472 12.1/F
49 XTAL_OUT CPU0# 4 1
4P2R-S-33
CLK_CPU_BCLK# 2 CPU +1_5VRUN CLK_PCIE_PEG R462 NV_49.9/F
B SELPSB0_CLK 12 CLK_PCIE_PEG# R461 NV_49.9/F B
20 CLK_USB48 FSA/USB_48
CPU_2_ITP/SRC_7 36 R_CLK_XDP_BCLK 3 2 RP71 CLK_XDP_BCLK 2
R184 NV_0 DREFCLK R470 AL_49.9/F
CPU_BSEL1 16 35 R_CLK_XDP_BCLK# 4 1 DREFCLK# R466 NV_0
3,6 CPU_BSEL1 FSB_TEST_MODE CPU2_ITP/SRC7# CLK_XDP_BCLK# 2
NC_4P2R-S-33 R210 NV_0 DREFSSCLK R185 AL_49.9/F
R624 0 R_CPU_BSEL0 53 DREFSSCLK# R183 NV_0
3,6 CPU_BSEL0 FSC/TEST_SEL
SRC6 33 3 2 RP79
R479 33 R_CLK_KBCPCI 5 32 4 1 DREFCLK# R631 AL_49.9/F
30 CLK_KBCPCI PCI5 SRC6# NC_4P2R-S-10K DREFSSCLK# R632 AL_49.9/F
R481 33 R_PCLK_MINI 4
27 PCLK_MINI PCI4
SRC5 31 PCIE5 3 2 RP68 CLK_MCH_3GPLL 6
R482 33 R_PCLK_CB 30 PCIE#5 For NV44M & Alviso option
24 PCLK_CB 3 PCI3 SRC5# 4 1
4P2R-S-33
CLK_MCH_3GPLL# 6 Alviso Chip
R485 33 R_PCLK_FWH 56 R_CLK_KBCPCI R626 NC_10K
30 PCLK_FWH PCI2
26 PAD T162 R_PCLK_MINI R627 NC_10K
R475 33 R_CLK_ICHPCI SRC4
19 CLK_ICHPCI 9 PCIF1 SRC4# 27 PAD T161
+3VRUN R209 10K
R_PCLK_JIG 8
30 PCLK_JIG PCIF0/ITP_EN
R477 33 24 R_CLK_PCIE_ICH 4 1 RP69
SMB_CLK_RUN 46
SRC3
25 R_CLK_PCIE_ICH# 3 2
CLK_PCIE_ICH 20 ICH6
17,20 SMB_CLK_RUN SCLOCK SRC3# CLK_PCIE_ICH# 20 DMI
4P2R-S-33
SMB_DATA_RUN 47
17,20 SMB_DATA_RUN SDATA
1

C706 C694 C693 C700 C701 C702 C696 C698 22 R_CLK_PCIE_PEG 4 1 RP70
39
SRC2
23 R_CLK_PCIE_PEG# 3 2
CLK_PCIE_PEG 10 Graphic
IREF SRC2# CLK_PCIE_PEG# 10 NV44M
NC_10P NC_10P NC_10P NC_10P NV_4P2R-S-33
2

13 VSS_48 PAD T166

NC_10P NC_10P NC_10P NC_10P 29 19 PAD T165
VSS_SRC SRC1
45 VSS_CPU SRC1# 20 1 4 RP80 CLK_NV27 14
2 VSS_PCI0 2 3 CLK_NVSS27 14
6 NC_4P2R-S-33
R625 R464 VSS_PCI1
51 VSS_REF SRC0 17 R_DREFSSCLK 4 1 RP72 DREFSSCLK 6
NC_10K 475/F 18 R_DREFSSCLK#
C SRC0# 3 2
AL_4P2R-S-33
DREFSSCLK# 6 ALVISO SSCK C

DOT96 14 DOT96 4 1 RP74 DREFCLK 6

DOT96# 15 DOT96# 3 2 DREFCLK# 6
AL_4P2R-S-33
VTT_PWRGD#/PD 10 CLK_EN# CLK_EN# 30,35

REF 52 R_CLK_ICH14 R478 12.1/F

CLK_ICH14 20

IDTCV125 / ICS954206BG

1
C699
SM bus Address :
NC_10P
1101001 (ICH6)

2
For clock generator +3VRUN +3VRUN

+3VRUN +3VRUN +3VRUN

2 H_THERMDA
SM bus Address :
1001101(EC)
For F75384S R448 R450 R449
1

C672 4.7K 10K 10K

2200P/50V R454
4.7K U32
2

2 DXP SMBCLK 8 SMB_THRM_CLK 14,17,30

D 2 H_THERMDC 3 DXN SMBDATA 7 SMB_THRM_DATA 14,17,30 D

20,30 OVT_EC# 4 THERM# ALERT# 6 PM_THRM# 30

R453 0 1 5
VCC GND
HON HAI PRECISION IND. CO., LTD.
C655
0.1U/16V
F75384S
FOXCONN
Title
CPBG - R&D Division
CLOCK GEN(CK-410M)
Place Thermal-Sensor Size Document Number Rev
near CPU & GMCH. Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 4 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

H_D#[63..0]
2 H_D#[63..0] U34A
H_XRCOMP T/S = 10/20mil H_A#[3..31] 2
H_D#0 E4 G9 H_A#3
H_D#1 HD0# HA3# H_A#4
E1 HD1# HA4# C9
R480 H_D#2 F4 E9 H_A#5
H_D#3 HD2# HA5# H_A#6
A 24.9/F H7 HD3# HA6# B7 A
H_D#4 E2 A10 H_A#7
H_D#5 HD4# HA7# H_A#8
F1 HD5# HA8# F9
H_D#6 E3 D8 H_A#9
H_D#7 HD6# HA9# H_A#10
D3 HD7# HA10# B10
H_D#8 K7 E10 H_A#11
H_D#9 HD8# HA11# H_A#12
F2 HD9# HA12# G10
+VCCP H_D#10 J7 D9 H_A#13
H_D#11 HD10# HA13# H_A#14
J8 HD11# HA14# E11
H_D#12 H6 F10 H_A#15
H_D#13 HD12# HA15# H_A#16
F3 HD13# HA16# G11
R476 H_D#14 K8 G13 H_A#17
H_D#15 HD14# HA17# H_A#18
54.9/F H5 HD15# HA18# C10
H_D#16 H1 C11 H_A#19
H_D#17 HD16# HA19# H_A#20
H2 HD17# HA20# D11
H_XSCOMP H_D#18 K5 C12 H_A#21
H_D#19 HD18# HA21# H_A#22
K6 HD19# HA22# B13
H_D#20 J4 A12 H_A#23
+VCCP H_D#21 HD20# HA23# H_A#24 +VCCP
G3 HD21# HA24# F12
H_D#22 H3 G12 H_A#25
H_D#23 HD22# HA25# H_A#26
J1 HD23# HA26# E12
H_D#24 L5 C13 H_A#27
H_D#25 HD24# HA27# H_A#28
K4 HD25# HA28# B11
R483 H_D#26 J5 D13 H_A#29
H_D#27 HD26# HA29# H_A#30 R214
221/F P7 HD27# HA30# A13
H_D#28 L7 F13 H_A#31 100/F
H_D#29 HD28# HA31#
J3 HD29#
H_XSWING T/S = 10/20mil H_D#30 P5 F8 H_ADS#
HD30# HADS# H_ADS# 2
H_D#31 L3 B9 H_ADSTB#0
HD31# HADSTB0# H_ADSTB#0 2
2

C703 H_D#32 U7 E13 H_ADSTB#1

HD32# HADSTB1# H_ADSTB#1 2
H_D#33 V6 J11 HVREF
B R484 0.1U/16V H_D#34 HD33# HVREF H_BNR# B
R6 HD34# HBNR# A5 H_BNR# 2 Place Cap. near GMCH
100/F H_D#35 H_BPRI#
1

R5 HD35# HBPRI# D5 H_BPRI# 2 within 100 mils.

H_D#36 P3 E7 H_BREQ#0
HD36# BREQ0# H_BREQ#0 2
H_D#37 H_CPURST# R213

HOST
T8 HD37# HCPURST# H10 H_CPURST# 2

2
H_D#38 R7 200/F C292
H_D#39 HD38#
R8 HD39#
H_D#40 U8 0.1U/16V
H_YRCOMP H_D#41 HD40# CLK_MCH_BCLK#

1
T/S = 10/20mil R4 HD41# HCLKINN AB1 CLK_MCH_BCLK# 4
H_D#42 T4 AB2 CLK_MCH_BCLK
HD42# HCLKINP CLK_MCH_BCLK 4
H_D#43 T5
H_D#44 HD43# H_DBSY#
R1 HD44# HDBSY# C6 H_DBSY# 2
R502 H_D#45 T3 E6 H_DEFER#
HD45# HDEFER# H_DEFER# 2 H_DINV#[3..0] 2
24.9/F H_D#46 V8 H8 H_DINV#0
H_D#47 HD46# HDINV#0 H_DINV#1
U6 HD47# HDINV#1 K3
H_D#48 W6 T7 H_DINV#2
H_D#49 HD48# HDINV#2 H_DINV#3
U3 HD49# HDINV#3 U5
H_D#50 V5 G6 H_DPWR#
HD50# HDPWR# H_DPWR# 2
H_D#51 W8 F7 H_DRDY#
HD51# HDRDY# H_DRDY# 2 H_DSTBN#[3..0] 2
H_D#52 W7 G4 H_DSTBN#0
H_D#53 HD52# HDSTBN0# H_DSTBN#1
U2 HD53# HDSTBN1# K1
+VCCP H_D#54 U1 R3 H_DSTBN#2
H_D#55 HD54# HDSTBN2# H_DSTBN#3
Y5 HD55# HDSTBN3# V3 H_DSTBP#[3..0] 2
H_D#56 Y2 G5 H_DSTBP#0
H_D#57 HD56# HDSTBP0# H_DSTBP#1
V4 HD57# HDSTBP1# K2
R488 H_D#58 Y7 R2 H_DSTBP#2
H_D#59 HD58# HDSTBP2# H_DSTBP#3
54.9/F W1 HD59# HDSTBP3# W4
H_D#60 W3 F6 TP_H_EDRDY# T49
H_D#61 HD60# HEDRDY# H_HIT# PAD
Y3 HD61# HHIT# D4 H_HIT# 2
H_YSCOMP H_D#62 Y6 D6 H_HITM#
HD62# HHITM# H_HITM# 2
H_D#63 W2 B3 H_LOCK#
HD63# HLOCK# H_LOCK# 2
A11 TP_H_PCREQ# T173
C HPCREQ# H_REQ#[4..0] 2 C
+VCCP H_XRCOMP C1 A7 H_REQ#0 PAD
H_XSCOMP HXRCOMP HREQ0# H_REQ#1
C2 HXSCOMP HREQ1# D7
H_XSWING D1 B8 H_REQ#2
H_YRCOMP HXSWING HREQ2# H_REQ#3
T1 HYRCOMP HREQ3# C7
R221 H_YSCOMP L1 A8 H_REQ#4
HYSCOMP HREQ4# H_RS#[2..0] 2
221/F H_YSWING P1 A4 H_RS#0
HYSWING HRS0# H_RS#1
HRS1# C5
B4 H_RS#2
HRS2# H_CPUSLP#_GMCH R195 0
HCPUSLP# G8 H_CPUSLP# 2,19
H_YSWING T/S = 10/20mil B5 H_TRDY#
HTRDY# H_TRDY# 2
2

C313
R220 ALVISO
100/F 0.1U/16V
1

D D

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division
Alviso (HOST) 1 of 5
Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 5 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

+VCCP

R215
10K
+V1.5S_PCIE
R487
U34C U34F 24.9/F
20 DMI_TXN[1..0]
DMI_TXN0 AA31 G16 CFG0 PAD T53 H24 D36 VCC3G_PCIE_R
DMIRXN0 CFG0 SDVOCTRL_DATA EXP_COMPI

MISC
A DMI_TXN1 AB35 H13 CPU_BSEL1 PAD T58 H25 D34 A
DMIRXN1 CFG1 CPU_BSEL0 CPU_BSEL1 3,4 CLK_MCH_3GPLL# AB29 SDVOCTRL_CLK EXP_ICOMPO
PAD T85 AC31 DMIRXN2 CFG2 G14 CPU_BSEL0 3,4 4 CLK_MCH_3GPLL# GCLKN PEG_RXN[15..0] 10
AD35 F16 CFG3 T50 PAD CLK_MCH_3GPLL AC29 E30 PEG_RXN0
PAD T124 DMIRXN3 CFG3 4 CLK_MCH_3GPLL GCLKP EXP_RXN0
F15 CFG4 T47 PAD F34 PEG_RXN1
CFG4 EXP_RXN1 PEG_RXN2
20 DMI_TXP[1..0] CFG5 G15 EXP_RXN2 G30
DMI_TXP0 Y31 E16 CFG6 A15 H34 PEG_RXN3
DMI_TXP1 DMIRXP0 CFG6 CFG7 TVDAC_A EXP_RXN3 PEG_RXN4
AA35 DMIRXP1 CFG7 D17 T37 PAD C16 TVDAC_B EXP_RXN4 J30
AB31 J16 CFG8 T57 PAD A17 K34 PEG_RXN5
PAD T86 DMIRXP2 CFG8 TVDAC_C EXP_RXN5

TV
AC35 D15 CFG9 T36 PAD R211 R212 J18 L30 PEG_RXN6
PAD T71 DMIRXP3 CFG9 TV_REFSET EXP_RXN6
E15 CFG10 T41 PAD Low=DDR2 NC_2.2K 2.2K B15 M34 PEG_RXN7
CFG10 CFG11 TV_IRTNA EXP_RXN7 PEG_RXN8
20 DMI_RXN[1..0] CFG11 D14 T38 PAD High=DDR1 Low=DMIx2 B16 TV_IRTNB EXP_RXN8 N30
DMI_RXN0 AA33 E14 CFG12 T45 PAD B17 P34 PEG_RXN9
DMI_RXN1 AB37
DMITXN0 CFG12
H12 CFG13 High=DMIx4 TV_IRTNC EXP_RXN9
R30 PEG_RXN10
DMITXN1 CFG13 T56 PAD EXP_RXN10
AC33 C14 CFG14 T32 PAD T34 PEG_RXN11
PAD T82 DMITXN2 CFG14 EXP_RXN11
AD37 H15 CFG15 T54 PAD CFG[3-17] Default H U30 PEG_RXN12
PAD T118 DMITXN3 CFG15 EXP_RXN12

DMI
J15 CFG16 T60 PAD FOR 915GM V34 PEG_RXN13
CFG16
H14 CFG17 CFG[18,19]Default L EXP_RXN13
W30 PEG_RXN14
20 DMI_RXP[1..0] CFG17 T59 PAD EXP_RXN14
DMI_RXP0 Y33 G22 CFG18 T52 PAD E24 Y34 PEG_RXN15
DMITXP0 CFG18 13 VGA_DDCCLK DDCCLK EXP_RXN15
DMI_RXP1 AA37 G23 CFG19 T46 PAD R198 AL_0 E23
DMITXP1 CFG19 13 VGA_DDCDATA DDCDATA PEG_RXP[15..0] 10
AB33 D23 CFG20 T40 PAD R199 AL_0 E21 D30 PEG_RXP0
PAD T70 DMITXP2 CFG20 13 GM_BLUE BLUE EXP_RXP0

CFG/RSVD
AC37 G25 T55 PAD D21 E34 PEG_RXP1
PAD T123 DMITXP3 RSVD21 BLUE# EXP_RXP1
G24 T51 PAD C20 F30 PEG_RXP2
RSVD22 13 GM_GREEN GREEN EXP_RXP2

VGA
J17 C849 0.1U/16V B20 G34 PEG_RXP3
+2_5VSUS_DDR1 M_CLK_DDR0 AM33 TESTIN GREEN# EXP_RXP3 PEG_RXP4
17 M_CLK_DDR0 SM_CK0 RSVD24 A31 T31 PAD 13 GM_RED A19 RED EXP_RXP4 H30
M_CLK_DDR1 AL1 A30 T30 PAD B19 J34 PEG_RXP5

PCI-EXPRESS GRAPHICS
17 M_CLK_DDR1 SM_CK1 RSVD25 RED# EXP_RXP5
PAD T91 TP_SMCK2 AE11 D26 T34 PAD H21 K30 PEG_RXP6
SM_CK2 RSVD26 13 VSYNC VSYNC EXP_RXP6
M_CLK_DDR3 AJ34 D25 T42 PAD R201 AL_39 G21 L34 PEG_RXP7
17 M_CLK_DDR3 SM_CK3 RSVD27 13 HSYNC HSYNC EXP_RXP7
R242 M_CLK_DDR4 AF6 R205 R204 R203 R200 AL_39 J20 M30 PEG_RXP8
17 M_CLK_DDR4 SM_CK4 REFSET EXP_RXP8

NC_150/F

NC_150/F

NC_150/F
80.6/F TP_SMCK5 AC10 R216 255/F N34 PEG_RXP9
PAD T80 SM_CK5 EXP_RXP9
P30 PEG_RXP10
M_CLK_DDR#0 +VCCP EXP_RXP10 PEG_RXP11
17 M_CLK_DDR#0 AN33 SM_CK0# EXP_RXP11 R34
B M_RCOMPN M_CLK_DDR#1 AK1 T30 PEG_RXP12 B
17 M_CLK_DDR#1 SM_CK1# EXP_RXP12
M_RCOMPP
PAD T90 TP_SMCK#2
M_CLK_DDR#3
AE10
AJ33
SM_CK2# DDR MUXING FOR 915GM
E25
EXP_RXP13 U34
V30
PEG_RXP13
PEG_RXP14
17 M_CLK_DDR#3 SM_CK3# PAD T43 LBKLT_CTRL EXP_RXP14
M_CLK_DDR#4 AF5 R446 R567,R570,571 F25 W34 PEG_RXP15
17 M_CLK_DDR#4 SM_CK4# 13 INV_EN LBKLT_EN EXP_RXP15
PAD T79 TP_SMCK#5 AD10 75 PAD T33 C23
R243 SM_CK5#
J23 PM_BMBUSY# < 500 mils C22
LCTLA_CLK
E32 PEG_TXN0
BM_BUSY# PM_BMBUSY# 20 PAD T39 LCTLB_DATA EXP_TXN0
80.6/F M_CKE0 AP21 J21 PM_EXTTS#0 to Alviso. I2CC_SCL F23 F36 PEG_TXN1
17,18 M_CKE0 SM_CKE0 EXT_TS0# LDDC_CLK EXP_TXN1
M_CKE1 AM21 H22 PM_EXTTS#1 I2CC_SDA F22 G32 PEG_TXN2
17,18 M_CKE1 SM_CKE1 EXT_TS1# LDDC_DATA EXP_TXN2
M_CKE2 AH21 F5 F26 H36 PEG_TXN3
17,18 M_CKE2 SM_CKE2 THRMTRIP# PM_THRMTRIP# 2,19 13,14 LCDVCC_EN LVDD_EN EXP_TXN3

LVDS
M_CKE3 AK21 AD30IMVP_PWRGD R445 0 R196 AL_0 C33 J32 PEG_TXN4
17,18 M_CKE3 SM_CKE3 PWROK IMVP_PWRGD 20,30 LIBG EXP_TXN4
CLK PM

RSTIN# AE29 PLTRST#_R PLT_RST# 2,10,19,22,30 PAD T35 R208 1.5K C31 LVBG EXP_TXN5 K36 PEG_TXN5
M_CS#0 AN16 R241 100 PAD T44 F28 L32 PEG_TXN6
17,18 M_CS#0 SM_CS0# LVREFH EXP_TXN6
M_CS#1 AM14 A24 DREFCLK# PAD T48 F27 M36 PEG_TXN7
17,18 M_CS#1 SM_CS1# DREF_CLKN DREFCLK# 4 LVREFL EXP_TXN7
M_CS#2 AH15 A23 DREFCLK N32 PEG_TXN8
17,18 M_CS#2 SM_CS2# DREF_CLKP DREFCLK 4 EXP_TXN8
M_CS#3 AG16 C37 DREFSSCLK# B30 P36 PEG_TXN9
17,18 M_CS#3 SM_CS3# DREF_SSCLKN DREFSSCLK# 4 13 GM_ODD_CLKIN- LACLKN EXP_TXN9
D37 DREFSSCLK B29 R32 PEG_TXN10
DREF_SSCLKP DREFSSCLK 4 13 GM_ODD_CLKIN+ LACLKP EXP_TXN10
M_OCDCOMP0 AF22 C25 T36 PEG_TXN11
SM_OCDCOMP0 13 GM_EVEN_CLKIN- LBCLKN EXP_TXN11
M_OCDCOMP1 AF16 AP37 TP_NC1 T187PAD C24 U32 PEG_TXN12
SM_OCDCOMP1 NC1 13 GM_EVEN_CLKIN+ LBCLKP EXP_TXN12
AN37 TP_NC2 T185PAD V36 PEG_TXN13
NC2 TP_NC3 EXP_TXN13 PEG_TXN14
PAD T133 AP14 SM_ODT0 NC3 AP36 T186PAD 13 GM_ODD_RXIN0- B34 LADATAN0 EXP_TXN14 W32
R228 R229 AL15 AP2 TP_NC4 T184PAD B33 Y36 PEG_TXN15
PAD T117 SM_ODT1 NC4 13 GM_ODD_RXIN1- LADATAN1 EXP_TXN15
40.2/F 40.2/F AM11 AP1 TP_NC5 T188PAD B32
PAD T127 SM_ODT2 NC5 13 GM_ODD_RXIN2- LADATAN2
AN10 AN1 TP_NC6 T183PAD D32 PEG_TXP0
PAD T130 SM_ODT3 NC6 EXP_TXP0
B1 TP_NC7 T174PAD A34 E36 PEG_TXP1
NC7 13 GM_ODD_RXIN0+ LADATAP0 EXP_TXP1
M_RCOMPN AK10 A2 TP_NC8 T171PAD A33 F32 PEG_TXP2
SMRCOMPN NC8 13 GM_ODD_RXIN1+ LADATAP1 EXP_TXP2
NC

M_RCOMPP AK11 B37 TP_NC9 T170PAD B31 G36 PEG_TXP3

SMRCOMPP NC9 13 GM_ODD_RXIN2+ LADATAP2 EXP_TXP3
Route as SMDDR_VREF AF37 A36 TP_NC10 T168PAD H32 PEG_TXP4
SMVREF0 NC10 TP_NC11 EXP_TXP4 PEG_TXP5
short as It's point to point, AD1 SMVREF1 NC11 A37 T172PAD 13 GM_EVEN_RXIN0- C29 LBDATAN0 EXP_TXP5 J36
SMXSLEW AE27 D28 K32 PEG_TXP6
55ohm trace, keep as SMXSLEWIN 13 GM_EVEN_RXIN1- LBDATAN1 EXP_TXP6
possible. AE28 C27 L36 PEG_TXP7
SMXSLEWOUT 13 GM_EVEN_RXIN2- LBDATAN2 EXP_TXP7
short as possible. SMYSLEW AF9 M32 PEG_TXP8
C SMYSLEWIN EXP_TXP8 PEG_TXP9 C
AF10 SMYSLEWOUT 13 GM_EVEN_RXIN0+ C28 LBDATAP0 EXP_TXP9 N36
D27 P32 PEG_TXP10
13 GM_EVEN_RXIN1+ LBDATAP1 EXP_TXP10
+2_5VSUS_DDR1 ALVISO C26 R36 PEG_TXP11
13 GM_EVEN_RXIN2+ LBDATAP2 EXP_TXP11
T32 PEG_TXP12
C277 NV_0.1U/16V EXP_TXP12 PEG_TXP13
DDRDIMM_VREF PEG_TXN_C[15..0] 10 EXP_TXP13 U36
PEG_TXN0 1 2 PEG_TXN_C0 C275 NV_0.1U/16V V32 PEG_TXP14
PEG_TXP_C[15..0] 10 EXP_TXP14
C278 NV_0.1U/16V PEG_TXP0 1 2 PEG_TXP_C0 W36 PEG_TXP15
PEG_TXN1 PEG_TXN_C1 C276 NV_0.1U/16V EXP_TXP15
1 2
2

R255 0 C360 C354 C282 NV_0.1U/16V PEG_TXP1 1 2 PEG_TXP_C1 ALVISO

R253 PEG_TXN2 1 2 PEG_TXN_C2 C279 NV_0.1U/16V
NC_1K/F 0.1U/16V 0.1U/16V C283 NV_0.1U/16V PEG_TXP2 1 2 PEG_TXP_C2
PEG_TXN3 PEG_TXN_C3 C281 NV_0.1U/16V
1

1 2
C287 NV_0.1U/16V PEG_TXP3 1 2 PEG_TXP_C3
PEG_TXN4 1 2 PEG_TXN_C4 C284 NV_0.1U/16V
C289 NV_0.1U/16V PEG_TXP4 1 2 PEG_TXP_C4
R254 NC_0 PEG_TXN5 1 2 PEG_TXN_C5 C286 NV_0.1U/16V
R252 C294 NV_0.1U/16V PEG_TXP5 1 2 PEG_TXP_C5
NC_1K/F PEG_TXN6 1 2 PEG_TXN_C6 C291 NV_0.1U/16V
C296 NV_0.1U/16V PEG_TXP6 1 2 PEG_TXP_C6
PEG_TXN7 1 2 PEG_TXN_C7 C293 NV_0.1U/16V
C300 NV_0.1U/16V PEG_TXP7 1 2 PEG_TXP_C7
PEG_TXN8 1 2 PEG_TXN_C8 C298 NV_0.1U/16V
C302 NV_0.1U/16V PEG_TXP8 1 2 PEG_TXP_C8
PEG_TXN9 1 2 PEG_TXN_C9 AC Coupling Cap C299 NV_0.1U/16V
+3VSUS C311 NV_0.1U/16V PEG_TXP9 1 2 PEG_TXP_C9
PEG_TXN10 1 2 PEG_TXN_C10 Close GMCH or C309 NV_0.1U/16V
C317 NV_0.1U/16V Gfx PEG_TXP10 1 2 PEG_TXP_C10
PEG_TXN11 1 2 PEG_TXN_C11 C312 NV_0.1U/16V +2_5VRUN_ALV
C323 NV_0.1U/16V PEG_TXP11 1 2 PEG_TXP_C11 R190 10K
8

PEG_TXN12 1 2 PEG_TXN_C12 C320 NV_0.1U/16V PM_EXTTS#0

D 3 + C324 NV_0.1U/16V PEG_TXP12 1 2 PEG_TXP_C12 D
1 PEG_TXN13 1 2 PEG_TXN_C13 C322 NV_0.1U/16V R189 10K
2 - C330 NV_0.1U/16V PEG_TXP13 1 2 PEG_TXP_C13 PM_EXTTS#1
U16A PEG_TXN14 1 2 PEG_TXN_C14 C326 NV_0.1U/16V
NC_LMV358AM8X C337 NV_0.1U/16V PEG_TXP14 1 2 PEG_TXP_C14
PEG_TXN15 PEG_TXN_C15 C331 NV_0.1U/16V R188 NC_2.2K
4

1 2 FOR 915PM
PEG_TXP15 1 2 PEG_TXP_C15 I2CC_SDA HON HAI PRECISION IND. CO., LTD.
5 + R187 NC_2.2K
I2CC_SCL
FOXCONN
Title
CPBG - R&D Division
7
6 - Alviso (VGA,DMI) 2 of 5
U16B FOR EDID LCD .
NC_LMV358AM8X Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 6 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

A A

17 M_A_DQ[63..0] U34B 17 M_B_DQ[63..0] U34G

M_A_DQ0 AG35 AK15 M_A_BS#0 M_B_DQ0 AE31 AJ15 M_B_BS#0
SADQ0 SA_BS0# M_A_BS#0 17,18 SBDQ0 SB_BS0# M_B_BS#0 17,18
M_A_DQ1 AH35 AK16 M_A_BS#1 M_B_DQ1 AE32 AG17 M_B_BS#1
SADQ1 SA_BS1# M_A_BS#1 17,18 SBDQ1 SB_BS1# M_B_BS#1 17,18
M_A_DQ2 AL35 AL21 T119 PAD M_B_DQ2 AG32 AG21 T99 PAD
M_A_DQ3 SADQ2 SA_BS2# M_B_DQ3 SBDQ2 SB_BS2#
AL37 SADQ3 M_A_DM[7..0] 17 AG36 SBDQ3 M_B_DM[7..0] 17
M_A_DQ4 AH36 AJ37 M_A_DM0 M_B_DQ4 AE34 AF32 M_B_DM0
M_A_DQ5 SADQ4 SA_DM0 M_A_DM1 M_B_DQ5 SBDQ4 SB_DM0 M_B_DM1
AJ35 SADQ5 SA_DM1 AP35 AE33 SBDQ5 SB_DM1 AK34
M_A_DQ6 AK37 AL29 M_A_DM2 M_B_DQ6 AF31 AK27 M_B_DM2
M_A_DQ7 SADQ6 SA_DM2 M_A_DM3 M_B_DQ7 SBDQ6 SB_DM2 M_B_DM3
AL34 SADQ7 SA_DM3 AP24 AF30 SBDQ7 SB_DM3 AK24
M_A_DQ8 AM36 AP9 M_A_DM4 M_B_DQ8 AH33 AJ10 M_B_DM4
M_A_DQ9 SADQ8 SA_DM4 M_A_DM5 M_B_DQ9 SBDQ8 SB_DM4 M_B_DM5
AN35 SADQ9 SA_DM5 AP4 AH32 SBDQ9 SB_DM5 AK5
M_A_DQ10 AP32 AJ2 M_A_DM6 M_B_DQ10 AK31 AE7 M_B_DM6
M_A_DQ11 SADQ10 SA_DM6 M_A_DM7 M_B_DQ11 SBDQ10 SB_DM6 M_B_DM7
AM31 SADQ11 SA_DM7 AD3 AG30 SBDQ11 SB_DM7 AB7
M_A_DQ12 AM34 M_B_DQ12 AG34
SADQ12 M_A_DQS[7..0] 17 SBDQ12 M_B_DQS[7..0] 17
M_A_DQ13 AM35 AK36 M_A_DQS0 M_B_DQ13 AG33 AF34 M_B_DQS0
M_A_DQ14 SADQ13 SA_DQS0 M_A_DQS1 M_B_DQ14 SBDQ13 SB_DQS0 M_B_DQS1
AL32 SADQ14 SA_DQS1 AP33 AH31 SBDQ14 SB_DQS1 AK32
M_A_DQ15 AM32 AN29 M_A_DQS2 M_B_DQ15 AJ31 AJ28 M_B_DQS2
M_A_DQ16 SADQ15 SA_DQS2 M_A_DQS3 M_B_DQ16 SBDQ15 SB_DQS2 M_B_DQS3
AN31 SADQ16 SA_DQS3 AP23 AK30 SBDQ16 SB_DQS3 AK23
B M_A_DQ17 AP31 AM8 M_A_DQS4 M_B_DQ17 AJ30 AM10 M_B_DQS4 B
M_A_DQ18 SADQ17 SA_DQS4 M_A_DQS5 M_B_DQ18 SBDQ17 SB_DQS4 M_B_DQS5
AN28 SADQ18 SA_DQS5 AM4 AH29 SBDQ18 SB_DQS5 AH6
M_A_DQ19 AP28 AJ1 M_A_DQS6 M_B_DQ19 AH28 AF8 M_B_DQS6
M_A_DQ20 SADQ19 SA_DQS6 M_A_DQS7 M_B_DQ20 SBDQ19 SB_DQS6 M_B_DQS7
AL30 SADQ20 SA_DQS7 AE5 AK29 SBDQ20 SB_DQS7 AB4
M_A_DQ21 AM30 M_B_DQ21 AH30
M_A_DQ22 SADQ21 M_B_DQ22 SBDQ21
AM28 SADQ22 SA_DQS0# AK35 T107 PAD AH27 SBDQ22 SB_DQS0# AF35 T96 PAD
M_A_DQ23 AL28 AP34 T129 PAD M_B_DQ23 AG28 AK33 T108 PAD
M_A_DQ24 SADQ23 SA_DQS1# M_B_DQ24 SBDQ23 SB_DQS1#
AP27 SADQ24 SA_DQS2# AN30 T125 PAD AF24 SBDQ24 SB_DQS2# AK28 T106 PAD
M_A_DQ25 AM27 AN23 T126 PAD M_B_DQ25 AG23 AJ23 T102 PAD
M_A_DQ26 SADQ25 SA_DQS3# M_B_DQ26 SBDQ25 SB_DQS3#
AM23 AN8 T128 PAD AJ22 AL10 T116 PAD
DDR SYSTEM MEMORY A

SADQ26 SA_DQS4# SBDQ26 SB_DQS4#

DDR SYSTEM MEMORY B

M_A_DQ27 AM22 AM5 T120 PAD M_B_DQ27 AK22 AH7 T100 PAD
M_A_DQ28 SADQ27 SA_DQS5# M_B_DQ28 SBDQ27 SB_DQS5#
AL23 SADQ28 SA_DQS6# AH1 T101 PAD AH24 SBDQ28 SB_DQS6# AF7 T95 PAD
M_A_DQ29 AM24 AE4 T92 PAD M_B_DQ29 AH23 AB5 T77 PAD
M_A_DQ30 SADQ29 SA_DQS7# M_B_DQ30 SBDQ29 SB_DQS7#
AN22 SADQ30 M_A_A[13..0] 17,18 AG22 SBDQ30 M_B_A[13..0] 17,18
M_A_DQ31 AP22 AL17 M_A_A0 M_B_DQ31 AJ21 AH17 M_B_A0
M_A_DQ32 SADQ31 SA_MA0 M_A_A1 M_B_DQ32 SBDQ31 SB_MA0 M_B_A1
AM9 SADQ32 SA_MA1 AP17 AG10 SBDQ32 SB_MA1 AK17
M_A_DQ33 AL9 AP18 M_A_A2 M_B_DQ33 AG9 AH18 M_B_A2
M_A_DQ34 SADQ33 SA_MA2 M_A_A3 M_B_DQ34 SBDQ33 SB_MA2 M_B_A3
AL6 SADQ34 SA_MA3 AM17 AG8 SBDQ34 SB_MA3 AJ18
M_A_DQ35 AP7 AN18 M_A_A4 M_B_DQ35 AH8 AK18 M_B_A4
M_A_DQ36 SADQ35 SA_MA4 M_A_A5 M_B_DQ36 SBDQ35 SB_MA4 M_B_A5
AP11 SADQ36 SA_MA5 AM18 AH11 SBDQ36 SB_MA5 AJ19
M_A_DQ37 AP10 AL19 M_A_A6 M_B_DQ37 AH10 AK19 M_B_A6
M_A_DQ38 SADQ37 SA_MA6 M_A_A7 M_B_DQ38 SBDQ37 SB_MA6 M_B_A7
AL7 SADQ38 SA_MA7 AP20 AJ9 SBDQ38 SB_MA7 AH19
M_A_DQ39 AM7 AM19 M_A_A8 M_B_DQ39 AK9 AJ20 M_B_A8
M_A_DQ40 SADQ39 SA_MA8 M_A_A9 M_B_DQ40 SBDQ39 SB_MA8 M_B_A9
AN5 SADQ40 SA_MA9 AL20 AJ7 SBDQ40 SB_MA9 AH20
M_A_DQ41 AN6 AM16 M_A_A10 M_B_DQ41 AK6 AJ16 M_B_A10
M_A_DQ42 SADQ41 SA_MA10 M_A_A11 M_B_DQ42 SBDQ41 SB_MA10 M_B_A11
AN3 SADQ42 SA_MA11 AN20 AJ4 SBDQ42 SB_MA11 AG18
M_A_DQ43 AP3 AM20 M_A_A12 M_B_DQ43 AH5 AG20 M_B_A12
M_A_DQ44 SADQ43 SA_MA12 M_A_A13 M_B_DQ44 SBDQ43 SB_MA12 M_B_A13
AP6 SADQ44 SA_MA13 AM15 AK8 SBDQ44 SB_MA13 AG15
M_A_DQ45 AM6 M_B_DQ45 AJ8
M_A_DQ46 SADQ45 M_A_CAS# M_B_DQ46 SBDQ45 M_B_CAS#
AL4 SADQ46 SA_CAS# AN15 M_A_CAS# 17,18 AJ5 SBDQ46 SB_CAS# AH14 M_B_CAS# 17,18
M_A_DQ47 AM3 AP16 M_A_RAS# M_B_DQ47 AK4 AK14 M_B_RAS#
C SADQ47 SA_RAS# M_A_RAS# 17,18 SBDQ47 SB_RAS# M_B_RAS# 17,18 C
M_A_DQ48 AK2 AF29 T97 M_B_DQ48 AG5 AF15 T93 PAD
M_A_DQ49 SADQ48 SA_RCVENIN# M_B_DQ49 SBDQ48 SB_RCVENIN#
AK3 SADQ49 SA_RCVENOUT# AF28 T94 PAD AG4 SBDQ49 SB_RCVENOUT# AF14 T98 PAD
M_A_DQ50 AG2 AP15 M_A_WE# PAD M_B_DQ50 AD8 AH16 M_B_WE#
SADQ50 SA_WE# M_A_WE# 17,18 SBDQ50 SB_WE# M_B_WE# 17,18
M_A_DQ51 AG1 M_B_DQ51 AD9
M_A_DQ52 SADQ51 M_B_DQ52 SBDQ51
AL3 SADQ52 AH4 SBDQ52
M_A_DQ53 AM2 M_B_DQ53 AG6
M_A_DQ54 SADQ53 M_B_DQ54 SBDQ53
AH3 SADQ54 AE8 SBDQ54
M_A_DQ55 AG3 M_B_DQ55 AD7
M_A_DQ56 SADQ55 M_B_DQ56 SBDQ55
AF3 SADQ56 AC5 SBDQ56
M_A_DQ57 AE3 M_B_DQ57 AB8
M_A_DQ58 SADQ57 M_B_DQ58 SBDQ57
AD6 SADQ58 AB6 SBDQ58
M_A_DQ59 AC4 M_B_DQ59 AA8
M_A_DQ60 SADQ59 M_B_DQ60 SBDQ59
AF2 SADQ60 AC8 SBDQ60
M_A_DQ61 AF1 M_B_DQ61 AC7
M_A_DQ62 SADQ61 M_B_DQ62 SBDQ61
AD4 SADQ62 AA4 SBDQ62
M_A_DQ63 AD5 M_B_DQ63 AA5
SADQ63 SBDQ63

ALVISO ALVISO

D D

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division
ALVISO_C (DDR) 3 of 5
Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 7 of 47

1 2 3 4 5 6 7 8
 5 4 3 2 1

MCH_VTT

T29 VCC0 VCCA_TVDACA0 F17

1.05V, But not same as VCCP. R29 VCC1 VCCA_TVDACA1 E17 +1_5VRUN
N29 VCC2 VCCA_TVDACB0 D18
M29 VCC3 VCCA_TVDACB1 C18

1
K29 VCC4 VCCA_TVDACC0 F18

1
J29 E18 C678 C691
C288 C318 C297 C315 C314 C329 C308 VCC5 VCCA_TVDACC1 10U/6.3V_0805 0.1U/16V
V28 VCC6
NC_0.1U/16V 0.1U/50V_0603 0.1U/50V_0603 0.1U/50V_0603 10U/6.3V_0805 10U/6.3V_0805 10U/6.3V_0805

2
U28 VCC7 VCCA_TVBG H18
2

2
T28 VCC8 VSSA_TVBG G18
R28 VCC9
P28 VCC10 VCCD_TVDAC D19 +2_5VRUN_ALV
D N28 VCC11 VCCDQ_TVDAC H17 D
M28 VCC12

1
L28 VCC13 VCCD_LVDS0 B26
1

1
K28 B25 C680 C689 C718
C332 C325 C336 C310 C339 C327 C285 C290 VCC14 VCCD_LVDS1 0.01U/16V 0.1U/16V NC_4.7U/10V_0805
J28 VCC15 VCCD_LVDS2 A25
NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V

2
H28 VCC16
2

2
G28 VCC17 VCCA_LVDS A35
V27 VCC18
U27 VCC19 VCCHV0 B22 +2_5VRUN_ALV
T27 VCC20 VCCHV1 B21

1
R27 VCC21 VCCHV2 A21
P27 C376 0.1U/16V C841 C273
VCC22 V1.8_DDR_CAP1 10U/6.3V_0805 0.1U/16V
N27 VCC23 VCCSM0 AM37 1 2
MCH_VTT +1_5VRUN

2
M27 VCC24 VCCSM1 AH37
L27 AP29 C362 0.1U/16V
VCC25 VCCSM2 V1.8_DDR_CAP2
K27 VCC26 VCCSM3 AD28 1 2
J27 VCC27 VCCSM4 AD27
1

1
C723 H27 AC27 C380 0.1U/16V
VCC28 VCCSM5
1

C725 0.1U/16V K26 AP26 V1.8_DDR_CAP5 1 2

VCC29 VCCSM6
+ C872 + C873 2.2U/10V_0603 H26 AN26
VCC30 VCCSM7
2

2
K25 VCC31 VCCSM8 AM26
NC_470U/2.5V_7343 NC_470U/2.5V_7343 J25 AL26 Note: All VCCSM pins shorted
VCC32 U34H VCCSM9
2

K24 VCC33 VCCSM10 AK26 internally.

K23 ALVISO AJ26
VCC34 VCCSM11
K22 VCC35 VCCSM12 AH26
L41 K21 AG26 +2_5VSUS_DDR1
+V1.5S_DPLLA VCC36 VCCSM13
1 2 W20 VCC37 VCCSM14 AF26
10UH U20 AE26
VCC38 VCCSM15
1

1
T20 VCC39 VCCSM16 AP25
1

C690 + C677 K20 AN25 C387 C381 C386 C383

0.1U/16V 470U/2.5V_7343 VCC40 VCCSM17 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V
V19 AM25

POWER
C VCC41 VCCSM18

2
U19 AL25 C
VCC42 VCCSM19
2

K19 VCC43 VCCSM20 AK25

W18 VCC44 VCCSM21 AJ25
V18 VCC45 VCCSM22 AH25
L42 T18 AG25
+2_5VRUN_ALV +V1.5S_DPLLB VCC46 VCCSM23
1 2 K18 VCC47 VCCSM24 AF25

1
10UH K17 AE25
VCC48 VCCSM25
1

1
+2_5VRUN_ALV AE24 +
VCCSM26
1

C272 + C697 AC2 AE23 C394 C393 C398 C374 C370 C363 C367 C366 C343
VCCH_MPLL1 VCCSM27
1

0.1U/16V 470U/2.5V_7343 AC1 AE22 10U/6.3V_0805 10U/6.3V_0805 220U/6.3V_7343 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V
VCCH_MPLL0 VCCSM28
+ C871

2
B23 VCCA_DPLLA VCCSM29 AE21
AL_150U/10V_7343
2

C35 VCCA_DPLLB VCCSM30 AE20

AA1 VCCA_HPLL VCCSM31 AE19
2

AA2 VCCA_MPLL VCCSM32 AE18

VCCSM33 AE17
R630 NV_0 C_V_SYNC F19 AE16
VCCA_CRTDAC0 VCCSM34
E19 VCCA_CRTDAC1 VCCSM35 AE15
For 915GM G19 VSSA_CRTDAC VCCSM36 AE14
2

L16 Place FB within AP13 L17

VCCA_HPLL VCCSM37 VCC_DDRDLL
1 2 3" of GMCH. H20 VCC_SYNC VCCSM38 AN13 1 2 +1_5VRUN
1UH L43 AM13 1UH
VCCSM39
1

AL_BLM11A121S K13 AL13

VTT0 VCCSM40
1

1
C722 + C714 C683 J13 AK13
0.1U/16V 470U/2.5V_7343 AL_22000P_0805_3P VTT1 VCCSM41 C399 C351
K12 VTT2 VCCSM42 AJ13 +
L_V_SYNC 1 0.1U/16V
1

3 W11 VTT3 VCCSM43 AH13

100U/10V_7343
2

2
V11 VTT4 VCCSM44 AG13
1

2
U11 VTT5 VCCSM45 AF13
C687 C280 T11 AE13
L15 AL_0.1U/16V NC_22000P/16V VTT6 VCCSM46
2

R11 VTT7 VCCSM47 AP12

VCCA_MPLL
2

1 2 P11 VTT8 VCCSM48 AN12

1UH N11 AM12 +2_5VRUN_ALV
VTT9 VCCSM49
1

B B
M11 VTT10 VCCSM50 AL12
1

C720 + C715 Place Caps within L11 AK12

VTT11 VCCSM51

1
0.1U/16V 470U/2.5V_7343 K11 AJ12
250mil of GMCH. W10
VTT12 VCCSM52
AH12 C679 C688
VTT13 VCCSM53 0.1U/16V 4.7U/10V_0805
2

Route VSSA_CRTDAC from GMCH to V10 VTT14 VCCSM54 AG12

2
Caps lead then to GND plane. U10 VTT15 VCCSM55 AF12 Note: All VCCSM pins +V1.5S_PCIE
T10 VTT16 VCCSM56 AE12 shorted internally.
Select 2 or 3pin R10 VTT17 VCCSM57 AD11
P10 AC11 C384 0.1U/16V
Cap after BB. N10
VTT18 VCCSM58
AB11 1 2 L46
MCH_VTT VTT19 VCCSM59 C377 0.1U/16V +V1.5S_PCIE
M10 VTT20 VCCSM60 AB10 1 2 +1_5VRUN
K10 AB9 1 2 1UH
VTT21 VCCSM61

1
+VCCP +2_5VRUN_ALV J10 AP8 V1.8_DDR_CAP6
D20 VTT22 VCCSM62 V1.8_DDR_CAP3 C353 0.1U/16V C717 C713
Y9 AM1 + C724
VTT23 VCCSM63 V1.8_DDR_CAP4 10U/6.3V_0805 10U/6.3V_0805 220U/6.3V_7343
1 2 W9 VTT24 VCCSM64 AE1 1 2

2
U9 VTT25
1

R486 +2_5VRUN_ALV

2
R9 VTT26 VCCTX_LVDS0 B28
C295 C301 C684 C682 SCS500V-40 10/F_0603 AL_10U/6.3V_0805 P9 A28 L47
VTT27 VCCTX_LVDS1
1

2.2U/10V_0603 4.7U/10V_0805 2.2U/10V_0603 4.7U/10V_0805 C842 N9 A27 VCCA_3GPLL 1 2 +1_5VRUN

VTT28 VCCTX_LVDS2 1UH
2

M9 VTT29

1
C267 L9 AF20 VCC_DDRDLL
AL_0.1U/16V VTT30 VCCA_SM0 C340 C341
2

J9 VTT31 VCCA_SM1 AP19

N8 AF19 +V1.5S_PCIE 0.1U/16V 10U/6.3V_0805
VTT32 VCCA_SM2

2
M8 VTT33 VCCA_SM3 AF18
+VCCP N7 VTT34
+VCCP M7 AE37 +V1.5S_PCIE
VTT35 VCC3G0
N6 VTT36 VCC3G1 W37
C686 0.47U/6.3V M6 U37
VCCP_GMCH_CAP1 VTT37 VCC3G2
1 2 A6 VTT38 VCC3G3 R37
N5 VTT39 VCC3G4 N37
A M5 VTT40 VCC3G5 L37 A
N4 VTT41 VCC3G6 J37
1

C307 C319 C305 C306 C303 C304 C316 M4

C685 0.47U/6.3V VTT42 VCCA_3GPLL
N3 VTT43 VCCA_3GPLL0 Y29
NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 1 2 M3 Y28 L44
VTT44 VCCA_3GPLL1
2

N2 VTT45 VCCA_3GPLL2 Y27 1 2 +2_5VRUN_ALV

M2 BLM11A121S HON HAI PRECISION IND. CO., LTD.
VTT46
FOXCONN
1

C716 0.22U/10V VCCP_GMCH_CAP2 B2 F37 VCCA_3GBG

1 2 VCCP_GMCH_CAP3 V1
VTT47 VCCA_3GBG
G37 C709 CPBG - R&D Division
VTT48 VSSA_3GBG 0.1U/16V Title
FOR EMI N1
C708 0.22U/10V VTT49 ALVISO_D (POWER) 4 of 5
2

M1 VTT50
1 2 VCCP_GMCH_CAP4 G1 VTT51 Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 8 of 47

5 4 3 2 1
 A
B
C
D

VSSALVDS B36

5
5

B24 VSS135 VSS271 Y1

D24 VSS134 VSS270 D2
F24 VSS133 VSS269 G2
J24 VSS132 VSS268 J2
AG24VSS131 VSS267 AL24
AJ24 VSS130 VSS266 AN24
E27 VSS129 VSS265 A26
G27 VSS128 VSS264 E26
W27 VSS127 VSS263 G26
L17 VCC_NCTF78 VSS_NCTF68 Y12 AA27VSS126 VSS262 J26
M17 VCC_NCTF77 VSS_NCTF67 AA12 AB27VSS125 VSS261 B27
N17 VCC_NCTF76 VSS_NCTF66 Y13 AF27 VSS124 VSS260 L2
P17 VCC_NCTF75 VSS_NCTF65 AA13 AG27VSS123 VSS259 P2
T17 VCC_NCTF74 VSS_NCTF64 L14 AJ27 VSS122 VSS258 T2
U17 VCC_NCTF73 VSS_NCTF63 M14 AL27 VSS121 VSS257 V2
V17 VCC_NCTF72 VSS_NCTF62 N14 AN27VSS120 VSS256 AD2
W17 VCC_NCTF71 VSS_NCTF61 P14 E28 VSS119 VSS255 AE2
L18 VCC_NCTF70 VSS_NCTF60 R14 W28 VSS118 VSS254 AH2
M18 VCC_NCTF69 VSS_NCTF59 T14 AA28VSS117 VSS253 AL2
N18 VCC_NCTF68 VSS_NCTF58 U14 AB28VSS116 VSS252 AN2
P18 VCC_NCTF67 VSS_NCTF57 V14 AC28VSS115 VSS251 A3
R18 VCC_NCTF66 VSS_NCTF56 W14 A29 VSS114 VSS250 C3
Y18 VCC_NCTF65 VSS_NCTF55 Y14 D29 VSS113 VSS249 AA3
L19 VCC_NCTF64 VSS_NCTF54 AA14 E29 VSS112 VSS248 AB3
M19 VCC_NCTF63 VSS_NCTF53 AB14 F29 VSS111 VSS247 AC3
N19 VCC_NCTF62 VSS_NCTF52 L15 G29 VSS110 VSS246 AJ3
P19 VCC_NCTF61 VSS_NCTF51 M15 H29 VSS109 VSS245 C4
R19 VCC_NCTF60 VSS_NCTF50 N15 L29 VSS108 VSS244 H4
Y19 VCC_NCTF59 VSS_NCTF49 P15 P29 VSS107 VSS243 L4
L20 VCC_NCTF58 VSS_NCTF48 R15 U29 VSS106 VSS242 P4
M20 VCC_NCTF57 VSS_NCTF47 T15 V29 VSS105 VSS241 U4
N20 VCC_NCTF56 VSS_NCTF46 U15 W29 VSS104 VSS240 Y4
P20 VCC_NCTF55 VSS_NCTF45 V15 AA29VSS103 VSS239 AF4
R20 VCC_NCTF54 VSS_NCTF44 W15 AD29VSS102 VSS238 AN4
Y20 VCC_NCTF53 VSS_NCTF43 Y15 AG29VSS101 VSS237 E5

4
4

L21 VCC_NCTF52 VSS_NCTF42 AA15 AJ29 VSS100 VSS236 W5

M21 VCC_NCTF51 VSS_NCTF41 AB15 AM29VSS99 VSS235 AL5
N21 VCC_NCTF50 VSS_NCTF40 L16 C30 VSS98 VSS234 AP5
P21 VCC_NCTF49 VSS_NCTF39 M16 Y30 VSS97 VSS233 B6
T21 VCC_NCTF48 VSS_NCTF38 N16 AA30VSS96 VSS232 J6
U21 VCC_NCTF47 VSS_NCTF37 P16 AB30VSS95 VSS231 L6
V21 VCC_NCTF46 VSS_NCTF36 R16 AC30VSS94 VSS230 P6
W21 VCC_NCTF45 VSS_NCTF35 T16 AE30VSS93 VSS229 T6
L22 VCC_NCTF44 VSS_NCTF34 U16 AP30VSS92 VSS228 AA6
M22 VCC_NCTF43 VSS_NCTF33 V16 D31 VSS91 VSS227 AC6
N22 VCC_NCTF42 VSS_NCTF32 W16 E31 VSS90 VSS226 AE6
P22 VCC_NCTF41 VSS_NCTF31 Y16 F31 VSS89 VSS225 AJ6
R22 VCC_NCTF40 VSS_NCTF30 AA16 G31 VSS88 VSS224 G7
T22 VCC_NCTF39 VSS_NCTF29 AB16 H31 VSS87 VSS223 V7
U22 VCC_NCTF38 VSS_NCTF28 R17 J31 VSS86 VSS222 AA7
V22 Y17 AG7

U34D
VCC_NCTF37 VSS_NCTF27 K31 VSS85 VSS221
W22 AA17 AK7

ALVISO
VCC_NCTF36 VSS_NCTF26 L31 VSS84 VSS220
L23 VCC_NCTF35 VSS_NCTF25 AB17 M31 VSS83 VSS219 AN7
M23 VCC_NCTF34 VSS_NCTF24 AA18 N31 VSS82 VSS218 C8
N23 VCC_NCTF33 VSS_NCTF23 AB18 P31 VSS81 VSS217 E8
P23 VCC_NCTF32 VSS_NCTF22 AA19 R31 VSS80 VSS216 L8
R23 AB19 P8

NCTF
VCC_NCTF31 VSS_NCTF21 T31 VSS79 VSS215
T23 VCC_NCTF30 VSS_NCTF20 AA20 U31 VSS78 VSS214 Y8
U23 AB20 AL8
U34E

VCC_NCTF29 VSS_NCTF19 V31 VSS77 VSS213

V23 R21 A9
ALVISO

VCC_NCTF28 VSS_NCTF18 W31 VSS76 VSS212

W23 VCC_NCTF27 VSS_NCTF17 Y21 AD31VSS75 VSS211 H9
L24 VCC_NCTF26 VSS_NCTF16 AA21 AG31VSS74 VSS210 K9
M24 VCC_NCTF25 VSS_NCTF15 AB21 AL31 VSS73 VSS209 T9
N24 VCC_NCTF24 VSS_NCTF14 Y22 A32 VSS72 VSS208 V9
VSS

P24 VCC_NCTF23 VSS_NCTF13 AA22 C32 VSS71 VSS207 AA9

R24 VCC_NCTF22 VSS_NCTF12 AB22 Y32 VSS70 VSS206 AC9
T24 VCC_NCTF21 VSS_NCTF11 Y23 AA32VSS69 VSS205 AE9
U24 VCC_NCTF20 VSS_NCTF10 AA23 AB32VSS68 VSS204 AH9
V24 VCC_NCTF19 VSS_NCTF9 AB23 AC32VSS67 VSS203 AN9
W24 VCC_NCTF18 VSS_NCTF8 Y24 AD32VSS66 VSS202 D10
L25 AA24 L10

3
3

VCC_NCTF17 VSS_NCTF7 AJ32 VSS65 VSS201

M25 VCC_NCTF16 VSS_NCTF6 AB24 AN32VSS64 VSS200 Y10
N25 VCC_NCTF15 VSS_NCTF5 Y25 D33 VSS63 VSS199 AA10
P25 VCC_NCTF14 VSS_NCTF4 AA25 E33 VSS62 VSS198 F11
R25 VCC_NCTF13 VSS_NCTF3 AB25 F33 VSS61 VSS197 H11
T25 VCC_NCTF12 VSS_NCTF2 Y26 G33 VSS60 VSS196 Y11
U25 VCC_NCTF11 VSS_NCTF1 AA26 H33 VSS59 VSS195 AA11
V25 VCC_NCTF10 VSS_NCTF0 AB26 J33 VSS58 VSS194 AF11
W25 VCC_NCTF9 K33 VSS57 VSS193 AG11
L26 VCC_NCTF8 L33 VSS56 VSS192 AJ11
M26 VCC_NCTF7 M33 VSS55 VSS191 AL11
N26 VCC_NCTF6 N33 VSS54 VSS190 AN11
P26 VCC_NCTF5 P33 VSS53 VSS189 B12
R26 VCC_NCTF4 VTT_NCTF17 L12 R33 VSS52 VSS188 D12
T26 VCC_NCTF3 VTT_NCTF16 M12 T33 VSS51 VSS187 J12
U26 VCC_NCTF2 VTT_NCTF15 N12 U33 VSS50 VSS186 A14
V26 VCC_NCTF1 VTT_NCTF14 P12 V33 VSS49 VSS185 B14
W26 VCC_NCTF0 VTT_NCTF13 R12 W33 VSS48 VSS184 F14
VTT_NCTF12 T12 AD33VSS47 VSS183 J14
U12 K14
MCH_VTT

AB12VCCSM_NCTF31 VTT_NCTF11 AF33 VSS46 VSS182

AC12VCCSM_NCTF30 VTT_NCTF10 V12 AL33 VSS45 VSS181 AG14
AD12VCCSM_NCTF29 VTT_NCTF9 W12 C34 VSS44 VSS180 AJ14
AB13VCCSM_NCTF28 VTT_NCTF8 L13 AA34VSS43 VSS179 AL14
AC13VCCSM_NCTF27 VTT_NCTF7 M13 AB34VSS42 VSS178 AN14
AD13VCCSM_NCTF26 VTT_NCTF6 N13 AC34VSS41 VSS177 C15
AC14VCCSM_NCTF25 VTT_NCTF5 P13 AD34VSS40 VSS176 K15
AD14VCCSM_NCTF24 VTT_NCTF4 R13 AH34VSS39 VSS175 A16
AC15VCCSM_NCTF23 VTT_NCTF3 T13 AN34VSS38 VSS174 D16
AD15VCCSM_NCTF22 VTT_NCTF2 U13 B35 VSS37 VSS173 H16
AC16VCCSM_NCTF21 VTT_NCTF1 V13 D35 VSS36 VSS172 K16
+VCCP

AD16VCCSM_NCTF20 VTT_NCTF0 W13 E35 VSS35 VSS171 AL16

AC17VCCSM_NCTF19 F35 VSS34 VSS170 C17
AD17VCCSM_NCTF18 G35 VSS33 VSS169 G17
AC18VCCSM_NCTF17 H35 VSS32 VSS168 AF17
AD18VCCSM_NCTF16 J35 VSS31 VSS167 AJ17
2 AC19VCCSM_NCTF15 K35 VSS30 VSS166 AN17
2

AD19VCCSM_NCTF14 L35 VSS29 VSS165 A18

AC20VCCSM_NCTF13 M35 VSS28 VSS164 B18
AD20VCCSM_NCTF12 N35 VSS27 VSS163 U18
AC21VCCSM_NCTF11 P35 VSS26 VSS162 AL18
AD21VCCSM_NCTF10 R35 VSS25 VSS161 C19
AC22VCCSM_NCTF9 T35 VSS24 VSS160 H19
AD22VCCSM_NCTF8 U35 VSS23 VSS159 J19
AC23VCCSM_NCTF7 V35 VSS22 VSS158 T19
AD23VCCSM_NCTF6 W35 VSS21 VSS157 W19
AC24VCCSM_NCTF5 Y35 VSS20 VSS156 AG19
AD24VCCSM_NCTF4 AE35VSS19 VSS155 AN19
AC25VCCSM_NCTF3 C36 VSS18 VSS154 A20
AD25VCCSM_NCTF2 AA36VSS17 VSS153 D20
AC26VCCSM_NCTF1 AB36VSS16 VSS152 E20
AD26VCCSM_NCTF0 AC36VSS15 VSS151 F20
AD36VSS14 VSS150 G20
AE36VSS13 VSS149 V20
AF36 VSS12 VSS148 AK20
C21
Size
Title

AJ36 VSS11 VSS147

Date:

F21
+2_5VSUS_DDR1

Custom

AL36 VSS10 VSS146

AN36VSS9 VSS145 AF21
E37 VSS8 VSS144 AN21
H37 VSS7 VSS143 A22
D22
<Doc>

K37 VSS6 VSS142

M37 VSS5 VSS141 E22
P37 VSS4 VSS140 J22
T37 VSS3 VSS139 AH22
V37 VSS2 VSS138 AL22
H23
Document Number

Y37 VSS1 VSS137

AG37VSS0 VSS136 AF23
FOXCONN

Monday, September 13, 2004

1
1

Sheet
9
ALVISO_E (VSS,NCTF) 5 of 5
CPBG - R&D Division

of
47
?
Rev
HON HAI PRECISION IND. CO., LTD.
A
B
C
D
 5 4 3 2 1

MIOBD0 MIOAD2
14 MIOBD0 MIOBD1 14 MIOAD2
MIOAD3
14 MIOBD1 MIOBD2 14 MIOAD3
MIOAD4
14 MIOBD2 MIOBD3 14 MIOAD4
MIOAD5
14 MIOBD3 MIOBD4 14 MIOAD5
14 MIOBD4 MIOBD5 STRAP
14 MIOBD5 MIOBD6 12 STRAP
14 MIOBD6
MIOBD8
14 MIOBD8 MIOBD9
14 MIOBD9 MIOBD10
U29A L39 PEX_VDD SUBVENDOR MIOAD1 1 2
14 MIOBD10 MIOBD11 14 MIOAD1
AH15 288mA NV_BC-120-OHM R421 NV_2K
2,6,19,22,30 PLT_RST# PEX_RST# 14 MIOBD11
D AG12 AD23 L_PEX_VDD 1 2 D
C186 R147 NV_100 RFU0 PEX_IOVDD0 MIOB_VSYNC STRAP
AH13 RFU1 PEX_IOVDD1 AF24 14 MIOB_VSYNC SYSTEM BIOS 2 1

1
PEX_PLL_AVDD 1 2 1 2 AF23 NV_4.7U/10V_0805 MIOA_HSYNC R396 NV_10K
PEX_IOVDD2 14 MIOA_HSYNC

1
1 2 AM12 AF25 C158 C166 C167 NV_4.7U/10V_0805
NV_0.01U/16V PEX_TSTCLK_OUT PEX_IOVDD3 NV_0.022U/16V NV_0.022U/16V NV_0.022U/16V C648
AM11 PEX_TSTCLK_OUT# PEX_IOVDD4 AG24
R148 NV_100 C653

2
PEX_IOVDD5 AG25

2
4 CLK_PCIE_PEG AH14 PEX_REFCLK
4 CLK_PCIE_PEG# AJ14 PEX_REFCLK# PEX_IOVDDQ0 AC16
PEX_IOVDDQ1 AC17
TXP0 AJ15 AC21 Place near balls Place near GPU
TXN0 PEX_TX0 PEX_IOVDDQ2 +3VRUN
AK15 PEX_TX0# PEX_IOVDDQ3 AC22
TXP1 AH16 AE18 PEX_VDD
TXN1 PEX_TX1 PEX_IOVDDQ4
6 PEG_TXP_C[0..15] AG16 PEX_TX1# PEX_IOVDDQ5 AE21 1520mA
TXP2 AG17 AE22
TXN2 PEX_TX2 PEX_IOVDDQ6
AH17 PEX_TX2# PEX_IOVDDQ7 AF12 RAM_CFG0(A01)

1
PEG_TXP_C0 TXP3 AG18 AF18 1 2 MIOAD2 1 2
PEG_TXP_C1 TXN3 PEX_TX3 PEX_IOVDDQ8 C134 C146 C133 C159 C145 C656 R414 NC_10K R418 NC_10K
AH18 PEX_TX3# PEX_IOVDDQ9 AF21
PEG_TXP_C2 TXP4 AK18 AF22 NV_0.022U/16V NV_0.022U/16V NV_0.1U/16V NV_0.1U/16V NV_0.1U/16V NV_10U/10V_1206 RAM_CFG0(A02)
PEG_TXP_C3 TXN4 PEX_TX4 PEX_IOVDDQ10 MIOBD0

2
AJ18 PEX_TX4# 1 2 1 2

PCI EXPRESS
PEG_TXP_C4 TXP5 AJ19 K16 RAM_CFG(NV44M) R417 NC_2K R416 NV_2K
PEG_TXP_C5 TXN5 PEX_TX5 VDD0
AH19 PEX_TX5# VDD1 K17
4M X 32bit 2 RAM_CFG1(A01)
PEG_TXP_C6 TXP6 AG20 N13 Place near balls 1 2 MIOAD3 1 2
PEG_TXP_C7 TXN6 PEX_TX6 VDD2 R76 NC_10K R104 NC_10K
AH20 PEX_TX6# VDD3 N14 pcs (64bit)
PEG_TXP_C8 TXP7 AG21 N16 NV_VDD RAM_CFG1(A02)
PEG_TXP_C9 TXN7 PEX_TX7 VDD4 MIOBD1
AH21 PEX_TX7# VDD5 N17 3000mA 1 2 1 2
PEG_TXP_C10 TXP8 AK21 N19 R425 NV_2K R426 NC_2K
PEG_TXP_C11 TXN8 PEX_TX8 VDD6
AJ21 PEX_TX8# VDD7 N20 RAM_CFG2(A01)

1
PEG_TXP_C12 TXP9 AJ22 P13 1 2 MIOAD4 1 2
PEG_TXP_C13 TXN9 PEX_TX9 VDD8 C86 C108 C93 C81 C130 C110 R77 NC_10K R73 NC_10K
AH22 PEX_TX9# VDD9 P14
PEG_TXP_C14 TXP10 AG23 P16 NV_100P NV_0.01U/16V NV_0.01U/16V NV_0.01U/16V NV_0.01U/16V NV_0.01U/16V RAM_CFG2(A02)
PEG_TXP_C15 TXN10 PEX_TX10 VDD10 MIOBD8

2
6 PEG_TXN_C[0..15] AH23 PEX_TX10# VDD11 P17 1 2 1 2
C PEG_TXN_C0 TXP11 AK24 P19 R413 NC_2K R412 NV_2K C
PEG_TXN_C1 TXN11 PEX_TX11 VDD12
AJ24 PEX_TX11# VDD13 R16 RAM_CFG3(A01)
PEG_TXN_C2 TXP12 AJ25 R17 Place near GPU 1 2 MIOAD5 1 2
PEG_TXN_C3 TXN12 PEX_TX12 VDD14 R422 NC_10K R419 NC_10K
AH25 PEX_TX12# VDD15 T13

1
PEG_TXN_C4 TXP13 AH26 T14 RAM_CFG3(A02)
PEG_TXN_C5 TXN13 PEX_TX13 VDD16 C80 C99 C129 C98 C26 MIOBD9
AG26 PEX_TX13# VDD17 T15 1 2 1 2
PEG_TXN_C6 TXP14 AK27 T18 NV_220P NV_100P NV_100P NV_220P NV_10U/10V_1206 R78 NV_2K R79 NC_2K
PEG_TXN_C7 TXN14 PEX_TX14 VDD18

2
AJ27 PEX_TX14# VDD19 T19
PEG_TXN_C8 TXP15 AJ28
PEG_TXN_C9 TXN15 PEX_TX15
AH27 PEX_TX15# VDD20 U13 PCI_DEVID(NV44M) PCI_DEVID 0
PEG_TXN_C10 U14 Place near balls 1 2 MIOBD4 1 2
PEG_TXN_C11 VDD21 R433 NV_2K R432 NC_2K
VDD22 U15
PEG_TXN_C12 PEG_TXP_C0 AK13 U18 PCI_DEVID 1
PEG_TXN_C13 PEG_TXN_C0 PEX_RX0 VDD23 MIOBD5
AK14 PEX_RX0# VDD24 U19 1 2 1 2

1
PEG_TXN_C14 PEG_TXP_C1 AM14 V16 C563 C35 R431 NV_2K R430 NC_2K
PEG_TXN_C15 PEG_TXN_C1 PEX_RX1 VDD25 C91 C97 C75 C131
AM15 PEX_RX1# VDD26 V17 PCI_DEVID 2
PEG_TXP_C2 AL15 W13 NV_220P NV_220P NV_220P NV_0.01U/16V NV_10U/10V_1206 NV_10U/10V_1206 1 2 MIOBD3 1 2
PEG_TXN_C2 PEX_RX2 VDD27 R435 NV_2K R434 NC_2K

2
AL16 PEX_RX2# VDD28 W14
PEG_TXP_C3 AK16 W16 PCI_DEVID 3(A01)
PEX_RX3 VDD29

1
PEG_TXN_C3 AK17 W17 1 2 MIOA_HSYNC 1 2
PEG_TXP_C4 PEX_RX3# VDD30 C83 R427 NC_10K R423 NC_10K
AL17 PEX_RX4 VDD31 W19
PEG_TXN_C4 AL18 Y13 NV_220P PCI_DEVID 3(A02)
PEG_TXP_C5 PEX_RX4# VDD32 2
MIOBD11
AM18 PEX_RX5 VDD33 Y14 1 2 1 2
PEG_TXN_C5 AM19 Y16 R89 NC_2K R90 NV_2K
PEG_TXP_C6 PEX_RX5# VDD34
AK19 PEX_RX6 VDD35 Y17
PEG_TXN_C6 AK20 Y19
PEG_TXP_C7 PEX_RX6# VDD36
AL20 PEX_RX7 VDD37 Y20
PEG_TXN_C7 AL21 L8 CRYSTAL(NV44M) CRYSTAL 0
PEG_TXP_C8 PEX_RX7# L_NV_VDD NV_VDD MIOBD2
AM21 P20 1 2 1 2 1 2
PEG_TXN_C8 AM22
PEX_RX8 VDD_LP1
T20 NV_BC-120-OHM 10 (27M Hz) R136 NV_2K R137 NC_2K
PEX_RX8# VDD_LP2
1

1
PEG_TXP_C9 AK22 T23 C115
B PEG_TXN_C9 PEX_RX9 VDD_LP3 C95 C109 C89 B
AK23 U20 + C874
PEG_TXP_C10 PEX_RX9# VDD_LP4 NV_100P NV_220P NV_0.01U/16V NV_10U/10V_1206
AL23 PEX_RX10 VDD_LP5 U23 CRYSTAL 1
PEG_TXN_C10 NC_470U/2.5V_7343 MIOBD6
2

2
AL24 PEX_RX10# VDD_LP6 W20 1 2 1 2
PEG_TXP_C11 R132 NC_2K R133 NV_2K

2
AM24 PEX_RX11
PEG_TXN_C11 AM25 AC11 +3VRUN
PEG_TXP_C12 PEX_RX11# VDD33_0
AK25 PEX_RX12 VDD33_1 AC12
PEG_TXN_C12 AK26 AC24 ROM_TYPE(NV44M) ROM_TYPE 0
PEG_TXP_C13 PEX_RX12# VDD33_2 MIOBD10
AL26 AD24 1 2 1 2
PEX_RX13 VDD33_3 01
1

1
PEG_TXN_C13 AL27 AE11 R129 NC_2K R130 NV_2K
PEG_TXP_C14 PEX_RX13# VDD33_4 C147 C82 C74
AM27 PEX_RX14 VDD33_5 AE12
PEG_TXN_C14 AM28 H7 NV_0.1U/16V NV_0.022U/16V NV_1U/10V_0603
PEG_TXP_C15 PEX_RX14# VDD33_6
ROM_TYPE 1(A01)
2

2
AL28 PEX_RX15 VDD33_7 J7
PEG_TXN_C15 AL29 K7 1 2 MIOBD11 1 2
PEX_RX15# VDD33_8 R93 NC_10K R94 NC_10K
VDD33_9 L10 Place near GPU
VDD33_10 L7
VDD33_11 L8
J6 NC0 VDD33_12 M10 ROM_TYPE 1(A02)
B32 1 2 MIOB_VSYNC 1 2
R158 NC_0 NC1 R125 NV_2K R126 NC_2K
AM9 NC2 PEX_PLLAVDD AF15
1 2 AM8 Place near balls Place near GPU PEX_VDD
NC3
1 2 AM10 NC4 PEX_PLLDVDD AE15
180mA PEX_PLL_AVDD L38
R157 0 AE16 1 2 STRAP PIN for NV44M
PEX_PLLGND NV_BLM11A121S
1

NV_NV44M C168 C160 C651

NV_0.1U/16V NV_0.01U/16V NV_4.7U/10V_0805
6 PEG_RXP[0..15]
C211 NV_0.1U/16V
2

PEG_RXP0 1 2 C237 NV_0.1U/16V TXP0 C210 NV_0.1U/16V

PEG_RXP1 C209 NV_0.1U/16V 1 2 TXP1 L37 PEG_RXN0 1 2 C238 NV_0.1U/16V TXN0
PEG_RXP2 1 2 C236 NV_0.1U/16V TXP2 PEX_PLL_DVDD1 2 PEG_RXN1 C208 NV_0.1U/16V 1 2 TXN1
A A
PEG_RXP3 C207 NV_0.1U/16V 1 2 TXP3 20mA NV_BLM11A121S PEG_RXN2 1 2 C235 NV_0.1U/16V TXN2
1

PEG_RXP4 1 2 C234 NV_0.1U/16V TXP4 PEG_RXN3 C206 NV_0.1U/16V 1 2 TXN3

PEG_RXP5 C204 NV_0.1U/16V 1 2 TXP5 C161 C148 C652 C670 PEG_RXN4 1 2 C233 NV_0.1U/16V TXN4
PEG_RXP6 1 2 C232 NV_0.1U/16V TXP6 NV_4700P/50V NV_0.01U/16V NV_4.7U/10V_0805 NV_4.7U/10V_0805 PEG_RXN5 C205 NV_0.1U/16V 1 2 TXN5
PEG_RXP7 C203 NV_0.1U/16V TXP7 PEG_RXN6 C231 NV_0.1U/16V TXN6
2

1 2 1 2
PEG_RXP8 1 2 C230 NV_0.1U/16V TXP8 PEG_RXN7 C202 NV_0.1U/16V 1 2 TXN7 HON HAI PRECISION IND. CO., LTD.
PEG_RXP9
PEG_RXP10
PEG_RXP11
C201
1
C199
2
NV_0.1U/16V

NV_0.1U/16V
1
C228
2
NV_0.1U/16V
TXP9
TXP10
TXP11
Place near balls Place near GPU PEG_RXN8
PEG_RXN9
PEG_RXN10
1
C200
2
NV_0.1U/16V
C229
1
C227
2
NV_0.1U/16V

NV_0.1U/16V
TXN8
TXN9 FOXCONN
TXN10 Title
CPBG - R&D Division
1 2 1 2
PEG_RXP12 1 2 C226 NV_0.1U/16V TXP12 PEG_RXN11 C198 NV_0.1U/16V 1 2 TXN11 VGA(nVIDIA NV44M) 1/5
PEG_RXP13 C197 NV_0.1U/16V 1 2 TXP13 PEG_RXN12 1 2 C225 NV_0.1U/16V TXN12
PEG_RXP14 1 2 C224 NV_0.1U/16V TXP14 PEG_RXN13 C196 NV_0.1U/16V 1 2 TXN13 Size Document Number Rev
PEG_RXP15 1 2 TXP15 PEG_RXN14 1 2 C223 NV_0.1U/16V TXN14 Custom <Doc> ?
6 PEG_RXN[0..15] TXN15
PEG_RXN15 1 2
Date: Monday, September 13, 2004 Sheet 10 of 47
5 4 3 2 1
 1 2 3 4 5 6 7 8

U29B
15 FBAD[0:63] FBAD0 N27 FBAD0 FBVDD0 A12
FBAD1 M27 A15
FBAD2 FBAD1 FBVDD1
N28 FBAD2 FBVDD2 A18
FBAD3 L29 A21
FBAD4 FBAD3 FBVDD3
K27 FBAD4 FBVDD4 A24
FBAD5 K28 A27
FBAD6 FBAD5 FBVDD5
J29 FBAD6 FBVDD6 A3
FBAD7 J28 A30
FBAD8 FBAD7 FBVDD7
A P30 FBAD8 FBVDD8 A6 A
FBAD9 N31 A9
FBAD10 FBAD9 FBVDD9
N30 FBAD10 FBVDD10 AA32
FBAD11 N32 AD32
FBAD12 FBAD11 FBVDD11
L31 FBAD12 FBVDD12 AG32
FBAD13 L30 AK32
U29D FBAD14 FBAD13 FBVDD13
J30 FBAD14 FBVDD14 C32
AA12 D4 FBAD15 L32 F32
GND1 GND81 FBAD16 FBAD15 FBVDD15
AA2 GND2 GND82 D7 H30 FBAD16 FBVDD16 J32
AA21 F11 FBAD17 K30 M32
GND3 GND83 FBAD18 FBAD17 FBVDD17 VRAMVDD
AA31 GND4 GND84 F14 H31 FBAD18 FBVDD18 R32
AB27 F19 FBAD19 F30 V32
GND5 GND85 FBAD20 FBAD19 FBVDD19
AB6 GND6 GND86 F2 H32 FBAD20
AC10 F22 FBAD21 E31 AA25
GND7 GND87 FBAD22 FBAD21 FBVDDQ0
AC23 GND8 GND88 F25 D30 FBAD22 FBVDDQ1 AA26
AC29 F31 FBAD23 E30 AB25
GND9 GND89 FBAD24 FBAD23 FBVDDQ2 C67 C132 C94 C58 C70 C38
AC4 GND10 GND90 F8 H28 FBAD24 FBVDDQ3 AB26
AD16 G26 FBAD25 H29 G11 NV_0.022U/16V NV_0.1U/16V NV_0.022U/16V NV_0.1U/16V NV_0.1U/16V NV_4.7U/10V_0805
GND11 GND91 FBAD25 FBVDDQ4

1
AD17 G29 FBAD26 E29 G12
GND12 GND92 FBAD27 FBAD26 FBVDDQ5
AD2 GND13 GND93 G4 J27 FBAD27 FBVDDQ6 G15 +
AD31 G7 FBAD28 F27 G18 C870
GND14 GND94 FBAD29 FBAD28 FBVDDQ7 NV_220U/6.3V_7343
AE17 GND15 GND95 H27 E27 FBAD29 FBVDDQ8 G21
FBAD30 C118 C69 C84

2
AE27 GND16 GND96 H6 E28 FBAD30 FBVDDQ9 G22
AE6 J16 FBAD31 F28 H11 NV_0.022U/16V NV_0.1U/16V NV_0.1U/16V
GND17 GND97 FBAD32 FBAD31 FBVDDQ10
AF11 GND18 GND98 J17 AD29 FBAD32 FBVDDQ11 H12
AF26 J2 FBAD33 AE29 H15
GND19 GND99 FBAD34 FBAD33 FBVDDQ12
AF29 GND20 GND100 J31 AD28 FBAD34 FBVDDQ13 H18
FBAD35 AC28 H21 Place near balls
FBAD36 FBAD35 FBVDDQ14
AF4 GND21 GND101 K10 AB29 FBAD36 FBVDDQ15 H22
AF7 K23 FBAD37 AA30 L25
GND22 GND102 FBAD38 FBAD37 FBVDDQ16
AG10 GND23 GND103 K29 Y28 FBAD38 FBVDDQ17 L26
B AG11 K4 FBAD39 AB30 M25 B
GND24 GND104 FBAD40 FBAD39 FBVDDQ18
AG14 GND25 GND105 L27 AM30 FBAD40 FBVDDQ19 M26
AG15 L6 FBAD41 AF30 R25
GND26 GND106 FBAD42 FBAD41 FBVDDQ20
AG19 GND27 GND107 M12 AJ31 FBAD42 FBVDDQ21 R26
AG2 M2 FBAD43 AJ30 V25
GND28 GND108 FBAD44 FBAD43 FBVDDQ22
AG22 GND29 GND109 M21 AJ32 FBAD44 FBVDDQ23 V26
AG31 M31 FBAD45 AK29
GND30 GND110 FBAD45 FBA_A[0..12] 15
AG8 N15 FBAD46 AM31 P32 FBA_A3
GND31 GND111 FBAD47 FBAD46 FBA_CMD0 FBA_A0
AH24 GND32 GND112 N18 AL30 FBAD47 FBA_CMD1 U27 FBB_A[2..5] 15
AJ10 N29 FBAD48 AE32 P31 FBA_A2
GND33 GND113 FBAD49 FBAD48 FBA_CMD2 FBA_A1
AJ13 GND34 GND114 N4 AE30 FBAD49 FBA_CMD3 U30
AJ16 P15 FBAD50 AE31 Y31 FBB_A3
GND35 GND115 FBAD51 FBAD50 FBA_CMD4 FBB_A4
AJ17 GND36 GND116 P18 AD30 FBAD51 FBA_CMD5 W32
AJ20 P27 FBAD52 AC31 W31 FBB_A5
GND37 GND117 FBAD53 FBAD52 FBA_CMD6 FBA_CS1#
AJ23 GND38 GND118 P6 AC32 FBAD53 FBA_CMD7 T32 FBA_CS1# 15
AJ26 R13 FBAD54 AB32 V27 FBA_CS0#
GND39 GND119 FBAD54 FBA_CMD8 FBA_CS0# 15
AJ29 R14 FBAD55 AB31 T28 FBA_WE#
GND40 GND120 FBAD55 FBA_CMD9 FBA_WE# 15
FBAD56 AG27 T31 FBA_BA0
FBAD56 FBA_CMD10 FBA_BA0 15
AJ4 R15 FBAD57 AF28 U32 FBA_CKE
GND41 GND121 FBAD57 FBA_CMD11 FBA_CKE 15
AJ7 R18 FBAD58 AH28 W29 FBA_RST
GND42 GND122 FBAD59 FBAD58 FBA_CMD12 T8
AK2 GND43 GND123 R19 AG28 FBAD59
AK28 R2 FBAD60 AG29 W30 FBB_A2 PAD
GND44 GND124 FBAD61 FBAD60 FBA_CMD13
AK31 GND45 GND125 R20 AD27 FBAD61
AL11 R31 FBAD62 AF27 T27 FBA_A12
GND46 GND126 FBAD63 FBAD62 FBA_CMD14 FBA_RAS#
AL14 GND47 GND127 T16 AE28 FBAD63 FBA_CMD15 V28 FBA_RAS# 15
AL19 GND48 GND128 T17 15 FBADQM[7..0]
AL22 T24 FBADQM0 M29 V30 FBA_A11
GND49 GND129 FBADQM1 FBADQM0 FBA_CMD16 FBA_A10
AL25 GND50 GND130 T29 M30 FBADQM1 FBA_CMD17 U31
AL3 T4 FBADQM2 G30 R27 FBA_BA1
GND51 GND131 FBADQM2 FBA_CMD18 FBA_BA1 15
AL6 U16 FBADQM3 F29 VRAMVDD
GND52 GND132 FBADQM4 FBADQM3 FBA_A8
AL9 GND53 GND133 U17 AA29 FBADQM4 FBA_CMD19 V29
C FBADQM5 FBA_A9 C
AM13 GND54 GND134 U24 AK30 FBADQM5 FBA_CMD20 T30
AM16 U29 FBADQM6 AC30 W28 FBA_A6
GND55 GND135 FBADQM7 FBADQM6 FBA_CMD21 FBA_A5
AM17 GND56 GND136 U8 AG30 FBADQM7 FBA_CMD22 R29

1
AM20 V13 R30 FBA_A7
GND57 GND137 15 FBADQS[7..0] FBADQS0 FBA_CMD23 FBA_A4 R44 R52
AM23 GND58 GND138 V14 L28 FBADQS_WP0 FBA_CMD24 P29
AM26 V15 FBADQS1 K31 U28 FBA_CAS# NC_100/F NC_100/F
GND59 GND139 FBADQS_WP1 FBA_CMD25 FBA_CAS# 15
AM29 V18 FBADQS2 G32
GND60 GND140 FBADQS3 FBADQS_WP2 FBA_A13 T156
G28 FBADQS_WP3 FBA_CMD26 Y32
FBADQS4 FBACLK0 PAD

2
B12 B12 GND141 V19 AB28 FBADQS_WP4 FBA_CLK0 P28 FBACLK0 15
B15 V2 FBADQS5 AL32 R28
B15 GND142 FBADQS_WP5 FBA_CLK0# FBACLK0# 15
B18 V20 FBADQS6 AF32 Y27 FBACLK1
B18 GND143 FBADQS_WP6 FBA_CLK1 FBACLK1 15

1
B21 V31 FBADQS7 AH30 AA27
B21 GND144 FBADQS_WP7 FBA_CLK1# FBACLK1# 15
B24 W15 VRAMVDD R45 R53
B24 GND145 T16 PAD NC_100/F NC_100/F
B27 B27 GND146 W18 M28 FBADQS_RN0 RFU2 Y30
B3 W27 TP3 PAD K32 AC26 T20 PAD
B3 GND147 TP2 PAD FBADQS_RN1 RFU3
B30 B30 GND148 W6 G31 FBADQS_RN2
TP1 PAD T23

2
B6 B6 GND149 Y15 G27 FBADQS_RN3 FBA_DEBUG AC27
1

B9 Y18 TP8 PAD AA28 PAD

B9 GND150 TP4 PAD FBADQS_RN4 FBA_REFCLK +3VRUN
C2 C2 GND151 Y29 AL31 FBADQS_RN5 FBA_REFCLK D32
C31 Y4 TP7 PAD AF31 D31 FBA_REFCLKN
C31 GND152 R63 C65 TP5 PAD FBADQS_RN6 FBA_REFCLKN L5
D10 D10 AH29 FBADQS_RN7
D13 NV_1K/F NV_0.1U/16V TP6 PAD G23 FBA_PLLVDD 1 2
D13 FB_VREF1 FBA_PLLVDD NV_BLM11A121S
2

D16 D16 E32 FB_VREF1 FBA_PLLAVDD G25

D17 D17
1

D20 G24 C61 C57 C36

D20 R59 C60 FBA_PLLGND NV_470P NV_4700P/50V NV_4.7U/10V_0805
D23 D23
D26 NV_1K/F NV_0.1U/16V NV_NV44M NV_VDD
D26
D29 D29 L7
FBA_PLLAVDD
2

NV_NV44M 1 2
D
NV_BLM11A121S D

C52 C56 C49

NV_470P NV_4700P/50V NV_4.7U/10V_0805

Place U6.E32
HON HAI PRECISION IND. CO., LTD.
FOXCONN
Title
CPBG - R&D Division
VGA(nVIDIA NV44M) 2/5
Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 11 of 47

1 2 3 4 5 6 7 8
 A B C D E

VRAM_TERM VRAMVDD

1
R649 R650

NC_0_0805 NV_0_0805

2
4 4
U29C
B7 FBCD0 FBVTT0 AA23
A7 FBCD1 FBVTT1 AB23
C7 FBCD2 FBVTT2 H16
A2 H17 C107 C76 C119 C66 C68 C88 C71 C37
FBCD3 FBVTT3 NV_0.001U NV_0.001U NV_0.01U/16V NV_0.01U/16V NV_0.01U/16V NV_0.01U/16V NV_0.001U NV_4.7U/10V_0805
B2 FBCD4 FBVTT4 J10
C4 FBCD5 FBVTT5 J23
A5 FBCD6 FBVTT6 J24
B5 FBCD7 FBVTT7 J9
F9 FBCD8 FBVTT8 K11
F10 FBCD9 FBVTT9 K12
D12 FBCD10 FBVTT10 K21
D9 FBCD11 FBVTT11 K22
E12 K24 +3VRUN
FBCD12 FBVTT12
D11 FBCD13 FBVTT13 K9
E8 FBCD14 FBVTT14 L23
D8 FBCD15 FBVTT15 M23
E7 FBCD16 FBVTT16 T25
F7 FBCD17 FBVTT17 U25
D6 FBCD18

1
D5 C13 R122 R49 R406 C584
FBCD19 FBC_CMD0
D3 FBCD20 FBC_CMD1 A16
E4 A13 NV_10K NV_10K NV_10K NV_0.1U/16V
FBCD21 FBC_CMD2

2
C3 FBCD22 FBC_CMD3 B17
B4 FBCD23 FBC_CMD4 B20 U29E
C10 FBCD24 FBC_CMD5 A19
B10 B19 STRAP F1 AA4 ROMCS
FBCD25 FBC_CMD6 10 STRAP STRAP ROMCS
C8 FBCD26 FBC_CMD7 B14
A10 FBCD27 FBC_CMD8 E16 T22 PAD AE26 MEMSTRAPSEL0 ROM_S0 AA6
3 C11 A14 AD26 W2 3
FBCD28 FBC_CMD9 T24 PAD MEMSTRAPSEL1 ROM_S1
C12 C15 T26 PAD AH31 AA7 PAD T15
FBCD29 FBC_CMD10 MEMSTRAPSEL2 ROM_SCLK PAD T18
A11 FBCD30 FBC_CMD11 B16 T27 PAD AH32 MEMSTRAPSEL3
B11 FBCD31 FBC_CMD12 F17 I2CH_SCL G3
B28 FBCD32 T6 PAD U3 RFU1 I2CH_SDA H3
C27 C19 T14 PAD V3 R119
FBCD33 FBC_CMD13 RFU2
C26 FBCD34 T9 PAD U6 RFU3 BUFRST F3
B26 D15 T7 PAD U5 PAD T2 NV_0
FBCD35 FBC_CMD14 RFU4 +3VRUN
C30 FBCD36 FBC_CMD15 C17 T12 PAD U4 RFU5 STERE0 T3
B31 T13 PAD V4 R98 NV_10K PAD T5
FBCD37 RFU6
C29 FBCD38 FBC_CMD16 A17 T4 PAD V6 RFU7 SWAPRDY M6 SWAPRDY
A31 FBCD39 FBC_CMD17 C16
D28 FBCD40 FBC_CMD18 D14 TESTMEMCLK A26
D27 FBCD41 TESTMODE H2
F26 FBCD42 FBC_CMD19 F16 MCG1 AL10
D24 FBCD43 FBC_CMD20 C14 MCG2 AG13
E23 C18 R58 R42
FBCD44 FBC_CMD21
E26 FBCD45 FBC_CMD22 E14 NV_NV44M
E24 B13 NV_10K NV_10K
FBCD46 FBC_CMD23
F23 FBCD47 FBC_CMD24 E15
B23 FBCD48 FBC_CMD25 F15
A23 FBCD49
C25 FBCD50 FBC_CMD26 A20
C23 FBCD51
A22 FBCD52 FBC_CLK0 E13
C22 FBCD53 FBC_CLK0# F13
C21 FBCD54 FBC_CLK1 F18
B22 FBCD55 FBC_CLK1# E17
E22 FBCD56
D22 FBCD57 RFU4 C20
D21 FBCD58 RFU5 D1
2 2
E21 FBCD59
E18 FBCD60 FBC_DEBUG F12
D19 FBCD61
D18 FBCD62
E19 FBCD63
A4 FBCDQM0 FBC_REFCLK B1
E11 FBCDQM1 FBC_REFCLKN C1
F5 FBCDQM2
C9 NV_VDD
FBCDQM3
C28 FBCDQM4
F24 R622 NC_0
FBCDQM5
C24 FBCDQM6
E20 FBCDQM7 +3VRUN
C5 FBCDQS_WP0
E10 L6
FBCDQS_WP1 FBC_PLLVDD
E5 FBCDQS_WP2 FBC_PLLVDD G8 1 2
B8 NV_BLM11A121S
FBCDQS_WP3
A29 FBCDQS_WP4
D25 FBCDQS_WP5
B25 FBCDQS_WP6
F20 C59 C55 C39
FBCDQS_WP7 NC_470P NV_4700P/50V NC_4.7U/10V_0805
FBC_PLLAVDD G10
C6 VRAMVDD
FBCDQS_RN0
E9 FBCDQS_RN1
E6 FBCDQS_RN2
A8 G9 R71
FBCDQS_RN3 FBC_PLLGND
B29 FBCDQS_RN4
E25 NV_40.2/F
FBCDQS_RN5
1 A25 FBCDQS_RN6 1
F21 K26 FBCAL_PD_VDDQ
FBCDQS_RN7 FBCAL_PD_VDDQ
FBCAL_PU_GND H26
A28 FB_VREF2 FBCAL_TERM_GND J26

NV_NV44M
R66 HON HAI PRECISION IND. CO., LTD.
NV37 is NC
NV4x is 50ohm NV_49.9/F
R62

NV_40.2/F
FOXCONN
Title
CPBG - R&D Division

VGA(nVIDIA NV44M) 3/5

Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 12 of 47

A B C D E
 1 2 3 4 5 6 7 8

H : NOTEBOOK
LVDS CONNECTOR L : PORT REPLICATOR
FOXCONN_GS12401_1011
INVERTER_VCC
Q21 CN1 +5VRUN
15V +15VRUN +3VRUN FDC653N 1 40
LCDVCC EVEN_RXIN0- 1 40 U15
2 2 39 39

1
6 EVEN_RXIN0+ 3 38 C264 1U/10V_0603 5 6
3 38 VCC SEL DOCKED# 23
5 4 4 37 C549
R643 EVEN_RXIN1- 4 37 0.1U/16V VGA_RED RED
2 5 5 36 36 1 IN_B1 COM 4
EVEN_RXIN1+

2
1 6 6 35 35

NC_100K
+3VRUN R369 7 34 PR_RED 3
7 34 IN_B0

2
100K R370 C550 C551 EVEN_RXIN2- 8 33 INV_ENABLE 2
EVEN_RXIN2+ 8 33 BRADJPWM_LPF GND
2 BRADJ_EC

3
9 9 32 32 1 BRADJ_EC 30
330_0805 22U/10V_1206 0.01U/16V 10 31 NC7SB3157
ON_LCDVCC EVEN_CLKIN- 10 31 R2 NC_0

1
11 11 30 30
EVEN_CLKIN+ 12 29 LCDVCC
12 29

3
A U14 A
R371 13 28
13 28

2
10K C546 14 27 C263 1U/10V_0603 5 6
Q20 ODD_CLKIN+ 14 27 VCC SEL
15 15 26 26
1 0.01U/16V ODD_CLKIN- 16 25 ODD_RXIN0- VGA_GREEN 1 4 GREEN
16 25 IN_B1 COM
3

2N7002 ODD_RXIN0+

1
17 17 24 24
ODD_RXIN2+ 18 23 PR_GREEN 3
ODD_RXIN2- 18 23 ODD_RXIN1- IN_B0
6,14 LCDVCC_EN 2 19 19 22 22 GND 2
Q19 20 21 ODD_RXIN1+

44
43
42
41
20 21

3
AL_DTC144EUA NC7SB3157

2
Q18

44
43
42
41
+5VRUN
1

C16 0.1U/16V U13

1
1 2 C262 1U/10V_0603 5 6
VCC SEL
2N7002 VGA_BLUE 1 4 BLUE
IN_B1 COM
R373 NV_0 PR_BLUE

2
30 BRADJ_EC 3 IN_B0
R11 2
GND

8
7
6
5
1K/F
RP1 NC7SB3157
8P4R-10K
+3VRUN

1
U1

1
2
3
4
RGB ANALOG SWITCH

5
C17 1
30 INV_EN_EC

3
0.1U/16V 4 INV_ENABLE
R623 NC_0 2

2
30 LIDIN#
2 5 74AHC1G08GW

3
SW4 Q1A Q1B
1 8 TOSHIBA_HN1B01FU_TE85R TOSHIBA_HN1B01FU_TE85R NV_RED R179 NV_0 RED R178 NC_0 VGA_RED
LCDID0 20
+3VRUN

4
2 7 LCDID1 20
3 6 BRADJPWM_LPF GM_RED R194 AL_0 R177 NC_0 PR_RED
LCDID2 20 PR_RED 23
4 5 LCDID3 20

5
1 U26 NV_BLUE R173 NV_0 BLUE R172 NC_0 VGA_BLUE
4
HCH_HDS404_021E 1 2 INV_EN_L 2 GM_BLUE R192 AL_0 R171 NC_0 PR_BLUE
PR_BLUE 23
B CLOSE 1 2 C553 74LVC1G08GW B
C554 NC_10P NV_GREEN R176 NV_0 GREEN R175 NC_0 VGA_GREEN

3
C193 U29I NC_10P
AM4 IFPAB_VPROBE IFPA_TXC1 AJ9NV_ODD_CLKIN- 3 2 RP56ODD_CLKIN- 3 2 RP64 GM_ODD_CLKIN- 6
GM_GREEN R193 AL_0 R174 NC_0 PR_GREEN
PR_GREEN 23
+3VRUN AK9NV_ODD_CLKIN+ 4 1 ODD_CLKIN+ 4 1
IFPA_TXC2 GM_ODD_CLKIN+ 6
NV_0.01U/16V NV_4P2R-S-0 AL_4P2R-S-0 CLOSE CLOSE
1 2 AL5 IFPAB_RSET IFPA_TXD0 AJ6NV_ODD_RXIN0- 3 2 RP59 ODD_RXIN0- 3 2 RP67 GM_ODD_RXIN0- 6
IFPA_TXD00 AH6NV_ODD_RXIN0+ 4 1 ODD_RXIN0+ 4 1 GM_ODD_RXIN0+ 6
GM_RED
GM_RED 6
R159 NV_1K/F NV_4P2R-S-0 AL_4P2R-S-0 R391 NV_0 GM_GREEN
14 NV_BLEN GM_GREEN 6
L10 AH7NV_ODD_RXIN1- 3 2 RP58 ODD_RXIN1- 3 2 RP66 GM_BLUE
IFPA_TXD1 GM_ODD_RXIN1- 6 GM_BLUE 6
1 2 IFPAB_PLLVDD AC9 AH8NV_ODD_RXIN1+ 4 1 ODD_RXIN1+ 4 1 R186 AL_0
IFPAB_PLLVDD IFPA_TXD11 GM_ODD_RXIN1+ 6 6 INV_EN
NV_BLM11A121S 40mA NV_4P2R-S-0 AL_4P2R-S-0
IFPA_TXD2 AK8NV_ODD_RXIN2- 3 2 RP57 ODD_RXIN2- 3 2 RP65 GM_ODD_RXIN2- 6
C141 C135 C136 AJ8NV_ODD_RXIN2+ 4 1 ODD_RXIN2+ 4 1 R197
IFPA_TXD22 GM_ODD_RXIN2+ 6
C157 NV_4.7U/10V_0805 NV_470P AD9 NV_4P2R-S-0 AL_4P2R-S-0 AL_100K
NV_4700P/50V IFPAB_PLLGND
IFPA_TXD3 AH5 1 2
NEAR GPU NV_4.7U/10V_0805 AJ5 1 2 C556
IFPA_TXD33 C555 NC_10P
NEAR BALL
IFPB_TXC1 AL4NV_EVEN_CLKIN- 3 2 RP52EVEN_CLKIN- 3 2 RP60 NC_10P GM_EVEN_CLKIN- 6
L35 AK4NV_EVEN_CLKIN+ 4 1 EVEN_CLKIN+ 4 1
IFPB_TXC2 GM_EVEN_CLKIN+ 6
1 2 IFPA_IOVDD AF9 NV_4P2R-S-0 AL_4P2R-S-0
IFPA_IOVDD
NV_BLM11A121S 120mA IFPB_TXD4
NV_EVEN_RXIN0-
AM5 3 2 RP55EVEN_RXIN0- 3 2 RP63 GM_EVEN_RXIN0- 6
NV_EVEN_RXIN0+
AM6 4 1 EVEN_RXIN0+ 4 1
IFPB_TXD44 GM_EVEN_RXIN0+ 6
C641 C637 C163 C162 NV_4P2R-S-0 AL_4P2R-S-0
NV_4.7U/10V_0805 NV_470P
IFPB_TXD5 AL7NV_EVEN_RXIN1- 3 2 RP54EVEN_RXIN1- 3 2 RP62 GM_EVEN_RXIN1- 6
NV_4.7U/10V_0805 NV_4700P/50V AM7NV_EVEN_RXIN1+ 4 1 EVEN_RXIN1+ 4 1
IFPB_TXD55 GM_EVEN_RXIN1+ 6
NEAR GPU NEAR BALL NV_4P2R-S-0 AL_4P2R-S-0
AF8 IFPB_IOVDD IFPB_TXD6 AK5NV_EVEN_RXIN2- 3 2 RP53EVEN_RXIN2- 3 2 RP61 GM_EVEN_RXIN2- 6
+5VRUN
L12 AK6NV_EVEN_RXIN2+ 4 1 EVEN_RXIN2+ 4 1
IFPB_TXD66 GM_EVEN_RXIN2+ 6
1 2 IFPB_IOVDD NV_4P2R-S-0 AL_4P2R-S-0 D4 BAT54S Close CRT connector .
NV_BLM11A121S 120mA AL8 2 1
IFPB_TXD7 +5VRUN
IFPB_TXD77 AK7

2
C184 C183 C173 C172 For 915PM For 915GM L30 NC_MINISMDC110 C6
NV_4.7U/10V_0805 NV_470P L_PR_DDCCLK PR_DDCCLK F1

3
NV_NV44M 1 2
NEAR GPU NV_4.7U/10V_0805 NV_4700P/50V BLM11A121S NC_0.1U/16V
1.1A

1
+5VRUN PR_HSYNC 23
NEAR BALL
U4 PR_HSYNC 2 HSYNC13

2
1

3
C R383 C
1 Q2 L1 68NH
+2_5VRUN_ALV 2.2K 4 R23 33

1 D_CRT_+5VRUN
+3VRUN HSYNC 2 C5 C855
74AHCT1G08GW 1 NC_47P 47P
3

R4

3
R384 R74 Q22 NC_0
NV_4.7K AL_2.2K C560 2N7002 E_GND
1 CRT_+5VRUN R24 NC_33
D5 BAT54S Close CRT connector .

2
2N7002 220P 2 1

2
D1 C9
R385 NC_SM240A +5VRUN
2

3
For 915PM For 915GM 2.2K E_GND NC_0.1U/16V
PR_VSYNC 23

1
+2_5VRUN_ALV PR_VSYNC 2 VSYNC14

2
C1 +5VRUN 1
L_PR_DDCDATA 1 2 PR_DDCDATA L2 68NH

3
+3VRUN BLM11A121S U5 Q3
3

5
L29 NC_0.1U/16V 1 C10 C856
Q23 C559 E_GND 4 R26 33 NC_47P 47P
R68 220P R7

CRT_+5VRUN
R386 VSYNC 2 1
NV_4.7K AL_2.2K 1 74AHCT1G08GW NC_0

3
2N7002 2N7002 E_GND
+3VRUN
NC_33

2
R25
E_GND JVGA1
2

L26 T150 +V_RGB_ESD

6
2

VGA_RED 1 2 PAD 11
6 VGA_DDCCLK
BLM11B750SB J_RED 1 AL_0 R379 R380 NV_0
6 VGA_DDCDATA C544
R368 C543 7 16 R27 0 +2_5VRUN_ALV +5VRUN
L11 75/F 22P 22P 12 17
NV_BLM11A121S 70mA J_GREEN 2
8 R1 0
U29F

2
HSYNC13
1

13
NVDACA_VDD L27 E_GND J_BLUE D18 D19 D17
AD10 DACA_VDD I2CA_SCL K2 3

2
J3 For 915PM VGA_GREEN 1 2 9 C558 VGA_GREEN 3 C545 VGA_BLUE 3 C542VGA_RED 3
I2CA_SDA BLM11B750SB VSYNC14
D AH10 DACA_VREF 14 D
1

C175 AF10 NV_HSYNC R437 NV_0 HSYNC R372 C548 C547 T151 4 E_GND NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V
DACA_HSYNC NV_VSYNC R439 NV_0 VSYNC 75/F 22P 22P PAD VGA_CRT_DET#

1
AH9 DACA_RSET DACA_VSYNC AK10 10
NV_4.7U/10V_0805 BAT54S BAT54S BAT54S

1
15
NV_RED
2

DACA_RED AH11 5
1

C151 C150 C149 C174

NV_GREEN L28 E_GND FOXCONN_DZ11A91_MW222_4F
DACA_GREEN AJ12
NV_0.01U/16V NV_470P VGA_BLUE 1 2 E_GND
NV_4700P/50V NV_0.01U/16V NV_BLUE BLM11B750SB VGA_CRT_DET#
2

DACA_BLUE AH12
R374 C557 C552 HON HAI PRECISION IND. CO., LTD.
VGA_CRT_DET# 23,30
FOXCONN

3
R154 R153 AG9 75/F 22P 22P
DACA_IDUMP PR_DDCDATA 23 CPBG - R&D Division
NV_137/F NV_1.5K/F
PR_DDCCLK 23 Title
NV_NV44M HSYNC 2 Q11
NEAR GPU NEAR BALL 55mA VSYNC
HSYNC 6 23,30 EN_EXT_DEV_SENSE# VGA(nVIDIA NV44M) 4/5
VSYNC 6

R235,R237,R241 L30,L32,L33
E_GND
CRT CON Semi-PnP
DTC144EUA
Size Document Number Rev
0a

1
C <Doc>
<1000 mils to JVGA1. <500mils to JVGA1. Date: Monday, September 13, 2004 Sheet 13 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

+3VRUN
+3VRUN +3VRUN

R60 Place near R393

NV_4.7K NV_4.7K
Thermal Sensor
SM bus Address :
1001100(EC) U29K
For F75383M M7 MI0A_VDDQ1 MIOAD0 P2
M8 N2 MIOAD1
U27 MI0A_VDDQ2 MIOAD1 MIOAD2 MIOAD1 10
R8 MI0A_VDDQ3 MIOAD2 N1 MIOAD2 10
A 2 8 SMB_THRM_CLK T8 N3 MIOAD3 A
DXP SMBCLK SMB_THRM_CLK 4,17,30 MI0A_VDDQ4 MIOAD3 MIOAD4 MIOAD3 10
U9 MI0A_VDDQ5 MIOAD4 M1 MIOAD4 10
3 7 SMB_THRM_DATA M3 MIOAD5
DXN SMBDATA SMB_THRM_DATA 4,17,30 MIOAD5 MIOAD5 10
MIOAD6 P5
4 THERM# ALERT# 6 NVTHM_ALERT# 30 MIOAD7 N6
MIOAD8 N5
1 VCC GND 5 MIOAD9 M4
MIOAD10 L4
+3VRUN NV_F75383M +3VRUN +3VRUN L1 L5
MI0ACAL_PD_VDDQ MIOAD11
L3 MI0ACAL_PU_GND
close GPU R3 MIOA_HSYNC
MIOA_HSYNC MIOA_HSYNC 10
R392 R410 R1
MIOA_VSYNC

1
C586 NV_47 C53 NV_1K/F +3VRUN
MIOA_DE P1
1 2 NV_0.1U/16V R46 R50 P3
U29L C62 NV_2.2K NV_2.2K MIOA_VREFL2 MIOA_CTL3
+3VRUN NV_2200P NV_0.1U/16V MI0A_VREF

2
J1 THERMON CLAMP F6 MIOA_CLKOUT1 R4
R397 NV_33 P4
MIOA_CLKOUT2

1
K1 G2 NV_I2CC_SCL M5 R61 R64
THERMDP I2CC_SCL R399 NV_33 C590 R411 MIOA_CLKIN NV_4.7K NV_4.7K
I2CC_SDA G1
NV_I2CC_SDA NV_0.1U/16V NV_1K/F NV_NV44M
R72 NV_100K U29G

2
GPIO0 K3
H1 R57 NV_100K R92 AD7 H4
GPIO1 NV_10K DACC_VDD I2CB_SCL
GPIO2 K5 I2CB_SDA J4
R155 R156 G5 AH4
GPIO3 LCDVCC_EN 6,13 DACC_VREF
NV_10K NV_10K E2 AG7
GPIO4 NV_BLEN 13 DACC_HSYNC
J5 R139 AF5 AG5
GPIO5 NV_10K DACC_RSET DACC_VSYNC
GPIO6 G6
AJ11 JTAG_TCK GPIO7 K6 DACC_RED AF6
AK11 JTAG_TMS GPIO8 E1
AK12 JTAG_TDI GPIO9 D2 DACC_GREEN AG6
AL12 JTAG_TDO GPIO10 H5
B AL13 F4 AE5 B
JTAG_TRST GPIO11 DACC_BLUE
GPIO12 E3
R48 R67 AG4
DACC_IDUMP
NV_NV44M
R56 R75 NV_0 NV_0 NV_NV44M
R145 R138 NC_10K NV_10K
NV_10K NV_10K
C185
NV_0.01U/16V U29J +3VRUN
AK3 IFPCD_VPROBE IFPC_TXC1 AM3
IFPC_TXC2 AM2
1 2 AH3 IFPCD_RSET
R143 AE1
NV_1K/F IFPC_TXD0
IFPC_TXD00 AE2

IFPC_TXD1 AF2
AA10 IFPCD_PLLVDD IFPC_TXD11 AF1

Place near to IFPC_TXD2 AH1

the NV IFPC_TXD22 AG1

R628 NC_0
U29M
4 CLK_NV27 AB10 IFPCD_PLLGND
+3VRUN Shortest AH2 AA8 AC3 MIOBD0
IFPD_TXC1 MIOB_VDDQ1 MIOBD0 MIOBD1 MIOBD0 10
L4 40mA AG3 AB7 AC1
1 2 NV_PLLVDD stub. IFPD_TXC2
AB8
MIOB_VDDQ2 MIOBD1
AC2 MIOBD2 MIOBD1 10
MIOB_VDDQ3 MIOBD2 MIOBD3 MIOBD2 10
NV_BLM11A121S AJ1 AC6 AB2
U29N IFPD_TXD3 MIOB_VDDQ4 MIOBD3 MIOBD4 MIOBD3 10
Place near GPU AD6 IFPC_IOVDD IFPD_TXD33 AK1 AC7 MIOB_VDDQ5 MIOBD4 AB1 MIOBD4 10
T9 AE7 AA1 MIOBD5
PLLVDD IFPD_IOVDD MIOBD5 MIOBD5 10
1

XTALOUTBUFF T2 XTALOUTBUFF IFPD_TXD4 AL1 MIOBD6 AB3 MIOBD6

MIOBD6 10
C28 C40 C101 C96 T10 AL2 AA3
C NV_4.7U/10V_0805 NV_4.7U/10V_0805 NV_470P NV_4700P/50V DISP_PLLVDD IFPD_TXD44 MIOBD7 MIOBD8 C
MIOBD8 AC5 MIOBD8 10
R127 R124 R140 MIOBD9
2

U10 PLLGND XTALOUT U2 IFPD_TXD5 AJ3 MIOBD9 AB5 MIOBD9 10

R96 R102 NV_10K NV_10K NV_10K AJ2 Y1 AB4 MIOBD10
IFPD_TXD55 MIOBCAL_PD_VDDQ MIOBD10 MIOBD11 MIOBD10 10
NC_22 NV_60.4/F AA5
MIOBD11 MIOBD11 10
NV_NV44M VIPD12 W3
XTALSSINT1 V1
+3VRUN XTALSSIN VIPD13
VIPD14 Y5
L9 40mA U1 +3VRUN Y3 W1
NV_DISP_PLLVDD XTALIN MIOBCAL_PU_GND VIPD15
1 2
NV_BLM11A121S NV_NV44M W4
X1 R123 VIPHAD4
XTALOUTBUFF_R

VIPHAD5 W5
1 2 NV_1K/F V5
VIPHAD6
1

VIPHAD7 Y6
2

C120 C121 C111 C100 NV_L5030-27MHz/+-30ppm/20pF MIOB_VREF Y2 MIOB_VREF

NV_4.7U/10V_0805 NV_4.7U/10V_0805 NV_470P NV_4700P/50V C613 C615
MIOB_VSYNC AE3 MIOB_VSYNC MIOB_VSYNC 10
NV_18P
2

MIOB_HSYNC AF3
NV_18P
1

MIOB_DE AD1

1
C117 R117 AD3
R111 NC_22 NV_0.1U/16V NV_1K/F MIOB_CTL3

MIOB_CLKOUT1 AD4
R100 VGASS0
NC_20K R101 NC_20K

2
Place near GPU Place near balls +3VRUN MIOB_CLKOUT2 AD5
Place near VGASS1 AE4
R629 NC_0 R106 R109 NC_20K R110 NC_20K MIOB_CLKIN
NV_10K SSCK IC (U9)
4 CLK_NVSS27 NV_NV44M
Shortest U29H R141
stub. +3VRUN V8 R6 NV_10K
DACB_VDD DACB_RED
+3VRUN U9
R5 DACB_VREF DACB_GREEN T5
1 XIN/CLKIN XOUT 8
VGA_SSCLK_VCC 2 7 VGASS0 R114 R7 T6
D VDD S0 DACB_RSET DACB_BLUE D
3 6 VGASS1 NV_10K
R424 NC_4.7 VGA27MSSOUT GND S1
4 SSCLK SSCC 5 DACB_IDUMP V7
R653 R654 R655
1

NC_MB88153/CY25560/IMISM560 NV_NV44M
C609 C610 C597 C611 R115 NV_150 NV_150 NV_150
NC_470P NC_0.1U/16V NC_4.7U/10V_0805 NC_0.1U/16V NC_10K R118 HON HAI PRECISION IND. CO., LTD.
NC_10K
FOXCONN
2

CPBG - R&D Division

SSCC: H->SS ON Title
L->SS Off VGA(nVIDIA NV44M) 5/5
(Internal Pull high) Size Document Number Rev
Custom <Doc> 0a
Date: Monday, September 13, 2004 Sheet 14 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

VRAMVDD VRAMVDD
U28 U31
FBA_RAS# M2 D7 FBA_RAS# M2 D7
VRAM_TERM 11 FBA_RAS# FBA_CAS# RAS VDD1 11 FBA_RAS# FBA_CAS# RAS VDD1
L2 CAS VDD2 D8 L2 CAS VDD2 D8
11 FBA_CAS# FBA_WE# 11 FBA_CAS# FBA_WE#
L3 WE VDD3 E4 L3 WE VDD3 E4
11 FBA_WE# FBA_CS0# 11 FBA_WE# FBA_CS0#
N2 CS0 VDD4 E11 N2 CS0 VDD4 E11
11 FBA_CS0# R651 NC_0 M4 11 FBA_CS0# R652 NC_0 M4
CS1/TBD VDD5 L4 CS1/TBD VDD5 L4
11 FBA_CS1# 11 FBA_CS1#
VDD6 L7 VDD6 L7
11 FBA_A[12..0] FBA_A0 VRAMVDD 11 FBA_A[12..0] FBA_A0 VRAMVDD
N5 A0 VDD7 L8 N5 A0 VDD7 L8
FBA_A1 N6 L11 FBA_A1 N6 L11
FBA_A2 A1 VDD8 11 FBB_A[5..2] FBB_A2 FBB_A2 A1 VDD8
M6 A2 M6 A2
FBA_A3 N7 C3 FBB_A3 FBB_A3 N7 C3
11 FBAD[0:63] FBA_A4 A3 VDDQ1 FBB_A4 FBB_A4 A3 VDDQ1
N8 A4 VDDQ2 C5 N8 A4 VDDQ2 C5
FBA_A5 M9 C7 FBB_A5 FBB_A5 M9 C7
FBA_A6 A5 VDDQ3 FBA_A6 A5 VDDQ3
A N9 A6 VDDQ4 C8 N9 A6 VDDQ4 C8 A
RP11 RP19 FBA_A7 N10 C10 FBA_A7 N10 C10
FBAD4 FBAD32 FBA_A8 A7 VDDQ5 FBA_A8 A7 VDDQ5
1 8 1 8 N11 A8/AP VDDQ6 C12 N11 A8/AP VDDQ6 C12
FBAD1 2 7 FBAD33 2 7 FBA_A9 M8 E3 FBA_A9 M8 E3
FBAD2 FBAD34 FBA_A10 A9 VDDQ7 FBA_A10 A9 VDDQ7
3 6 3 6 L6 A10 VDDQ8 E12 L6 A10 VDDQ8 E12
FBAD0 4 5 FBAD35 4 5 FBA_A11 M7 F4 FBA_A11 M7 F4
FBA_A12 R403 NV_0 A11 VDDQ9 FBA_A12 R443 NV_0 L9 A11 VDDQ9
L9 A12/TBD VDDQ10 F11 A12/TBD VDDQ10 F11
NC_8P4R-68 NC_8P4R-68 G4 G4
RP6 RP17 FBAD6 VDDQ11 FBAD61 VDDQ11
B7 DQ0 VDDQ12 G11 B7 DQ0 VDDQ12 G11
FBAD6 1 8 FBAD38 1 8 FBAD5 C6 J4 FBAD57 C6 J4
FBAD7 FBAD37 FBAD7 DQ1 VDDQ13 FBAD63 DQ1 VDDQ13
2 7 2 7 B6 DQ2 VDDQ14 J11 B6 DQ2 VDDQ14 J11
FBAD5 3 6 FBAD36 3 6 FBAD3 B5 K4 FBAD62 B5 K4 VRAM_TERM
FBAD3 FBAD39 FBAD4 DQ3 VDDQ15 FBAD60 DQ3 VDDQ15
4 5 4 5 C2 DQ4 VDDQ16 K11 C2 DQ4 VDDQ16 K11
FBAD1 D3 FBAD59 D3
NC_8P4R-68 NC_8P4R-68 FBAD2 DQ5 FBAD58 DQ5
D2 DQ6 VSSQ1 B4 D2 DQ6 VSSQ1 B4
RP9 RP22 FBAD0 E2 B11 FBAD56 E2 B11
FBAD11 FBAD42 FBAD22 DQ7 VSSQ2 FBAD55 DQ7 VSSQ2
1 8 1 8 K13 DQ8 VSSQ3 D4 K13 DQ8 VSSQ3 D4

1
FBAD9 2 7 FBAD43 2 7 FBAD23 K12 D5 FBAD54 K12 D5
FBAD8 FBAD44 FBAD19 DQ9 VSSQ4 FBAD53 DQ9 VSSQ4 R112 R113 R168 R169 C585
3 6 3 6 J13 DQ10 VSSQ5 D6 J13 DQ10 VSSQ5 D6
FBAD10 4 5 FBAD41 4 5 FBAD21 J12 D9 FBAD52 J12 D9
FBAD18 DQ11 VSSQ6 FBAD51 DQ11 VSSQ6 NV_120 NV_120 NV_120 NV_120 NV_0.1U/16V
G13 DQ12 VSSQ7 D10 G13 DQ12 VSSQ7 D10
NC_8P4R-68 NC_8P4R-68 FBAD20 G12 DQ13 VSSQ8 D11 1.25V FBAD49 G12 DQ13 VSSQ8 D11
RP10 RP21 FBAD17 FBAD50 1.25V

2
F13 DQ14 VSSQ9 E6 F13 DQ14 VSSQ9 E6
FBAD14 1 8 FBAD45 1 8 FBAD16 F12 E9 VRAMVDD VRAM_VREF FBAD48 F12 E9 FBACLK0 1 2 1 2
FBAD13 FBAD47 FBAD14 DQ15 VSSQ10 FBAD42 DQ15 VSSQ10 VRAMVDD VRAM_VREF R105 NV_100 R161 NV_100
2 7 2 7 F3 DQ16 VSSQ11 F5 F3 DQ16 VSSQ11 F5
FBAD15 3 6 FBAD46 3 6 FBAD13 F2 F10 FBAD43 F2 F10 FBACLK0#
FBAD12 FBAD40 FBAD15 DQ17 VSSQ12 FBAD44 DQ17 VSSQ12
4 5 4 5 G3 DQ18 VSSQ13 G5 G3 DQ18 VSSQ13 G5
FBAD12 G2 G10 R394 R400 FBAD41 G2 G10 FBACLK1
NC_8P4R-68 NC_8P4R-68 FBAD9 DQ19 VSSQ14 NC_1K/F NV_0 FBAD47 DQ19 VSSQ14 R150 R149
J3 DQ20 VSSQ15 H5 J3 DQ20 VSSQ15 H5
RP2 RP16 FBAD11 J2 H10 FBAD45 J2 H10 NC_1K/F NV_0 FBACLK1#
FBAD18 FBAD51 FBAD8 DQ21 VSSQ16 FBAD46 DQ21 VSSQ16
1 8 1 8 K2 DQ22 VSSQ17 J5 VRAM_VREF_1 K2 DQ22 VSSQ17 J5
FBAD20 2 7 FBAD49 2 7 FBAD10 K3 J10 FBAD40 K3 J10
DQ23 VSSQ18 DQ23 VSSQ18 VRAM_VREF_2
FBAD17 3 6 FBAD50 3 6 FBAD29 E13 K5 FBAD38 E13 K5

2
FBAD16 FBAD48 FBAD30 DQ24 VSSQ19 R395 FBAD37 DQ24 VSSQ19
4 5 4 5 D13 K10 D13 K10

2
FBAD26 DQ25 VSSQ20 NC_1K/F C582 FBAD36 DQ25 VSSQ20 R151
D12 DQ26 D12 DQ26
NC_8P4R-68 NC_8P4R-68 FBAD31 NV_0.1U/16V FBAD39 NC_1K/F C195
C13 DQ27 VSS1 E5 C13 DQ27 VSS1 E5
NV_0.1U/16V

1
RP4 RP15 FBAD28 B10 E7 FBAD32 B10 E7
DQ28 VSS2 DQ28 VSS2

1
B FBAD23 1 8 FBAD54 1 8 FBAD24 B9 E8 FBAD34 B9 E8 B
FBAD22 FBAD55 FBAD25 DQ29 VSS3 FBAD33 DQ29 VSS3
2 7 2 7 C9 DQ30 VSS4 E10 C9 DQ30 VSS4 E10
FBAD21 3 6 FBAD52 3 6 FBAD27 B8 K6 FBAD35 B8 K6
FBAD19 FBAD53 DQ31 VSS5 DQ31 VSS5
4 5 4 5 VSS6 K7 VSS6 K7
FBADQM0 B3 K8 FBADQM7 B3 K8
NC_8P4R-68 NC_8P4R-68 FBADQM2 DQM0 VSS7 FBADQM6 DQM0 VSS7
H12 DQM1 VSS8 K9 H12 DQM1 VSS8 K9
RP3 RP23 FBADQM1 H3 L5 FBADQM5 H3 L5
FBAD29 FBAD60 FBADQM3 DQM2 VSS9 FBADQM4 DQM2 VSS9
1 8 1 8 B12 DQM3 VSS10 L10 B12 DQM3 VSS10 L10
FBAD30 2 7 FBAD59 2 7 FBADQS0 B2 FBADQS7 B2
FBAD26 FBAD58 FBADQS2 DQS0 FBADQS6 DQS0
3 6 3 6 H13 DQS1 H13 DQS1
FBAD31 4 5 FBAD56 4 5 FBADQS1 H2 FBADQS5 H2
FBADQS3 DQS2 FBADQS4 DQS2
B13 DQS3 B13 DQS3
NC_8P4R-68 NC_8P4R-68
RP5 RP20 F6 N13 VRAM_VREF_1 VRAM_VREF_1 F6 N13 VRAM_VREF_2 VRAM_VREF_2
FBAD28 FBAD61 THERM1 VREF THERM1 VREF
1 8 1 8 F7 THERM2 F7 THERM2
FBAD25 2 7 FBAD63 2 7 F8 N4 FBA_BA0 F8 N4 FBA_BA0
FBAD24 FBAD57 THERM3 BA0 FBA_BA1 FBA_BA0 11 THERM3 BA0 FBA_BA1 FBA_BA0 11
3 6 3 6 F9 THERM4 BA1 M5 F9 THERM4 BA1 M5
FBAD27 FBAD62 FBA_BA1 11 FBA_BA1 11
4 5 4 5 G6 THERM5 BA2/TBD M10 PAD T1 G6 THERM5 BA2/TBD M10 PAD T28
G7 THERM6 G7 THERM6
NC_8P4R-68 NC_8P4R-68 G8 N12 FBA_CKE G8 N12 FBA_CKE
THERM7 CKE FBACLK0 FBA_CKE 11 THERM7 CKE FBACLK1 FBA_CKE 11
G9 THERM8 CLK0 M11 G9 THERM8 CLK0 M11
FBADQM0 R82 1 FBACLK0 11 FBACLK1 11
2 NV_68 FBADQM4 R1341 2 NV_68 H6 THERM9 CLK1 M12 FBACLK0# H6 THERM9 CLK1 M12 FBACLK1#
11 FBADQM0 FBADQM1 R1071 11 FBADQM4 FBACLK0# 11 FBACLK1# 11
2 NV_68 FBADQM5 R1641 2 NV_68 H7 THERM10 H7 THERM10
11 FBADQM1 FBADQM2 R39 1 11 FBADQM5
2 NV_68 FBADQM6 R1201 2 NV_68 H8 THERM11 H8 THERM11
11 FBADQM2 11 FBADQM6

1
FBADQM3 R47 1 2 NV_68 FBADQM7 R1661 2 NV_68 H9 C4 R415 H9 C4
11 FBADQM3 11 FBADQM7 THERM12 NC1 NV_10K THERM12 NC1
J6 THERM13 NC2 C11 J6 THERM13 NC2 C11
J7 THERM14 NC3 H4 J7 THERM14 NC3 H4
J8 THERM15 NC4 H11 J8 THERM15 NC4 H11
FBADQS0 R91 1 2 NV_68 FBADQS4 R1311 2 NV_68 J9 L12 J9 L12
11 FBADQS0 FBADQS1 R1081 11 FBADQS4 THERM16 NC5 THERM16 NC5
2 NV_68 FBADQS5 R1631 2 NV_68

2
NC6 L13 NC6 L13
11 FBADQS1 FBADQS2 R40 1 11 FBADQS5
2 NV_68 FBADQS6 R1211 2 NV_68 M13 MCL/DSF NC7 M3 M13 MCL/DSF NC7 M3
11 FBADQS2 FBADQS3 R43 1 11 FBADQS6
2 NV_68 FBADQS7 R1651 2 NV_68 NC8 N3 NC8 N3
11 FBADQS3 11 FBADQS7

NV_HY5DU283222AF NV_HY5DU283222AF
RP18 RP13
FBA_CAS# 1 8 FBA_A1 1 8
FBA_RAS# 2 7 FBA_A0 2 7
Decoupling for right MEMORY
C FBA_A8 3 6 FBA_A7 3 6 C
FBA_A6 4 5 FBA_A10 4 5
VRAMVDD Place around the MEM
NC_8P4R-68 NC_8P4R-68
RP7 RP8
FBA_WE# 1 8 FBA_A5 1 8
FBA_A2 2 7 FBA_A3 2 7
FBA_A4 3 6 3 6
FBA_CS1# 4 5 4 5
C565 C215 C600 C619 C629 C625 C616 C636 C643 C657 C622
NC_8P4R-68 NC_8P4R-68 NV_4.7U/10V_0805NV_0.1U/16V NV_0.1U/16V NV_0.047U/10V NV_0.047U/10V NV_4700P/50V NV_4700P/50V NV_4700P/50V NV_4700P/50V NV_0.01U/16V NV_0.01U/16V
RP12 RP14
FBA_A9 1 8 FBB_A3 1 8
FBA_CS0# 2 7 FBB_A5 2 7
FBA_A12 3 6 FBB_A2 3 6
FBA_A11 4 5 FBB_A4 4 5

NC_8P4R-68 NC_8P4R-68 VRAM_TERM

VRAMVDD
Decoupling for left MEMORY
Place around the MEM
C566 C176 C106 C570 C644 C212 C650 C618 C572 C669 C574
NV_4.7U/10V_0805NV_0.1U/16V NV_0.1U/16V NV_0.047U/10V NV_0.047U/10V NV_470P NV_470P NV_4700P/50V NV_4700P/50V NV_0.01U/16V NV_0.01U/16V

C608 C567 C571 C578 C593 C587 C579 C568 C601 C591 C596
NV_4.7U/10V_0805NV_0.1U/16V NV_0.1U/16V NV_0.047U/10V NV_0.047U/10V NV_4700P/50V NV_4700P/50V NV_4700P/50V NV_4700P/50V NV_0.01U/16V NV_0.01U/16V

VRAM_TERM VRAMVDD Place under the MEM

VRAM_TERM
D D
C645 C660 C649 C665 C661 C662 C632 C635
NV_0.047U/10V NV_0.047U/10V NV_470P NV_470P NV_4700P/50V NV_4700P/50V NV_0.01U/16V NV_0.01U/16V

C607 C51 C46 C595 C573

C122 C603 C639 C90 C575 C78 C663 C63 C627 C569 C102 NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V NC_0.1U/16V
NV_4.7U/10V_0805NV_0.1U/16V NV_0.1U/16V NV_0.047U/10V NV_0.047U/10V NV_470P NV_470P NV_4700P/50V NV_4700P/50V NV_0.01U/16V NV_0.01U/16V

HON HAI PRECISION IND. CO., LTD.

VRAMVDD FOXCONN
Title
CPBG - R&D Division

FOR EMI NV44M - DDR Frame_A BANK_1

Place under the MEM C31 C577 C583 C668 C576 C580 C599 C604
NV_0.047U/10V NV_0.047U/10V NV_470P NV_470P NV_4700P/50V NV_4700P/50V NV_0.01U/16V NV_0.01U/16V Size Document Number Rev
Custom <Doc> 0a
Date: Monday, September 13, 2004 Sheet 15 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

A A

B B

DCBATOUT DCBATOUT
CN13
(1.25V) VRAM_TERM 1 2 VRAM_TERM(1.25V)
1 2
CN11
(1.1V) NV_VDD 3 3 4 4 NV_VDD (1.1V)
5 5 6 6
1 1 2 2 7 7 8 8
3 3 4 4 9 9 10 10
5 5 6 6 11 11 12 12
+5VALW_J 7 8 +5VSUS (2.5V) VRAMVDD 13 14 (2.5V)
7 8 13 14 VRAMVDD
9 10 VRAM_VREF 15 16
30,34,36 RUN_ON1 9 10 15 16
11 11 12 12 17 17 18 18
13 14 (1.2V) PEX_VDD 19 20 PEX_VDD (1.2V)
13 14 19 20
15 15 16 16 21 21 22 22
23 23 24 24
NV_hd_16p_et_1790_16 25 26
25 26
27 27 28 28
29 29 30 30

NV_hd_30p_et_1790_30

VGA DAUGHTER BOARD CONN.

C C

D D

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division
NV44M - PWR CON.
Size Document Number Rev
Custom <Doc> 0a
Date: Monday, September 13, 2004 Sheet 16 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

+2_5VSUS_DDR1 +2_5VSUS_DDR1 +2_5VSUS_DDR1 +2_5VSUS_DDR1 +2_5VSUS_DDR1

M_A_DM[0..7] 7 M_B_DM[0..7] 7 Place these Caps near So-Dimm0.
M_A_DQ[0..63] 7 M_B_DQ[0..63] 7
DIMM_VREF DIMM_VREF M_A_DQS[0..7] 7 DIMM_VREF DIMM_VREF M_B_DQS[0..7] 7
CLOCK 0,1 CLOCK 3,4

1
M_A_A[0..13] 7,18 M_B_A[0..13] 7,18
FOXCONN_AS0A426_B4RN_4F FOXCONN_AS0A426_B4SN_4F C471 C427 C428 C456 C442
CN15 CN16 2.2U/10V_0603 2.2U/10V_0603 2.2U/10V_0603 2.2U/10V_0603 2.2U/10V_0603

2
1 VREF VREF 2 1 VREF VREF 2
3 VSS VSS 4 3 VSS VSS 4
M_A_DQ0 5 M_A_DQ4 M_B_DQ0 M_B_DQ4
M_A_DQ1 DQ0 DQ4 6 M_A_DQ5 M_B_DQ1
5 DQ0 DQ4 6 M_B_DQ5
7 DQ1 DQ5 8 7 DQ1 DQ5 8 +2_5VSUS_DDR1
9 VDD VDD 10 9 VDD VDD 10
M_A_DQS0 11 M_A_DM0 M_B_DQS0 M_B_DM0 Place these Caps near So-Dimm1.
M_A_DQ2 DQS0 DM0 12 M_A_DQ6 M_B_DQ2
11 DQS0 DM0 12 M_B_DQ6
13 DQ2 DQ6 14 13 DQ2 DQ6 14
A 15 VSS VSS 16 15 VSS VSS 16 A

1
M_A_DQ3 M_A_DQ7 M_B_DQ3 M_B_DQ7

1
17 DQ3 DQ7 18 17 DQ3 DQ7 18
M_A_DQ8 19 M_A_DQ12 M_B_DQ8 M_B_DQ12 C420 C472 C440 C485
DQ8 DQ12 20 19 DQ8 DQ12 20 C441
21 VDD VDD 22 21 VDD VDD 22 2.2U/10V_0603 2.2U/10V_0603 2.2U/10V_0603 2.2U/10V_0603 2.2U/10V_0603
M_A_DQ9 M_A_DQ13 M_B_DQ9 M_B_DQ13

2
23 DQ13 24 23 DQ13 24

2
M_A_DQS1 DQ9 M_A_DM1 M_B_DQS1 DQ9 M_B_DM1
25 DQS1 DM1 26 25 DQS1 DM1 26
27 VSS VSS 28 27 VSS VSS 28
M_A_DQ10 29 M_A_DQ14 M_B_DQ10 M_B_DQ14
M_A_DQ11 DQ10 DQ14 30 M_A_DQ15 M_B_DQ11
29 DQ10 DQ14 30 M_B_DQ15
31 DQ11 DQ15 32 31 DQ11 DQ15 32
33 VDD VDD 34 33 VDD VDD 34
6 M_CLK_DDR0 35 CK0 VDD 36 6 M_CLK_DDR3 35 CK0 VDD 36
6 M_CLK_DDR#0 37 CK0 VSS 38 6 M_CLK_DDR#3 37 CK0 VSS 38 +2_5VSUS_DDR1
39 VSS VSS 40 39 VSS VSS 40
Place these Caps near So-Dimm0.
M_A_DQ16 41 42 M_A_DQ20 M_B_DQ16 41 42 M_B_DQ20
M_A_DQ17 DQ16 DQ20 M_A_DQ21 M_B_DQ17 DQ16 DQ20 M_B_DQ21
43 DQ17 DQ21 44 43 DQ17 DQ21 44

1
1
45 VDD VDD 46 45 VDD VDD 46
M_A_DQS2 47 48 M_A_DM2 M_B_DQS2 47 48 M_B_DM2 C443 C461 C457 C480
M_A_DQ18 DQS2 DM2 M_A_DQ22 M_B_DQ18 DQS2 DM2 M_B_DQ22 0.1U/16V 0.1U/16V 0.1U/16V
49 DQ18 DQ22 50 49 DQ18 DQ22 50 0.1U/16V

2
51 52 51 52

2
M_A_DQ19 VSS VSS M_A_DQ23 M_B_DQ19 VSS VSS M_B_DQ23
53 DQ19 DQ23 54 53 DQ19 DQ23 54
M_A_DQ24 55 56 M_A_DQ28 M_B_DQ24 55 56 M_B_DQ28
DQ24 DQ28 DQ24 DQ28
57 VDD VDD 58 57 VDD VDD 58 +2_5VSUS_DDR1
M_A_DQ25 59 60 M_A_DQ29 M_B_DQ25 59 60 M_B_DQ29
M_A_DQS3 DQ25 DQ29 M_A_DM3 M_B_DQS3 DQ25 DQ29 M_B_DM3
61 DQS3 DM3 62 61 DQS3 DM3 62 Place these Caps near So-Dimm1.
63 VSS VSS 64 63 VSS VSS 64
M_A_DQ26 65 66 M_A_DQ30 M_B_DQ26 65 66 M_B_DQ30
DQ26 DQ30 DQ26 DQ30

1
M_A_DQ27 M_A_DQ31 M_B_DQ27 M_B_DQ31

1
67 DQ27 DQ31 68 67 DQ27 DQ31 68
69 70 69 70 C469 C481 C446 C470
VDD VDD VDD VDD 0.1U/16V 0.1U/16V 0.1U/16V
71 CB0 CB4 72 71 CB0 CB4 72 0.1U/16V

2
73 74 73 74

2
B CB1 CB5 CB1 CB5 B
75 VSS VSS 76 75 VSS VSS 76
77 DQS8 DM8 78 77 DQS8 DM8 78
79 CB2 CB6 80 79 CB2 CB6 80
81 VDD VDD 82 81 VDD VDD 82
83 CB3 CB7 84 83 CB3 CB7 84
85 86 85 86 +2_5VSUS_DDR1
DU DU/RESET DU DU/RESET
87 VSS VSS 88 87 VSS VSS 88
89 90 89 90 Place these Caps near So-Dimm0.
CK2 VSS CK2 VSS
91 CK2 VDD 92 91 CK2 VDD 92
93 VDD VDD 94 93 VDD VDD 94

1
M_CKE1 95 96 M_CKE0 95 96 C444 C439 C473 C418 C429 C455 C474 C445
6,18 M_CKE1 CKE1 CKE0 M_CKE0 6,18 6,18 M_CKE3 CKE1 CKE0 M_CKE2 6,18
97 DU/A13 DU/BA2 98 97 DU/A13 DU/BA2 98
M_A_A12 99 100 M_A_A11 M_B_A12 99 100 M_B_A11 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V
M_A_A9 A12 A11 M_A_A8 M_B_A9 A12 A11 M_B_A8

2
101 A9 A8 102 101 A9 A8 102
103 VSS VSS 104 103 VSS VSS 104
M_A_A7 105 106 M_A_A6 M_B_A7 105 106 M_B_A6
M_A_A5 A7 A6 M_A_A4 M_B_A5 A7 A6 M_B_A4 +2_5VSUS_DDR1
107 A5 A4 108 107 A5 A4 108
M_A_A3 109 110 M_A_A2 M_B_A3 109 110 M_B_A2
PC2100 DDR SDRAM SO-DIMM

PC2100 DDR SDRAM SO-DIMM

M_A_A1 A3 A2 M_A_A0 M_B_A1 A3 A2 M_B_A0 Place these Caps near So-Dimm1.
111 A1 A0 112 111 A1 A0 112
113 VDD VDD 114 113 VDD VDD 114
M_A_A10 115 116 M_A_BS#1 M_B_A10 115 116 M_B_BS#1
A10/AP BA1 M_A_BS#1 7,18 A10/AP BA1 M_B_BS#1 7,18

1
M_A_BS#0 117 118 M_A_RAS# M_B_BS#0 117 118 M_B_RAS# C452 C476 C417 C430 C438 C454 C475 C453
7,18 M_A_BS#0 BA0 RAS M_A_RAS# 7,18 7,18 M_B_BS#0 BA0 RAS M_B_RAS# 7,18
M_A_WE# 119 120 M_A_CAS# M_B_WE# 119 120 M_B_CAS#
7,18 M_A_WE# WE CAS M_A_CAS# 7,18 7,18 M_B_WE# WE CAS M_B_CAS# 7,18
M_CS#0 121 122 M_CS#1 M_CS#2 121 122 M_CS#3 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V
6,18 M_CS#0 S0 S1 M_CS#1 6,18 6,18 M_CS#2 S0 S1 M_CS#3 6,18
M_A_A13 M_B_A13

2
123 DU DU 124 123 DU DU 124
125 VSS VSS 126 125 VSS VSS 126
M_A_DQ32 127 128 M_A_DQ36 M_B_DQ32 127 128 M_B_DQ36
M_A_DQ33 DQ32 DQ36 M_A_DQ37 M_B_DQ33 DQ32 DQ36 M_B_DQ37
129 DQ33 DQ37 130 129 DQ33 DQ37 130
131 VDD VDD 132 131 VDD VDD 132
M_A_DQS4 133 134 M_A_DM4 M_B_DQS4 133 134 M_B_DM4
M_A_DQ34 DQS4 DM4 M_A_DQ38 M_B_DQ34 DQS4 DM4 M_B_DQ38
135 DQ34 DQ38 136 135 DQ34 DQ38 136
C C
137 VSS VSS 138 137 VSS VSS 138
M_A_DQ35 139 140 M_A_DQ39 M_B_DQ35 139 140 M_B_DQ39
M_A_DQ40 DQ35 DQ39 M_A_DQ44 M_B_DQ40 DQ35 DQ39 M_B_DQ44
141 DQ40 DQ44 142 141 DQ40 DQ44 142
143 VDD VDD 144 143 VDD VDD 144
M_A_DQ41 145 146 M_A_DQ45 M_B_DQ41 145 146 M_B_DQ45 DIMM_VREF
M_A_DQS5 DQ41 DQ45 M_A_DM5 M_B_DQS5 DQ41 DQ45 M_B_DM5 +3VRUN +3VRUN
147 DQS5 DM5 148 147 DQS5 DM5 148
149 VSS VSS 150 149 VSS VSS 150
M_A_DQ42 151 152 M_A_DQ46 M_B_DQ42 151 152 M_B_DQ46
M_A_DQ43 DQ42 DQ46 M_A_DQ47 M_B_DQ43 DQ42 DQ46 M_B_DQ47

1
153 DQ43 DQ47 154 153 DQ43 DQ47 154

1
155 VDD VDD 156 155 VDD VDD 156 C450 C465
157 158 157 158 0.1U/16V 2.2U/10V_0603 C728 R256
VDD CK1 M_CLK_DDR#1 6 VDD CK1 M_CLK_DDR#4 6
(200P)

(200P)
159 160 159 160 0.1U/16V 10K

2
VSS CK1 M_CLK_DDR1 6 VSS CK1 M_CLK_DDR4 6

2
161 VSS VSS 162 161 VSS VSS 162
M_A_DQ48 163 164 M_A_DQ52 M_B_DQ48 163 164 M_B_DQ52
M_A_DQ49 DQ48 DQ52 M_A_DQ53 M_B_DQ49 DQ48 DQ52 M_B_DQ53
165 DQ49 DQ53 166 165 DQ49 DQ53 166 DIMM_VREF Address: 49H.
167 VDD VDD 168 167 VDD VDD 168 U36
M_A_DQS6 169 170 M_A_DM6 M_B_DQS6 169 170 M_B_DM6
M_A_DQ50 DQS6 DM6 M_A_DQ54 M_B_DQ50 DQS6 DM6 M_B_DQ54
171 DQ50 DQ54 172 171 DQ50 DQ54 172 8 VCC SDA 1 SMB_THRM_DATA 4,14,30

1
173 VSS VSS 174 173 VSS VSS 174
M_A_DQ51 175 176 M_A_DQ55 M_B_DQ51 175 176 M_B_DQ55 C416 C431 7 2
DQ51 DQ55 DQ51 DQ55 A0 SCL SMB_THRM_CLK 4,14,30
M_A_DQ56 177 178 M_A_DQ60 M_B_DQ56 177 178 M_B_DQ60 0.1U/16V 2.2U/10V_0603
DQ56 DQ60 DQ56 DQ60
179 180 179 180 6 3

2
VDD VDD VDD VDD A1 OVERT OVT_DDR2# 30
M_A_DQ57 181 182 M_A_DQ61 M_B_DQ57 181 182 M_B_DQ61
M_A_DQS7 DQ57 DQ61 M_A_DM7 M_B_DQS7 DQ57 DQ61 M_B_DM7
183 DQS7 DM7 184 183 DQS7 DM7 184 5 A2 GND 4
185 VSS VSS 186 185 VSS VSS 186
M_A_DQ58 187 188 M_A_DQ62 M_B_DQ58 187 188 M_B_DQ62 1.25V LM75BIM-3
M_A_DQ59 DQ58 DQ62 M_A_DQ63 M_B_DQ59 DQ58 DQ62 M_B_DQ63
189 DQ59 DQ63 190 189 DQ59 DQ63 190
191 192 191 192 +2_5VSUS_DDR1 DDRDIMM_VREF
+3VRUN SMB_DATA_RUN VDD VDD SA0_DIM1 +3VRUN SMB_DATA_RUN VDD VDD
193 SDA SA0 194 193 SDA SA0 194 Place Thermal-Sensor
SMB_CLK_RUN 195 196 SA1_DIM1 SMB_CLK_RUN 195 196
197
SCL SA1
198 197
SCL SA1
198
near DDR2 module.
201 GND
202 GND

201 GND
202 GND

D VDD(SPD) SA2 VDD(SPD) SA2 D

199 VDD(ID) DU 200 199 VDD(ID) DU 200 R313 R299 SM bus Address :
R304 R303 R316 R315 NC_1K/F
10K 10K 10K 10K 0
1001001 (EC)
+3VRUN DIMM_VREF
For LM75BIM-3

2
+3VRUN HON HAI PRECISION IND. CO., LTD.
4,20 SMB_DATA_RUN
SMB_DATA_RUN
CKE 0,1
CKE 2,3 R312
NC_1K/F
C468
NC_0.1U/16V
FOXCONN
Title
CPBG - R&D Division
DIMM_0 SMbus address A0 SMbus address A4 DIMM_1

1
DDR(I)SO-DIMM
1

SMB_CLK_RUN
1

4,20 SMB_CLK_RUN
SM bus Address : SM bus Address : C466 C451
0.1U/16V Size Document Number Rev
1010000 (ICH6) 1010010 (ICH6) 2.2U/10V_0603 ?
2

Place DIMM_0 near GMCH Custom <Doc>

2

For DIMM0 For DIMM1 Date: Monday, September 13, 2004 Sheet 17 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

SMDDR_VTERM

M_A_A[0..13] 7,17

1
C484 C482 C462 C483 C435 C460 C426 C424 C464 C423 C437 C434 C425
0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V

2
M_B_A[0..13] 7,17
A A
Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
SMDDR_VTERM

1
C436 C433 C479 C421 C486 C463 C487 C422 C458 C459 C432
0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V

2
Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

M_A_A11 4 1
B RP35 3 2 4P2R-S-56 M_B_A0 4 1 B
6,17 M_CKE0
M_A_A6 4 1 RP49 3 2 4P2R-S-56
7,17 M_B_BS#1
M_A_A8 RP36 3 2 4P2R-S-56 M_B_A12 4 1
4 1 RP40 3 2 4P2R-S-56
7,17 M_A_BS#1 6,17 M_CKE3
M_A_A0 RP38 3 2 4P2R-S-56 M_B_A5 4 1
M_B_A9 RP41 3 2 4P2R-S-56
SMDDR_VTERM
SMDDR_VTERM

M_B_A3 4 1
4 1 M_B_A7 RP42 3 2 4P2R-S-56
6,17 M_CKE1
M_A_A12 RP34 3 2 4P2R-S-56 M_B_A10 4 1
M_A_A9 4 1 M_B_A1 RP43 3 2 4P2R-S-56
M_A_A7 RP29 3 2 4P2R-S-56 4 1
7,17 M_B_WE#
M_A_A5 4 1 RP44 3 2 4P2R-S-56
7,17 M_B_BS#0
M_A_A1 RP30 3 2 4P2R-S-56 4 1
6,17 M_CKE2
M_B_A11 RP46 3 2 4P2R-S-56
SMDDR_VTERM
SMDDR_VTERM

M_A_A3 4 1
M_A_A10 RP31 3 2 4P2R-S-56 M_B_A8 4 1
4 1 M_B_A6 RP47 3 2 4P2R-S-56
7,17 M_A_BS#0
RP32 3 2 4P2R-S-56 M_B_A4 4 1
7,17 M_A_WE#
M_A_A2 4 1 M_B_A2 RP48 3 2 4P2R-S-56
M_A_A4 RP37 3 2 4P2R-S-56
SMDDR_VTERM
SMDDR_VTERM

4 1 M_B_A13 4 1
C 7,17 M_A_CAS# C
7,17 M_A_RAS# RP39 3 2 4P2R-S-56 RP45 3 2 4P2R-S-56
6,17 M_CS#2
7,17 M_B_RAS# 4 1
R317 56 RP50 3 2 4P2R-S-56
6,17 M_CS#3 7,17 M_B_CAS#
R301 56 SMDDR_VTERM
6,17 M_CS#1
M_A_A13 4 1
RP33 3 2 4P2R-S-56
6,17 M_CS#0
SMDDR_VTERM

D D

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division
DDR(I)Termination
Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 18 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

C359
2 1 CLK_32KX1
+ECVCC VCCRTC 15P
A A

1
D22
32.768KHZ R233
1 2
Y5 10M

1
SCS500V-40 U35A
C344

4
1U/10V_0603 C369 Y1 P2 LPC_AD0
RTCX1 LAD0 LPC_AD0 30
CLK_32KX2 LPC_AD1

2
2 1 Y2 RTCX2 LAD1/FB1 N3 LPC_AD1 30

RTC
R511 15P N5 LPC_AD2
LAD2/FB2 LPC_AD2 30
0 R238 AA2 N4 LPC_AD3

LPC
RTCRST# LAD3/FB3 LPC_AD3 30 +VCCP
N6 LPC_DRQ#0
LDRQ0# LPC_DRQ#0 30

1
Check 100K SM_INTRUDER# AA3 P4 LPC_DRQ#1 PAD T105
C719 INT15V_VRMEN INTRUDER# LDRQ1#/GPI41 LPC_FRAME#
AA5 P3
resistor R224 R225 1U/10V_0603_X7R INTVRMEN LFRAME# LPC_FRAME# 30
Place 75 ohm resistor near
value R259 330K 1M R500

2
1K/F 75 U17 resistor within 2",
SM_INTRUDER# R507 H_NMI AF25 AG25 H_PWRGD
2 H_NMI NMI CPUPWRGD/GPO49 H_PWRGD 2
J2 +VCCP 2 1 H_A20M# AF23 AE22 FWH_INIT#
2 H_A20M# A20M# INIT3_3V# FWH_INIT# 30
56 56 R_FERR_R AF24 AE23 PM_THRMTRIP_R R501 NC_0
2 H_FERR# FERR# THRMTRIP# PM_THRMTRIP# 2,6
1 R505 H_IGNNE# AG26 AG27 H_SMI#_R 0 R504
2 INT15V_VRMEN
2 H_IGNNE#
2 H_INTR
H_INTR AG24
IGNNE#
INTR
CPU SMI#
STPCLK# AE26 H_STPCLK#
H_SMI# 2
H_STPCLK# 2
H_INIT# AF27 AE27 H_CPUSLP#_R NC_0 R508 PCI Pullups
2 H_INIT# INIT# CPUSLP# H_CPUSLP# 2,5
H_RCIN# AD23 AD27 H_DPSLP#_R 0 R510 +3VRUN
30 H_RCIN# RCIN# DPSLP#/TP[2] H_DPSLP# 2 RP78
FOXCONN_HS82020 H_A20GATE AF22 AE24 H_DPRSTP#_R NC_0 R506
30 H_A20GATE A20GATE DPRSTP#/TP[4] H_DPRSTP# 2
PCI_FRAME# 6 5
RTC Battery use rechargeable Ni-MH 2/V15H(VARTA) PCI_REQ#0 7 4 PCI_SERR#
24,27 PCI_AD[31..0] PCI_TRDY# 8 3 INT_PIRQE#
PCI_AD0 E2 J6 PCI_C/BE#0 PCI_STOP# 9 2 INT_PIRQF#
AD0 C/BE0# PCI_C/BE#0 24,27
PCI_AD1 E5 H6 PCI_C/BE#1 10 1 INT_PIRQG#
AD1 C/BE1# PCI_C/BE#1 24,27 +3VRUN
PCI_AD2 C2 G4 PCI_C/BE#2
AD2 C/BE2# PCI_C/BE#2 24,27
PCI_AD3 F5 G2 PCI_C/BE#3
AD3 C/BE3# PCI_C/BE#3 24,27 10P8R-8.2K
B +3VRUN PCI_AD4 F3 B
PCI_AD5 AD4 PCI_FRAME# +3VRUN
E9 AD5 FRAME# J3 PCI_FRAME# 24,27
R489 PCI_AD6 PCI_IRDY# RP26
F2 AD6 IRDY# A3 PCI_IRDY# 24,27
H_RCIN# PCI_AD7 D6 J2 PCI_TRDY# PCI_PERR# 6 5
AD7 TRDY# PCI_TRDY# 24,27
PCI_AD8 E6 C3 PCI_DEVSEL# PCI_IRDY# 7 4 PCI_DEVSEL#
AD8 DEVSEL# PCI_DEVSEL# 24,27
10K PCI_AD9 D3 J1 PCI_STOP# PCI_REQ#1 8 3 PCI_LOCK#
AD9 STOP# PCI_STOP# 24,27
PCI_AD10 A2 E1 PCI_PAR PCI_REQ#3 9 2
R494 PCI_AD11 D2
AD10
AD11
PCI PAR
SERR# G5 PCI_SERR#
PCI_PAR 24,27
PCI_SERR# 24,27 +3VRUN 10 1
H_A20GATE PCI_AD12 D5 E3 PCI_PERR#
AD12 PERR# PCI_PERR# 24,27
PCI_AD13 H3 C5 PCI_LOCK#
AD13 PLOCK# 10P8R-8.2K
NC_10K PCI_AD14 B4
PCI_AD15 AD14 PCI_REQ#0 +3VRUN
J5 AD15 REQ0# L5 PCI_REQ#0 24
PCI_AD16 PCI_REQ#1 RP76
K2 AD16 REQ1# B5
PCI_AD17 K5 M5 PCI_REQ#2 INT_PIRQA# 6 5
PCI_AD18 AD17 REQ2# PCI_REQ#3 INT_PIRQC# INT_PIRQH#
D4 AD18 REQ3# B8 PCI_REQ#3 27 7 4
PCI_AD19 L6 F7 ICH_GPI40_R 100 R249 INT_PIRQD# 8 3 PM_CLKRUN#
PCI_AD20 AD19 REQ4#/GPI40 PCI_REQ#5 INT_PIRQB# PCI_REQ#2
G3 AD20 REQ5#/GPI1 E8 9 2
PCI_AD21 H4 B7 ICH_GPIO10_R 100 R260 10 1 PCI_REQ#5
PCI_AD22 AD21 REQ6#/GPI0 +3VRUN
H2 AD22
PCI_AD23 H5 C1 PCI_GNT#0
AD23 GNT0# PCI_GNT#0 24 10P8R-8.2K
+5VSUS PCI_AD24 B3 B6 PCI_GNT#1 PAD T144
PCI_AD25 AD24 GNT1# PCI_GNT#2
M6 AD25 GNT2# F1 PAD T139
PCI_AD26 B2 C8 PCI_GNT#3 H_DPSLP# 1 2 +VCCP
AD26 GNT3# PCI_GNT#3 27
Q12 PCI_AD27 K6 E7 PCI_GNT#4 PAD T138
AD27 GNT4#/GPO48
1

2N7002 PCI_AD28 K3 F6 PCI_GNT#5 R509 NC_56

PCI_AD29 AD28 GNT5#/GPO17 PCI_GNT#6
A5 AD29 GNT6#/GPO16 D8 PAD T142
IAC_BITCLK_AUDIO PCI_PME# 2 3 PCI_AD30 L1
24,27 PCI_PME# PCI_AD31 AD30 INT_PIRQA# R248
K4 AD31 PIRQA# N2 INT_PIRQA# 24
2

L2 INT_PIRQB# NC_1K
PIRQB# INT_PIRQC# INT_PIRQB# 24
R268 M1
PIRQC# INT_PIRQC# 24
NC_47 P6 L3 INT_PIRQD# Strap for Boot-BIOS
C PME# PIRQD# INT_PIRQD# 27 C
CLK_ICHPCI G6 D9 INT_PIRQE#
4 CLK_ICHPCI PCICLK PIRQE#/GPI2
PCI_RST# R2 C7 INT_PIRQF#
24,27 PCI_RST# PCIRST# PIRQF#/GPI3
PLT_RST# INT_PIRQG#
21

2,6,10,22,30 PLT_RST# R5 PLTRST# PIRQG#/GPI4 C6 INT_PIRQG# 27

PM_CLKRUN# AF19 M3 INT_PIRQH#
C407 24,27,30 PM_CLKRUN# CLKRUN#/GPIO32 PIRQH#/GPI5
NC_22P
IDE_PDD[0..15]
1

22 IDE_PDD[0..15]
IDE_PDD0 AD14 AC19 PAD T68
IDE_PDD1 DD0 SATALED# R270 39
AF15 DD1
R267 39 IDE_PDD2 AF14 AE3
DD2 SATA0_RXN ACZ_BITCLK 25
IDE_PDD3 AD12 AD3
ACZ_RST# 25 DD3 SATA0_RXP
IDE_PDD4 AE14 AG2 PAD T181 IAC_BITCLK
ACZ_BITCLK IAC_RESET# IDE_PDD5 DD4 SATA0_TXN R269 39
AC11 DD5 SATA0_TXP AF2 PAD T182
IDE

R266 39 IDE_PDD6
SATA

AD11 DD6 IAC_BITCLK_AUDIO 29

2

IDE_PDD7 AB11 AD7

IAC_RESET#_AUDIO 29 DD7 SATA2_RXN

1
R230 IDE_PDD8 AE13 AC7
DD8 SATA2_RXP
1

NC_47 IDE_PDD9 AF13 AF6 PAD T178 C409 C408

C406 C405 IDE_PDD10 DD9 SATA2_TXN NC_10P NC_10P
AB12 DD10 SATA2_TXP AG6 PAD T177
NC_10P NC_10P IDE_PDD11

2
AB13 DD11
IDE_PDD12
21

AC13 DD12 SATA_CLKN AC2

IDE_PDD13 AE15 AC1
C358 IDE_PDD14 DD13 SATA_CLKP
AG15 DD14
NC_22P IDE_PDD15 AD13 AG11 R261 39
+3VRUN DD15 SATARBIAS#
1

SATARBIAS AF11 ACZ_SDATAOUT 25

IDE_PDCS1# AD16
22 IDE_PDCS1# DCS1#
IDE_PDCS3# AE17 IAC_SDATAO
22 IDE_PDCS3# DCS3#
IDE_PDA0 AC16 R262 39
22 IDE_PDA0 DA0
R265 IDE_PDA1 AB17 C10 IAC_BITCLK
22 IDE_PDA1 DA1 ACZ_BIT_CLK IAC_SDATAO_AUDIO 29
NC_1K IDE_PDA2 AC17 B9 IAC_SYNC
22 IDE_PDA2
AC-97/
AZALIA

DA2 ACZ_SYNC

1
IDE_PDIOR# AE16 A10 IAC_RESET#
22 IDE_PDIOR# DIOR# ACZ_RST#
R263 39 IDE_PDIOW# AC14 C401 C402
D 22 IDE_PDIOW# DIOW# D
25 ACZ_SYNC IDE_PDIORDY AF16 F11 ACZ_SDATAIN0 NC_10P NC_10P
22 IDE_PDIORDY IORDY ACZ_SDIN0 ACZ_SDATAIN0 29
INT_IRQ14 F10 ACZ_MDC_SDATAIN1

2
22 INT_IRQ14 AB16 IDEIRQ ACZ_SDIN1 ACZ_MDC_SDATAIN1 25
IAC_SYNC IDE_PDDREQ AB14 B10
22 IDE_PDDREQ DDREQ ACZ_SDIN2
IDE_PDDACK# AB15 C9 IAC_SDATAO
22 IDE_PDDACK# DDACK# ACZ_SDO
29 IAC_SYNC_AUDIO
HON HAI PRECISION IND. CO., LTD.
R264 39 ICH6-M FOXCONN CPBG - R&D Division
2

C404 C403 Title

NC_10P NC_10P ICH6-M( CPU,PCI,IDE ) 1/3
1

Size Document Number Rev

Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 19 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

+3VRUN

R258 2.2K SMB_CLK_RUN

U35B
R272 2.2K SMB_DATA_RUN
USB_PP0 USB_PP1 RP77
23 USB_PP0 D21 USBP0P USBP1P B20 USB_PP1 23
USB_PN0 C21 A20 USB_PN1 USB_OC#4 6 5
23 USB_PN0 USB_OC#0 USBP0N USBP1N USB_PN1 23
C27 B27 USB_OC#1 USB_OC#5 7 4 USB_OC#0
23 USB_OC#0 USB_PP2 OC0# OC1#
C19 B18 USB_PP3 ID_LPC_PCI# 8 3 USB_OC#1
23 USB_PP2 USB_PN2 USBP2P USBP3P USB_PP3 23
D19 A18 USB_PN3 USB_OC#7 9 2 USB_OC#2
23
23
USB_PN2
USB_OC#2
USB_OC#2
USB_PP4
B26
USBP2N
OC2#
USB USBP3N
OC3# C26 USB_OC#3
USB_PN3 23
+3VALW 10 1 USB_OC#3
D17 A16 USB_PP5
23 USB_PP4 USB_PN4 USBP4P USBP5P USB_PP5 23
E17 B16 USB_PN5
23 USB_PN4 USB_OC#4 USBP4N USBP5N USB_PN5 23 10P8R-10K
A C23 D23 USB_OC#5 A
23 USB_OC#4 USB_PP6 OC4#/GPI9 OC5#/GPI10
T141 PAD D15 B14 USB_PP7
USB_PN6 USBP6P USBP7P PAD T190
T143 PAD C15 A14 USB_PN7
ID_LPC_PCI# USBP6N USBP7N PAD T189 +3VALW
C25 C24 USB_OC#7
30 ID_LPC_PCI# OC6#/GPI14 OC7#/GPI15
B22 R257
CLK_USB48 USBRBIAS USBRBIAS RP24
80 Port I/F: 4 CLK_USB48 A27 CLK48 USBRBIAS# A22
22.6/F 1 8 PM_RI#
H: LCP bus DMI_RXN0
6 DMI_RXN0 T25 DMI0_RXN DMI2_RXN Y25 PAD T81 2 7 BATLOW#
L: PCI bus 6 DMI_RXP0 DMI_RXP0 T24 Y24 3 6 SMLINK0
DMI_TXN0 DMI0_RXP DMI2_RXP PAD T84
R27 W27 4 5
6 DMI_TXN0
6 DMI_TXP0
DMI_TXP0 R26
DMI0_TXN
DMI0_TXP
DMI DMI2_TXN
DMI2_TXP W26
PAD
PAD
T83
T76
8P4R-10K
DMI_RXN1 V25 AB24
6 DMI_RXN1 DMI_RXP1 DMI1_RXN DMI3_RXN PAD T72
6 DMI_RXP1 V24 DMI1_RXP DMI3_RXP AB23 PAD T73
DMI_TXN1 U27 AA27
6 DMI_TXN1 DMI_TXP1 DMI1_TXN DMI3_TXN PAD T75 +3VALW
6 DMI_TXP1 U26 DMI1_TXP DMI3_TXP AA26 PAD T74
CLK_PCIE_ICH# AD25 F24 RP25
4 CLK_PCIE_ICH# CLK_PCIE_ICH DMI_CLKN DMI_ZCOMP
AC25 F23 DMI_COMP R250 24.9/F 1 8 SMLINK1
4 CLK_PCIE_ICH DMI_CLKP DMI_IRCOMP +1_5VRUN
2 7 SMB_ALERT#
T137 PAD H25 HSIN0 HSIN2 M25 PAD T115 3 6
H24 M24 4 5 SMB_LINK_ALERT#
T136
T134
PAD
PAD G27
HSIP0
HSON0
PCI-EXPRESS HSIP2
HSON2 L27
PAD
PAD
T111
T121
G26 L26 8P4R-8.2K
T140 PAD HSOP0 HSOP2 PAD T122

T132 PAD K25 HSIN1 HSIN3 P24 PAD T110

T112 PAD K24 HSIP1 HSIP3 P23 PAD T109
T135 PAD J27 HSON1 HSON3 N27 PAD T113
T131 PAD J26 N26 150
HSOP1 HSOP3 PAD T114
R232 PM_SYSRST#
SMB_CLK_RUN Y4 W4 SMLINK0
4,17 SMB_CLK_RUN SMB_DATA_RUN SMBCLK SMLINK0
B W5 U6 SMLINK1 B
4,17 SMB_DATA_RUN SMB_ALERT# W6
SMBDATA SM&SMI
SMBALERT#/GPI11
SMLINK1
LINKALERET# Y5 SMB_LINK_ALERT# 680
R235 ICH_PCIE_WAKE#
+3VALW
PM_RI# T2 T4 SLP_S3# R240 100
RI# SLP_S3# PM_SLP_S3# 30
SB_THRM# AC20 T5 SLP_S4# R231 100
THRM# SLP_S4# PM_SLP_S4# 30
IMVP_PWRGD AA1 T6 SLP_S5# R236 0
6,30 IMVP_PWRGD PWROK SLP_S5# PM_SLP_S5# 30
DPRSLPVR AE20 V5 SUS_PWRGD_10MS
35 DPRSLPVR
BATLOW# V2
DPRSLPVR/TP1
BATLOW#/TP0
PM LAN_RST#
SYS_RESET# U2 PM_SYSRST#
SUS_PWRGD_10MS 23,24,30
PM_SYSRST# 2
U1 U5 ICH_PCIE_WAKE#
30 PWRBTN# PWRBTN# WAKE#
PM_RSMRST# Y3 AG21 MCH_SYNC# (Pull-low to enable Int. 2.5VRM) 8.2K
30 PM_RSMRST# RSMRST# MCH_SYNC#
IMVP_PWRGD AF21 R491 SB_THRM#
6,30 IMVP_PWRGD VRMPWRGD +3VRUN
PM_BMBUSY# AD19 AC21 PM_STPPCI# NC_10K
6 PM_BMBUSY# BM_BUSY#/GPIO6 STP_PCI#/GPO18 PM_STPPCI# 4
W3 AD22 STP_CPU# R239 8.2K
30 PM_SUS_STAT# SUS_STAT#/LPCPD# STP_CPU#/GPO20 STP_CPU# 4,35
T87 PAD SUS_CLK V6 AB20 INT_SERIRQ R276 RUNTIME_SCI#
SUSCLK SERIRQ INT_SERIRQ 24,30 +3VALW
E10 P5 10K
4 CLK_ICH14 AC_SPKR CLK14 GPIO25
F8 AF17 SATA0 R499 NC_100 R490 MCH_SYNC#
29 AC_SPKR SPKR SATA0GP/GPIO26
2

AE19 R3 R234 10K +3VRUN

30 RUNTIME_SCI# GPI7 GPIO27
R1 T3 10K
R271
30 EXTSMI#
4,30 OVT_EC#
OVT_EC# M2
GPI8
GPI12
MISC&GPIO GPIO28
SATA1GP/GPIO29 AE18 LCDID0
PAD T104
R492 10K R496 INT_SERIRQ
NC_33 R6 AF18 LCDID1 R497 10K
30 WAKE_SCI# GPI13 SATA2GP/GPIO30
T78 PAD AB21 AG18 LCDID2 R498 10K NC_2.2K
GPO19 SATA3GP/GPIO31 R237 IMVP_PWRGD
21

T64 PAD AD20 GPO21

C410 T66 PAD AD21 AF20 LCDID3 R495 10K
NC_10P GPO23 GPIO33
T89 PAD V3 GPIO24 GPIO34 AC18 PAD T62 LCDID0 13
10K
LCDID1 13
R227 PM_RSMRST#
1

LCDID2 13
E12 R_LAN_RXD0 R_LAN_RXD0 28
LAN_RXD0 LCDID3 13
28 EEP_CS EEP_CS D12 E11 R_LAN_RXD1 R_LAN_RXD1 28 10K
EEP_SK EE_CS LAN_RXD1 R_LAN_RXD2 R217 IMVP_PWRGD
B12 C13
C
28 EEP_SK
28 EEP_DOUT EEP_DOUT D11
EE_SHCLK
EE_DOUT
LAN LAN_RXD2
LAN_TXD0 C12 LAN_TXD0_R R247 22/F
R_LAN_RXD2 28
LAN_TXD0 28
C
EEP_DIN F13 C11 LAN_TXD1_R R246 22/F LAN_TXD1 28
28 EEP_DIN EE_DIN LAN_TXD1
E13 LAN_TXD2_R R245 22/F LAN_TXD2 28
LAN_TXD2

LAN_CLK F12 LAN_CLK LAN_CLK 28

LAN_RSTSYNC B11 LAN_RSTSYNC_R R244 22/F LAN_RSTSYNC 28

AC5 RSVD1 RSVD6 AD9

AD5 AF8
T180 PAD AF4
RSVD2
RSVD3
RESERVED RSVD7
RSVD8 AG8
T175 PAD
T176 PAD
T179 PAD AG4 RSVD4 RSVD9 U3 T88 PAD
AC9 RSVD5

+3VRUN ICH6-M

CLK_USB48

Strap for No-reboot R251

R513 1K/F
NC_10

AC_SPKR
1

C727
NC_10P Adds.AEH
+3VRUN
2

D
U17 D
1 A0 VCC 8

1
2 5 SMB_DATA_RUN
A1 SDA SMB_CLK_RUN C395
3 A2 SCL 6
4 7 0.1U/16V
VSS WP

2
HON HAI PRECISION IND. CO., LTD.
HT24LC02
FOXCONN
Title
CPBG - R&D Division
ICH6-M( USB,HUB,LPC ) 2/3
Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 20 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

L48 U35C
+1_5VRUN U35D
1 2 +1_5V_PCIE
+1_5VRUN

2
AA22 VCC1_5_1 VCC1_5_79 AA19

2
BLM31PG121SN1 AA23 AA20 C321 C342 C347 C372 C382 A1 G1
VCC1_5_2 VCC1_5_80 VSS001 VSS087
+ C726 C375 C356 C368 AA24 AA21 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.01U/16V A12 G12
220U/6.3V_7343 0.1U/16V 0.1U/16V 0.1U/16V VCC1_5_3 VCC1_5_81 VSS002 VSS088

1
AA25 VCC1_5_4 VCC1_5_82 L11 A15 VSS003 VSS089 G21

1
AB25 VCC1_5_5 VCC1_5_83 L12 A19 VSS004 VSS090 G7

2
AB26 VCC1_5_6 VCC1_5_84 L14 A21 VSS005 VSS091 G9
AB27 VCC1_5_7 VCC1_5_85 L16 A23 VSS006 VSS092 H23
F25 VCC1_5_8 VCC1_5_86 L17 A26 VSS007 VSS093 H26
F26 VCC1_5_9 VCC1_5_87 M11 A4 VSS008 VSS094 H27
+3VRUN F27 M17 A7 J23
VCC1_5_10 VCC1_5_88 VSS009 VSS095
G22 VCC1_5_11 VCC1_5_89 P11 A9 VSS010 VSS096 J24
G23 VCC1_5_12 VCC1_5_90 P17 AA11 VSS011 VSS097 J25

1
A G24 VCC1_5_13 VCC1_5_91 T11 AA13 VSS012 VSS098 J4 A
G25 T17 AA16 K1
SCS500V-40
D21
H21
VCC1_5_14
VCC1_5_15
VCC VCC1_5_92
VCC1_5_93 U11 AA4
VSS013
VSS014
VSS099
VSS100 K23
H22 VCC1_5_16 VCC1_5_94 U12 AB1 VSS015 VSS101 K26
R493 0 J21 U14 AB10 K27
V5REF VCC1_5_17 VCC1_5_95 VSS016 VSS102

2
+5VRUN J22 VCC1_5_18 VCC1_5_96 U16 AB19 VSS017 VSS103 K7
K21 VCC1_5_19 VCC1_5_97 U17 AB2 VSS018 VSS104 L13
K22 VCC1_5_20 VCC1_5_98 F9 AB7 VSS019 VSS105 L15

2
L21 +3VRUN AB9 L23
C711 C345 VCC1_5_21 VSS020 VSS106
L22 VCC1_5_22 VCC3_3_2 A6 AC10 VSS021 VSS107 L24
1U/10V_0603 0.1U/16V M21 B1 AC12 L25
VCC1_5_23 VCC3_3_3 VSS022 VSS108

2
1

1
M22 VCC1_5_24 VCC3_3_4 E4 AC22 VSS023 VSS109 M12
N21 H1 C335 C350 C390 AC23 M13
VCC1_5_25 VCC3_3_5 0.1U/16V 0.1U/16V 0.1U/16V VSS024 VSS110
N22 H7 AC24 M14
VCC1_5_26 VCC3_3_6 VSS025 GND VSS111

1
N23 VCC1_5_27 VCC3_3_7 J7 AC26 VSS026 VSS112 M15
+3VALW N24 L4 AC3 M16
VCC1_5_28 VCC3_3_8 VSS027 VSS113
N25 VCC1_5_29 VCC3_3_9 L7 AC6 VSS028 VSS114 M23
P21 VCC1_5_30 VCC3_3_10 M7 AD1 VSS029 VSS115 M26

1
P25 VCC1_5_31 VCC3_3_11 P1 AD10 VSS030 VSS116 M27
SCS500V-40 P26 VCC1_5_32 AD15 VSS031 VSS117 M4
P27 VCC1_5_33 VCC3_3_12 AA12 +3VRUN AD18 VSS032 VSS118 N1
D11 R21 AA14 AD2 N11
VCC1_5_34 VCC3_3_13 VSS033 VSS119

2
R273 10/F_0603 R22 AA15 AD24 N12
V5REF_SUS VCC1_5_35 VCC3_3_14 C349 C371 VSS034 VSS120
2

+5VALW T21 VCC1_5_36 VCC3_3_15 AA17 AD6 VSS035 VSS121 N13

T22 AC15 0.1U/16V 0.1U/16V AE10 N14
VCC1_5_37 VCC3_3_16 VSS036 VSS122

1
U21 VCC1_5_38 VCC3_3_17 AD17 AE11 VSS037 VSS123 N15
2

U22 VCC1_5_39 VCC3_3_18 AG13 AE12 VSS038 VSS124 N16

C400 C391 V21 AG16 AE2 N17
1U/10V_0603 0.1U/16V VCC1_5_40 VCC3_3_19 VSS039 VSS125
V22 VCC1_5_41 VCC3_3_20 AG19 +1_5VALW AE21 VSS040 VSS126 N7
1

W21 VCC1_5_42 VCC3_3_21 AA10 AE25 VSS041 VSS127 P12

2
W22 C385 AE6 P13
B VCC1_5_43 VSS042 VSS128 B
Y21 VCC1_5_44 AE7 VSS043 VSS129 P14
Y22 G19 0.1U/16V AF1 P15
+1_5VRUN VCC1_5_45 VCCSUS1_5_1 VSS044 VSS130

1
AF10 VSS045 VSS131 P16
AA6 VCC1_5_46 VCCSUS1_5_2 R7 +1_5VALW AF12 VSS046 VSS132 P22
AB4 VCC1_5_47 VCCSUS1_5_3 U7 AF26 VSS047 VSS133 R11
2

2
AB5 VCC1_5_48 AF3 VSS048 VSS134 R12
C357 AB6 G8 C355 C361 AF7 R13
VCC1_5_49 VCC1_5_67 +1_5VRUN VSS049 VSS135
0.1U/16V AC4 0.1U/16V 0.1U/16V AG1 R14
VCC1_5_50 VSS050 VSS136
1

1
AD4 VCC1_5_51 VCC1_5_68 D24 AG12 VSS051 VSS137 R15
AE4 VCC1_5_52 VCC1_5_69 D25 AG14 VSS052 VSS138 R16
AE5 VCC1_5_53 VCC1_5_70 D26 AG17 VSS053 VSS139 R17
AF5 VCC1_5_54 VCC1_5_71 D27 AG20 VSS054 VSS140 R23
+1_5VRUN AG5 E20 AG22 R24
VCC1_5_55 VCC1_5_72 +1_5VRUN VSS055 VSS141
VCC1_5_73 E21 AG3 VSS056 VSS142 R25

2
L45 +1_5VRUN AA7 E22 AG7 R4
VCC1_5_56 VCC1_5_74 C365 C333 VSS057 VSS143
1 2 AA8 VCC1_5_57 VCC1_5_75 E23 B13 VSS058 VSS144 T1
1UH AA9 E24 0.1U/16V 0.1U/16V B15 T12
VCC1_5_58 VCC1_5_76 VSS059 VSS145
2

C712

1
AB8 VCC1_5_59 VCC1_5_77 F20 B19 VSS060 VSS146 T13
C721 C389 AC8 G20 B21 T14
10U/16V_1206 0.01U/25V 0.1U/16V VCC1_5_60 VCC1_5_78 VSS061 VSS147
AD8 VCC1_5_61 B23 VSS062 VSS148 T15
1

AE8 VCC1_5_62 VCC2_5_2 P7 +2_5VRUN_ALV B24 VSS063 VSS149 T16

AE9 VCC1_5_63 VCC2_5_4 AB18 B25 VSS064 VSS150 T23

2
AF9 VCC1_5_64 C14 VSS065 VSS151 T26
AG9 C346 C18 T27
+3VRUN +1_5VRUN VCC1_5_65 0.1U/16V VSS066 VSS152
V5REF1 A8 C20 VSS067 VSS153 T7
VCCDMIPLL V5REF

1
AC27 VCCDMIPLL V5REF2 AA18 C22 VSS068 VSS154 U13
E26 VCC3_3_1 C4 VSS069 VSS155 U15
F21 V5REF_SUS D1 U23
V5REF_SUS VSS070 VSS156
2

AE1 VCCSATAPLL D10 VSS071 VSS157 U24

C348 +3VRUN AG10 A25 D13 U25
VCC3_3_22 VCCUSBPLL +1_5VRUN VSS072 VSS158
0.1U/16V A24 +3VALW D14 V23
VCCSUS3_3_20 VSS073 VSS159
2

2
C C
1

A13 VCCLAN3_3/VCCSUS3_3_1 D18 VSS074 VSS160 V26

2
C373 F14 AB3 VCCRTC C364 D20 V27
0.1U/16V VCCLAN3_3/VCCSUS3_3_2 VCCRTC C397 0.01U/16V VSS075 VSS161
G13 VCCLAN3_3/VCCSUS3_3_3 D22 VSS076 VSS162 V4
0.1U/16V
1

1
G14 VCCLAN3_3/VCCSUS3_3_4 D7 VSS077 VSS163 W1

1
VCCLAN1_5/VCCSUS1_5_1 G10 +1_5VSUS E14 VSS078 VSS164 W23
+3VSUS A11 VCCSUS3_3_1 VCCLAN1_5/VCCSUS1_5_2 G11 2 E15 VSS079 VSS165 W24
U4 C378 E18 W25
VCCSUS3_3_2 VSS080 VSS166
2

V1 AB22 0.1U/16V E19 W7

C396 C379 VCCSUS3_3_3 V_CPU_IO1 VSS081 VSS167
1

V7 VCCSUS3_3_4 V_CPU_IO2 AD26 E25 VSS082 VSS168 Y23

0.1U/16V 0.1U/16V W2 AG23 F17 Y26
VCCSUS3_3_5 V_CPU_IO3 +VCCP VSS083 VSS169
1

Y7 VCCSUS3_3_6 F19 VSS084 VSS170 Y27

VCCSUS3_3_13 C16 F22 VSS085 VSS171 Y6

2
R274 0_0805 A17 D16 F4 E27
VCCSUS3_3_7 VCCSUS3_3_14 C328 VSS086 VSS172
+3VALW 1 2 B17 VCCSUS3_3_8 VCCSUS3_3_15 E16
C17 F15 0.1U/16V
VCCSUS3_3_9 VCCSUS3_3_16
2

1
F18 VCCSUS3_3_10 VCCSUS3_3_17 F16 ICH6-M
C352 G17 G15
0.1U/16V VCCSUS3_3_11 VCCSUS3_3_18
G18 VCCSUS3_3_12 VCCSUS3_3_19 G16
1

ICH6-M
VCCRTC
2

C392 C388
2

0.1U/16V 0.1U/16V
C338 C334
1

0.1U/16V 0.1U/16V
1

D D

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division
ICH6-M( POWER&GND ) 3/3
Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 21 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

R300
47
2,6,10,19,30 PLT_RST# 2 1

CN17
FOXCONN_SL56221_T5
A A
1 2
IDE_PDD7 3 4 IDE_PDD8
+3VRUN
IDE_PDD6 5 6 IDE_PDD9

2
IDE_PDD5 7 8 IDE_PDD10
IDE_PDD4 9 10 IDE_PDD11
R318 R336 IDE_PDD3 11 12 IDE_PDD12
4.7K 8.2K IDE_PDD2 13 14 IDE_PDD13
IDE_PDD1 15 16 IDE_PDD14
IDE_PDD0 IDE_PDD15

1
17 18
19 20
19 IDE_PDDREQ 21 22
23 24 R332 +5VRUN
19 IDE_PDIOW#
25 26 470
19 IDE_PDIOR#
27 28 CSEL1 1 2
19 IDE_PDIORDY
19 IDE_PDDACK# 29 30
31 32 R338
19 INT_IRQ14
33 34 PDIAG 2 NC_10K 1
19 IDE_PDA1
19 IDE_PDA0 35 36 IDE_PDA2 19
19 IDE_PDCS1# 37 38 IDE_PDCS3# 19
PATA_LED# 39 40
+5VRUN 41 42
43 44

C838 C834
C825 C831 0.01U/16V

45
46
10U/16V_1206 2700P 0.01U/16V

B HDD CON B

IDE_PDD[0..15]
19 IDE_PDD[0..15]
+5VRUN

C43
C25 C24
10U/16V_1206 2700P 0.01U/16V

CN12
R310 50 49
47 50 49
48 48 47 47
2 1 46 45 IDE_PDD8
2,6,10,19,30 PLT_RST# 46 45
IDE_PDD7 44 43 IDE_PDD9
IDE_PDD6 44 43 IDE_PDD10
42 42 41 41
C +3VRUN IDE_PDD5 IDE_PDD11 C
40 40 39 39
IDE_PDD4 38 37 IDE_PDD12
IDE_PDD3 38 37 IDE_PDD13
36 36 35 35
IDE_PDD2 34 33 IDE_PDD14
IDE_PDD1 34 33 IDE_PDD15
32 32 31 31
IDE_PDD0 30 29 IDE_PDDREQ
30 29 IDE_PDIOR#
28 28 27 27
IDE_PDIOW# 26 25
26 25
1

IDE_PDIORDY 24 23 IDE_PDDACK#
INT_IRQ14 24 23 IOCS16#
22 22 21 21
PATA_LED# 2 IDE_PDA1 20 19 PDIAG
IDE_PDA0 20 19 IDE_PDA2
18 18 17 17
Q17 IDE_PDCS1# 16 15 IDE_PDCS3#
16 15

1
DTA114YUA PATA_LED# 14 13
14 13 R28
3

12 12 11 11
10 9 10K
10 9
8 7
R_V_LED2

R54 NC_0 8 7
6 6 5 5
CSEL2

2
4 4 3 3
2 2 1 1
H: Slave
FOXCONN_QT8H0506_N110R_7F
L: Master
1

R365
330

CD-ROM CON
1 V_LED2 2

D D

LED1
LED_HARV_HT_170_UY HON HAI PRECISION IND. CO., LTD.
Yellow
FOXCONN
Title
CPBG - R&D Division
IDE ( HDD & CD-ROM)
2

Size Document Number Rev

Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 22 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

R635 NC_0_0603 HCB2012K-121T30

L34 CN3
L33 USB_VCC2 USB_VCC2_F 1 VCC GND1 5
+5VALW 1 2 USB_VD2-_F 2 6
20 USB_PN2 V- GND2
4 3 USB_VD2+_F 3
20 USB_PP2 V+
U10 4 GND

1
4 5 USB_VCC2 OW3216-900T
VIN VOUT C116 C634 FOXCONN_UB11123_CA501_FR
1 CE
+

1
2 3 R636 NC_0_0603 150U/10V_7343
GND FLG USB_OC#2 20
C179 470P

1
2.2U/10V_0603

2
RT9702APB
C153

2
1U/10V_0603

2
A +5VALW A

U12 R637 NC_0_0603 HCB2012K-121T30

4 5 USB_VCC4 L40 CN4
VIN VOUT L36 USB_VCC4 USB_VCC4_F
1 CE 1 VCC GND1 5
1

2 3 1 2 USB_VD4-_F 2 6
GND FLG USB_OC#4 20 20 USB_PN4 V- GND2
C253 4 3 USB_VD4+_F 3
20 USB_PP4 V+

1
2.2U/10V_0603 RT9702APB 4 GND

1
C250 OW3216-900T
2

1U/10V_0603 + C214 C674 FOXCONN_UB11123_CA501_FR

R638 NC_0_0603 150U/10V_7343

2
+5VALW 470P

2
U7
4 5 USB_VCC0
VIN VOUT
1 CE
1

2 GND FLG 3 USB_OC#0 20

C64

1
2.2U/10V_0603 RT9702APB R639 NC_0_0603 HCB2012K-121T30
C50 L32
2

CN2
1U/10V_0603 L31 USB_VCC0 USB_VCC0_F 1 VCC GND1 5
USB_VD0-_F

2
20 USB_PN0 1 2 2 V- GND2 6
4 3 USB_VD0+_F 3
20 USB_PP0 V+
20,24,30 SUS_PWRGD_10MS 4 GND

1
OW3216-900T
+ C34 C588 FOXCONN_UB11123_CA501_FR
R640 NC_0_0603 150U/10V_7343
470P

2
B B

USB2.0 X 3

+5VALW
+5VRUN
+15VRUN
1

+3VRUN
Q25
2 DTA114YUA
3

2
R409 U6B

1
2
5
6
NC_750 LM358AM
PORT_DET# Q4 R35
3

2 DOCKED# 13 30 FAN2_PWM 2 1 5
Q24 7 3 NC_FDC653N NC_10K
2

DTC144EUA 6

2
D6 R390

1
MTZS05-6.2
1

100K C73 NC_100K FAN2_TACH 30

4
NC_10U/16V_1206 R407
C54
1

NC_2200P
FAN2

1
J3
1 2 VCCFAN2
R401 NC_2K/F 1
2

2
PRT_IN
C CN10 C23 3 C
FOXCONN_QL01303_D24A01_5F R404 NC_10U/16V_1206
NC_FOXCONN_HS81030
NC_3.01K/F
61 P1 P3 63

1
62 P2 P4 64
C15
10U/25V_1206 1 31
1 31 PORT_DET_N 32
2 32 +5VRUN
28 DOCK_TDP 2 32 AV_PHONE_DET 29
28 DOCK_TDN 3 3 33 33
4 34 For ESD +15VRUN
4 34
2

5 35 +3VRUN
28 DOCK_RDP 5 35
+3VALW 6 36 D36 C581
28 DOCK_RDN 6 36
7 37 NC_MTZS05-6.2
7 37 VGA_CRT_DET# 13,30
8 8 38 38

2
9 39 R408 U6A 0.1U/50V_0603
13 PR_DDCDATA 9 39 PR_RED 13

1
2
5
6
750 LM358AM
1

13 PR_DDCCLK 10 10 40 40
R19 R18 R17 11 41 30 FAN1_PWM 2 1 3 Q7 R41
13 PR_HSYNC 11 41 PR_GREEN 13
12 42 1 3 FDC653N 10K
13 PR_VSYNC 12 42
10K 10K 10K 13 43 100K 2
13 43 PR_BLUE 13

1
29,30,33,36,38 RUN_ON 2 1 14 14 44 44
29,30,33,34,36,38 SUS_ON 2 R641 1 33 15 15 45 45 USB_PP1 20 FAN1_TACH 30
R642 33 R405

4
30 D_PWRGD 16 16 46 46 USB_PN1 20
17 47 10U/16V_1206
28,30 PORT_DET# 17 47 C48
30 DOCK_ID0 18 18 48 48 USB_PP3 20
NC_2200P
FAN1

1
30 DOCK_ID1 19 19 49 49 USB_PN3 20 J4
13,30 EN_EXT_DEV_SENSE# 20 20 50 50
21 51 1 2 VCCFAN1
29 SPDIF_OUT 21 51 USB_PP5 20 1
22 52 R398 2K/F
29 APR_AMP_MUTE# 22 52 USB_PN5 20 2

2
23 23 53 53 3
24 54 C45
29 LINE_OUT_L+ 24 54
25 55 R402 10U/16V_1206
29 LINE_OUT_L- 25 55 LINE_IN_L+ 29 FOXCONN_HS81030
26 56 3K/F
D 26 56 LINE_IN_L- 29 D
29 LINE_OUT_R+ 27 27 57 57

1
29 LINE_OUT_R- 28 28 58 58 LINE_IN_R+ 29
29 59
GND
GND
GND
GND
GND
GND

APR_AMP_MUTE# 29 59 LINE_IN_R- 29
32 PORT_DET_P 30 30 60 60

FAN
65
66
67
68
69
70
2

HON HAI PRECISION IND. CO., LTD.

For ESD
D7
NC_MTZS05-6.2 FOXCONN
Title
CPBG - R&D Division
USB2.0/MDC/FAN/DOCKING Connector
1

Size Document Number Rev

Replicator Port Custom

Date:
<Doc>
Monday, September 13, 2004 Sheet 23 of 47
?

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

CAVCC D25
+3VSUS C498 NC_BAV70LT1
0.1U/16V CAVCC
R341 1K 2
3
C514 +3VSUS Place resistor 1 U22-3
U22-2 CN7 D19
0.1U/16V U22-1
near Chip. CADR25 VCCB
VCCA A4 56 A25 VCCB K19
V1 A10 CADR24 55 17 CAVPP
VCCP R328 VCCA CADR23 A24 VCC1
W8 VCCP 54 A23 VCC2 51 B_CAD31/B_D10 E13
43K E3 CDATA10 CADR22 53 A16
19,27 PCI_AD[31..0] PCI_AD31 A_CAD31/A_D10 CDATA9 CADR21 A22 B_CAD30/B_D9
T2 AD31 A_CAD30/A_D9 D1 50 A21 B_CAD29/B_D1 E14
PCI_AD30 P5 D2 CDATA1 CADR20 49 18 D24 B16
PCI_AD29 AD30 A_CAD29/A_D1 CDATA8 CADR19 A20 VPP1 NC_BAV70LT1 B_CAD28/B_D8
U1 AD29 SUSPEND P2 A_CAD28/A_D8 D3 48 A19 VPP2 52 B_CAD27/B_D0 A17
A PCI_AD28 U2 E5 CDATA0 CADR18 47 2 F14 A
PCI_AD27 AD28 A_CAD27/A_D0 CADR0 CADR17 A18 B_CAD26/B_A0
T3 AD27 A_CAD26/A_A0 B3 46 A17 3 B_CAD25/B_A1 D17
PCI_AD26 P6 M1 TPS_DATA A3 CADR1 CADR16 19 1 C19
PCI_AD25 AD26 DATA TPS_CLOCK A_CAD25/A_A1 CADR2 CADR15 A16 B_CAD24/B_A2
V2 AD25 CLOCK L5 A_CAD24/A_A2 E6 20 A15 B_CAD23/B_A3 F15
PCI_AD24 U3 M2 TPS_LATCH C5 CADR3 CADR14 14 E18
PCI_AD23 AD24 LATCH A_CAD23/A_A3 CADR4 CADR13 A14 C749 B_CAD22/B_A4
W3 AD23 CB_SPKOUT# 29 A_CAD22/A_A4 B5 13 A13 B_CAD21/B_A5 G15
PCI_AD22 U4 A5 CADR5 CADR12 21 0.01U/16V F17
PCI_AD21 AD22 R337 43K A_CAD21/A_A5 CADR6 CADR11 A12 B_CAD20/B_A6
R6 AD21 SPKROUT L7 A_CAD20/A_A6 B6 10 A11 B_CAD19/B_A25 H14
PCI_AD20 V4 A6 CADR25 CADR10 8 F19
PCI_AD19 AD20 A_CAD19/A_A25 CADR7 CADR9 A10 B_CAD18/B_A7
W4 AD19 A_CAD18/A_A7 C7 11 A9 B_CAD17/B_A24 H15
PCI_AD18 U5 M3 B7 CADR24 CADR8 12 K18
PCI_AD17 AD18 MFUNC0 INT_PIRQA# 19 A_CAD17/A_A24 CADR17 CADR7 A8 B_CAD16/B_A17
N7 AD17 MFUNC1 L6 INT_PIRQB# 19 A_CAD16/A_A17 B10 22 A7 B_CAD15/B_IOWR K13
PCI_AD16 V5 N1 G10 IOWR# CADR6 23 K14
PCI_AD15 AD16 MFUNC2 INT_PIRQC# 19 A_CAD15/A_IOWR CADR9 CADR5 A6 B_CAD14/B_A9
W7 AD15 MFUNC3 N2 INT_SERIRQ 20,30 A_CAD14/A_A9 F10 24 A5 B_CAD13/B_IORD L17
PCI_AD14 U8 N3 MFUNC4 C11 IORD# CADR4 25 L18
PCI_AD13 AD14 MFUNC4 MFUNC5 A_CAD13/A_IORD CADR11 CADR3 A4 B_CAD12/B_A11
V8 AD13 MFUNC5 M5 A_CAD12/A_A11 B11 26 A3 B_CAD11/B_OE L19
PCI_AD12 N10 P1 A11 OE# CADR2 27 C753 + C750 L15
AD12 MFUNC6 PM_CLKRUN# 19,27,30 A_CAD11/A_OE A2 B_CAD10/B_CE2
PCI_AD11 R9 E11 CE2# CADR1 28 M18
PCI_AD10 AD11 A_CAD10/A_CE2 CADR10 CADR0 A1 0.01U/16V 47U/10V_6032 B_CAD9/B_A10
V9 AD10 A_CAD9/A_A10 C12 29 A0 B_CAD8/B_D15 M19
PCI_AD9 W9 A12 CDATA15 CDATA15 41 L13
PCI_AD8 AD9 A_CAD8/A_D15 CDATA7 CDATA14 D15 B_CAD7/B_D7
V10 AD8 A_CAD7/A_D7 E12 40 D14 B_CAD6/B_D13 N17
PCI_AD7 W10 B13 CDATA13 CDATA13 39 N18
PCI_AD6 AD7 A_CAD6/A_D13 CDATA6 CDATA12 D13 B_CAD5/B_D6
R10 AD6 CLK_48 L2 CLK_CB48 4 A_CAD5/A_D6 C13 38 D12 B_CAD4/B_D12 M14
PCI_AD5 W11 B14 CDATA12 CDATA11 37 M15
PCI_AD4 AD5 A_CAD4/A_D12 CDATA5 CDATA10 D11 B_CAD3/B_D5
V11 AD4 A_CAD3/A_D5 A14 66 D10 B_CAD2/B_D11 P18

1
PCI_AD3 U11 C492 C14 CDATA11 CDATA9 65 P19
PCI_AD2 AD3 A_CAD2/A_D11 CDATA4 CDATA8 D9 B_CAD1/B_D4
N11 AD2 A_CAD1/A_D4 F12 64 D8 B_CAD0/B_D3 P17
PCI_AD1 R11 NC_10P A15 CDATA3 CDATA7 6
PCI_AD0 AD1 A_CAD0/A_D3 CDATA6 D7

2
W12 AD0 5 D6 CHASSIS0 69 B_CC/BE3/B_REG D18
B4 REG# CDATA5 4 70 G17
PCI_C/BE#3 A_CC/BE3/A_REG CADR12 CDATA4 D5 CHASSIS1 B_CC/BE2/B_A12
19,27 PCI_C/BE#3 W2 C/BE3 A_CC/BE2/A_A12 A7 3 D4 CHASSIS2 71 B_CC/BE1/B_A8 K17
B PCI_C/BE#2 R7 C10 CADR8 CDATA3 2 72 M17 B
19,27 PCI_C/BE#2 PCI_C/BE#1 C/BE2 A_CC/BE1/A_A8 CE1# CDATA2 D3 CHASSIS3 B_CC/BE0/B_CE1
19,27 PCI_C/BE#1 P9 C/BE1 A_CC/BE0/A_CE1 B12 32 D2 CHASSIS4 73
PCI_C/BE#0 U10 +3VSUS CDATA1 31 74 J18
19,27 PCI_C/BE#0 C/BE0 CADR13 CDATA0 D1 CHASSIS5 B_CPAR/B_A13
A_CPAR/A_A13 A9 30 D0 CHASSIS6 75
N9 IORD# 44 76 G18
19,27 PCI_PAR PAR MFUNC4 R329 43K CADR23 IOWR# IORD# CHASSIS7 B_CFRAME/B_A23
A_CFRAME/A_A23 E8 45 IOWR# CHASSIS8 77 B_CTRDY/B_A22 H13
W5 MFUNC5 R330 43K C8 CADR22 OE# 9 78 G19
19,27 PCI_FRAME# FRAME A_CTRDY/A_A22 CADR15 WE# OE# CHASSIS9 B_CIRDY/B_A15
19,27 PCI_TRDY# V6 TRDY A_CIRDY/A_A15 F9 15 WE# CHASSIS10 79 B_CSTOP/B_A20 J15
U6 G9 CADR20 CE2# 42 80 H18
19,27 PCI_IRDY# IRDY A_CSTOP/A_A20 CADR21 CE1# CE2# CHASSIS11 B_CDEVSL/B_A21
19,27 PCI_STOP# W6 STOP A_CDEVSL/A_A21 A8 7 CE1# CHASSIS12 81 B_CBLOCK/B_A19 J17
R8 B9 CADR19 REG# 61 82
19,27 PCI_DEVSEL# R340 100 DEVSEL A_CBLOCK/A_A19 RESET REG# CHASSIS13
19,27 PCI_AD19 V3 IDSEL
Resistors(SPKR# 58 RESET CHASSIS14 83 B_CPERR/B_A14 J13
C9 CADR14 WAIT# 59 84 B18
A_CPERR/A_A14 WAIT#
& CHSTS#) near IOIS16# WAIT# CHASSIS15 B_CSERR/B_WAIT
19,27 PCI_PERR# U7 PERR A_CSERR/A_WAIT B2 33 WP
V7 Connector. IREQ# 16 E17
19,27 PCI_SERR# SERR INPACK# SPKR# R521 1K READY B_CREQ/B_INPACK
A_CREQ/A_INPACK F6 62 BVD2 B_CGNT/B_WE H19
T1 E9 WE# CHSTS# R516 1K 63
19 PCI_REQ#0 REQ A_CGNT/A_WE VS2 BVD1
19 PCI_GNT#0 R2 GNT 57 VS2# B_CSTSCHG/B_BVD1(STSCHG/RI) A18
C3 CHSTS# VS1 43 1 B17
A_CSTSCHG/A_BVD1(STSCHG/RI) IOIS16# CD2# VS1# GND1 B_CCLKRUN/B_WP(IOIS16)
4 PCLK_CB R1 PCLK A_CCLKRUN/A_WP(IOIS16) C2 67 CD2# GND2 34 B_CCLK/B_A16 H17
P3 B8 A_CCLK R345 47 CADR16 CD1# 36 35
19,27 PCI_RST# SUS_PWRGD_10MS N5 PRST A_CCLK/A_A16 INPACK# CD1# GND3
20,23,30 SUS_PWRGD_10MS GRST 60 INPACK# GND4 68 B_CINT/B_READY(IREQ) B19
A2 IREQ#
R327 0 A_CINT/A_READY(IREQ) FOXCONN_1CA41502_TC_AW
19,27 PCI_PME# R3 RI_OUT/PME B_CRST/B_RESET E19
C6 RESET
PCI7420B(SN0307009BZHK) A_CRST/A_RESET
B_CAUDIO/B_BVD2(SPKR) C17
B1 SPKR# C411 C795 IF use FB: R275 R343
A_CAUDIO/A_BVD2(SPKR)
1

C490 220P 220P N15

CD1#
600 ohm, 0.5A 0_0603 0_0603 B_CCD1/B_CD1
A_CCD1/A_CD1 B15 B_CCD2/B_CD2 C16
NC_10P C1 CD2# C18
A_CCD2/A_CD2 VS1 B_CVS1/B_VS1
2

A_CVS1/A_VS1 C4 B_CVS2/B_VS2 F18

C VS2 C
A_CVS2/A_VS2 E7
N19
A_RSVD/A_D14
A_RSVD/A_D2
A13
F5
CDATA14
CDATA2
PCMCIA CONN. B_RSVD/B_D14
B_RSVD/B_D2
B_RSVD/B_A18
C15
K15
E10 CADR18
A_RSVD/A_A18
PCI7420B(SN0307009BZHK)
+5VALW PCI7420B(SN0307009BZHK)
+3VALW

CAVPP C765 C781

0.1U/16V 0.1U/16V

C764 U41
0.1U/16V 1 5V-1 24
NC-9
2 5V-2 NC-8 23
TPS_DATA 3 DATA 22
TPS_CLOCK NC-7
4 CLOCK SHDN# 21
TPS_LATCH 5 LATCH 20
12V-2
CAVCC 6 NC-1 NC-6 19
7 12-1 NC-5 18
8 AVPP NC-4 17
9 AVCC-1 NC-3 16
10 AVCC-2 OC# 15
D 11 GND NC-2 14 D
SUS_PWRGD_10MS 12 RESET# 13
3.3V
25 GND
C763 C751
0.1U/16V 10U/16V_1206 TPS2220A

HON HAI PRECISION IND. CO., LTD.

R578 0
FOXCONN
Title
CPBG - R&D Division
PCI7420B(PCMCIA)
Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 24 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

+3VSUS
+3VSUS

2
L23
L21 VDPLL 1 2
BLM11A121S
7420_AVD BLM11A121S

C536 C535
0.1U/16V 1000P

1
C525 C529 C530
10U/6.3V_0805 0.1U/16V 1000P
A A
C522
Place near PCI7420.
U22-7
AVD2 R12
AVD3 U15 220P
AVD4 V17
VDPLL U19
R0 W15 C511
+3VSUS
R355 R353 R351
6.34K/F 56/F 56/F
+3VSUS
R1
TPBIAS0
V15
U14
1U/10V_0603
R334
MS / MDC CONN.
L49

FOXCONN_UV31413_WU81P_7F
CN14

6
V14 TPAP0 4 5 TPA0 CN6 U22-8 4.7K
TPA0+ TPAN0 4 5 MC_PWR_CTRL_1 F3 MS MDC
W14 4

GND
TPA0- TPA0 MC_PWR_CTRL_1
1 VSS1 11 11 ACZ_SDATAOUT 19
V13 TPBP0 3 6 TPA0# 3 F2 MS_BS 2 12
TPB0+ 3 6 TPA0# MS_BS BS 12 ACZ_SYNC 19
W13 TPBN0 2 7 TPB0 G2 MS_DATA1 3 13
TPB0- 2 7 MS_DATA1 DATA1 13 ACZ_MDC_SDATAIN1 19
R354 2 G1 MS_DATA0 4 14
TPB0 MS_SDIO(DATA0) DATA0 14 ACZ_RST# 19
R17 4.7K G3 MS_DATA2 5 15 MONO_PHONE

GND
PHY_TEST_MA TPB0# MS_DATA2 MC_CDZ_1 DATA2 15 PAD T103
1 1 8 8 1 TPB0# MC_CD_1 E1 6 INS 16 16 +3VSUS
U17 H7 MS_DATA3 7 17
FILTER0 OD6560T_E900 MS_DATA3 MS_CLK R331 47 DATA3 17
MS_CLK G5 8 CLK 18 18
7420_AVD

5
Place near Place 9 VCC_CTRL 19 19 ACZ_BITCLK 19
C533 PCI7420B(SN0307009BZHK) 10 20
0.1U/50V_0603 PCI7420. traces VSS2 20
U18 R347 R348 on FOXCONN_QT81020A_1111
FILTER1 56/F 56/F C512 220P C840
B P12 R352 1K outer 1000P B
CPS R346 5.1K/F layer. Place near
R18 R359 47K
CNA Pin E1 +3VSUS
XO T19
U22-9
R361 0 C538 F1
iLink CONN. MC_PWR_CTRL_0

1
18P
SD_DAT3 J2

2
H2 D14
R360 Y3 SD_CMD LED_HARV_HT_170_UY
1M C537 Yellow
18P H1
SD_CLK
1

2
XI T18 SD_DAT0 H3
24.576MHZ_18pF_30PPM J7
SD_DAT1 R333 220
PC0 (TEST1) N12 SD_DAT2 J1
U12 E2 R364
PC1 (TEST2) MC_CD_0 150
PC2 (TEST3) V12
SD_WP J3
VSPLL T17

3
U13 PCI7420B(SN0307009BZHK)
AGN2
AGN3 R13
W17 2 Q10
AGN4
V19 DTC144EUA
TPBIAS1
C534

1
TPA1+ V18
W18 0.1U/16V
TPA1-

TPB1+ V16
C C
TPB1- W16

PCI7420B(SN0307009BZHK) PCI7420 Power Terminals

+3VSUS U22-4
PCI7420B(SN0307009BZHK)
G7 VCC
G8 VCC
G11 VCC
G12 VCC
C526 C505 C499 C489 C532 C500 C507 C488 G13
0.01U/16V 0.1U/16V 10U/6.3V_0805 0.01U/16V 0.1U/16V 10U/6.3V_0805 VCC
0.001U 0.001U H10 VCC
H12 VCC
J8 VCC
K8 VCC
K12 VCC
M7 VCC
M11 VCC
M13 VCC
N8 VCC
C524 C494 C527 C513 C491 C506 C509 C523 K5
0.01U/16V 0.1U/16V 10U/6.3V_0805 0.01U/16V 0.1U/16V 10U/6.3V_0805 1.8V
0.001U 0.001U U9 GND 1.8V J19
PCI7420 UNUSED TERMINALS M10
M9
GND
GND
M8 GND
L12 C539 C493
+3VSUS GND 0.1U/16V 0.1U/16V
L11 GND VR_EN L1
L10 GND
M12
U22-6
H5
Resistors should be placed on L9
L8
GND

D N13
NC
NC
RSVD
RSVD J5 the SCL and SDA terminals K11
GND
GND D
P14 J6 C495 K10
NC RSVD 0.1U/16V GND
P15 NC RSVD K1 K9 GND
R14 K2 R344 J12
NC RSVD 2.7K GND
U16 NC RSVD K3 J11 GND
R19 TEST0 J10
TEST0 U22-5 U21 GND
J9 HON HAI PRECISION IND. CO., LTD.
PCI7420B(SN0307009BZHK)
SCL K7 R342
2.7K SCL
8 VCC WP 7 H11
H9
GND
GND
GND
FOXCONN
Title
CPBG - R&D Division
6 L: R/W H8
SDA 5
SCL
SDA A0 1 H: Read only
GND PCI7420B(iLink,MS)
SDA L3 A1 2
4 3 Size Document Number Rev
GND A2 ?
Custom <Doc>
PCI7420B(SN0307009BZHK) HT24LC02
Date: Monday, September 13, 2004 Sheet 25 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

+5VRUN +3VRUN

+5VRUN +5VRUN +5VRUN +5VRUN +3VRUN +3VRUN +3VRUN +3VRUN

C850 C867 C861 C868 C869

0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V
C851 C852 C853 C854 C857 C858 C859 C860
0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V NC_0.1U/16V

For EMI . Near RP51 , Near R607 , Near Q7 , Near Q4 , Near U37 , Near Q3 , Near Q4 , Near D8 ,
for EMI . for EMI . for EMI . for EMI . for EMI . for EMI . for EMI . for EMI .
A A
Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4
3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4 SPR1 SPR2 SPR3 SPR4
2 5 2 5 2 5 2 5 2 5 EMI_SPRING_SQ_26G EMI_SPRING_SQ_26G EMI_SPRING_SQ_26G EMI_SPRING_SQ_26G
2 5 2 5 2 5 2 5 2 5
1

1
H5 H6 H7 H8 H9
1

1
Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256in177d98_m2_v4 SPR5 SPR6 SPR7 SPR8
3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4 EMI_SPRING_SQ_42G EMI_SPRING_S8_75AG EMI_SPRING_S8_75AG EMI_SPRING_S8_75AG
2 2 5 5 2 2 5 5 2 2 5 5 2 2 5 5 2 2 5 5
1

1
H10 H11 H12 H13 H14
1

1
SPR9 SPR10 SPR11
EMI_SPRING_S8_75AG EMI_SPRING_S8_75AG
Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 NC_EMI_SPRING_SQ_26G
B 3 3 B
4 4 3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4

1
2 2 5 5 2 2 5 5 2 2 5 5 2 2 5 5 2 2 5 5
1

1
H15 H16 H17 H18 H19
1

1
SPR13 SPR14 SPR15 SPR16
NC_EMI_SPRING_S8_75AG NC_EMI_SPRING_S8_75AG NC_EMI_SPRING_S8_75AG
EMI_SPRING_SQ_26G

Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4

1
3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4

1
2 2 5 5 2 2 5 5 2 2 5 5 2 2 5 5 2 2 5 5
1

1
H20 H21 H22 H23 H24
1

1
SPR17 SPR18 SPR19
NC_EMI_SPRING_S8_75AG NC_EMI_SPRING_S8_75AG NC_EMI_SPRING_S8_75AG

1
Hole_4via_c256d98_m2_v4 Hole_4via_c256d98_m2_v4

1
3 3 4 4 3 3 4 4
C C
2 2 5 5 2 2 5 5
1

H25 H26
1

Hole_4via_c197d47_m2_v4 Hole_4via_c197d47_m2_v4 Hole_4via_c197d47_m2_v4 Hole_4via_c197d47_m2_v4 Hole_4via_c197d47_m2_v4

3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4
2 2 5 5 2 2 5 5 2 2 5 5 2 2 5 5 2 2 5 5
1

H27 H28 H29 H30 H31

1

H32 H33
D D
1

hole_tr6p5x5p5bc5d2p5 hole_tr6p5x5p5br5x7d2p5
1

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division
SCREW HOLE & PAD
modify by Ziv 09/01 Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 26 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

A A

PCI_AD[31..0] 19,24
SW8
1

+3VRUN
4 6
1

4 6
J6
5 5 7 7 1 TIP RING 2
R349 +3VRUN +3VRUN
HCH_RST_1202 10K
3 8PMJ-3 8PMJ-1 4
30 WLAN_EN 5 8PMJ-6 8PMJ-2 6
7 8PMJ-7 8PMJ-4 8
B 9 10 B
R350 8PMJ-8 8PMJ-5
11 LED1_GRNP LED2_YELP 12
WLAN_LED 13 14
LED1_GRNN LED2_YELN
15 CHSGND RESERVED 16
100 INT_PIRQD# 17 18
19 INT_PIRQD# INTB# 5V
C519 19 20 INT_PIRQG#
3.3V INTA# INT_PIRQG# 19
0.1U/16V 21 22
RESERVED RESERVED
23 GROUND 3.3VAUX 24
25 26 PCI_RST#
4 PCLK_MINI CLK RST# PCI_RST# 19,24
27 GROUND 3.3V 28
PCI_REQ#3 29 30 PCI_GNT#3
19 PCI_REQ#3 REQ# GNT# PCI_GNT#3 19
31 3.3V GROUND 32
PCI_AD31 33 34 PCI_PME# +3VRUN
AD31 PME# PCI_PME# 19,24
PCI_AD29 35 36
AD29 RESERVED PCI_AD30
37 GROUND AD30 38
PCI_AD27 39 40
PCI_AD25 AD27 3.3V PCI_AD28
41 AD25 AD28 42
43 44 PCI_AD26 C497 C504 C496 C517 C508
PCI_C/BE#3 RESERVED AD26 PCI_AD24
19,24 PCI_C/BE#3 45 C/BE3# AD24 46
PCI_AD23 47 48 MINI_IDSEL PCI_AD20 0.1U/16V 0.047U/10V 0.1U/16V 0.047U/10V 10U/6.3V_0805
AD23 IDSEL
49 GROUND GROUND 50
PCI_AD21 51 52 PCI_AD22 R339 100
PCI_AD19 AD21 AD22 PCI_AD20
53 AD19 AD20 54
55 56 PCI_PAR
GROUND PAR PCI_PAR 19,24
PCI_AD17 57 58 PCI_AD18 +3VRUN +3VRUN
PCI_C/BE#2 AD17 AD18 PCI_AD16
19,24 PCI_C/BE#2 59 C/BE2# AD16 60
PCI_IRDY# 61 62
19,24 PCI_IRDY# IRDY# GROUND
63 64 PCI_FRAME#
3.3V FRAME# PCI_FRAME# 19,24
PM_CLKRUN# 65 66 PCI_TRDY# R362
19,24,30 PM_CLKRUN# CLKRUN# TRDY# PCI_TRDY# 19,24
PCI_SERR# 67 68 PCI_STOP# 150 C516 C502 C518 C515 C501
19,24 PCI_SERR# SERR# STOP# PCI_STOP# 19,24
69 GROUND 3.3V 70
C PCI_PERR# PCI_DEVSEL# 0.1U/16V 0.047U/10V 0.1U/16V 0.047U/10V 10U/6.3V_0805 C
19,24 PCI_PERR# 71 PERR# DEVSEL# 72 PCI_DEVSEL# 19,24
PCI_C/BE#1 73 74
19,24 PCI_C/BE#1 C/BE1# GROUND
PCI_AD14 75 76 PCI_AD15
AD14 AD15

1
77 78 PCI_AD13
PCI_AD12 GROUND AD13 PCI_AD11 D13
79 AD12 AD11 80
PCI_AD10 81 82 LED_HARV_HT_170_UYG
AD10 GROUND PCI_AD9
83 GROUND AD9 84
PCI_AD8 85 86 PCI_C/BE#0
AD8 C/BE0# PCI_C/BE#0 19,24
PCI_AD7 87 88
AD7 3.3V PCI_AD6

2
89 3.3V AD6 90
+5VRUN PCI_AD5 91 92 PCI_AD4 Green
AD5 AD4 PCI_AD2
93 RESERVED AD2 94
PCI_AD3 95 96 PCI_AD0
AD3 AD0

3
97 5V RESERVED 98
PCI_AD1 99 100 Q15
AD1 RESERVED
101 GROUND GROUND 102
103 104 WLAN_LED 1
AC_SYNC M66EN
105 AC_SDATA_IN AC_SDATA_OUT 106
107 AC_BIT_CLK AC_CODEC_ID0# 108
109 110 2N7002
AC_CODEC_ID1# AC_RESET#
111 MOD_AUDIO_MON RESERVED 112
LED_GND

2
113 AUDIO_GND GROUND 114
115 SYS_AUDIO_OUT SYS_AUDIO_IN 116
117 SYS_AUDIO_OUT GND SYS_AUDIO_IN GND 118
119 AUDIO_GND AUDIO_GND 120
121 RESERVED MCPIACT# 122
123 VCC5A 3.3VAUX 124

FOXCONN_AS0B126_S40N_1F

D D

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division
Mini- PCI Connector
Size Document Number Rev
Custom <Doc> ?

Date: Monday, September 13, 2004 Sheet 27 of 47

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

Match trace length

LAYOUT NOTES:
Match total length of chip side Rx and Tx pair traces +/-50mil +3VSUS
Match length of cable side Rx and Tx pair traces +/- 50 mil
Total line TX+ to TX- and RX- and RX+ should be matched
CN9 C22 0.1U/16V
RJ45_TXN
within 50 mils.
1 1
2 2 RJ45_TXP Keep 50mil space between pairs and other traces.Pairs are

16
3 3 100ohm differential,
A
4 4 A
5 TXOP 4 2 DOCK_TDP

VCC
5 1Y 1A DOCK_TDP 23
6 3 TXOP_A
6 RJ45_RXN TXON 1B DOCK_TDN
7 7 7 2Y 2A 5 DOCK_TDN 23
8 RJ45_RXP 6 TXON_A
8 2B

2
RXIP 9 11 DOCK_RDP
3Y 3A DOCK_RDP 23
HS81080 10 RXIP_A
U2 R382 RXIN 3B DOCK_RDN
12 4Y 4A 14 DOCK_RDN 23
RJ45_RXP 12 1 RXIP_A 121/F 13 RXIN_A
RJ45_RXN RX+ RD+ RXIN_A 4B
11 RX- RD- 2

1
10 RXCT RDCT 3 8 GND A/B 1 PORT_DET# 23,30
9 TXCT TDCT 4 G 15
RJ45_TXP 8 5 TXOP_A
RJ45_TXN TX+ TD+ TXON_A U3 R22 10K
7 TX- TD- 6

PI3L110Q

75

75
H0068
R375 R377 C561 C562
5P 0.1U/16V
75 75

R376

R378
C2

C8 0.1U/50V_0603
1500P/2KV_1808

GND_TR GND_TR

B B

LAN_CLK R12 22/F

20 LAN_CLK
C12 LAN PHY
TXOP
NC_47P

2
U25 TXON
TDP 10
39 R381
LAN_RSTSYNC 42 JCLK 100/F
20 LAN_RSTSYNC JRSTSYNC
LAN_TXD2 45
20 LAN_TXD2 JTXD2
LAN_TXD1

1
20 LAN_TXD1 44 JTXD1 TDN 11
LAN_TXD0 43
20 LAN_TXD0 JTXD0
R13 22/F LAN_RXD2 37
20 R_LAN_RXD2 JRXD2
R16 22/F LAN_RXD1 35 15 RXIP
20 R_LAN_RXD1 JRXD1 RDP
R21 22/F LAN_RXD0 34
20 R_LAN_RXD0 JRXD0
41 ADV10
30 ISOL_TCK
28 ISOL_T1
29 ISOL_EX
26 16 RXIN
TOUT RDN
21 TESTEN

VCC_1 1 +3V82562ET
VCC_2 25
C C
VCCP_1 36
8 VSS_1 VCCP_2 40
13 VSS_2 VCCA 2
18 VSS_3 VCCA2 7
24 VSS_4 VCCT_1 9
48 VSS_5 VCCT_2 12
33 VSSP_1 VCCT_3 14
38 VSSP_2 VCCT_4 17
3 VSSA
6 VSSA2 VCCR_1 19 +3V82562ET
20 VSSR_1 VCCR_2 23
22 VSSR_2
+3VSUS +3V82562ET
L3
1 2 ACTLED 32
SPDLED 31
FBMJ2125HM330 4.7U/10V_0805 4.7U/10V_0805 4 27
RBIAS10 LILED
1

5 RBIAS100
C19 C20 C18 C14 C3 C13

1
0.1U/16V 0.1U/16V 0.1U/16V 0.1U/16V
R5 R6 CLK_LAN_X2
2

X2 47
46 CLK_LAN_X1
+3VSUS 510/0.5% 470/0.5% X1
Y1

82562ET
2

+3V82562ET L5030-25MHz/+-30ppm/20pF
1

1
1

C415 C414 R3 R8
U18 C7 C4
EEP_CS 1 8 0.1U/16V 1U/10V_0603 39/0.5% 150/0.5% 33P 33P
20 EEP_CS CS VCC
C21 C11 EEP_SK
2

D 20 EEP_SK 2 SK DC 7 D
4.7U/25V_12060.1U/16V EEP_DOUT
2

20 EEP_DOUT 3 DI ORG 6
EEP_DIN 4 5
20 EEP_DIN DO GND
AT93C46A(3.3V)

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division

LAN (82562ET)
Size Document Number Rev
<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 28 of 47
1 2 3 4 5 6 7 8
 A B C D E

+5VRUN
2 1
+3VRUNF
R595 0_0805 CON2
+5VSUS +5VRUN 5
C8190.1U/16V L51 CM-CHOKE 4
MIC
C729 0.01U/16V MIC_R_J MIC_RING
+3VRUNF +3VRUNF +3VRUN AUDIO 2 1 1
4
2
3
3
6
RED
+15VRUN
R534
2
0
1 C759 1000P POWER MIC_L_J 2 1 MIC_TIP
1 2
2
1

5
6
7
8
+3VSUS R600 R607 C816 C820 C8090.1U/16V 4 3 FOXCONN_JA9333L_WR1S9_7F

1
C740 C738 R535 NC_0 NC_100K 100K VDDA VDDA R597 R588 R601 R596

2
2 1 C741 NC_0.01U/16V 0.1U/50V_0603 10U/16V_1206 L50 CM-CHOKE

1
0.1U/16V 0.1U/16V 3 + R590 10/F_0603
4 R587 R594 C829 C828 C531 D28
C743 47K 47K 6.8K 6.8K MTZS05-6.2 +5VALW

2
1

1000P
NC_1000P

NC_1000P
C804 NC_1000P 2 - Q35
10U/16V_1206 R608 SI9410DY NC_1K NC_1K

2
1

1
1K/F U48A C814 R582 0

1
AUDIO CODEC R603 C822 LM358AM 100P MIC1_VREFO_R 1 MIC1_V_R R647

2
2
4 3.3M 1U/10V_0603 A_GND 10K 4
U39

3
A_GND MIC1_VREFO_L MIC1_V_L

3
2
1
1 2
1 48 R20 0 Q37 R598 100K VDDA
DVDD1 SPDIFO SPDIF_OUT 23 VDDA R580 0

2
2 47
GPIO2 SPDIFI/EAPD EXT MIC

1
3 46 C_AUD_ON_5# 1 R583 R593 C812 MIC1_L
T192 PAD GPIO3 NC

1
4 45 R599 R356 4.7U/10V_0805 C810 C801 C805
DVSS1 NC

3
5 44 5 + 10_0805 C793
19 IAC_SDATAO_AUDIO SDATA_OUT GPIO1 CODEC_GPO
19 IAC_BITCLK_AUDIO 2 R531 0 1 6 BIT_CLK GPIO0 43 2N7002 7 NC_3.3M C794 C796 C803 C806 C784 NC_1K NC_1K 4.7U/10V_0805 12P 33P 12P 33P D33 Q42
C752 1U/10V_0603 0.1U/50V_06030.1U/16V 10U/16V_1206 22U/10V_1206 R656 NC_SCS500V-40

2
AVSS2 42 6 -

3
C739 NC_47P LINE_OUT_R U48B SENSE_A 1

2
HP-OUT-R 41 2 1 2 1 2 1
1 2 7 40 LM358AM Q13 A_GND A_GND A_GND A_GND NC_10K/F_0603
DVSS2 JDREF

2
39 2 1 LINE_OUT_L A_GND A_GND MIC1_R
HP-OUT-L

1
38 C758 1U/10V_0603 VDDA A_GND A_GND C_AUD_ON_5# 1 D34 2N7002
AVDD2
19 ACZ_SDATAIN0 2 1AUDIO_SDATA_IN 8 SDATA_IN MONO-OUT 37 R648 MTZS05-6.2

2
HP_SPK_R C754 C771 R657 100K

2
LINE-OUT-R 36

3
R530 39 9 35 HP_SPK_L 2N7002
DVDD2 LINE-OUT-L 0.1U/16V 10U/16V_1206 20K/F_0603 Q43

1
SENSE B 34

2
DCVOL 33
32 MIC1_VREFO_R 1
MIC1-VREFO-R VDDA

2
10 31 LINE_VREFO_R
19 IAC_SYNC_AUDIO SYNC LINE2-VREFO
IAC_RESET#_AUDIO 11 30 A_GND C823 C807 C799 VDDA D35
19 IAC_RESET#_AUDIO RESET# MIC2-VREFO
PC_SPKRIN 12 29 LINE_VREFO_L 2 1 2 1 MTZS05-6.2 2N7002
SENSE_A PCBEEP LINE1-VREFO A_GND A_GND
13 28 MIC1_VREFO_L 33P 4.7U/10V_0805 33P
SENSE A MIC1-VREFO-L MIC_R_J MIC_L_J

2
14 LINE2-L VREF 27 2 1 2 1
12P 12P

1
15 LINE2-R AVSS1 26

8
16 25 VDDA C815 C811 C827 A_GND C791 C800 C798
MIC2-L AVDD1 R602 33 C808 R591 33 C786
17 MIC2-R 3 5
18 VDDA C833 12P 33P 12P 1MIC_R_P2 1 2 1 MIC1_R C790 12P 33P 12P 7MIC_L_P2 1 2 1 MIC1_L
CD_L

1
C776 C777 C775 C774 C773

2
19 CD_GND A_GND 2 1 2 A_GND 2 1 6

1
20 C772 1U/10V_0603 1U/10V_0603
CD_R

2
MIC1_L 21 0.1U/16V 10U/16V_1206 10U/16V_1206 NC_12P NC_33P NC_0.1U/16V C818 33P C826 220P U46A C821 C817 C789 33P C797 220P U46B C787 C788
MIC1_R MIC1-L Q29 R609 LMV358AM8X 12P 33P R579 LMV358AM8X 12P 33P

4
22 MIC1-R 2 1 2 1 2 1 2 1
LINE_IN_L DTA114YUA

2
23 LINE1-L 2
LINE_IN_R 24 +3VRUNF 4.7K 2 1 4.7K 2 1
LINE1-R
ALC260 PC BEEP R604 47K A_GND R592 47K A_GND

1
23 APR_AMP_MUTE#
A_GND A_GND

23
2 1 2 1

3
R522
3

R526 Q30 C837 1U/10V_0603 C783 1U/10V_0603

20 AC_SPKR 1
Q40 Q39 4 1 2 2 1 2 DTC144EUA 10K A_GND A_GND
3 2 C737 3
24 CB_SPKOUT#

2
1 MUTE_SPK C734 10K 2 PC_SPKRIN

1
30 APR_AMP_MUTE 1 1
U37 0.1U/16V VDDA

2
TC7SH86FU D23

1
2

NC_2N7002 2N7002 MTZS05-6.2 C7321U/10V_0603 U47A

8
R619 VDDA R525 C813
NC_10K HP_SPK_R
2

1
3
2.2K 3300P 1 4.7U/10V_0805

1
2
HP OUT
1

1
C785 C769 C761
1

A_GND A_GND LMV358AM8X A_GND 2 1

1U/10V_0603 1U/10V_0603 10U/16V_1206 R664 NC_10K CON1

4
C792 R584 C766 R558 C782
2

5
2

A_GND A_GND
100U/6.3V_AL_CAP R615 33 HP_IN_5 4
1

R_INT_SPK_R- HP_R L24

17

+
21 12 2 1 1 2 3
4

U44 A_GND VDDA R586 33 HCB1608K-600T30 6

C755 R555 560P 18K 560P 18K HP_L L25

+
1 2 2 1 2 1 1 2 2
VDD1

VDD2

8
1U/10V_0603 18K LMV358AM8X R585 33 L22
2

1 2 1
HP_SPK_L 1 INT_SPK_L- R589 NC_0 JSPK1 HP_SPK_L 5 100U/6.3V_AL_CAP 2 R620 33 HCB1608K-600T30
1

2 1 2 6 -IN A -OUT A 5 1

2
8 3 INT_SPK_L+ 2 1 R_INT_SPK_L- 1 7 C802 R665 NC_10K HCB1608K-600T30 FOXCONN_JA9333L_WG1S9_7F
+IN A +OUT A 1

1
2 VDDA 6 C540 C541 C836 D29
HP_SPK_R 1 2 1 2 15 16 INT_SPK_R- 2 1 R_INT_SPK_R- 3
2 A_GND 10K 10K MTZS05-6.2 HEADPHONE
-IN B -OUT B 3

1000P
NC_1000P

NC_1000P
13 18 INT_SPK_R+ 4 U47B R606 1K Q36
1U/10V_0603 18K +IN B +OUT B R559 NC_0 4 R616 R621 GREEN

2
2 1
1

2
C756 R554 FOXCONN_HS82040

1
EXPOSED PAD

14 9 C780 C778 470P R_INT_SPK_L- A_GND 2SC5376F-B

BYPASS GND 1U/10V_0603 R660 NC_47K Q38
GND 10 2 1
1

C768 D26 D27 MUTE_TR A_GND A_GND

1
1 SHOTDOWN GND 11 2 1
VDDA 20 12 PACDN042Y3 PACDN042Y3 2 1 R661 NC_47K
HP_IN GND
GND1
GND2
GND3

0.01U/16V A_GND R575 10K R605 1K 2SC5376F-B

8
VDDA R577 10K C779
2

3
2

LINE_OUT_L 2 1 2 U43A 1U/10V_0603 R571 33 A_GND R567 33

5

R568 U45 A_GND A_GND LM4863MTE A_GND 1 1 2 2 1 2 1 LINE_OUT_L-

LINE_OUT_L- 23
19
21

100K VDDA
2
7

2 1 3
R581 10K 2 1 2 1 LINE_OUT_L+ A_GND
LINE_OUT_L+ 23

2
HP_IN_5 1 2 1 R564 4.7K LMV358AM8X VDDA
4 MUTE_SPK SPEAKER AMP R560 33 R562 33 R514 47K R517 47K
1

1
MUTE_5 2 R573 NC_47K VDDA 1 2 1 2 A_GND

2
VDDA A_GND A_GND R572 R566
TC7SET32FU 2 1 2SC5376F-B 2 1 C745
5

LINE_VREFO_L R576 10K Q33 C733 R527

1
2 1 1U/10V_0603
2 47K 47K 1U/10V_0603 47K 2

1
2 1

8
R570 0 VDDA R574 10K C736 1U/10V_0603 100K R528 A_GND
3

2
2

2
C767 LINE_IN_R+ U38A C746 1U/10V_0603

2
1 23 LINE_IN_R+ 1 2 2 1 3

8
A_GND R644 NC_0 4 R563 Q34 100K R537 1 2 1 LINE_IN_R
2 1 2 NC_47K 1U/10V_0603 6 U43B A_GND LINE_IN_R- 1 2 2 1 2
30 APR_ON 23 LINE_IN_R-

1
7 1 2

1
2 1 U42 2 1 5 2SC5376F-B 1U/10V_0603 LMV358AM8X
23 AV_PHONE_DET
TC7SET32FU +5VALW MUTE ON/OFF CIRCUIT A_GND 1U/10V_0603 C744
1

4
R645 1K +5VALW R569 4.7K C770 R529 R538 R536
MUTE_5 A_GND LMV358AM8X R565 R561 10K 10K 47K A_GND
3

4
A_GND A_GND 1K 1K
1

+5VALW 0.1U/16V +5VALW

2
+5VALW C824 R614 MUTE_TR A_GND
U56 +5VALW +5VALW
1

TC7SET04FU +5VALW 47K A_GND

2

R618 NC_0 C832 Q16

LINE IN
5

2.2U/10V_0603 U50A U24A U51 DTA114YUA VDDA

1

2 1 2
23,30,33,34,36,38 SUS_ON
TC7SH32FU LINE OUT
2

2 4 2 1 1 7 1 7
5

2 1 1 U49
23,30,33,36,38 RUN_ON
330K TC7W14FU TC7W14FU 1

2
R617 0 R612 MUTE_TR
3

4 2 1 2
2 2 Q14 C762 C760 470P R515 47K R520 47K VDDA
+5VALW 4 R666 0 DTC144EUA 1U/10V_0603 2 1 R662 NC_47K VDDA 1 2 1 2 A_GND

1
+5VALW 1 1
8

U50B R663 NC_47K

1

2 1 2 1
6 2 A_GND R556 10K C735 R523

8
U50C TC7SH86FU R550 10K C757 1U/10V_0603 47K
3
8

8
TC7W14FU LINE_OUT_R 2 1 2 U40A 1U/10V_0603 R551 33 A_GND C730 1U/10V_0603 100K R524
3

LINE_OUT_R- LINE_IN_L+ U38B C742 1U/10V_0603

4

2
3 5 1 1 2 2 1 2 1 LINE_OUT_R- 23 23 LINE_IN_L+ 1 2 2 1 5
2 1 3 R542 33 100K R532 7 2 1 LINE_IN_L
TC7W14FU 2 2 1 2 1 LINE_OUT_R+ LINE_IN_L- 1 2 2 1 6
LINE_OUT_R+ 23 23 LINE_IN_L-
Q41 R549 4.7K LMV358AM8X R544 33
4

1
+5VALW DTC144EUA R546 33 1U/10V_0603 LMV358AM8X
4

1
C731

4
+5VALW IAC_RESET#_AUDIO +5VALW A_GND R540 R541 R518 R519 R533
1
2

C839 2 1 2SC5376F-B 10K 10K 47K A_GND

0.1U/50V_0603 U24C R557 10K Q32
8

U24B 47K 47K

2
2 1
C_AUD_ON_5# VDDA R553 10K
1

2
2 1 6 2 3 5
2

C748
8

1
R613 47K TC7W14FU TC7W14FU Q31 A_GND 1
+3VRUNF +5VALW VDDA 1U/10V_0603 U40B A_GND
4

6
+5VALW
1

7 1 2
2

2
MUTE_EC 2 1 +5VALW 2 1 5 2SC5376F-B
30 MUTE_EC
2

R669 NC_0 R552 A_GND 1U/10V_0603

5

+5VALW R670 R671 NC_47K R548 4.7K C747

5

NC_1K NC_1K LMV358AM8X R539 R543

4

1K 1K
5

LINE_VREFO_R A_GND
1

1 2 1
CODEC_GPO MUTE_TR
1

2 1 2 4 1 4
2

R672 NC_0 1 U57 4 2 R547 0 A_GND

2

NC_TC7SET04FU 2 R545 HON HAI PRECISION IND. CO., LTD.

FOXCONN
2

R673 +5VALW R674 U54

3

CPBG - R&D Division

2

NC_1K NC_1K U55 R675 NC_TC7SH32FU NC_47K

R676 R677 NC_TC7SET32FU NC_1K Title
Audio CodecALC260
5

NC_1K NC_1K
3

1
1

2 4
A_GND Size Document Number Rev
1

1
U58 ?
1

Custom <Doc>
NC_TC7SET04FU
3

Date: Monday, September 13, 2004 Sheet 29 of 47

A B C D E
 1 2 3 4 5 6 7 8

U19 Consider short FB after BB test. SW1

+ECVCC 161 VCCBAT VCC 16 +ECVCC
VCC 34 1 1 3 3
17 45 L18
GND VCC
35 GND VCC 123 1 2 FOR EMI
+5VRUN 46 136 BLM11A121S KSO16 2 4 KSI0
GND VCC 2 4

1
122 157 C449 C467
GND VCC

1
137 166 C413 C412 FOXCONN_1BT002_0120L
GND VCC C419 0.1U/16V 0.1U/16V
167 GND SW2
1
2

1
2

2
ANALOG_VCC 1U/10V_0603 0.1U/16V 10U/6.3V_0805

2
159 BATGND VCCA 95
RP28 RP27

2
AGND 96 1 1 3 3

4P2R-S-10K 4P2R-S-10K 20,24 INT_SERIRQ INT_SERIRQ 7 85 APR_ON 29

LPC_FRAME# SERIRQ XIO8CS#/GPIO18 D31 KSI1
19 LPC_FRAME# 9 LFRAME# XIO9CS#/GPIO19 86 APR_AMP_MUTE 29 2 2 4 4
19 LPC_AD0 LPC_AD0 15 91 SYSTEM_ID0 +ECVCC PACDN042Y3
A LPC_AD1 LAD0 XIOACS#/GPIO1A SYSTEM_ID1 FOXCONN_1BT002_0120L A
4
3

4
3

3
19 LPC_AD1 14 LAD1 XIOBCS#/GPIO1B 92

2
19 LPC_AD2 LPC_AD2 13 93 SYSTEM_ID2
CLK_M CLK_KM LPC_AD3 LAD2 XIOCCS#/GPIO1C SYSTEM_ID3 C503
19 LPC_AD3 10 LAD3 XIODCS#/GPIO1D 94 U20

1
DAT_M DAT_KM CLK_KBCPCI 18 97 SYSTEM_ID4 D32
4 CLK_KBCPCI LCLK XIOECS#/GPIO1E
19,24,27 PM_CLKRUN# PM_CLKRUN# 25 98 SYSTEM_ID5 SIO_FA1 25 37 PACDN042Y3
SUS_PWRGD_10MS CLKRUN#/GPIO0C XIOFCS#/GPIO1F SIO_FA2 A0 VCC1 SIO_FD0 0.1U/16V SW3
20,23,24 SUS_PWRGD_10MS 24 GPIO0B SIO_FA0
FOR DEBUG SIO_FA3
24 A1 DQ0 29
SIO_FD1

2
A0 124 23 A2 DQ1 31 1 1 2 2
PLT_RST# SIO_FA1 SIO_FA4 SIO_FD2

3
2,6,10,19,22 PLT_RST# 165 LRST#/GPIO2C A1 125 22 A3 DQ2 33
H_RCIN# 6 126 SIO_FA2 J5 SIO_FA5 21 35 SIO_FD3 5
19 H_RCIN# KBRST#/GPIO03 A2 A4 DQ3 5
19 H_A20GATE H_A20GATE 5 127 SIO_FA3 E51RXD 1 SIO_FA6 20 38 SIO_FD4 3 4 PWRSW#
RUNTIME_SCI# GA20/GPIO02 A3 SIO_FA4 E51TXD SIO_FA7 A5 DQ4 SIO_FD5 3 4
20 RUNTIME_SCI# 31 ECSCI# A4 128 2 19 A6 DQ5 40
Always pull-high, even 2,33 THERMTRIP1# THERMTRIP1# 19 131 SIO_FA5 SIO_FA8 18 42 SIO_FD6 FOXCONN_1BT001_1420L_001
ECRST# A5 SIO_FA6 NC_FOXCONN_HS82020 SIO_FA9 A7 DQ6 SIO_FD7
if not PS2 connector ! A6 132 8 A8 DQ7 44
133 SIO_FA7 SIO_FA10 7 30
KSI0 A7 SIO_FA8 SIO_FA11 A9 DQ8 +ECVCC
71 KSI0/GPIK0 A8 143 6 A10 DQ9 32 SW5
KSI1 72 142 SIO_FA9 SIO_FA12 5 34
KSI2 KSI1/GPIK1 A9 SIO_FA10 +ECVCC SIO_FA13 A11 DQ10
73 KSI2/GPIK2 A10 135 4 A12 DQ11 36 1 1 2 2
KSI3 74 134 SIO_FA11 SIO_FA14 3 39
+ECVCC KSI4 KSI3/GPIK3 A11 SIO_FA12 SIO_FA15 A13 DQ12 R302
77 KSI4/GPIK4 A12 130 2 A14 DQ13 41 5 5
J1 KSI5 78 129 SIO_FA13 SIO_FA16 1 43 10K 3 4 LEFT#
KSI6 KSI5/GPIK5 A13 SIO_FA14 R311 SIO_FA17 A15 DQ14 SIO_FA0 3 4
79 KSI6/GPIK6 A14 121 48 A16 DQ15/A-1 45
1 2 LPC_AD0 KSI7 80 120 SIO_FA15 CLK_SMB 10K SIO_FA18 17 26 MEMCS_MB# FOXCONN_1BT001_1420L_001
LPC_AD1 LPC_AD2 KSI7/GPIK7 A15 SIO_FA16 SIO_FA19 A17 CE# FRD#
3 4 A16 113 16 A18 OE# 28 SW6
LPC_AD3 LPC_FRAME# KSO0 SIO_FA17 R314
5 6 49 KSO0/GPOK0 A17 112 9 NC1 RESET# 12
19 LPC_DRQ#0 LPC_DRQ#0 7 8 KSO1 50 104 SIO_FA18 DAT_SMB 10K 10 15 1 2
ID_LPC_PCI# 20 KSO1/GPOK1 A18 NC2 RY/BY# 1 2
20 PM_SUS_STAT# 9 10 FWH_INIT# 19 KSO2 51 103 SIO_FA19 13 11 FWR#
PLT_RST# PM_CLKRUN# KSO3 KSO2/GPOK2 A19 NC3 WE#
11 12 52 KSO3/GPOK3 A20/GPIO23 108 ALW_ON 32,33,37 46 VSS1 BYTE# 47 5 5
INT_SERIRQ 13 14 PCLK_JIG 4 KSO4 53 27 14 3 4 RIGHT#
FWH_BOOT KSO5 KSO4/GPOK4 SIO_FD0 VSS2 NC4 3 4
15 16 PCLK_FWH 4 56 KSO5/GPOK5 D0 138
17 18 KSO6 57 139 SIO_FD1 +ECVCC EN29LV800AB-70TC FOXCONN_1BT001_1420L_001
+5VRUN KSO7 KSO6/GPOK6 D1 SIO_FD2
19 20 +3VRUN 58 KSO7/GPOK7 D2 140
R219 KSO8 59 141 SIO_FD3 R290 47K STRAP1
B KSO9 KSO8/GPOK8 D3 SIO_FD4 B
60 KSO9/GPOK9 D4 144
100K FOXCONN_QT510206_L010 KSO10 SIO_FD5 R287 47K SIO_FA4 CN8 +ECVCC
61 KSO10/GPOK10 D5 145
KSO11 64 146 SIO_FD6
KSO12 KSO11/GPOK11 D6 SIO_FD7 R286 47K SIO_FA5 SIO_FA0 0.1U/16V
65 147 1 2
JIG-120 KSO13 66
KSO12/GPOK12
KSO13/GPOK13
D7
RD# 150 FRD# SIO_FA1 3 4 SIO_FD0

1
KSO14 67 151 FWR# SIO_FA2 5 6 SIO_FD1 C510
KSO15 KSO14/GPOK14 WR# IOCS# SIO_FA3 SIO_FD2
68 KSO15/GPOK15 IOCS# 152 PAD T194 7 8
+ECVCC KSO16 153 173 MEMCS# SIO_FA4 9 10 SIO_FD3
KSO16/GPOK16 MEMCS# SIO_FA5 SIO_FD4

2
T193 PAD 154 KSO17/GPOK17 11 12
163 SMB_THRM_CLK SIO_FA6 13 14 SIO_FD5
SCL1 SMB_THRM_DATA SMB_THRM_CLK 4,14,17
2 164 SIO_FA7 15 16 SIO_FD6 +ECVCC
OVT_EC# GPWU0 SDA1 SMB_THRM_DATA 4,14,17
R319 26 169 SIO_FA8 17 18 SIO_FD7
GPWU1 SCL2 CLK_SMB 32
10K VGA_CRT_DET# 29 170 SIO_FA9 19 20 0.1U/16V
GPWU2 SDA2 DAT_SMB 32
4 PM_THRM# 30 SIO_FA10 21 22 MEMCS# C528
GPWU3

1
D12 LIDIN# 44 32 EXTSMI# SIO_FA11 23 24 FRD# U23
13 LIDIN# GPWU4 PWM0/GPOW0 EXTSMI# 20
SCS500V-40 76 33 WAKE_SCI# SIO_FA12 25 26 FWR# CARD_INSERT 1 5
17 OVT_DDR2# GPWU5 PWM1/GPOW1 WAKE_SCI# 20 A VCC
PWRSW# 2 1 172 36 FAN1_PWM SIO_FA13 27 28 CARD_INSERT MEMCS# 2 4
32 PWRSW# 32 BATT_PRS# GPWU6/TIN1 PWM2/GPOW2/FAN1PWM FAN1_PWM 23 B Y
+3VRUN FAN2_TACH SIO_FA14 EC_OUT1

2
23 FAN2_TACH 176 GPWU7/TIN2/FANFB2 PWM3/GPOW3 37 PAD T148 29 30 3 GND
38 AC_OFF 32 SIO_FA15 31 32 BOOT_MODE# R363
C477 CLK_M PWM4/GPOW4 SIO_FA16 10K MEMCS_MB#
110 39 INV_EN_EC 13 33 34 NC7S32
0.1U/16V R335 DAT_M PSCLK1 PWM5/GPOW5 SIO_FA17
111 PSDAT1 PWM6/GPOW6 40 IMVP_VR_ON 35 35 36
CLK_KM 114 43 FAN2_PWM SIO_FA18 37 38
PSCLK2 PWM7/GPOW7/FAN2PWM FAN2_PWM 23
+3VALW DAT_KM 115 SIO_FA19 39 40
10K CLK_TP PSDAT2
116 PSCLK3
DAT_TP 117 171 FAN1_TACH
PSDAT3 FANFB1/TOUT1/GPIO2E FAN1_TACH 23
23,28 PORT_DET# PORT_DET# 81
WLAN_EN AD0/GPIAD0
27 WLAN_EN 82 AD1/GPIAD1
+3VALW R222 13,23 VGA_CRT_DET# 35 VTT_PWRGD VTT_PWRGD 83 FOXCONN_QT510406_L011
10K R298 0 AD2/GPIAD2 CAP_LED#
33 ALW_PWRGD 84 AD3/GPIAD3 CAPLOCK#/GPIO11 54
BOOT_MODE# 87 55 PAD T145 X BUS CONN.
VCC_MCH_VRPWRGD AD4/GPIAD4 FNLOCK#/GPIO12 SCROLL_LOCK_LED#
32 MAX1909_IINP_EC 88 AD5/GPIAD5 SCROLLLOCK#/GPIO0F 41
MCH_VTT 89 23 NUM_LOCK_LED#
CN5 23 D_PWRGD AD6/GPIAD6 NUMLOCK#/GPIO0A
3

C R223 R297 0 90 C
14 NVTHM_ALERT# AD7/GPIAD7
10K 1 KSI0 6,20 IMVP_PWRGD 28 99 PAD T191
1 KSI1 EN_EXT_DEV_SENSE# 27 GPIO0E DA0/GPODA0 SUSPEND_LED# +5VRUN +5VRUN
2 2 13,23 EN_EXT_DEV_SENSE# GPIO0D DA1/GPODA1 100
1 3 KSI2 36 VTT_ON VTT_ON 175 101 POWER_LED#
R218 3 KSO0 TOUT2/GPIO2F DA2/GPODA2 BATTERY CHARGING LED# TPVDD
4 4 35 IMVP_OK 8 GPIO04 DA3/GPODA3 102 1 2
1K 5 KSO1 EC_OUT1 11 1 BRADJ_EC 13 L52 HCB1608K-121T25
5 GPIO05/FAN3PWM DA4/GPODA4

1
Q9 6 KSO2 4,20 OVT_EC# R321 0 12 42 PAD T149 C835 C830
6 GPIO06/FANFB3 DA5/GPODA5
3

Q8 7 KSI3 FWH_BOOT 20 47 PAD T146

MMBT3904 2N7002 7 KSO3 GPIO07 DA6/GPODA6 R323 R324 R277 R326 0.1U/16V 0.047U/10V
2

1 8 8 23 DOCK_ID0 21 GPIO08 DA7/GPODA7 174 PAD T147

KSO4 150 150 150 150

2
9 22

LED_DUAL_HARV_HT_297_UD_UYG
9 23 DOCK_ID1 GPIO09
10 KSO5 4,35 CLK_EN# 48 3 PWRLIMIT# 37
10 GPIO10 E51IT0/GPIO00

1
2
LED_1GND_HARV_HT_110_UYG

LED_1GND_HARV_HT_110_UYG

LED_1GND_HARV_HT_110_UYG
KSO6 MUTE_EC
2

11 11 29 MUTE_EC 62 GPIO13 E51IT1/GPIO01 4 PAD T196

12 KSO7 20 PM_SLP_S3# PM_SLP_S3# 63 106 E51RXD RP51
12 KSO8 PM_SLP_S4# GPIO14 E51RXD/GPIO21/ISPCLK E51TXD R366 R367
13 13 20 PM_SLP_S4# 69 GPIO15 E51TXD/GPIO22/ISPDAT 107
KSI4 PM_SLP_S5# STRAP1 150 150 4P2R-S-10K CN18
14 20 PM_SLP_S5# 70 105

LED_HARV_HT_170_UY
14 KSO9 PM_RSMRST# GPIO16 E51CS#/GPIO20/ISPEN_TP
15 15 20 PM_RSMRST# 75 GPIO17 12 VDD
16 KSI5 34 SUS_PWRGD SUS_PWRGD 109 R307 0 L19 HCB1608K-121T25 11
16 GPIO24 VDD

2
KSI6 32KXCLKO DAT_TP

4
3
17 17 16,34,36 RUN_ON1 118 GPIO25 XCLKO 160 10 DATA

3
18 KSO10 2 H_PROCHOT# H_PROCHOT# 119 D8 D10 D16 D9 D15 CLK_TP 9
18 KSI7 VCC_MCH_VRPWRGD 148 GPIO26 R308 L20 HCB1608K-121T25 CLK
19 19 34 VCC_MCH_VRPWRGD GPIO27 3 3 3 8 GND
20 KSO11 SUS_ON 149 10M 7
20 23,29,33,34,36,38 SUS_ON GPIO28 GND

1
Green

Green

Green
Yellow
21 KSO12 32 ENCHG# ENCHG# 155 158 32KXCLKI C520 C521 6
21 KSO13 ACIN GPIO29 XCLKI Y2 2/4 BUTTON
22 22 32,38 ACIN 156 GPIO2A 5 UP
KSO14 RUN_ON 47P 47P

1
23 23 23,29,33,36,38 RUN_ON 162 GPIO2B 1 4 4 DOWN
+3VALW KSO15 PWRBTN# LEFT#

2
24 24 20 PWRBTN# 168 GPIO2D Green/Amber FOR EMI 3 SWL
2 3 RIGHT# 2
+3VALW SWR
PM_SLP_S3# R306 100K 1
+3VRUN 0/180
FOXCONN_GB21240_0001 KB3910 176 LQFP C448 C447
PM_SLP_S4# R284 100K 15P 32.768KHZ 15P
+3VALW R29 CLOSE TO CHIP FOXCONN_GB11120_0221_7F_7FT
10K PM_SLP_S5# R285 100K R357 R358
0 0
D VTT_PWRGD RUN_ON R309 100K +ECVCC Touch Pad D
+VCCP +ECVCC FOR ALPS
3

R30 SUS_ON R305 100K R283 AL_100K SYSTEM_ID0 R296 NV_100K

10K SW7 R325 TOUCH PAD
ALW_ON R512 100K R282 100K SYSTEM_ID1 R295 NC_100K 1 2 LIDIN#
1 2 100K
1
R31 RUN_ON1 R289 100K R281 100K SYSTEM_ID2 R294 NC_100K HON HAI PRECISION IND. CO., LTD.
1K
Q5 EC_OUT1 R320 10K R280 100K SYSTEM_ID3 R293 NC_100K 3 3 FOXCONN CPBG - R&D Division
3

Q6 HCH_PDS101C_E Title
MMBT3904 2N7002 SIO_FA1 R288 10K R279 100K SYSTEM_ID4 R292 NC_100K K.B.C
2

R278 100K SYSTEM_ID5 R291 NC_100K Size Document Number Rev

?
2

Custom <Doc>
Date: Monday, September 13, 2004 Sheet 30 of 47
1 2 3 4 5 6 7 8
 5 4 3 2 1

System N-Channel
transistor
+5VRUN
DCBATOUT
MAXIM +5VALW/8A 23,29,30,33,36,38 RUN_ON
N-Channel
MAX1999EEI 23,29,30,33,34,36,38 SUS_ON transistor
+5VSUS
System
Adaptor Switch Mode +3VALW/5A N-Channel

ON5
transistor +3VRUN
LDO5 +5VALW_LDO
19.5V / 80W 30,32,33,37 ALW_ON 23,29,30,33,36,38 RUN_ON
D
ALW_ON ON3 FOR System LDO3
PGOOD
+ECVCC
23,29,30,33,34,36,38 SUS_ON
N-Channel
transistor +3VSUS
D

ALW_PWRGD 30,33
LP3875
DCBATOUT
23,29,30,33,36,38 RUN_ON
LDO +2_5VRUN_ALV
Semtech +2_5VSUS_DDR1/8A
SC486

23,29,30,33,34,36,38 SUS_ON
SUS_ON
ON1 Switch Mode SMDDR_VTERM/2A
DIMMDDR2_VREF
23,29,30,33,36,38 RUN_ON ON2 FOR DDR2 PGOOD1
PGOOD2
SUS_PWRGD 30,34

DCBATOUT
MAXIM MAXIM MCH_VTT/8A N-Channel
+VCCP
MAX1909ETI transistor

C MAX1845 30,36 VTT_ON C

Switch Mode Switch Mode

RUN_ON N-Channel
23,29,30,33,36,38 RUN_ON ON1 +1_5VSUS/6A transistor +1_5VRUN
SUS_ON PGOOD
ON2 VCC_MCH_VRPWRGD 30,34 23,29,30,33,36,38 RUN_ON

DCBATOUT

MAXIM +1_2VRUN/3A
30,32 ENCHG# MAX1845
Switch Mode +1_0VRUN/11.55A
RUN_ON
ON1 (1.1V)
RUN_ON
ON2 FOR VGA PGOOD

B B

N-Channel
Semtech +2_5VSUS/5A transistor
+2_5VRUN
23,29,30,33,36,38 RUN_ON
SC486
SUS_ON
ON1 Switch Mode VRAM_TERM/2A
VRAM_VREF
RUN_ON
ON2 FOR VRAM PGOOD1
PGOOD2

Battery
BPS2 MAXIM
DCBATOUT
A
Li-ion 30,35 VTT_PWRGD
SYSPOKMAX1987 VHCORE/28A
A

12.6V Switch Mode

HON HAI PRECISION IND. CO., LTD.
4400mAH FOR CPU CoreIMVP_OK FOXCONN CPBG - R&D Division
IMVP_OK 30,35 Title
30,35 IMVP_VR_ON SHDN# CLK_EN#
CLK_EN# 4,30,35
Power Design Diagram

Size Document Number Rev

<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 31 of 47
5 4 3 2 1
 5 4 3 2 1

BT+_4
DAT_SMB_1
DC_IN from port CLK_SMB_1
AC_IN Threshold 2.089V Max. BATT_PRS_1
replicator PD2 SKS30-04AT SYS_PRS_1
AC_IN > 2.089V --> AC DETECT
2 1
DC_IN PQ51 PQ50
DCBATOUT C844
SI4835BDY SI4835BDY
0.01/F_2512

47P/50V
PL2 PF1 OCP 8 8 PR155 8 C845

47P/50V
7 1DC_IN_MOS 1 7 DC_IN_R 1 2 1 7 BT+ C846
PCON2

47P/50V
BLM41PG181SN1 6 2 2 6 2 6 C847

47P/50V
PL1 3216FF-7A PC92 PC90 PC93 PC91 5 3 3 5 PC100 PC99 PC98 C862 C863 C864 C865 C866 3 5 C848

1U/25V_0603

1U/25V_0603

1U/25V_0603
0.1U/50V_0603

0.1U/50V_0603

0.1U/50V_0603

0.1U/50V_0603

0.1U/50V_0603

0.1U/50V_0603
NC_10U/25V_1210

0.1U/50V_0603

47P/50V
PC2

NC_1U/25V_0603
D D
1

1
PR6

PR9
PC154 BLM41PG181SN1 PU1

NC_0.1U/50V_0603
PC158
0.01U/25V

PR21 FDS6675
PC1 0.1U/50V_0603 PD3 100K/F_0603 DC_IN_G1

4
120K_0603

120K_0603
PL3 T4S-20J

1
MAX1909_ACIN

2
2 BLM41PG181SN1 0.1U/50V_0603 PR214

2
PL4 10K/F_0603 For EMI request8/30
MAX1909_PDL

1
BLM41PG181SN1 Near MAX1909 SM bus Address :
molex_53259_0220 PR20 MAX1909_LDO

2
PQ5 20K/F_0603 Pin 2 0001011 (EC)

3
PQ6 PQ7 For Smart Battery .

PDTC144EKA

PDTC144EKA

PDTC144EKA
PC10
PC3 1U/25V_0603

2
1 1 1 DCBATOUT

3
1U/25V_0603
1

D30

2
PC6 PACDN042Y3
2

2
PD4

1
PR5 1 2 PC4 PC5 PR12
PD5

37

1U/25V_0603
AC_OFF_3#
75K/F_0603 1U/25V_0603 1U/25V_0603 33 PC95 PC96

MAX1909_DHIV
10U/25V_1210 10U/25V_1210

2
MW400 2 1
Near MAX1909
2

3
MAX1909_LDO PQ4

1
1U/25V_0603 MW400 Pin 21

3
2
1
PU2 SI4835BDY D3

26

25
PC7 PC9 PU13 PACDN042Y3
1U/25V_0603
4 FDS6675

CSSP

CSSN
1
PR15 MAX1909_PDS BT+_3

2
27 PDS DHIV 22
1

NC_100K/F_0603

2
24 SRC PDL 28 8
1

ICHG=1.5A for turn PR23 PR14 MAX1909_DC_IN 1 2 PL6 0.015/F_2512 7 1 PF2 PCON1
DCIN LDO

FOXCONN_BP34063_C6201_7F
C PR22 56K/F_0603 10K/F_0603 3216FF-7A L53

5
6
7
8
6 2 C
on and turn off PR152
56K/F_0603 BT+_1 1 2BT+_2
1 2 5 3 BT+_4
6 6
ENCHG#="1",Discharge 2 21 MAX1909 DLOV BLM41PG600SN1
MAX1909_VCTL 11 DLOV SPD1004PT150M R14 100 DAT_SMB_1
2

VCTL 30 DAT_SMB 5 5

5
6
7
8
MAX1909_ICTL 10 PC94 PC88 PC89
2

ICTL

2
MAX1909_MODE 7 R15 100 CLK_SMB_1

4
MODE 30 CLK_SMB 4 4
3

1
23 MAX1909 DHI 4 PD29
DHI
1

10U/25V_1210

10U/25V_1210

10U/25V_1210
PQ13 PD1 R10 330 BATT_PRS_1
3 3
30 BATT_PRS#

NC_SKL20-04AT
MAX1909_LDO PR17 PR18 3 PQ3 SKL20-04AT
22K/F_0603 ACIN SI4892DY R9 330 SYS_PRS_1

2
30 ENCHG# 1 37 SYS_PRS# 2 2
15K/F_0603 MAX1909_IINP

1
2
3

1
8 IINP
1

2N7002 20 MAX1909_DLO L58 BAT_GND_1

1 1
DLO

7
8
PR13 MAX1909_CLS BLM41PG600SN1
2

37 MAX1909_IINP_HW 9 CLS
06/18 modify PR215 NC_0
100K/F_0603
2

7
8
by Jay(ACOK 30 MAX1909_IINP_EC Need to keep same length
PR216 0 19
pull high to PGND1
2

30,38 ACIN 6 ACOK

2
3.3V and PGND2 29

1
ACIN# change When battery in BATT_PRES#
D2
to ACIN) 5
pull low PR4 PACDN042Y3
30 BATT_PRS# PKPRES 75K/F_0603
1

2
From Battery Pack Detect Pin PR11 CSIP 18

3
Mode=Float; charge 3 Cells MAX1909_CCV 13 17
CCV CSIN

3
200K/F_0603 PC13 MAX1909_CCI 12 16
Mode=LDO charge 4 Cells MAX1909_CCS
14
CCI BATT
15 PR26 0_0603 PQ16 06/23 add by

REF
CCS GND
1
1U/25V_0603

PR16
2

1 2 1 Jay(stoping
1

1
7.15K/F_0603

PR19 BATT_EN PDTC144EKA

PR28 reverse
20K/F_0603

PR10 MAX1909ETI
NC_0_0603

PC14 PC15

4
37 AC_OFF_3# 1 2 current)
B NC_0 B

2
3

PQ17
2

1
0.01U/50V_0603
PDTC144EKA

470P
2

V_REF :4.2235V (<500uA)

MAX1909_REF

DIAG process 1 PR8

30 AC_OFF 21.5K/F_0603
PC16
0603 add by Jay
0.01U/50V_0603

ISOURCE_MAX Current = 4A When Battery only and not power

So,Constant Power=19.5 *4=78W off ,disconnect KBC power
2

PQ1
DC_IN MAX1909_CLS PR40 0_0603
1

PRT_IN VSOURCE 1 2
SI4835BDY
PR7
8 Viinp=Isource*PR1*3mA*PR16 PC8 20K/F_0603

2
1 7
2 6 1U/25V_0603 PR39 PR38 PR37 PR36
PQ69 75K/F_0603 75K/F_0603 75K/F_0603 75K/F_0603
2

3 5
Avoid 16V adaptor DC_IN_MOS IRLML5103
1

DC_IN PR217 PRG18BB30MB3RB

1
PR1
work modify by Jay
Low voltage protact 2 3 1 2 DC_IN_R
100K/F_0603 8/26
4

set in 8.1V

2
PDTA144EK
PQ23 PQ20

3
+5VALW_LDO PQ73 PDTC144EKA PDTC144EKA PQ22 PQ19
BATT_EN
2

3
DCBATOUT PDTC144EKA PDTC144EKA
2

1
1
PR213 PR54 PR59 PR68 1 1
AC_OFF_3# 37
1K_0603 100K/F_0603 100K/F_0603 1 1
30 PWRSW#
1

1
120K_0603

PD38
PORT_DET_P 23
T4S-15J PR64
2

PD20 3
PR2 75K/F_0603
1

2
2
PDTA144EK
13K_0603

2
30,33,37 ALW_ON 1 2
1

1
PU6 PQ70 PR221
2

PR218
PR3 S-80845CNMC-B86-T2 100K/F_0603
2

BAS316 1
1

2
10K/F_0603
PQ2 0_0603 2 PR222 PD39 1 2 DC_IN_MOS
A 30,33,37 ALW_ON A
3

PDTC144EKA PQ67 PQ68 1

3

MTZS05-5.1
100K/F_0603

4 PR219 MAIN_DC_SW_OFF#
3

2
PDTC144EKA

PDTC144EKA
2

2
1
1 1 PQ18 PQ21 PR63 100K/F_0603

3
95.3K/F_0603 PQ71 PQ72
3

PDTC144EKA

PDTC144EKA
MAX1909_PDS
32

1 1 HON HAI PRECISION IND. CO., LTD.

FOXCONN
2

1 1
2N7002 DC_IN_G1 CPBG - R&D Division
2

2N7002 Title
PORT_DET_N 23 PD40 DCIN & Charger
PR223
2

2
1 2 LASM02-03T4 Add by Jay 9/1 Size Document Number Rev
AC_OFF_3# A
Port Replicator Modify by Jay 8/23 0
1

Custom
<Doc>
connection MAIN_DC_SW_OFF# Date: Monday, September 13, 2004 Sheet 32 of 47
5 4 3 2 1
 5 4 3 2 1

+15VRUN

3
3
1 PQ28
23,29,30,36,38 RUN_ON IRLML5103
1
PQ25 PR95

2
PDTC144EKA 220K/F_0603

2
D DCBATOUT DCBATOUT D

+15VRUN_1
5VALW_LDO/100mA

1
PC59 PC143 PC60
10U/25V_1210 10U/25V_1210 JP13 0.1U/50V_0603
PR196 1 2 +5VALW_LDO PR96 PR94
4.7_0805 0 NC_0

2
1999VCC PR205
47
1999_LDO5 pin1 and pin2 Reverse by Jay
PC148

1
PC147 15V DCBATOUT

4.7U/10V_0805
PC145 PC146 PC149 PD33 1U/10V_0603

4.7U/25V_1206
0.1U/50V_0603 1U/10V_0603 LASM02-03T4

1
PC142

2
0.1U/50V_0603

2
2
Place these CAPs Place these CAPs

2
close to FETs close to FETs
BST_3 BST_5 2200P/50V +5VALW

1
PC61
+3VALW PU17 MAX1999 Current

1
PC140 Limit 8A
Current

5
6
7
8
2200P/50V 1999_V+

2
20 V+ LDO5 18
Limit 5A PR208 PC150
0.1U/16V +5VALW
PQ63 BST5

2
17 VCC BST5 14 1 2 4

8
7
6
5
FDS6612A 0 PQ34 +5VALW_J
1 16 DH5 JP10
+3VALW PC141 0.1U/16V PR189 N.C. DH5 FDS6612A PL12
4
BST3 LX5 +5VALW_J

1
2
3
2 1 28 BST3 LX5 15 2 1 1 2
C 0 C

5
6
7
8
JP15 DH3 26 19 DL5 RLF12545T-5R6N6R1
DH3 DL5

1
PL13 JP9

3
2
1

1
1 2 +3V_SRC_J 2 1 LX3 27 21 4 PR197 PC135 + +
LX3 OUT5

NC_0_0603
SPD1004PT5R2M PQ62 PC133 PC134

0.1U/16V
1 2
JP14 PQ64 DL3 24 9 FB5
DL3 FB5

8
7
6
5

6TPE150M_7343

6TPE150M_7343
IRF7811AV PRO# IRF7811AV

2
PRO 10
1

PR194 1999REF

1
2
3
1 2 22 OUT3
1

+ + PC151 NC_0_0603 4 11 ILIM5

PC153 PC152 0.1U/16V FB3 ILIM5 ILIM3
7 FB3 ILIM3 5
6TPE150M_7343

6TPE150M_7343

8 1999REF PR198
REF

0_0603
ON3 TON
2

3 ON3 TON 13
ON5
3
2
1
4 ON5 GND 23

1
SHDN
PR195 2 PC144

SKIP
0_0603 PGOOD 1U/10V_0603
25 LDO3 +ECVCC

2
12

6
2

1
JP11 PC139 PR187
4.7U/10V_0805 100K FB5 connect to GND
PR188 0
fixed 5V

2
30,32,37 ALW_ON JP12
PR186 0 ALW_PWRGD 30
2 1 1999_V+
+ECVCC

+ECVCC/100mA
PR203 NC_0 PR193
FB3 connect to GND
B fixed 3.3V 1999VCC
NC_0
THERMTRIP1# 2,30 B
1999REF 1999VCC
PR209 NC_0
PR204
23,29,30,34,36,38 SUS_ON
0

add by Jay 8/20

PR199 PR190 PR201 PR206
100K/F_0603 100K/F_0603 NC_0_0603 0_0603

ILIM5

ILIM3

PRO#

TON

add by Jay 8/31 PR202 PR191 PR200 PR207

75K/F_0603 75K/F_0603 0 NC_0

INVERTER_VCC
PR210

33K_0603
3

PQ65

A 1 A
2PC4617 TON connect to GND = 5V/200 ,
3.3V/300KHZ
2

PD37
2
1

PC155 MTZS05-15 15V HON HAI PRECISION IND. CO., LTD.

2200P/50V 0 PR184 FOXCONN CPBG - R&D Division
2

Title
D/D Power

Size Document Number Rev

<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 33 of 47
5 4 3 2 1
 5 4 3 2 1

PR133 0
+5VALW_J
PR131 NC_0
+5VSUS
DCBATOUT 486_BST_2

1
PR137
Seting DDR1 PR177=14K 1% , PR135=20K 1% PR175 PR134 PD28 470K
620k 10/F_0603

PR176 10/F_0603 PU12 SC486 SK003-03T

VDDQ 486_VDDQS

2
D 3 VDDQS PGD 7 SUS_PWRGD 30 D
DCBATOUT

PC69 PR177
18p PC68 2
14K/F_0603 1U/10V_0603/X5R/K TON PC57 PC55 PC53 PC54
PR129
+2_5VSUS_DDR1 Current Limit 8A
PR182 0 6 10U/25V_1210 10U/25V_1210 2200P/50V
DDRDIMM_VREF REF FB
8 REF BST 24 486_BST 0 486_BST_1 0.01U/25V
+2_5VSUS_DDR1
PR180 9 25 PC62
COMP THERMAL

5
6
7
8
JP6
10/F_0603 0.1U/16V PQ32
PR183 PC71 23 486_DH 4 1 2
10/F_0603 0.1U/50V_0603 DH IRF7811AV
10 PR130 PL11 JP5
PR135 VTTS 6.49K/F SPD1005PT1R5M
20K/F_0603 21 486_ILIM 486_MOS 1 PC128 PC126 VDDQ

1
2
3
5 VCCA ILIM 2 1 2
PR185

5
6
7
8

4TPE220M_7343

4TPE220M_7343
PC136 PC73 22
10/F_0603 LX

1
68n/16V PC64 PC67 PQ61

1
1U/10V_0603/X5R/K 1nF 1U/10V_0603/X5R/K 19 486_DL 4 + + PC130
DL FDS6676S 0.1U/16V
VSSA 4 VSSA

2
JP7 EN/PSV

1
2
3
14 VTT EN/PSV 1
2 1 VTT 15 VSSA
SMDDR_VTERM VTT VTTEN
VTTEN 11
VDDQ 12 PR138
VDDP2 0
13 VDDP2 VDDP1 20
PC65 PC75 PC74 PC76 PC77 PC72 PC70 PC66

1U/10V_0603
1U/10V_0603
10U/16V_1206

10U/16V_1206

10U/16V_1206
10U/16V_1206

PC63
0.1U/16V

C 16 C
PGND1

22U/10V_1206
17 18 1U/10V_0603/X5R/K
PGND2 PGND1

PR132 0

23,29,30,33,36,38 SUS_ON
PR136 0

16,30,36 RUN_ON1 PR181

NC_0

Reverse PR118 0 Reverse

by Jay +5VALW_J by Jay
PR114 NC_0
PD25
+5VSUS
+1_5VSUS 1.5V_BST_12 1 DCBATOUT
PD27
DCBATOUT PR116 20
Current MAX1845A_VCC 1.05V_BST_2 1 21.05V_BST_1
SK003-03T
Limit 6A
SK003-03T
MCH_VTT

1
PC47 PC39
Current
1

1
+1_5VSUS PC56 PC50 PR109 1U/10V_0603 10U/16V_1206 PC37 PC48 PC52 PC45
1

1
JP2 PC35 0.1U/50V_06032200P/50V 0 PC51 0.1U/50V_06032200P/50V 10U/25V_1206 10U/25V_1206 Limit 8A
1

10U/25V_1206 PC43 PR121 0 0.1U/50V_0603

2
22

21
0.1U/50V_0603 PU10
2

2
1 2
B PQ27 MCH_VTT B
2

2
VCC

VDD
8
7
6
5

5
6
7
8
JP1 IRF7811AV JP3
2

4 V+ PQ31
1 2 4 1.5V_BST_R 19 25 1.05V_BST 4 1 2
BST2 BST1 IRF7811AV
PL9 1.5V_DH 18 26 1.05V_DH PL10 JP4
SPD1004PT3R8M DH2 DH1 SPD1005PT1R5M 1.05V
1.5V_OUT 1.5V_LX 1.05V_LX
3
2
1

1
2
3
2 1 17 LX2 LX1 27 1 2 1 2
8
7
6
5

5
6
7
8
PC44 PC38 PQ56 16 28 PC124 PC123 PC122
CS2 CS1
1

1
2R5TPE330M9_7343

2R5TPE330M9_7343

FDS6676S PQ59
1

2R5TPE330M9_7343

2R5TPE330M9_7343

2R5TPE330M9_7343
PC119 + + PR99 4 1.5V_DL 20 24 1.05V_DL 4
DL2 DL1

1
0.1U/16V 10K/F_0603 FDS6676S PR124

1
15 1 1.05V_OUT 1K/F + + + PC58
OUT2 OUT1 0.1U/16V
2

1.5V_FB 1.05V_FB
3
2
1

1
2
3
14 FB2 FB1 2

2
MAX1845A_VCC

REF 10 MAX1845_REF

NC_0

PR120 100K/F_0603

PR103 100K/F_0603
PR100 7 PGOOD
1
PR112 PR105 20K/F_0603 PC42
11 1U/10V_0603
ON1 PR125
30 VCC_MCH_VRPWRGD
PR119
NC_0 0 20K/F_0603
2

12 ON2

MAX1845A_OVP 16,30,36 RUN_ON1 6 5

23,29,30,33,36,38 SUS_ON SKIP TON
MAX1845A_UVP MAX1845A_OVP
8 3
OVP ILIM1
A A

PR102 124K/F_0603
MAX1845A_UVP
9 13 Vout
GND

UVP ILIM2
61.9K/F_0603

+3VALW
PR111 PR107 =1.05V,PR1=1kohm,PR2=20kohm
MAX1845EEI
23

0 NC_0 PR115 HON HAI PRECISION IND. CO., LTD.

FOXCONN
PR123

10K
CPBG - R&D Division
Vout =1.5V,PR1=5kohm,PR2=10kohm TON=OUT1_345KHz/OUT2_255KHz Title
2.5V/1.25V_1.5V/1.05V

Size Document Number Rev

<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 34 of 47
5 4 3 2 1
 5 4 3 2 1

+5VRUN
DCBATOUT

PC109 PC111
PR42 0.1U/50V_0603 0.1U/50V_0603

1
0
PC113 PC108 PC107

5
6
7
8
9

5
6
7
8
9
2200P/50V 10U/25V_1206 10U/25V_1206

2
D 1987BSTM_1 Reverse 1987DHM 4 4 D

by Jay PQ52 PQ53

PR87 NC_IRF7811AV IRF7811AV VHCORE

1
10/F_0603

1
2
3

1
2
3
1
PC23 PD19 PL8 PR32
10U/16V_1206 SK003-03T MPC1040LR56 0.001/F_2512
1987VCC 1987LXM 2 1 1 2

2
1
PC32

5
6
7
8
9

5
6
7
8
9
1U/10V_0603 1987BSTM PQ10 PQ11 PC115 PC114 PC156

1
FDS7064N FDS7064N

1
+3VRUN +3VRUN

2R5TPE220M9

2R5TPE220M9

2R5TPE220M9
1987DLM PD9 PC29

2
4 4 + + +
SKS30-04AT 0.01U/25V

1
PR41 PC22

1
DCBATOUT 0_0603 0.22U/16V_0603 PC11

2
1
2
3

1
2
3

1
NC_1n 1987CM+

2
PR48 PR56

2
12

36
10K 22K/F_0603 PU5
42 1987CM-

VCC

VDD
V+
Add by Jay
32 1987BSTM_R
22
BSTM
Reverse 8/23
30 VTT_PWRGD SYSPOK
33 1987LXM
23
LXM by Jay
30 IMVP_OK IMVP_OK
34 1987DHM
CLK_EN# DHM
4,30 CLK_EN# 24 CLK_EN
35 1987DLM
PR47 0 DLM PR53 3K/F
3 H_VID0 30 D0 GND 13 VHCORE
C 29 37 PR58 1K/F C
3 H_VID1 D1 PGND
28 49 1987CS+
3 H_VID2 D2 TH_GND
3 H_VID3 27 D3
3 H_VID4 26 D4
25 PR57 1K/F
3 H_VID5 D5
20 OA+ 1987CM+ DCBATOUT
1987_S2 OAIN+
8 S2
1

1
1987_S1 7 PC26
1987_S0 S1 470P
6 S0 PR61 1K/F
PJ1 PJ4 PJ2 PJ5 PJ3 PJ6 PBOOT_B0 OA- 1987CM-

2
3 B0 OAIN- 19
PBOOT_B1 PC27 470P
2

4 B1

1
PBOOT_B2 5 17 1 2 PC110 PC112 PC106 PC105 PC104 PC103
B2 CCI PR62 1K/F
PR86 0 1987CS- 0.1U/50V_0603 2200P/50V 10U/25V_1206 10U/25V_1206 10U/25V_1206 10U/25V_1206
PR66 1M

2
30 IMVP_VR_ON 9 SHDN

5
6
7
8
9

5
6
7
8
9
PR69 0 18 1987FB
FB
4,20 STP_CPU# 44 DPSLP
PR65 100 45 1987CM+ 1987DHS 4 4
CMP
20 DPRSLPVR 43 SUS
modify value by Jay 8/30 PQ55 PQ54
PR158 NC_0 2 1 14 NC_IRF7811AV IRF7811AV
PC30 330P CCV

1
2
3

1
2
3
1 46 1987CM- PL7 PR31
TIME CMN MPC1040LR56 0.001/F_2512
2 1 1987REF 10 48 1987CS+ 1987LXS 2 1 1 2
+3VRUN REF CSP VHCORE
PC31 0.22U/16V_0603
2 TON

5
6
7
8
9

5
6
7
8
9
IC MAX1987 PQ9 PQ8 PC116 PC117 PC157

1
PR78 NC_15K/F PR160 31 FDS7064N FDS7064N
DD0

1
2R5TPE220M9

2R5TPE220M9

2R5TPE220M9
100K/F_0603 47 1987CS- 1987DLS 4 4 PD8 + + + PC24
B PSI# CSN SKS30-04AT 0.01U/25V B
21 PSI
5

PU15A PQ24A 38 1987DLS

DLS
4

1
NC_2N7002DW PC12

2
11 ILIM 1987DHS

1
2
3

1
2
3

1
1 6 3 DHS 39
NC_1n 1987CS+
1
NC_0

1987LXS

2
LXS 40
PR77 PR173 PC118
2

NEG
POS

NC_7WZ14 20.5K/F 100P 41 BSTS_R 1987CS-

BSTS
Add by Jay
2
PR159

NC_36.5K/F
8/23
15

16

Reverse
5

1
PU15B PR60 PC25 1987VCC
by Jay
6

PR79 1987FB 0_0603 0.22U/16V_0603

3 4 1 30.1K/F
PQ24B PR74 1.24K/F_0603 1987VCC
2

NC_2N7002DW 1987VCC
1987BSTS
5

NC_7WZ14 PR67 PR73

PR72 1.62K/F NC_4.7K PR172 PR171 PR170
2

CLK_EN# PR167 PR168 PR169 100K/F_0603 NC_0 NC_0 NC_0

NC_0 0 NC_0 PD21
SK003-03T
PR166 NC_0
1

PC28 1987REF PBOOT_B0

PR163 NC_0
1

1987REF 1987_S0 NC_4700P_0603/50V Reverse PR165 NC_0

PBOOT_B1
2

PR162 NC_0 OA- by Jay

1987_S1 +5VRUN PR164 NC_0
PBOOT_B2
A
PR161 NC_0 Modify by Jay 8/23 for load line regulater A
1987_S2
PR80 PR81 PR82
0 0 NC_0
PR55 NC_100K
PBOOT VOLTAGE
PR85 PR84 PR83
3 PSI#
PSI#
1987VCC
SETTING UP ON
NC_0 NC_0 0 HON HAI PRECISION IND. CO., LTD.
1.196V
FOXCONN
Title
CPBG - R&D Division
CPU_Vcore
The C4 mode voltage is 0.748V TON= 300KHZ
Size Document Number Rev
<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 35 of 47
5 4 3 2 1
 5 4 3 2 1

Place near Alviso .

PU16 For Alviso
Add +5VSUS and JP8
+5VALW 15V PR178 NC_0
+3VSUS power plan +5VALW +3VSUS 2 3 1 2 +2_5VRUN_ALV
PQ47 +5VSUS VIN Vout
Modifier Jay

1
FDC653N PR179 NC_0 PC127
0412

1
6 PC129 1 4
16,30,34 RUN_ON1 SD SENSE
PR148 PR147 5 4 NC_10U/25V_1206

GND
100K 100K NC_10U/25V_1206

2
2

2
1

1
PC84 NC_LP3875
PQ45A 10U/16V_1206

5
2N7002DW

2
D D

1
5 PC80

1
4700P_0603/50V DCBATOUT +1_5VSUS +2_5VSUS_DDR1
PR146
NC_470K

2
23,29,30,33,34,38 SUS_ON 2 6 PR140 PR174 PR139
100K 62_0805 62_0805

2
PQ45B
2N7002DW
1

+3VALW +3VSUS
PQ44

3
FDC653N PQ36
6

3
5 4 23,29,30,33,34,38 SUS_ON 1
2 2 2

1
1 PC82
10U/16V_1206 PDTC144EKA PQ58 PQ35
RHU002N06 RHU002N06

1
+1_5VRUN

2
PQ57
+1_5VSUS
+5VALW 15V FDC796N
1
2

1
7 3
PR108 PR98 5
100K 100K 6
+5VALW 15V

1
C +5VALW PC120 C
PQ46 +5VRUN 10U/16V_1206

4
FDC653N
1

2
6

3
PR151 PR150 5 4 PC41

1
100K 100K 2 RUN_ON_5V# 2 4700P_0603/50V
1
1

PC83 PQ30 +2_5VSUS_DDR1

PQ48A 10U/16V_1206 RHU002N06 PQ37 +2_5VRUN_ALV
2

2
3
2N7002DW FDC653N
3

16,30,34 RUN_ON1 2 6
3

5 4
1

5 PC79 PQ26 2
1

4700P_0603/50V RHU002N06

1
1
PR149

1
NC_470K PC78
4

2
6

1U/10V_0603

3
,29,30,33,38 RUN_ON 2
2

2
PQ48B
2N7002DW
1

+3VALW +3VRUN
PQ43
FDC653N
6
5 4
2
1

1 PC81
10U/16V_1206
B B
3

+5VALW 15V PQ60

MCH_VTT +VCCP
FDC796N
1

1
2
PR128 PR126 7 3
100K 100K 5
6

PQ33A

1
2N7002DW PC121

4
Add by Jay 8/23 10U/16V_1206

1
PC125

2
5

1
4700P_0603/50V
+5VALW +5VSUS +5VALW +2_5VRUN_ALV Discharge circuit for power-off +5VALW +VCCP PR127
NC_470K

2
6
30 VTT_ON 2
1

2
PR211 PR212 PR143 PR141 PR104 PR97 PQ33B
330_0805 62_0805 330_0805 62_0805 330_0805 62_0805 2N7002DW

1
+1_5VRUN
2

2
A A
1

PQ66A PQ39B PQ29B

3

2N7002DW 2N7002DW PR142 6 2N7002DW

5 2 62_0805 2
4

HON HAI PRECISION IND. CO., LTD.

FOXCONN
6

2 5 PQ38A 5
CPBG - R&D Division
23,29,30,33,34,38 SUS_ON 16,30,34 RUN_ON1 30 VTT_ON
3

2N7002DW Title
PQ66B PQ39A 5 PQ29A Other power plan
2N7002DW 2N7002DW 2N7002DW
1

Size Document Number Rev

A
4

Custom
<Doc>
Date: Monday, September 13, 2004 Sheet 36 of 47
5 4 3 2 1
 1 2 3 4 5 6 7 8

BT+ DC_IN

2
PD17 PD18
VRAMVDD
+2_5VSUS_DDR1 +3VALW +5VALW MTZS05-6.2
MTZS05-15

1
1

1
A A
PR92 PR71 PR46 PR44 PR43 PR45
+1_5VSUS NV_VDD 27K/F_0603 SMDDR_VTERM 27K/F_0603 27K/F_0603 27K/F_0603 27K/F_0603
VHCORE MCH_VTT PEX_VDD VRAM_TERM
NV_27K/F_0603

2
1

4
PD24B PD23A PD24A PD23B PD16A PD16B

1
PD14
PR89 PR70 PR52 PR50 PR49 PR51
120K/F_0603 47K/F_0603 20K/F_0603 18K/F_0603 10K/F_0603
NV_120K/F_0603
MTW355 UMN11N NV_UMN11N UMN11N NV_UMN11N UMN11N UMN11N
2

2
3

2
VSOURCE Add VSOURCE signal for PWRSW# pull H use
+ECVCC

3
PQ15 2 1 DC_IN
PR30
1 PD11
1K/F 2PC4617 MTW355 R95
NC_100K

BT+_3

22
2 1
2

PR25 PD10

2
PD13 PU3 MTW355 UL_IN#
B PC19 10K/F_0603 B

GND VDD

4
MTZS05-6.2 0.1U/50V_0603 4 PQ12A
NC SYS_PRS# 32

1
OUT 1 3
FDC6301N
1

5 CD

3
PR27

2
R3112N251A-TR PR35

2
2 1 2
PC17 PR24 VCCRTC
3

2 1
0.01U/25V 10K/F_0603 PQ14
100K/F_0603 RHU002N06 PD6

1
1K_0603 2 1 MAX1909_ACIN

2
1

PD12 PC18
0.1U/50V_0603 PD15 ASKS02-03S PS_ERR# MTW355
MTZS05-6.2 2 1
PD7
PU4A BATT_EN

1
2 1
PU4B PU4C

8
MAX1909_LDO PQ12B

6
PR33 MTW355
UL_IN# 1 7 2 1 6 2 3 5 1

2
100K/F_0603
MAX1909_LDO 74AHC3G14DC PC21 PR34 PC20 74AHC3G14DC 74AHC3G14DC FDC6301N

5
PC159 0.1U/50V_0603

4
Control ACIN OCP protect

2
PDTA144EK
1U/25V_0603 PQ74 470K 1U/25V_0603

1
1
2

3
PC49 PQ75

PDTC144EKA
PR106 PR113 PR224
C 0.1U/50V_0603 C
3

1
31.6K/F_0603 PU9 100K/F_0603 100K/F_0603
2

LMC7225
PD41A AC_OFF_3# 32
1

31

32 MAX1909_IINP_HW 3
1 1 PQ76 2
PDTC144EKA

4
6 1
2

ALW_ON 30,32,33
PC40 PR101
5

2
NC_PDTC144EKA

PC160
3

0.1U/50V_0603 10K/F_0603 PQ77

2

UMN11N 1U/25V_0603
1

Modify by Jay 9/5

MAX1909_LDO
2

+3VALW
2

PC36 PD22 ASKS02-03S

PR91 PR93 1 2
0.1U/50V_0603
49.9K/F_0603 PU7 22K/F_0603
PU8C
2

LMC7225 PU8A PU8B

PR88 PR75
1

32 MAX1909_IINP_HW 3
1 1 7 6 2 2 1 2 1 3 5 PR225 0
PWRLIMIT# 30
D 4 D
47K/F_0603 220K/F_0603
2

74AHC3G14DC 74AHC3G14DC 74AHC3G14DC

PC34 PR76 PR90
5

PC33
0.1U/50V_0603 10K/F_0603 33K/F_0603 0.1U/50V_0603
HON HAI PRECISION IND. CO., LTD.
FOXCONN
1

CPBG - R&D Division

Title
Other power plan

Size Document Number Rev

<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 37 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

A A

+5VALW

DCBATOUT

PL5
PR145 PR144 SPD5D28PT8R0M
100K/F_0603 100K/F_0603 2 1

PC87

25TQC22MV
3

3
PD30 Vout = 17V /0.7A

10

9
PU14 1 2 INVERTER_VCC
1 1 1

SHDN

VCC
ACIN 30,32 LDO

5
6
7
8
SKS30-04AT
PQ40 PQ41
3

2N7002 NC_2N7002 2 8 4 PC86 PC85

B FREQ EXT PQ49 25TQC22MV 0.01U/25V B
PR192 NC_0 FDS6680
2

1 PC102 4
23,29,30,33,36 RUN_ON REF

1
2
3
PGND
PQ42 PR157

GND
1U/25V_0603

100K/F_0603
2N7002 5 6
PR220 0 PC101 FB CS+

2
0.22U/16V_0603
MAX668
2

23,29,30,33,34,36 SUS_ON
PR153

7
0.047/F_1206

PR154

1
127K_0603/F

1
PC97 PR156
220P 10K/F_0603

2
C C

D D

HON HAI PRECISION IND. CO., LTD.

FOXCONN
Title
CPBG - R&D Division
Step-up circuit

Size Document Number Rev

<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 38 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

HISTORY
REV 0.A: (2004/04/30)
P25: Add Label: TPAP0/N0, TPBP0/0. (Net_name change: N26323439 -> TPAP0, N26323537 -> TPAN0,
N26323466 -> TPBP0, N26323428 -> TPBN0.
P28: Add 4 resistors(R962 - R965, 0 ohm) between U23 pin1/2/5/6 and PR_MDI1+/-, PR_MDI0+/-.

(2004/05/03)
A P11: R563/R564(Size 0603) changed to 0805 Size. A
P12: R565(Size 0603) changed to 0805 Size.
P15: R612/R613(Size 0603) changed to 0805 Size.
P22: Add R967(Size 0805)
P23: PR(CN11) A_GND change to GND.
P28: Change R420-R423 connection from PR_MDI0/1_+/- to MDI0/1_+/-.
P29: R517(Size 0402) changed to 0805 Size.
P29: D31 swap pin1 and pin2.

EVT board start .

(2004/05/12)
P35: Change VGA power solution for +2_5VRUN & delete VRAM_TERM (1.25V) for GDDR use 1.8V & 0.9V .
P4: Remove Spread Spectrum IC (U3) & accessories for VGA LVDS , and Use IDT CV125 for U2 instead .
P22. Remove CN5 & accessories , for using SATA HDD .
P23. Remove CN27 & CN15 for RJ11 is outside of MB .
P28. Remove CON1 , CN25 & R968 for RJ45 is out of MB ; Change the LAN solution to Marvell 88E8036 .
P30. Remove PS/2 function on MB , CN23 , L75 , C954 , RP92 , RP93 removed .
P30. XBUS (CN22) connector & it's accessories removed for EVT board .
Survey all connectors for correct type for EVT board .
(2004/05/14)
P35: Remain VGA power solution for +2_5VRUN on Alviso , and add nVIDIA VGA power solution back (2.5V & 1.25V) for placement on power daughter board .
P30. Add XBUS (CN22) connector & it's accessories back for it's for RMA .
P.22 Remove C559~C561 , C920~C922 per no need for PATA HDD .
(2004/05/18)
B P.13 Depopulate R229 & R233 for default 915PM . B
P.35 Remove CN26 & CN27 for VGA power , and wait for new connector .
Add Line-in / Line-out / SPDIF / POWER pin / and detect pins for Port Replicator
P.22 Apply Marvell SATA to PATA for HDD.
P.29 Add Q78,Q79,R987 for PR mute circuits .
P.23 & P.28 Modify CN24 & CN25 for LAN use 8-pin CONN .
P.28 Change LAN solution to RTL8101L .
Use LDO for Alviso 2.5 V , +2_5VRUN_ALV , for nVIDIA use power daughter board .
(2004/05/19)
P.32 Change DC_IN connector to molex_53259_0220 .
P.30 U34 change flash socket to flash IC , EN29LV800 footprint , TSSOP_48P_20_787X472 .
P.30 Remove CN22 , C953 , R700 , U41 , C952 , for no place for XBUS connector .
(2004/05/20)
P.13 Correct CN1 footprint to FOXCONN_QTS0NNNA_0001 .
P.22 Remove LED1 , R631 , Q47 , because the ODD LED is not necessary on EVT board .
P.13 Depopulate R576, R580, R584 for default is 915PM .
P.29 Change SPK1 to 2-pin CONN. * 2 , FOXCONN_HS82020 , SPK1 & SPK2 .
P.30 Change the footprint of SW8 to HCH_CLS_020A .
P.27 Change the footprint of SW1 to HCH_RST_1202 .
P.25 Change CN20 footprint to molex_52465_1091 for MS CONN. and remove R402,R404,R719~R722,C1101,C846,C1102 , because they are on the MS dauhter board .
(2004/05/21)
P.04 Add RP97 to 33 ohm resistor.
(2004/05/24)
C C
P.04 Add C1151~C1153 , NC , for EMI reserved circuits .
P.13 Add C1154~C1157 , NC , for EMI reserved circuits .
P.23 Add C1158~C1163 , NC , for EMI reserved circuits .
P.29 Add R988 , for EMI reserved circuits .
P.39 Add D38~D41 , for ESD protect circuits .
(2004/05/27)
P.13 Depopulate R585 , R587~R591 , R593 , R594 , R596~R603 for default using 915PM + NV .
P.13 Change L30 , L32 , L33 to BLM11B750SB for 0603 package ..
P.23 & 30 Add R989~R994 , C1164~C1167 , Q80 , J6 for 2nd FAN .
(2004/05/28)
P.22 Change the footprint of HDD connector , CN5 , to SL56221-T4 .
P.22 Add C1168 & L90 for 88SA8040 / Sil3811 option .
P.30 Connect ID_LPC_PCI# to pin 8 of J5 , & remove T260 for debug output to 80 port selecting option by JIG-120 plug .
P.22 Connect CSEL2 to GND by R995 for CD-ROM is Master by default .
P.30 Delete SW18 & SW19 for layout require ; add R996 ~R1001 to replace SW18 & SW19 .
P.20 & 28 Change LAN solution to Intel 82562ET .
P.23 Remove CN25 for LAN 82562ET near Port Replicator .
P.23 Change footprint of CN12 to FOXCONN_UV31413_Z6_TR .
P.23 Add CN23 , 24 for VGA power board , footprint : FOXCONN_QT600706_2101 .
(2004/05/29)
P.30 & 38 For Power limit circuits , remove T264 , add PU17 , PU18 , PC185~187 , PD38 , PD38 , PR697~PR702 .
(2004/05/31)
D P.14 Change U11 to MAX6647 , and footprint to uSOP_8P_26_118X193 for different SMBUS address from MAX6657 . D
P.14 Change U70 footprint to QSOP_16P_25_193X236 ; U72 to SSOP_48P_25_624X405 .
P.25 Change CN20 footprint to FOXCONN_QT800101_1210S for MS connector .
P.22 Correct CN5 footprint to SL56221-T3 .
P.14 Correct U11 footprint to USOP_8P_26_118X193 .
(2004/06/1)DCDC modify HON HAI PRECISION IND. CO., LTD.
Reverse PD11,12,13,14,15,16,17,18,19,20,21,22,23 pin difine FOXCONN
Title
CPBG - R&D Division
Change PC73,PC162 value from 47p to 0.1u/10v History
Remove PD9,PD10,PC37 and the 15V net change to DCBATOUT
Reverse PQ82 pin1 and pin2 Size Document Number Rev
Move PR65 to PR176,PR191 to PR192,PR79 to PR181,PR175 to PR174 A
Change PL6 value from NC125RT-B4R7M to RLF12545T-5R6N6R1 Custom
<Doc>
Add power limit circuit on P.38 Date: Monday, September 13, 2004 Sheet 39 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

HISTORY
(2004/06/1)
P.30 Change CN34 from BIOS flash to BIOS socket , footprint : EN29LV800AB-70TC .
P.13 Change LVDS option resistors from single chip to resistors arrays ; remove R206,R207,R209~R212,R214~R219,R221,R222,R224,R225,R585,R587~R591,R593,R594,R596~R603 ; add RP98~RP113 , and depopulate the odd reference .
P.10 Remove R703 & R704 for default NV4X family .
For better power plane , remove the unnecessary resistors : R526~R528,R624~R627,R629,R630,R726,R740,R741,R865~R874,R884~R886,R888,R889,R899,R900,R967 .
P.28 Change the package from C0603 to C0402 : C1172,C1169,C1179~C1184,C1189,C1190 .
P.28 Change the package from C1210 to C1206 : C1142 .
P.13 Change CN1 footprint to , FOXCONN_GS12401_1011 , and rearrange pin assignment for it .
P.28 LAN change list :
A A
+3VALW to +3VSUS ;
U72 : pin 28,29,30,41 open ; pin 21 connect to GND ; remove Q81 , R1028 .
Delete R1029,R1030 ; add R1033~R1036 .
Change R1025 to 100 ohm .
Delete R1026,1027,C1177 , add R1037 .
Delete R1019~R1022,C1174,1175,R1002~R1004,R1016,R1023,R1005~R1007,R1012 .
Follow Intel reference design : del R1008~R1011,C1190 ; change R1014,R1015 to 75 ohm , C1178 & C1179 to 4.7U .
Follow check list Rev:1.6 : Change C1173 to 1500P .
P.19 & 27 Change Wireless LAN IRQ routing to INT_PIRQG# per MOR request .
(2004/06/2)
P.22 Change the footprint of HDD connector , CN5 , to SL56221_T6 .
(2004/06/3)
P.6 Place R567,R570,R571 to close Alviso , and depopulate them for default is NVIDIA VGA , refer to REF NO. 15680 Figure 96 & NVIDIA layout guide DG-00969-001_v05.pdf , change R235,R237,R241 to 75/F by default is NV .
P.13 Add R1038~R1041 , C1190~1094 for Alviso CRT ESD protection recommendation , REF NO.15680 Figure 96 & 97 ; and add option for NVIDIA & Alviso graphics .
P.28 Base on Intel Alviso_Checklist_rev1_601.doc, change R1037 to 121 ohm 1%.
P.25 Change CN20 footprint to FOXCONN_QT810200_1100 , 20 pins , and connect MDC signals on the connector ; remove CN10 for it's on the MS/MDC daughter board .
P.30 Add CN25 , C1195 for X bus CONN , footprint FOXCONN_QT510406_L011 .
P.30 Change footprint of CON2 to FOXCONN_JA933L_WG1S9 , CON3 to FOXCONN_JA933L_WR1S9 .
P.16 Add CN26 and CN27 for VGA power daughter board .
(2004/06/3)DCDC modify
B P.32 Add DIAG process require If AC_OFF is low level, system power source comes from AC-adaptor. If AC_OFF is high level, system power source comes from battery. B
Change DDR2 solution to Sentech SC486
Del 1.0V and 1.2V , 2.5V & 1.25V , move to daughter board
(2004/06/4)
Change footprint for smaller PCB pad for layout space : c0603 to c0603_mor ; c0805 to c0805_mor ; c1206 to c1206_mor ; c1210 to c1210_mor ; r0603 to r0603_mor ; r0805 to r0805_mor ; r1206 to r1206_mor .
P.23 Remove C1164 , and correct VCCFAN1 to FAN2 CONN. to VCCFAN2 .
(2004/06/7)
P.13 Correct the net name on two side of L28 & L29 .
(2004/06/7)[DDR II --> DDR] modify
Modify +1_8VSUS to +2_5VSUS_DDR1
P.34 Change PR712 , PR717 value for DDR +2_5VSUS (When change to DDR2 PR712= 5.23Kohm , PR717=23Kohm) ; Add pin 25 on SC486 (PU19.25) for thernal pin .
P.37 Add PR726 & PR727 to modify the OVP for +2_5VSUS_DDR1 from +1_8VSUS .
P.10 Depopulate R87 for default is DDR .
P.17 Change DDR II connectors to DDR connector , and add T306~T321 .
P.6 For reserved circuits for SMDDR_VREF , remove C99 and Link C98 to Alviso pin AF37 & AD1 ; depopulate R127,R129,R939 and add R1045 to link SMDDR_VREF to DDRDIMM_VREF ; Delete C918 . So that we can use Vref from SC486 .
(2004/06/8)
P.29 Change Q58.2,R790.2,C998.2,U47.4,U47.5 connection to digital GND from AGND ; and link U47.6 & U47.7 .
P.1 Modify the block diagram : FAN for VGA ; LAN ; add LAN switch ; 400/533 MHz DDR(II) to 333 MHz DDR ; 3 thermal sensor for CPU/NB,VGA & DDR .
P.29 Swap D30.1 & D30.2 for layout .
P.29 NC Q87 & R987 per MOR/Nishio request , no need EC control .
P.29 MUTE_5(R861.1&R830.1) change to MUTE_TR per MOR/Nishio request for transistor need enough current to operate .
P.3 Remove R22 & R23 , fix on +1_5VRUN , per 6/5 Doi san : MS01 don't need to work with Dothan A-x step. This reserve CPU VCCA 1.8V connection is no longer need .
C C
(2004/06/9)
Add C1196,C1197,C1198 & R1042 for EMI requested .
(2004/06/10)
P.22 Remove SATA bridge for MOR request , and use master PATA HDD , slave PATA CD-ROM , add R1043 .
P.19 Remove C511~C514 for no more SATA needed , and add TP : T302~T305 .
P.36 Change the output of PQ59 from +2_5VRUN to +2_5VRUN_ALV .
P.30 Correct the CN21 pin NO. from 28 to 24 .
P.29 Add R1044 for pull high of APR_AMP_MUTE# .
P.29 Correct *Q78 to Q78 .
P.23 Change the position of C1158~C1163 location to near USB connector .
P.21 Change U17.G8 net name to +1_5VRUN .
P.29 Change D30.3,D31.3,C993.2,C994.2,C995.2,D27.1,C1043.2,C1044.2,C1045.2,D29.1 connect from DGND to A_GND by EMI suggestion .
P.23 Change CN11.23,CN11.26,CN11.29,CN11.54,CN11.57,CN11.60 from AGND to GND for no AGND guard will be routed to PR by Ziv discussed with Nishio san .
P.23 Remove C1158~C1163 per MOR/Baki san requested .
P.29 Del R1044 , per Nishio san mail : the Resistor will be added on PR .
Change L13,L15~L18,L24,L25,L27~L29,L31,L34,L35,L59,L69,L82,L85,L86 from BC-120-OHM to BLM11A121S , footprint R0603_MOR ; L14 & L70 need to check the current over 200mA Bead .
P.29 Change D30.3,D31.3,C993.2,C994.2,C995.2,D27.1,C1043.2,C1044.2,C1045.2,D29.1 connect from A_GND to GND by Nishio san suggestion .
(2004/06/11)
P.30 Add U74,R1046,C1199 for the XBUS switching . Change U34.26 to MEMCS_MB# .
Change SW9,10,14,15,16 footprint from FOXCONN_1BT002-01200 to FOXCONN_1BT002_01200 .
P.32 Change PCON2 footprint from FOXCONN_BP34063-P4211 to FOXCONN_BP34063_P4211 .
P.4 & P.28 Change Y5 & Y7 to 14.318MHz/20pF/+-30PPM & 25MHz/20pF/+-30PPM , footprint : CRYSTAL_2P_150_197X126 .
Check & modify per MOR recommendation document : MS01_EVT_20040604B_a-doi.pdf
D P.2 C878 is not necessary , remove it . D
P.2 Delete R13(0ohm) and Short H_STPCLK# to U1.C6 pin.
P.3 R22 & R23 deleted on (2004/06/8)
P.4 Delete Pull-Up, Pull-Down options for CPU_BSEL1,0 and SELPSB0_CLK. - Delete R34~R38 . The opition will be dependent on B-step CPU .
P.4 C860 and C861 have no meaning.Delete them.(If high frequency bypass capacitor are required, it should be being inside of the inductor.)
P.4 This note "For 915GM" should include not only RP7 but also RP97.RP6, R547 and R548 is only for NV43M(915PM).
P.6 Delete R81 and R83, connect CPU_BSEL1/0 to Alviso H13/G14 directly. HON HAI PRECISION IND. CO., LTD.
P.6
P.6
Delete C984 and add T322 .This is only for backup.
By design guide 17.4.2 GMCH Miscellaneous signals, SDVOCTRL_DATA can be left N.C . Delete R552 and add T323 . FOXCONN
Title
CPBG - R&D Division
P.6 Q42 can make BRADJPWM as N.C. So R101(0ohm) is not need. Short it. Also , delete R102 and short it . Depopulate R553 R554 , R106 for default is 915PM + NV43M . History
P.4 & P.6 R942 is same connection as R33.R943 is same connection as R674.So, Delete R942 and R943 and change the resistor value of R942 and R943 for 915PM or 915GM/915GML .
Change R33 & R674 to 0 ohm , depopulate R32 & R673 for default is NV43M . Size Document Number Rev
P.6 MS01 will not use 1.5V for Alviso VCC. Delete R523 and make CFG18 TP. Add T324 . A
P.6 I wonder if LDDC_CLK and LDDC_DATA could be N.C. when these are not used. Please check design guide 17.4.2 GMCH Miscellaneous signals. Custom
<Doc>
Alan , Change " For 915 GM " to "For EDID LCD PANEL " Date: Monday, September 13, 2004 Sheet 40 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

HISTORY
(2004/06/11)
Check & modify per MOR recommendation document : MS01_EVT_20040604B_a-doi.pdf ~ CONTINUED .
P.13 Add name to these NV's LVDS signals to easily to check the trace length in allegro data.
P.13 & P.6 What is the purpose of these R608~R611(0ohm)[VGA_DDCCLK/DATA and NV_HSYNC/NV_VSYNC] resistors?System with 915 PM will never mount NV46M. It seems redundant. If the purpose is to reduce the brunch of signals
in artwork, you should pay attention for the placement. Alan , Delete R608 & R609 ; depopulate R90 & R91 for default is NV43M .
P.13 Min Vih of U35,U36,U37 (NC7SB3157) is 0.7VCC. PORT_DET# is 3.3V, lower than the spec. ; Alan ,Delete R566 and add D42,R1047,Q82,Q81 for the voltage level shift on DOCKED# link to U35.1,U36.1,U37.1 .
P.13 R1039(0ohm) could never use. Delete +3VRUN connection and R1039 and short R1038.As for 915GM, you could never bypass the buffer for HSYNC/VSHNC because 915GM signal level is 2.5V level shift is always required.
So the voltage of PR_HSYNC/VSYNC are 5V.As for 915PM, nVidia reference circuit use 5V for EDS diode power. Alan Delete R1039 and R1038 .
P.13 D33 and D3 are owing same function. If you connect here, D33 can be omitted. Alan delete D33 .
A P.14 What is the purpose of this resistor R257(0ohm)? It seems not need. Alan delete R257 . A
P.20 To support wake from S3 with LAN, LAN_RST# must be released(High) in the S3 state. And this signal is input of ICH6-M. Alan delete R621 & T229 and change connection to U32.1 GPIO .
P.20 Signal Direction is wrong. EE_DIN is input of ICH6-M. Alan correct it .
P.21 U17.G8 +1_5V_ICH is wrong ,change net name to +1_5VRUN .
P.21 To support wake from S3 with LAN, this power source must be supplied even in the S3 state. U17.G10, U17.G11 change connection to +1_5VSUS .
P.21 To support wake from S3 with LAN, this power source must be supplied even in the S3 state. U17.A13, U17.F14 , U17.G13,U17.G14 change connection to +3VSUS .
P.28 R1031 can be deleted. Connect U73 6pin ORG to +3VSUS directly.
P.28 Connection of EEP_DIN and EEP_DOUT is wrong. Signal direction of pin4 is also wrong,U73 DO is output.ICH6-M has internal pull-down for EEP_CS while LAN_RST# is Low. So Pull-Down R1032 seems needless.
Alan modify and delete R1032 .
Check & modify per MOR recommendation document : MS01_EVT_20040604B_a-doi.pdf ~ END .
P.13 Change C294~C296,C298,C300,C306,C285,C289 & JVGA1.5~8 from GND to E_GND .
P.23 Remove C582~C588 , for these not necessary .
P.37 PR726 & PR727 ,change footprint to R0603_MOR .
P.17 Swap CN2 & CN3 for DDR A channel & B channel , for channel A should be closer to Alviso .
P.29 Change C1061 from A_GND to GND by Ziv .
P.6 & P.20 Delete DMI bus signals Port 2 & Port 3 , for DMI X 2 only need Port 0 & Port 1 . Add T325~T340 .
Remove +2_5VSUS power on board , change net of CN27.3 & CN27.4 net to +2_5VSUS from +2_5VRUN ; Delete CN26.17 net ; Delete PQ65,PC173 ; Change OVP net +2_5VSUS on PR673 to +2_5VRUN .
P.13 Change DACA_HSYNC pin NO. to AF10 , DACA_VSYNC pin NO. to AK10 on U6F to fix CRT issue on NVDIA chip .
P.13 Change U17.A24 from +3VALW_ICH to +3VALW .
P.19 & P.22 Remove net : CLK_PCIE_SATA & CLK_PCIE_SATA# and SATA_LED#, remove RP4,R30,R31,R742 ; disconnect SATA_LED# on CN6.14 . Add T341~T345 .
P.29 The two arrows of IAC_BITCLK_AUDIO and IAC_RESET#_AUDIO , modify them .
Remove M_ODT0~3 , M_A_BS#2 & M_A_BS#2 , Add T346~T351 . Delete R299,R300,C475,C476,RP67,R303 per DDR1 can be NC - Doi san informed .
BB board rework implement , file name : rework_notice_040529.doc
Rework number 1
A.Remove R576,R580,R584 --> already done .
B.Remove R53,RP7,R32,R33 --> Depopulate RP7,RP97,R32 and change R33 to 0 ohm for NV .
C.Remove U3,R46,R61,R66,R673,R674,C69,L72 --> EVT removed SSCK MK1493-05G ,and R673,R674 have been rearranged .
B D.R585,R587,R588,R589,R590,R591,R593,R594,R596,R597,R598,R599,R600,R601,R602,R603 --> LVDS option R rearranged . B
E.Remove R563 .--> will remove in MEP circuits remove part .
F.Remove R229,R233 --> Already Removed .
G.Remove R553,R554,R91,R106,R101,R90,R102,R98,R99,C785,L69,C786 Short C143 -- > C143 mount 0 ohm for default is NV . 915PM: R133 NC, C143 0R ; 915GM: R133 0R ,C143 mount 0.1U/16V .
Rework number 2
Should be checked when using 915GM ; conflicts with NV had been checked .
Rework number 3
P.30 Remove Q51 , add R1048 & Q83 for no VHCORE issue .
Rework number 4~6 EVT different from BB .
Rework number 7
C173 Already existed .
Rework number 8
Material isue .
Rework number 9
Material isue , use the value on schematics instead of the rework parts , 3904 .
Rework number 10~11 EVT different from BB .
Rework number 12
Connect J3 pin97 to +5VRUN .
Rework number 13 EVT different from BB .
Rework number 14
P.29 Delete U54,U55 , Add U75 and rearrange U56 & U75 A,B,C link .
Rework number 15~16
Material isue .
(2004/06/14)
P.17 Connect to CN3 M_A_A13 and M_B_A13 to CN2 per DDR1 can't be NC (20040614 added in history) .
P.21 Correct net +3VALW_ICH on C557.2 & C558.2 to +3VALW for no more +3VALW_ICH net .
P.32 To reduce +ECVCC routing to BATT. CONN. Change the ESD protector to PACDN042Y3 (20KV contact) . Delete D38 ~D41 , Add D43 & D44 .
P.17 Correct the M_CS#1 connected to CN2.122 to M_CS#3 .
C
P.29 Change LM358AM to LMV358AM8X for U47,U48,U49,U51,U53,U59 and change VCC of U47 to +5VRUN from +15VRUN ,others remain VDDA for VCC on pin 8 . C

(2004/06/15)From MOR - Doi san , file name : SchematicsComment20040611.xls

P2. Delete R928 and Q72 .
P3. "27.4/F" means 27.4 ohm @1% .
P6. Change direction of CPU_BSEL0, 1 .
P.13 Connect the signal between R227 and R232 to D3.2pin .
P.21 I measured the power consumption of ICH6-M. If VCCSUS1_5 is made by ICH6-M internal VR, Power consumption of ICH6-M in S0 state increased more than 150mW. So please consider if it is possible to provide +1_5VALW
from external Power Sorce? (for DVT) --> list in issue tracker .
P.22 Depopulate R995 for CD-ROM is slave .
P.28 Modify the signal direction of U73 .
P.31 Delete +1_8VRUN in power diagram .
ITEM 11 ~ 16 (regarding DDR1 signals) modified OK .
P.13 Add L92 and change C278 to 0.1uF for Low Pass Filter for inverter need DC to control brightness.
P.30 & P.4 Change the JIG-120 pin assignment , add two signals "PCLK_FWH" & "FWH_BOOT" for FWH debug ; Remove T220 and change INV_EN_EC to U32.39 and reserve U32.20 for FWH_BOOT ; Add R1049 & C1200 for PCLK_FWH .
P.13 Hsync is AF10 not AF1, Vsync is AK10 not AK1 ; modified OK .
(2004/06/15)
P.25 Remove C1099,Q75,R944,Q76 and place them on MS daughter board , Connect CN20.10 to U21-8.F3 , Change CN20.17 net from GND to +3VSUS ; For simple power trace on M/B .
P.30 Remove T263 .
P.29 Add R1050 & r1051 for reserved circuits for save U49 component when U50 gain is 1.
P.30 Change J5 footprint from FOXCONN_QT510206-L010 to FOXCONN_QT510206_L010 .
P.18 Swap the terminator of DDR1 per Layout request , file name : c720004-0615swap.zip ; delete RP80 , add R1052 .
(2004/06/16)
P.16 Change CN26 pin define per VGA dauhter board change .
P.27 Change J3 footprint from FOXCONN_AS0A226-S4 to FOXCONN_AS0A226_S4 , and correct the value to FOXCONN_AS0A226_S4 as well .
P.11 Remove R563& C210~C211,C213~C215,C217,C221,C222,C229 and NVFBVDD net for no MEP circuits needed on MS01 . informed by Scott .
D P.15 Remove terminal resistors, RP9~RP24 , RP29~RP34 , for no need to reserve these resistors for VGA DDR over 300 MHz . informed by Scott . D
P.37 Correct PQ80 pin define and add R1053 for reserved circuits by Jay .
P.30 & P.20 & P.23 & P.24 Change the enable signal to DEV_EN from EC , by connecting DEV_EC to U32.24,U44.1,U45.1,U46.1,U21.N5,U22.12,U17.V5 ; delete T215 add T352 .
P.34 Add SUS_PWRGD net on SC486 to system.
P.32 Change PCON1 footprint to JWT_A3963XR2_2P .
P.29 R1050 & R1051 default is NC .
P.29 Change U47 to LM358AM & power from +15VRUN for driving Q57 . HON HAI PRECISION IND. CO., LTD.
P.20 & P.28 Add R1054~R1060 for Ethernet series resistors for MOR requested on EMI solution . FOXCONN
Title
CPBG - R&D Division
(2004/06/18) History
P.10 Add R1061 per NVIDIA recommended 6A for NV_VDD . Size Document Number Rev
P.15 & P.16 rearrange the net bus for VDDR . A
P.37 Correct the footprint of PQ80 to SOT363 per layout inform . Custom
<Doc>
P.34 Correct the net link of VTTEN & EN/PSV for +2_5VSUS_DDR1 should be controlled by SUS_ON for DDR & SMDDR_VTERM controlled by RUN_ON (SUS_ON reserved) for DDR terminal . Date: Monday, September 13, 2004 Sheet 41 of 47
1 2 3 4 5 6 7 8
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HISTORY
(2004/06/18)
P.33 Populate PR704 for default +15VRUN from DCBATOUT .
P.20 Make SM bus of ICH to RUN rail. (Because it is OD output of ICH6-M.) Omit Q12,Q13, RP84. change R329 and R330 and U38 power to +3VRUN. (We request to use SM bus pull-up 2.2k)
P.25 Add R1062 near PCI7420 on MS_CLK net , per MOR / Baki-san requested for reserved circuits on debugging MS function .
P.34 PR 712 no 5% component , Leon prepare BOM for 1% , change the PR712 value to 40k2/F .
P.20 Correct the direction of LAN TX & RX signals .
P.04 Correct the value of clock from IDTCV125 / ICS954201BG to IDTCV125 / ICS954206BG , for ICS954206BG has SSCK function , ICS954201BG not .
P.34 Change PC192 & PC193 footprint from C0603_MOR to C0805_MOR and value from 4.7U to 4.7U_0805.
P.14 Change connection of GPIO8 and MAX6647 ; change link from "R258.2 to U11.6" by "R258.2 to U11.4" ; for BIOS team recommend that can be controlled separately .
P.28 Remove R1032 for ICH6-M has internal pull-down for EEP_CS while LAN_RST# is Low ; this should be removed on (2004/06/11) , but missed .
P.34 Correct PC208 footprint to C1206_MOR .
A P.14 Change X1 footprint to CRYSTAL_2P_150_197X126 ; X1 value change to L5030-27MHz/+-30ppm/20pF . A
P.04 Change Y5 value to L5030-14.318MHZ/+-30ppm/20pF ; Y7 to L5030-25MHz/+-30ppm/20pF per correct BOM .
P.30 Change KB CONN. to FOXCONN_GB21024_0001 per mechanical change .
P.25 Remove R537 for this R should near MDC card on MS daughter board .
(2004/06/18) 20040617 - Doi-san mail title : RE: [MS01] Release EVT M/B schematics 6/16 .
Correct page 31 power diagram, MAX1987 IMVP_OK output signal name isn't IMVP_PWRGD,It is IMVP_OK.
P.20 Remove Q77 for no need . BB reserved this for leakage reserved circuits , and test OK , no leakage from ICH6-M when S3 . informed by Dick .
P.30 Add R1063 for FWH_BOOT per MOR / Doi-san request .
P.30 remove net : PR_CRT_DET# and replace with VGA_CRT_DET# ; delete U63,R894 . For PR VGA and MB VGA CONN. can't plug at the same time .
P.28 Do you decided not to delete R1032?(In the change history, this resister had been deleted.) ; Alan , sorry ! I missed this, remove R1032 .
P.32 For AC in issue, delete PR14, add PR730 ,change PR7 value to 100K_0603 ,and PR7 pull high change to MAX1909_LDO. by Jay .
P.32 For +ECVCC can't be powered off when battery only issue , Add PQ88, PQ87, PR728, PR729 to stop the reverse current. PU1 is needed to stop the currect from BT+ to DCBATOUT when battery only . by Jay .
P.19 We will not use ICH6-M THRMTRIP# function. So let's delete R318 and shortit.Additionaly R755's "*0" is far from the parts, it is not easy to see the schematics. Please move "*0" to right side of resisitor. (You should
not delete R315. It is still need.)
P.18 When system memory is changed from DDR2 to DDR1, some signal termination reduced. So capacitor for DDR_VTERM also can be reduced. Alan : but the Alviso_Checklist_rev1_501.doc recommended 64 Capacitors for DDR .
Please provide instructions on this .
P.30 In rework list, LEDs in page30 voltage and resistance have changed. Please modify the schematics also. Rework in the ms01_system_rework_notice_040616.doc
In Sonoma Platform Message of the Week WW23 and WW24, intel recommend to change the connection of CPUSLP# from ICH to Alviso.So, please change the mount of R76(Alviso) and R320(ICH) from EVT. This change also need BIOS
support. Please check the MOW and talk with your BIOS team too. Alan change the mounting of R320 to NC , and mount R76 .
(2004/06/18) BB board rework implement , file name : ms01_system_rework_notice_040616.doc
Rework number 16
Remove R142,R145,R148,R177~R180,R559,R561 Solder R140 / 10K_0402 fro Strapping erroron NVIDIA chip . Alan modified shcematics OK .
Rework number 17
Q75 is removed on MB schematics and will be modified on MS daughter board , reference is Q1 .
Rework number 18
Change LED power from +5RUN to +3RUN ; Change current-limited resistors from 330 ohm to 150 ohm . For D14,D15,D17 LED slightly light when LED off .
Rework number 19
B Change LED power from +5ALW to +3ALW ; Change current-limited resistors from 330 ohm to 150 ohm . For D16,D20 LED slightly light when LED off . B
Rework number 20
Rework issue .
Rework number 21
Already done on 20040616 and net name updated to SUS_PWRGD_2MS on 20040618 .
Rework number 22
Already done on 20040601 .
(2004/06/18)
P.03 Remove C879~C900 for it's not necessary .
Change the connection of U65.8 to +3VSUS and U65.6 & U65.7 short for the component recommend this . informed by David .
Change the pin for MMBT3904 "Q2,Q38,Q83", edit part to swap pin 1 & pin 2 . For the database is wrong . 3906 (Q75 on BB board) is the same thing .
Change name from DEV_EN to SUS_PWRGD_2MS for more clear on the net meaning -- EC turn this signal on for 2 ms later than SUS_PWRGD . informed by David requested by MOR / Doi-san .
P.29 Correct U50.1, shutdown should be high level . informed by Tim and check SPEC. OK .
P.25 Fill the net name in the iLink symbal (CN12) .
(2004/06/24) Power
P.32 Move PU1,PQ3,PR3 to charger output side to stop the reverse current by Jay .
P.37 Add VSOURCE signal for PWRSW# pull H use on PD31.2 .
P.32 Delete net "1909_CSIP" that is conflicting with "BT+_2";delete net "1909_CSIN","1909_BATT","BT+_3" that are conflicting with "BT+" .
(2004/06/24)
P.30 Change J4 to 4-pin CONN.and add +5VRUN,GND net for debug board use .
P.30 Modify the pin assignment for Elantech and ALPS touch pad ; Add R1064 & R1065 for ALPS touch pad reserved circuits .
P.11 FBVDD net for NV chip add "X" on NC pins .
P.20 Change net on R955 to IMVP_PWRGD for PWROK should pull low ; no mount R525 for default IMVP_PWRGD pull low to GND . This net is output from EC .
P.06 Change R100 from 255/F to 256/F per RDDP REF 15680 & REF14511 is 256/F while Intel CRB Ver.1.501 is 255/F .
P.30 Add R1066~R1068,Q85,Q84 for The VCC_MCH_VRPWRGD isn't correct for our original design on BB. informed fy David .
C
Change SUS_PWRGD_2MS to SUS_PWRGD_10MS for LAN_RST# must be asserted for at least 10 ms after the resume power is valid . (From ICH6 EDS REF.15851) C
P.18 Add RP114~RP118 and delete R301,R302,R304~R310 , R1052 ; rearrange the DDR1 control terminator ; delete C504,C505,C506 for the pull high resistor array need 1 capacitor each .
P.16 Change the CN27 connector to 10-pin wire to board MOLEX_22_05_7105 .
P.29 Add R1069 for reserved circuit connect from pin 43 of U29 to pin 1 of Q65 for ACL 260 codec .
P.30 Swap RP92 & RP93 for layout request .
P.15 Add RP9~RP24 & RP29~RP34 back for Igarashi-san request .
P.36 Change the Dischage circuit for power-off ,PR669.1 change connection to +2_5VRUN_ALV .
Modify per David file : Issue List_BB HW_06182004b.xls ; Change R352 from 100 to 0 for power level ; Correct the pin of Q60,Q65,Q66 by exchanging pin1 & pin2 .
P.19 Delete T302,T303,T99,T100,T344,T345,R327 and connect the pins of ICH6 to GND directly & Delete C546 ,connect to +1_5VRUN directly ; to disable SATA function .
P.16 Change CN27 back to MOLEX_22_05_7085 and rearrange the pin define . For we don't need so many GND on CONN. power daughter & MB have 3 screw hole for strong GND .
P.14 Change the SSCK IC to CY25560/SM560 and NC the accessories : U12,R713,R267,R268,R271,C321~C324,R272,R269 and add R1070~R1073 for NC , reserved for SSCK circuits .
P.25 Change R1062 to 0 ohm , that's it should be . For just a reserved circuits for MS board debugging .
(2004/06/25)Power
P.34 Change net of PD41.2 to 486_BST_1 from 486_BST_2 , change PL16.2 net to VDDQ ; Add PC215 . By Jay .
(2004/06/25)
P.32 Correct PCON1 footprint to JWT_A3963WR2_2P .
P.06 Change U65 value to *LMV358AM8X for power level 3.3V .
P.01 Correct the Block diagram for NV43M-L , ALC260 , PATA HDD (Master) , PATA ODD (Slave) .
Add description of SM bus address (KBC3910) for 3 thermal sensors (LM75BIM-3,MAX6647,MAX6657) , Smart Battery ; and SM bus address (ICH6-M) for clock generator, DIMM0 & DIMM1 .
P.13 Remove R569 for there is a pull down R937 and BB tried Ok for both NVIDIA & Alviso without R569 .
P.13 Mount R709 , NC R568 ,Q39 for NV4X no need to reverse , but 915GM need .
P.13 Mount Q8,Q9 ; NC R213,R223 for current leakage bug in BB .
P.13 Change pin define of CN1 (LCD connector) for ME need to rotate 180 degree .
Change R634 & R759 for balance LED light on MS01 .
P.29 Delete R1069 and short the net "Codec_GPO" to U29.43 ; delete "Codec_GPO" to U29.2 for ALC260 only for MS01 .
P.29 Change net name "C_AUD_ON_5" to "C_AUD_ON_5#" for it's low enable now .
P.35 Change PR166 to 10K and PR667 to 22K for voltage level to low (1V) on BB board .
P.22 FOXCONN_QT8H0506_M110R pin14 should connect toPATA_LED# by MOR / Ogasawara-san request .
D P.25 Change R1062 from 0 ohm to 47 ohm by MOR / Ogasawara-san request . D
P.25 Add 4.7k pull-up (R1074) to +3VSUS from U21 E1 pin (MC_CDZ_1) .
P.25 Delete R384 and connect to GND .
P.10 Remove net "MSTRAPSEL[3:0]" and delete R139,R142,R145,R148 for these are for MEP NV chip ; Add T353~T356 .
P.10 NC R560 & R562 for they are for NV37 .
P.15 Remove net "MIOAD[5:2]" for we use VGA call back for the panel ID, The USER0~USER3 can be keep NC ; Add T357~t360. by Scott .
Rearrange strap pin for NV43M-L A02 version ; add T361 . HON HAI PRECISION IND. CO., LTD.
(2004/06/28)
FOXCONN
Title
CPBG - R&D Division

P.24 & P.25 Change U21 value to PCI7420B(SN0307009BZHK) for correct vendor P/N . History
P.38 Add step up circuits for inverter if battery voltage lower than 10V . By Jay . Size Document Number Rev
P.13 Change CN1.38,CN1.39,CN1.40 net to INVERTER_VCC per step up circuits for inverter . A
P.25 Swap CN12 pin define for old pin define is wrong referring to iLink interface SPEC. Custom
<Doc>
P.13 Rearrange the pin define of CN1(LVDS CONN.) , for layout and INVERTER_VCC need 1.2A current . Date: Monday, September 13, 2004 Sheet 42 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

HISTORY
(2004/06/28)
P.38 Change PQ90.1 net to RUN_ON for step-up control .
P.15 Swap for layout need ,file name : e0720.004a_swap0625-new.txt
P.06 Add C1201 for SMDDR_VREF have two pins separately on Alviso .
P.01 Correct block diagram for CRT & LVDS also from Alviso .
Change 10U/10V_3216 to 10U/10V_1206 , 18pcs . C542,C603,C755,C756,C772,C773,C781,C915,C991,C996,C1006,C1036,C779,C563,C194,C819,C184,C183.
P.29 correct U29 pin define for ALC260 .
P.14 U6.L2 & U6.Y2 should be different net , so change U6.L2 net from "MIOB_VREF" to "MIOA_VREF" .
P.13 R573 NC .
P.37 Rearrange PD28 & PD29 for PD28 NC on Alviso Graphic board .
P.08 Add R1075 for simple BOM control
A P.29
. Delete U52 and add U76 & U77 for TTL circuits on MUTE_5 . A

Separate BOM by adding a symbol ahead of value ; "*" for components both NC , "@" for NC components on 915GM+NVIDIA VGA , "$" for NC components on 915GM graphics ; Add a table on P.1 .
(2004/06/29)
P.21 Add R1076 for ICH6 to measure the current of VCCSUS3_3 when converting VCCSUS1_5 .
P.32 Add R1077~R1080 for Tim recommended , BB destroyed KBC 2 pcs when Battery in .
P.29 Delete JSPK1 & JSPK2 and add JSPK3 for changing 2 pcs of 2-pin speakers to 1 pc of 4-pin speaker connector .
(2004/06/30)
P.10 & P.14 Delete T357~T361 , add R1081~R1092 for NVDIA chip strap and rearrange the configuration for NV43M , A01 .
P.14 Change R268 to "$10K" , and add "R1093" for "$60.4/F" .
P.23 Change CN11 footprint to FOXCONN_QL01303_D24A01_5F .
P.16 Rearrange CN27 pin assignment for +1_0VRUN need 11.55A .
P.10 Add R1094,R1095,R1096 for +1_0VRUN need 11.55A .
P.17 Add R1097 and net "DIMM_VREF" for DIMM VREF replacing "DDRDIMM_VREF" on DIMM1,DIMM2 and C477~C480. Requested by MOR / Doi-san .
P.23 Delete T108 and R756 and connect OVT_EC# to ICH6-M GPI12,"ID_LPC_PCI#" to GPI14 for THROTTLING FUNCTION discussion . requested by MOR / Doi-san .
P.38 Change PL17 to CDRH5D28_8R2 . by Jay .
P.35 Change PQ32,PQ33,PQ36,PQ37 to IRF7811AV ; change PQ34,PQ35,PQ38,PQ39 to FDS7064N .by Jay .
P.34 Correct PC194 value to 0.1U/16V .
Correct PD18,PD19,PD24 footprint to DIODE_2P_152_191X102 .
P.32 Correct PR20 value to 75K/F_0603 .
P.37 Correct PU18 footprint to US8_8P_20_79X122 .
P.26 Add Screw hole H22~H45 .
P.38 Change PC216~PC219 to 25TQC22MV . by Jay .
P.26 Change H26 to HOLE_C87D87N and disconnect pin 1, and add H46 .
P.38 Change PC220 footprint to C0402 .

B (2004/07/01) B
For BOM simplification , change PR94,PR708,PR711,PR716,PR788 to 10R .
P.32 Rearrange the R1077~R1080 for BB recommendation to prevent KBC destroyed when plug Battery .
P.29 Change C998 to 1U/10V_0603 and footprint to C0603_MOR .
P.29 Change U76 & U77 to TC7SET32FU for "power down protection function" .
P.26 Change H7 footprint to HOLE_C157D39 , delete H19,H22,H1,H15,H14,H4,H18,H20,H11,H5,H13,H2,H12,H10,H3,H17,H6,H21 for screw holes .
P.29 Swap D31 pin 1 & pin 2 for layout .
P.08 Delete PWM control from NVIDIA chip & Alviso chip and add bright control circuit from MOR / Igarashi-san requested : Delete R897,R714,R470,R573,Q42 . Add C1202,C1203,Q86,RP119,R1098 .
P.13 & P.30 Delete T352 and add R1099 for net "BRADJ_EC" connection for EC to control inverter brightness , this is reserved for testing in EVT .
P.10 delete R559 ~ R562 per NV37 reserved circuits is not needed .
P.06 Add T357 .
P.17 Correct R1097 location for better DIMM_VREF connection .
P.18 Delete RP116 and add C1204, R1100,R1101 for separating Resistor Pack to two resistors for layout .
(2004/07/02)
P.13 Correct Q86 footprint to MOS_6P_26_79X83 .
P.13 Rearrange D1 & D2 connection for ESD to prevent leackage from CRT when S3 .
P.16 Rearrange CN27 pin define for reserving 1 pin for GND .
P.29 Change U50.9~U50.12 net to "GND" FOR LM4863MTE.
P.06 Change R567,R570,R571 to NC for default CRT impedance control for NVIDIA . Because Port Replicator mount 75 ohm .
(2004/07/02) POWER
P.37 Add control ACIN OCP protect, add PR741,PR744~pr748,PU21,PU22,PD43,PC224~PC226 .
P.32 Delete PU13 , add PR742,PR743 .
P.38 PR734 change to 0.047/F_1206, delete PC218, PC219 .
P.36 Change PR668~PR672 from 100K to 47_0805 .
P.33 & P.34 Delete JP30,JP18 & JP26 .
P.33 Change PC188~PC191 to 10UF_25_1210 .
C C
(2004/07/05)
P.29 Change C1063 to 2.2U/10V_0603, Add Q87 & R1102 for pop noise solution from BB. by Tim .
P.28 Swap LAN signals on CN22 for layout smoothly . By MOR / Tajiri - san request .
P.32 Swap PCON2 for correct pin define .
P.10 Add C173 for missing component .
Separate BOM by adding a symbol ahead of value ; "NC_" for components both NC , "AL_" for NC components on 915GM+NVIDIA VGA , "NV_" for NC components on 915GM graphics ; modify the table on P.1 .
P.34 Change PR708.2 net , 486_VDDQS should not link to it . by Jay .
P.29 Correct U50.9~U50.12 net to "A_GND" FOR LM4863MTE.
(2004/07/06)
P.29 Correct JSPK3 to HS82040 .
P.25 Correct Cn12 pin define for SPEC. change .
P.16 CN26 pin 7,8,13,14 connect to GND . by Igarashi - san request .
P.25 Correct pin name of CN12 .
P.15 & 16 , Add R1109~R1114 & C1205~C1208 for NVIDIA recommendation for VRAM_VREF .
P.13 Change C289 to L26.1 & C285 to L23.1 for Port Replicator use same "C" .
P.13 & P.30 Delete L92 & C278 , Add T358 for Bright control change circuits from MOR / Igarashi-san request .
P.22 Change CN6 value & footprint to FOXCONN_QT8H0506_N110R_F for different Z-HIGH connector . (Layout pad not changed .)
P.32 Change PCON2 value & footprint to FOXCONN_BP34063_C6201_7F for different Z-HIGH connector . (Layout pad not changed .)
(2004/07/07)
P.29 Change R1102 to 0805 package for power capacity .
P.17 Add C1209~1224 for DDR . by MOR / Doi-san request .
P.04 Change R544,R549,R550 to 2.2/F for IDT recommendation .
P.34 PC192 & PC193 change to 4.7U_1210.
D Add R1115~R1117 , Delete C1078,T191 and NC R937 , R568 always mount for strap pin by MOR / Igarashi-san inform from NVIDIA / JAPAN. D

(2004/07/08)
Rename the reference .
HON HAI PRECISION IND. CO., LTD.
FOXCONN
Title
CPBG - R&D Division
History

Size Document Number Rev

<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 43 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

HISTORY
DVT board start .
(2004/08/09)
Change NV43M value to NV44M.
(2004/08/11)
EVT board rework implement , file name : MS01_Rework_Notice_EVT_20040811 Rev.1.3.doc
Rework number 0
A P.06 Change R216 value to 255/F, from 256/F. A

P.08 Change L46 value to 1UH, from 91NH.

P.13 Change R370 value to 330_0805, from 47_0805.
P.36 Change PR104 value to 330_0805, from 47_0805.
P.34 Change PR143 value to 330_0805, from 47_0805.
P.34 Change PR97 value to 62_0805, from 47_0805.
P.36 Change PR141 value to 62_0805, from 47_0805.
P.36 Change PR142 value to 62_0805, from 47_0805.
P.36 Change PR174 value to 62_0805, from 47_0805.
P.36 Change PR139 value to 62_0805, from 47_0805.
P.32 Change PR12 value to 33.3, from 33.3/f_0603.
P.32 Change PR22 value to 56K, from 59K_0603.
P.32 Change PR23 value to 56K, from 54.9K_0603.
P.32 Change PR17 value to 15K, from 14.7K_0603.
P.32 Change PR18 value to 22K, from 22.6K_0603.
P.32 Change PR63 value to 75K/F, from 76.2K/F_0603.
P.34 Change PC53 value to 0.01U/25V, from 0.1U/16V.
P.38 Change PC85 value to 0.01U/25V, from 0.1U/16V.
P.35 Change PC30 value to 330P, from 270P.
B
P.08 Change C398 value to 220U/6.3V, from 330U/6.3_7343. B
P.08 Change L48 value to 0.47UH, from 0.5UH.
P.30 Change R283 value to AL_100K , from 100K .
P.30 Change R296 value to NV_100K, from NC_100K.
P.04 Change R466 value to NV_0, from 0.
P.04 Change R183 value to NV_0, from 0.
P.33 Change PC146 value to 4.7u/25V from 4.7u/35V .
P.28 Change C21 value to 4.7u/25V from 4.7u/10V.
P.34 Change PC55 value to 10u/25V from 4.7U_1210.
P.34 Change PC57 value to 10u/25V from 4.7U_1210.
P.32 Change R14 value to 100 from 330.
P.32 Change R15 value to 100 from 330.
P.30 Change R311 value to 10K from 4.7K.
P.30 Change R314 value to 10K from 4.7K.
P.34 Change PC76 value to 10uF/25V 1206 X5R from dummy.
P.34 Change PC77 value to 10uF/25V 1206 X5R from dummy.
P.32 Change PR177 value to 14K ohm 0402 1% from 40K.
P.32 Change PR135 value to 20K ohm 0402 1% from 10K.
P.34 Change PC71 value to 0.1uF/16V 0402 X5R from dummy.
P.34 Change PR185 value to 10 ohm 0402 1% from dummy.
C C
P.34 Change PC69 value to 18PF 0402 X5R from 100P.
P.34 Change PR130 value to 6.49K ohm 0402 1% from10K.
P.34 Change PR136 value to 0 ohm 0402 1% from dummy.
P.34 Change PR181 value to dummy from 0 ohm 0402 1%.
P.33 Change PR96 value to 0 ohm 0402 1% from dummy.
P.36 Correct the pin define for PQ29,33,PQ38,PQ39,PQ45,PQ48 .
P.37 Correct the footprint for PQ12 , it should be SSOT6 .
P.32 Change PR30 value to 3K 0402 1% from 6.49K.
P.37 Change PR13 value to 24K 0402 1% from 61.9K.
P.35 Change PR31 value to 10 ohm 0402 1% from dummy.
P.35 Change PC27 value to 0.1uF/16V 0402 X5R from dummy.
P.37 Link the pin 8 of PU11 to +ECVCC , no link to +3VALW .
Rework number 1
P.13 NC U13,U14,U15 ; Add R171,R172,R174,R175,R177,R178 with 0 ohm .
Rework number 2
P.13 Pin 4 of SW7 Link to GND ; modify the symbol .
Rework number 3
Done on Rework 0 .
Rework number 4
Done on Rework 0 .
Rework number 5
No need to modify schematics .
Rework number 6
D No need to modify schematics . D
Rework number 7
PR29 & PR6 is on VGA Power board ; R451 not changed yet , need to verify .
Rework number 8
No need to modify schematics .
Rework number 9
No need to modify schematics . HON HAI PRECISION IND. CO., LTD.
FOXCONN
Title
CPBG - R&D Division
History

Size Document Number Rev

<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 44 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

HISTORY
(2004/08/11)
For collecting similar together :
P.37 Change PC17 to 0.01u/25V_0402
P.35 Change PC24 to 0.01u/25V_0402
P.03 Change C681 to 0.01u/16V_0402
P.32 Change PC14 to 0.01u/50V_0603
P.33 Change PC141, PC150 to 0.1u/16V_0402
A
P.25 Change C533 to 0.1u/50V_0603 A
P.34 Change PC71 to 0.1u/50V_0603

Change ALL 0.1u_0603 to 0.1u/50v_0603

P.32 Change PC2 to NC_0.1u/50v_0603

P.35 Change PR74 to 1.24K/F_0603
P.34 Change PR185 to 10/F_0603
P.34 Change PR103, PR120 to 100K/F_0603
P.35 Change PR72, PR160 to 100K/F_0603
P.32 Change PR1,PR21, PR13,PR59,PR68 to 100K/F_0603
P.33 Change PR190, PR199 to 100K/F_0603
P.37 Change PR24, PR33 to 100K/F_0603
P.38 Change PR157 to 100K/F_0603

P.33 Change PC152, PC153, PC133, PC134 to 150u/6.3V_7343

P.32 Change PR14,15,22,23,17,18 to 100K/F_0603
P.08 Change PR24,25,30,43,44,45,46,49~52,53,70,71,75,76,88~93,101,106,110,113,117,122 to 100K/F_0603 .
P.34 Change PR99 to 10K/F_0603
P.32 Change PR16 & PR27 to 10K/F_0603 .
B B
P.34 Change PR134,176,180,183 to 10/F_0603
P.21 Change R273 to 10/F_0603
P.29 Change R590 to 10/F_0603
P.35 Change PR87 to 10/F_0603
P.08 Change R486 to AL_10/F_0603
P.34 Change PR102,123 to 0603

Change R11,371,259,251,608,PR124 to 1% .

P.32 Change PC90 to 1U/25V_0603

P.02 Change R420 to 1%
P.32 Change PR11 to 1%
P.34 Change PR135,100,125 to 0603.
P.32 Change PR19,20,7 to 1%

P.28 Change R12 to 1%

P.33 Change PR95 to 1%_0603
P.33 Change PC140,61 to 0402
P.35 Change PR56 to 1%_0603
C P.34 Change PC70 to 10V_1206 C

P.23 Change R398,401 to 1%

P.32 Change PR12 to 33_0402
P.23 Change R402,404 to 1%

P.37 Change PR34 to 0402

P.34 Change PR137 to 0402
P.32 Change PC15 to 0402
P.08 Change C677,697,714,715 to 470u/2.5V_7343
P.33 Change PR191,202 to 1%_0603
P.32 Change PR5 1%_0603

Change LED :
D14,D16,LED1 to HSMY-C170 .

P.30 Change J5 to NC_FOXCONN_HS82020

Change C683 value to AL_22000P_0805_3P , but BOM no change .

D
P.10 Change R157 to 0 ohm, from NC_0 D
P.12 Add R622 NC_0 to NVVDD
P.12 Change R71,62 to 40/F
P.13 Add R623
P.13 Change U26,R391,186,197 to NC_0 ohm HON HAI PRECISION IND. CO., LTD.
P.14 Change U9 to NC_MB88153/CY25560/IMISM560 FOXCONN
Title
CPBG - R&D Division
P.23 Change U7,U10,U12 to RT9702APB for Lead free part . History

Size Document Number Rev

<Doc> A
Custom
Date: Monday, September 13, 2004 Sheet 45 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

HISTORY
(2004/06/18) Doi san requested for clock measurement reserver circuits , file name : CLK.pdf .
P.04 Add R624 for value = "0" ; R625 for value = "NC_10K" ; RP80 for value = "NC_4P2R-S-33" ; R626,R627 for value = "NC_10K" ; RP79 for value = "NC_4P2R-S-10K" ; swap net "PCLK_JIG/R_PCLK_JIG" to "CLK_ICHPCI"
; Del T164 & T163 .
P.14 Add R628 & R629, value = "NC_0" .
(2004/08/18) Intel check MS01 schematics , file name : Sony_Foxconn_MS01 schematic review.pdf .
P.02 NC R438 for no ITP ;NC R436 for H_CPURST# no need to pull high .
P.03 Del T17 & T19 , add R633 & r634 for 54.9/F .
P.04 NC R458,R460,RP71 .
A P.08 Del C269 & C271 ; add C841 value = "10U/6.3V_0805" . A
P.08 C280 is not necessary in CRB 1.601 and lviso check list 1.601 , NC C280 .
P.08 Add C842 calue = "10U/6.3V_0805" .
(2004/08/18)
P.19 Change R511 to 100K & C719 to 1U/10V_0603 for Doi san requested on 8/12 .
P.28 Change C4/C7 from 22pf to 33pf for Y1 clock precision .
P.25 Change C537/C538 from 12pf to 18pf for Y3 clock precision .
P.19 NC R506, value = "NC_0" .
P.20 Link pin AC5 , AD5 , AC9 , AD9 of ICH6m to GND to disable SATA[3,1] ; del T63,T65,T67,T69 .
P.02 Change R135 value = "39" for RDDP rev1.5 .
P.08 Add R630 value = "NV_0", R191 value = "0" , Del R202 ; for disabling CRT .
P.25 Add C840 value ="1000P" for MS , it's more effectiv than near MS connector .
P.04 Change value of R466 & R183 from "0" to "NV_0" for HIGH ; add R631 & R632 value = "AL_49.9/F" for LOW .
P.30 Change net name "TEST1" to "TEST1_EC" to avoid conflict with "TEST1" on P.3 .
P.08 Add C842 calue = "10U/6.3V_0805" .
P.30 Change R283 value to "AL_100K" & R296 value to "NV_100K" for system ID identification .
P.04 Change U32 to F75384S for CPU & NB thermal sensor ; change R448 & R454 to 4.7K , C655 to 0.1U/16V per recommended schematics .
P.14 Change U27 to NV_F75383M for NVIDIA thermal sensor ; Delete R55 ,change R60 & R393 to NV_4.7K , C53 to NV_0.1U/16V per recommended schematics ; Change net "MAX6647_VDD" to "U27_VDD" .
P.30 Change R321 to 0 ohm and connect from OVT_EC# to pin 12 (GPIO06) of EC for thermal throttling control method .
(2004/08/20)
P.34 Change PC136 to 1U/10V_0603
P.25 Change R352 to 390K ohm , for TI suggest .
(2004/08/26)
P.08 Change D20 to SCS500V-40.
P.08 Change R486 to 10/F_0603.
B P.08 Change C842 to AL_10U/6.3V_0805. B
P.04 Change R633 & R634 to NC_54.9/F.
For Power Change
P.36 Add PQ66 to 2N7002DW. Add PR211, PR212
P.35 Change PR67 to 1.62K/F , Add PC156 , PC157 to 2R5TPE220M9
P.34 Change PC128, PC126 to 4TPE220M_7343, Change PC122 ,PC123,PC124 , PC44 & PC38 to 2R5TPE330M9_7343
P.33 Change PC133, PC134, PC152 & PC153 to 6TPE150M_7343
P.34 Change PR177 to 14K/F_0603
P.38 Change PR153 to 0.047/F_1206
P.36 Change PQ44 & PQ47 to FDC653N
P.36 Change PQ57 to FDC796N
P.32 Change PD4 & PD5 to DIODE_2P_51_63X31(Change footprinter)
P.32 Change PD15 & PD22 & PD26 to DIODE_2P_51_63X31(Change footprinter)
(2004/08/28) MOR suggested on MS01 schematics .
P.04 Remove the leader rectangles , and change the values of R461 , R462 to "NV_49.9/F" .
P.10 Delete R388,389,387,33,32,34,65,451 and change net "NV_VDD33" to "+3VRUN" ; "+1_2VRUN" to "PEX_VDD" ; "+1_0VRUN" to "NV_VDD" , for no need current measuring R.
P.13 Change R371 to "10K" for NVIDIA Design guide .
P.13 U26 mount , R623 "NC_0" , R391 "NV_0" , R186 "AL_0" , R197 "AL_100K" .
P.13 D1 & F1 NC for no +5VRUN needed on pin9 of VGA connector .
P.15 Delete R452,R38, & change net "+2_5VRUN" to "VRAMVDD" ; delete R37 & change net "NVFBVDDQ" to "VRAMVDD" ; delete R36 & change net "NVFBVTT" to "VRAM_TERM" ; delete R429 & change net "FBVTT" to "VRAN_TERM" ,
for no need current measuring R.
P.19 Change C359 & C369 to "15P" for CLK accuracy .
P.23 Add R635~R640 with "NC_0" for USB signals .
P.23 Add R641 , R642 value "33" series with SUS_ON & RUN_ON for noise concern on Port Replicator .
P.29 Mount Q40 & R619 for mute on Port Replicator .
P.30 Change C447 & C448 to "15P" for CLK accuracy .
P.30 Add D31 & D32 with "PACDN042Y3" for ESD concern .
C C
(2004/08/29)
P.14 Delete R97 , R128 and short it for no need current measuring R .
P.13 Change U13~U15 to mount "NC7SB3157" and R178,177,171,172,175,174 to "NC_0" for SI tested need analog switch for Port Replicator .
P.08 Delete R191 for it's not needed .
P.11 Delete T61 and add C849 for "0.1U/16V" for intel suggestion "OHLONE/GUADALUPE CRB BOARD REWORK #15".
P.08 Delete R226 for no need current measuring R .
EMI solutions :
Add C850~C854 & C857~C859 "0.1U/16V" ; Add C855 , C856 "47P" and C5 , C10 "NC_47P" and change GND connection on HSYNC13 & VSYNC14.
P.23 CN10 pin 65~70 connect to GND .
for using common components and material lead time issue , change some value of components .
Change "NV_40/F" to "NV_40.2/F" for R71,62 .
For Power Change 8/29
P.32 change PR16 to 4.99K/F_0603
P.32 change PR8 to 21.5K/F_0603
P.36 change PQ46 source from +5VSUS to +5VALW
P.36 change PQ43 source from +3VSUS to +3VALW
P.13 Add R643 "NC_100K" for reserved circuits .
(2004/08/30)
P.23 NC FAN 2 & it's accessories : R409,C73,R407,R404,R401,C23,Q4,R35,J3 .
P.16 Remove two VGA memory :
delete :
C27,29,30,32,33,41,42,44,47,77,79,85,87,92,103,104,105,124~128,140,154,164,165,171,180,188,192,222,239,240,243~247,564,589,594,598,617,620,623,624,626,630,633,638,640,642,646,647,654,658,659,664,666,667,671,673 ;
D
R51,69,81,152,160,T10,T29,U8,U11 ; and delete NC parts :C592,602,605,606,621 ; R70,80,162,167. D
P.26 Screw hole change .
Change connector footprint & value for ME modify :
JVGA1,CN16,CN15,CON1,CON2,CN17,J6,U30,CN12,CN6,PCON2,SW1,SW2,SW3,SW5,SW6,SW4,JSPK1,CN5,CN11,CN14,J2 footprint & value changed , footprint is the same with the value of the corresponding component .
P.30 Change SW7 to a 3-pin connector for ME modify .
HON HAI PRECISION IND. CO., LTD.
For Power Change 8/30
P.35 change PR65 to 100ohm FOXCONN
Title
CPBG - R&D Division
P.36 PU6 change RUN_ON to RUN_ON_1 History
P.32 Change PQ1,PQ4,PQ50,PQ51 value from "SI4835DY" to "SI4835BDY"
Size Document Number Rev
(2004/08/30) <Doc> A
Custom
P.16 CN11 and CN13 change connector : hd_16p_et_1790_16 for CN11 , hd_30p_et_1790_30 for CN13 . Date: Monday, September 13, 2004 Sheet 46 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

HISTORY
(2004/09/01) Nishio san requested add signal AV_PHONE_DET to mute system speaker when haedphone plug in AV port replicator
P.23 Add signal AV_PHONE_DET at Pin 32 of Replicator connector (CN10)
P.29 Add R644 & R645 for control mute function by AV_PHONE_DET signal or APR_ON signal.
(2004/09/02)
P.23 R635,R636,R637,R638,R639,R640 change footprint to compatible common choke pad for layout easy
P.26 Add EMI spring pad SPR1 ~ SPR10
P.32 PCON2 change component for meet Lead Free requirement
P.04 Add R646 to keep drive level keep under 500 uW
A
(2004/09/03) A
P.29 Change C782,C802 material from POSCAP to aluminium electrical capacitor 100u/6.3V.
P.26 Add C867 , C868 , C869 0.1u F for EMI request
(2004/09/04)
P.08 Add C871 to 150U/6.3V_7343 for CRT noise .
P.11 Add C870 to 220U/6.3V_7343 for ripple noise.
Change +15VRUN to +17VRUN
(2004/09/05)
P.08 Add C872 & C873 to NC_470U/2.5V_7343 .
P.29 Add Q42 & Q43 to 2N7002;Add R647 to 10K; Add R648 to 1K .
(2004/09/06)
P.28 Change U3 to PI3L110Q for a better Ron value , requested from David san .
P.11 Change C870 to NV_220U/6.3V_7343 .
P.16 CN11 & CN13 are "NV_" option : NV_hd_16p_et_1790_16 for CN11 , NV_hd_30p_et_1790_30 for CN13 .
P.30 Delete T195 and change connect PWRLIMIT# to pin 3 of EC ,MAX1909_IINP_EC to pin 88 of EC for power request .
P.04 Swap RP80 for layout request .
Combine power circuits p.31~p.38 .
P.08 Add C871 to "AL_150U/10V_7343" for combining BOM .
(2004/09/07)
P.30 Change touch pad to ALPS ,R357,R358 value ="0" ; change CN18 pin define for ME changing touch pad position .
P.12 Add R649 "NC_0_0805" & R650 "NV_0_0805" for FBVTT voltage option for NVIDIA recommendation link to FBVDDQ .
P.16 Modify CN13 pin define for Layout .
P.15 Add R651 & R652 "NC_0" for FBA_CS1# on NVIDIA DDR option .
P.15 Add R653,654,655 value "NV_150" for NVIDIA recommendation .
P.16 Change R61 & R64 to "NV_4.7K" for NVIDIA recommendation .
P.10 FOR 4Mx32 memory setting :
B Change R78 value from "NC_2K" to "NV_2K" . B

Change R422 value from "NV_10K" to "NC_10K" .

Change R412 value from "NC_2K" to "NV_2K" .
Change R73 value from "NV_10K" to "NC_10K" .
Change R425 value from "NC_2K" to "NV_2K" .
Change R104 value from "NV_10K" to "NC_10K" .
Change R416 value from "NC_2K" to "NV_2K" .
Change R414 value from "NV_10K" to "NC_10K" .
FOR PCI_DEVID setting :
Change R90 value from "NC_2K" to "NV_2K" .
Change R423 value from "NV_10K" to "NC_10K" .
Change R435 value from "NV_10K" to "NV_2K" .
Change R431 value from "NV_10K" to "NV_2K" .
Change R433 value from "NV_10K" to "NV_2K" .
Change R421 value from "NV_10K" to "NV_2K" .
Change R430,R432,R434 value from "NC_10K" to "NC_2K" .
(2004/09/08)
P.29 Change R648 to 100K for 1K pull down to GND too strong , pin 1 of Q42 can't be high .
P.21 Change L48 to BLM31PG121SN1 for +1_5V_PCIE voltage drop issue.
P.26 Delete H1 ~ H4 for changing to Non PTH screw holes .
C
P.08 Change C871 to "AL_150U/10V_7343" for MS01_L , CRT noise issue . C
P.10 Add C874 value = "NC_470U/2.5V_7343" reserved CAP for 3D hang up issue .
P.29 Add R657 "20K/F_0603" link from U39.40 to GND ; R656 "20K/F_0603" link net "SENSE A" from Q42.1 to U39.13. For MIC jack sense .
P.25 Change R352 to from "390K to "1K" following TI datasheet .
P.29 Change C782 & C802 value to "100U/6.3V_AL_CAP" .
P.29 Change D6,D23,D28,D29 to "MTZS05-6.2" for correct zener diode ESD protection .
P.30 Change D15 to "HT-297 UD/UYG" ; LED1,D14,D16 to "HT_170_UY" ; D8,D9,D10 to "HT_110_UYG" ; D13 to "HT_170_UYG" .
(2004/09/08) Nishio san requested to modify , file name : MS01 Audio0906.jpg .
P.29 R619 and Q40 NC.
P.29 R645 change from "0" to "1K" .
P.29 R611 & R610 change from "NC_0" to "0" .
P.29 Add R658~R663 "NC_47K" , U52 "TC7SH32FU" , R664,R665 "NC_10K" .
(2004/09/08) Nishio san requested to modify , file name : MS01_Mute.jpg .
P.29 Add R666 "0" ; R669,R672 "NC_0" ; R670,R671,R673,R674,R675,R676,R677 "NC_1K" ; U53 "NC_TC7W14FU" ; U54,U55 "NC_TC7SH32FU" for reserved MUTE circuit .
(2004/09/09)
P.29 Change net "SENSE A" to "SENSE_A" to meet orcad rule .
Combine Power Circuit from Jay , P.31~P.38 .
Change net "17V" to "15V" ; "+15VRUN" to "+17VRUN" for power circuit change .
P.34 Disconnect net "VSSA" & "GND" by Jay .
P.29 Delete U53,U52,R611,610,667,668 ; Add U56 "TC7SET04FU",U57,U58 "NC_TC7SET04FU" , change U55 to "NC_TC7SET32FU" ; add D33 "NC_SCS500V-40" and change R656 to "NC_10K" for "SENSE_A" net ; Add D34 , D35 "MTZS05-6.2"
for ESD concern ; Nishio san requested .
P.23 Change D7 to "NC_MTZS05-6.2" , for correct zener diode .
P.23 Add D36 "NC_MTZS05-6.2" for Nishio san requested .
(2004/09/10)
D P.29 Change R656 value to "NC_10K/F_0603" . D
P.10 Change components value : R136,R133,R130,R125 to "NV_2K" ; change R132,R137,R129 to "NC_2K" ; change R93 to "NC_10K".
P.16 Change NV_VDD voltage description from 1.2V to 1.1V for NVIDIA recommendation .
P.30 Change value : D15 to "LED_DUAL_HARV_HT_297_UD_UYG" ; LED1,D14,D16 to "LED_HARV_HT_170_UY" ; D8,D9,D10 to "LED_1GND_HARV_HT_110_UYG" ; D13 to "LED_HARV_HT_170_UYG" .
P.32 PR222 Change to 100K/F_0603 , by Jay .
P.32 PR28 "NC_0" , PR223 "0", by Jay .
(2004/09/13)
P.26 Change H14 to "ho_c256in177d98_m2_v4" for Layout . Title
P.26 Delete SPR12 for not needed . <Title>
P.37 Change PR30 to 1K/F for combining BOM . Size Document Number Rev
P.32 PCON1 add GND pin(7,8pin)
P.30 SW3,SW5,SW6 modify pin assignment due to change parts Custom <Doc> <RevCode>

Date: Monday, September 13, 2004 Sheet 47 of 47

1 2 3 4 5 6 7 8