LG 50PT350-ZD PD11K PDF

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
PLASMA TV
SERVICE MANUAL
CHASSIS : PD11K
MODEL : 50PT350/351/351A/351K/
50PT351N/352/
50PT353/353A/353K/353N
50PT350-ZD/50PT351/351A/351K-ZC/
50PT351N-ZC/50PT352-ZB/
50PT353/353A/353K/353N-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67013001(1101-REV00) Printed in Korea

CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................6
BLOCK DIAGRAM ...................................................................................................................14
EXPLODED VIEW .................................................................................................................. 15
CIRCUIT DIAGRAM .....................................................................................................................
Copyright ©2011 LG Electronics Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in
the Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the Do not use a line Isolation Transformer during this check.
servicing of a receiver whose chassis is not isolated from the AC Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
power line. Use a transformer of adequate power rating as this between a known good earth ground (Water Pipe, Conduit, etc.)
protects the technician from accidents resulting in personal injury and the exposed metallic parts.
from electrical shocks. Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
It will also protect the receiver and it's components from being Reverse plug the AC cord into the AC outlet and repeat AC
damaged by accidental shorts of the circuitry that may be voltage measurements for each exposed metallic part. Any
inadvertently introduced during the service operation. voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it In case any measurement is out of the limits specified, there is
with the specified. possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts. Leakage Current Hot Check circuit
Due to high vacuum and large surface area of picture tube, AC Volt-meter
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.
Good Earth Ground

such as WATER PIPE,
Leakage Current Cold Check(Antenna Cold Check) CONDUIT etc.
To Instrument's
With the instrument AC plug removed from AC source, connect 0.15uF
exposed
an electrical jumper across the two AC plug prongs. Place the METALLIC PARTS
AC switch in the on position, connect one lead of ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna 1.5 Kohm/10W
terminals, phone jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
V Application Range
This spec is applied to PDP TV used PD11K Chassis.
Model Name Market Brand
50PT350-ZD Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark,
50PT351/351A/351K/351N-ZC Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,
50PT352-ZB Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, Norway, LG
50PT353/353A/353K/353N-ZA Poland, Portugal, Romania, Russia, Serbia, Slovakia, Slovenia, Spain,
Sweden, Switzerland, Turkey, Ukraine, UK
V Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.
V Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification, EMC : CE, IEC
Model Name Market Appliance
50PT350-ZD Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark, Safety :
50PT351/351A/351K/351N-ZC Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, IEC/EN60065
50PT352-ZB Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, EMI : EN55013
50PT353/353A/353K/353N-ZA Norway, Poland, Portugal, Romania, Russia, Serbia, Slovakia, EMS : EN55020
Slovenia, Spain, Sweden, Switzerland, Turkey, Ukraine, UK
V Module Specification
(1) 2D - 50” HD
No Item Specification Remark
1 Display Screen Device 127 cm (50 inch) wide Color Display Module PDP
2 Aspect Ratio 16:9
3 PDP Module PDP50T3####,
RGB Closed (Well) Type, Glass Filter (38%)
Pixel Format: 1024 horiz. By 768 ver
4 Operating Environment 1) Temp. : 0 deg ~ 40 deg
2) Humidity : 20 % ~ 80 %
LGE SPEC
5 Storage Environment 3) Temp. : -20 deg ~ 60 deg
4) Humidity : 10 % ~ 90 %
6 Input Voltage AC 100 V ~ 240 V, 50 / 60 Hz Maker LG
V Model General Specification
No Item Specification Remarks

1 Market Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, 36 Country
Czech, Denmark, Estonia, Finland, France, Germany,
Greece, Hungary, Ireland, Italy, Kazakhstan, Latvia,
Lithuania, Luxembourg, Morocco, Netherlands, Norway,
Poland, Portugal, Romania, Russia, Serbia, Slovenia,
Spain, Sweden, Slovakia, Switzerland, Turkey, Ukraine,
UK
2 Broadcasting system 1) PAL/SECAM BG EU (PAL Market)
2) PAL/SECAM DK
3) PAL Ⅰ/Ⅱ
4) SECAM L/L’
5) DVB T
6) DVB C
3 Receiving system Analog : Upper Heterodyne
Digital : COFDM
4 Scart Jack (1EA) PAL, SECAM
5 Video Input (1EA) PAL, SECAM, NTSC Side AV
6 Component Input (1EA) Y/Cb/Cr, Y/ Pb/Pr
7 RGB Input RGB-PC Analog (D-Sub 15Pin)
8 HDMI Input (4EA) HDMI-PC HDMI/DVI,HDMI2, HDMI3
HDMI-DTV
9 Audio Input (3 EA) RGB/DVI Audio, Component, AV L/R Input
10 SPDIF Out(1 EA) SPDIF Out
11 USB(1EA) For SVC, S/W Download, DivX
12 LAN For UK models
ADJUSTMENT INSTRUCTION
1. Application Range 3. Main PCB check process

This spec sheet is applied to all of the PDP TV with PD11K * APC - After Manual-Insert, executing APC
chassis.
3-1. Boot file Download

(1) Execute ISP program “Mstar ISP Utility” and then click
2. Specification “Config” tab.
(1) The adjustment is according to the order which is
designated and which must be followed, according to the (2) Set as below, and then click “Auto Detect” and check “OK”
plan which can be changed only on agreeing. message
(2) Power adjustment : Free Voltage. (100 V ~ 240 V, 50 Hz / If “Error” is displayed, Check connection between computer,
60 Hz.) jig, and set.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard. (3) Click “Read” tab, and then load download file (XXXX.bin)
(5) Reserve after operation: Above 5 Minutes (Heat Run) by clicking “Read”
Temperature : at 25 °C ± 5 °C
Relative humidity 65 % ± 10 %
Input voltage : 220 V, 60 Hz.
(6) Adjustment equipments : Color Analyzer (CA-210 or CA-
110), DDC Adjustment Jig equipment, SVC remote
controller.
(7) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 °C
- In case of keeping module is in the circumstance of 0 °C,
it should be placed in the circumstance of above 15 °C
for 2 hours (4) Click “Connect” tab. If “Can’t” is displayed, Check
- In case of keeping module is in the circumstance of below connection between computer, jig, and set.
-20 °C, it should be placed in the circumstance of above
15 °C for 3 hours,.
O After RGB Full White in HEAT-RUN Mode, the receiver

must be operated prior to the adjustment.
O Enter into HEAT-RUN MODE
1) Press the POWER ON KEY on R/C for adjustment.
2) OSD display and screen display PATTERN MODE.
- Set is activated HEAT run without signal generator in this
mode. (5) Click “Auto” tab and set as below.
- Single color pattern ( WHITE ) of HEAT RUN MODE uses
to check panel. (6) Click “Run”.
- Caution : If you turn on a still screen more than 20
minutes (Especially digital pattern, cross hatch pattern), (7) After downloadng, check “OK” message.
an after image may be occur in the black level part of the
screen.
(8) Push The “IN STOP KEY” - For memory initialiLAtion.

Case1 : Software version up
1) After downloading S/W by USB , TV set will reboot
automatically
2) Push “In-stop” key
3) Push “Power on” key
4) Function inspection
5) After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1) When TV set is entering on the assembly line, Push
“In-stop” key at first.
2) Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover
channel information by itself.
3) After function inspection, Push “In-stop” key.
4. USB DOWNLOAD Model Module Tool Tool Tool Tool Tool
option1 option2 option3 option4 option5
(*.epk file download)
50PZ550-ZA 50R3 36928 37966 54144 26956 32
(1) Put the USB Stick to the USB socket 60PZ550-ZA 60R3 49216 37966 54144 26956 32
(2) Automatically detecting update file in USB Stick 60PZ250-ZA 60R3 49280 37966 54144 26892 32
- If your downloaded program version in USB Stick is Low,
it didn’t work. 50PZ250-ZA 50R3 36992 37966 54144 26892 32
But your downloaded version is High, USB data is 50PW450-ZA 50T3 37056 37966 54144 26892 32
automatically detecting 42PW450-ZA 42T3 24768 37966 54144 26892 32
(3) Show the message“Copying files from memory”
50PV350-ZA 50R3 37216 21582 54144 26892 32
50PT350-ZA 50T3 37312 21582 54144 26892 32
42PT350-ZA 42T3 25024 21582 54144 26892 32
60PV250-ZA 60R3 49536 21582 54144 26892 32
42PT250-ZA 42T3 25088 21582 54144 26892 32
60PV250-TA 60R3 49536 22934 54144 26892 32
50PV250-TA 50R3 37248 22934 54144 26892 32
50PW350-TA 50T3 37088 39318 54144 26956 32
(4) Updating is staring.
42PW350-TA 42T3 24800 39318 54144 26956 32
60PZ550-TA 50R3 49216 39318 54144 26956 32
50PZ550-TA 50R3 36928 39318 54144 26956 32
50PT250-TA 50T3 37376 22934 54144 26892 32
42PT250-TA 42T3 25088 22934 54144 26892 32
50PZ550T-ZA 50R3 36928 37966 54144 29001 544
50PZ550T-ZA 50R3 36928 37966 54144 29004 544
60PZ250T-TA 60R3 49280 37966 54144 28940 544
50PZ250T-ZA 50R3 36992 37966 54144 28940 544
50PW450T-ZA 50T3 37056 37966 54144 28940 544
42PW450T-ZA 42T3 24768 37966 54144 28940 544
50PV350T-ZA 50R3 37216 21582 54144 28940 544
60PV250T-ZA 60R3 49536 21582 54144 28940 544
(5) Updating Completed, The TV will restart automatically.

(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
5. ADC Process
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to 5-1. ADC
channel recover. if all channel data is cleared, you didn’t - Enter Service Mode by pushing “ADJ”key,
have a DTV/ATV test on production line. - Enter Internal ADC mode by pushing “ G ” key at “5. ADC
Calibration”
* Caution: Using ‘power on’ button of the Adjustment R/C , power

on TV.
* After downloading, have to adjust TOOL OPTION again.
(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each of models has their number.)
(4) Completed selecting Tool option.
* ADC Calibration Protocol (RS232) Adjust Process will start by execute RS232C Command.
NO Item CMD 1 CMD 2 Data 0 O Color temperature standards according to CSM and Module
Enter Adjust A A 0 0 When transfer the CSM PLASMA
Adjust ‘Mode In’ ‘Mode In’ Cool 11000K
Mode Carry the Medium 9300K
command. Warm 6500K
ADC ADC A D 1 0 Automatically

O CS-1000/CA-100+/CA-210(CH 10)
adjust Adjust adjustment White balance adjustment coordinates and color temperature.
(The use of Color Coordinate
a internal pattern) CSM Temp ±Color Coordinate
x y
Adjust Sequence Cool 0.276 0.283 11000K 0.002
- aa 00 00 [Enter Adjust Mode]
Medium 0.285 0.293 9300K 0.002
- xb 00 40 [Component1 Input (480i)]
- ad 00 10 [Adjust 480i Comp1] Warm 0.313 0.329 6500K 0.002
- xb 00 60 [RGB Input (1024*768)]
- ad 00 10 [Adjust 1024*768 RGB] * Connecting picture of the measuring instrument (On
- aa 00 90 End Adjust mode Automatic control)
* Required equipment : Adjustment R/C. - Inside PATTERN is used when W/B is controlled. Connect
to auto controller or push Adjustment R/C POWER-ON
->Enter the mode of White-Balance, the pattern will come
6. Function Check out.
6-1. Check display and sound

- Check Input and Signal items. (cf. work instructions)
(1) TV
(2) AV (SCART1/SCART2/ CVBS)
(3) COMPONENT (480i)
(4) RGB (PC : 1024 x 768 @ 60hz)
(5) HDMI
(6) PC Audio In
* Display and Sound check is executed by Remote
controller.
* Caution : Not to push the INSTOP KEY after completion if the * Auto-control interface and directions
function inspection. (1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10ux).
(2) Measure and adjust after sticking the Color Analyzer (CA-
100+, CA210 ) to the side of the module.
7. Total Assembly line process (3) Aging time
After aging start, keep the Power on (no suspension of
7-1. POWER PCB Assy voltage adjustment power supply) and heat-run over 5 minutes
(Vs voltage adjustment)
O Required Equipment for adjustment
O Auto adjustment Map(RS-232C)
- D.M.M
RS-232C COMMAND
O Condition for adjustment
[ CMD ID DATA ]
- No signal with the snow noise in RF mode)
Wb 00 00 White Balance Start
Wb 00 ff White Balance End
7-2. Adjustment Preparation RS-232C COMMAND CENTER
- Required Equipment
O Remote controller for adjustment
[CMD ID DATA] MIN (DEFAULT) MAX
O Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same Cool Mid Warm Cool Mid Warm
product : CH 10 (PDP)
R Gain jg Ja jd 00 192 192 192 192
* Please adjust CA-210, CA-100+ by CS-1000 before
measuring G Gain jh Jb je 00 192 192 192 192
O Auto W/B adjustment instrument(only for Auto adjustment) B Gain ji Jc jf 00 192 192 192 192
O 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B
EQUIPMENT. R Cut 64 64 64 128
G Cut 64 64 64 128
Before Adjust of White Balance, Please press POWER ONLY B Cut 64 64 64 128
key
* Caution 7-4. DDC EDID Write (RGB 128Byte )
- Color Temperature : COOL, Medium, Warm.
- One of R Gain/G Gain/ B Gain should be kept on 0xC0, and -> Not used any more, Use Auto D/L
adjust other two lower than C0. (1) Connect D-sub Signal Cable to D-Sub Jack.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range (2) Write EDID DATA to EEPROM (24C02) by using DDC2B
of Module) protocol.
(3) Check whether written EDID data is correct or not.
* Manual W/B process using adjusts Remote control. * For SVC main Ass’y, EDID have to be downloaded to
(1) After enter Service Mode by pushing “ADJ” key, Insert Process in advance.
(2) Enter White Balance by pushing “ G ” key at “. White
Balance” 7-5 DDC EDID Write (HDMI 256Byte)
(3) Stick the sensor to the center of the screen and select
-> Not used any more, Use Auto D/L
each items(Red/Green/Blue Gain) using D/E (CH +/-) key
(1) Connect HDMI Signal Cable to HDMI Jack.
on R/C.
(2) Write EDID DATA to EEPROM(24C02) by using DDC2B
(4) Adjust R/G/B Gain using F/G (VOL +/-) key on R/C.
protocol.
(5) Adjust three modes all(Cool/Medium/Warm) : Fix the one
(3) Check whether written EDID data is correct or not.
of R/G/B Gain and Change the others.
* For SVC main Ass’y, EDID have to be downloaded to
(6) When the adjustment is completed, Enter “COPY ALL”.
Insert Process in advance.
(7) Exit adjustment mode using EXIT key on R/C.
7-6. EDID DATA

(1) All Data : HEXA Value
(2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum
7-7. EDID DATA Auto Download

(1) Press Adj. key on the Adj. R/C,
(2) Select EDID D/L menu.
(3) By pressing Enter key, EDID download will begin
(4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
* After You finish all adjustments, Press °∞In-start°± button (5) If Download is failure, Re-try downloads.
and compare Tool option and Area option value with its
BOM, if it is correctly same then unplug the AC cable.
If it is not same, then correct it same with BOM and unplug
AC cable.
For correct it to the model’s module from factory JIG model.
* Push The “N STOP KEY” after completing the function
inspection. And Mechanical Power Switch must be set “ON”.
* To check the coordinates of White Balance, you have to

measure at the below conditions.
Picture mode : Vivid, Energy Saving : Off, Below the
Advanced control, Dynamic Contrast : Off, Dynamic Colour :
Off
Colour Temp. *Caution: Never connect HDMI & D-sub Cable when EDID
downloaded.
-> Picture Mode change : Vivid ? Vivid(User) O Edid data and Model option download (RS232)
NO Item CMD 1 CMD 2 Data 0
7-3. DPM operation confirmation
Enter download A A 0 0 When transfer the
(Only Apply for MNT Model)
download ‘Mode In’ ‘Mode In’
* Check if Power LED Color and Power Consumption operate Mode Carry the
as standard. command.
(1) Set Input to RGB and connect D-sub cable to set EDID data download A E 00 10 Automatically
(2) Measurement Condition: (100~240V@ 50/60Hz) Model download
(3) Confirm DPM operation at the state of screen without
option (The use of
Signal
download a internal pattern)
7-8. Manual Download (3) 2D - HD HDMI2 EDID data
* Caution
* Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
* Caution:
- Never connect HDMI & D-sub Cable at the same time.
- Use the proper cables below for EDID Writing.
- Download HDMI1, HDMI2 separately because HDMI1 is
different from HDMI2.
(4) 2D - HD HDMI3 EDID data

No. Item Condition Hex Data
1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03
7-9. EDID DATA

(1) 2D - HD RGB EDID data
ⓐ Vender ID
(2) 2D - HD HDMI1 EDID data
O Checksum: Changeable by total EDID data.
Copyright ©2011 LG Electronics Inc. All rights reserved. - 10 - LGE Internal Use Only
8. Checking the EYE-Q Operation. (3) Put on the 3D Glasses, And block the right side of Glasses
(LEFT:OPEN[TEST], RIGHT:CLOSED)
(1) Press the EYE Key on the adjustment remote controller. And check the middle sides of picture , RED -> normal ,
(2) Check the Sensor DATA ( It must be under 10) and keep others -> abnormal
the data longer than 1.5s
(3) Check ‘OK’
(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12)

* IF you press IN-STAP Button, change Green Eye-check OSD.
(4) Put on the 3D Glasses, And block the right side of Glasses
9. Ping TEST (LEFT:CLOSED, RIGHT:OPEN[TEST])
And check the middle sides of picture , BLUE -> normal ,
(DVB T2 model only, PP11B/L) others -> abnormal
* This test is to check Network operation.

(1) Connect LAN cable from Computer to TV Set
(2) When network operates normally, you can see “OK” on
Computer
10. 3D Function Test

(Pattern Generator MSPG-3233, HDMI mode NO. 371 ,
pattern No. 81)
(1) Please input 3D test pattern like below
11. Model name & Serial number

download
11-1. Model name & Serial number D/L
(1) Press “Power on” key of service remocon.(Baud rate :
115200 bps)
(2) Connect RS232 Signal Cable to RS-232 Jack.
(3) Write Serial number by use RS-232.
(4) Must check the serial number at signal test of customer
(2) Enter 3D mode , then select side by side support. (Refer to below).
(If you don’t wear a 3D Glasses, you will see the picture
like below)
11-2. Signal TABLE 5) Check the Diagnostics (DTV country only) ? Buyer
model displayed (ex 42LD450)
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 + ... +
Data_n
Delay : 20ms
11-3. Command Set
12. CI+ Key Download

[Description] 12-1. Download Procedure
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, (1) Press "Power on" button of a service R/C.(Baud rate :
0, Phase 115200 bps)
Data write : Model Name and Serial Number write in (2) Connect RS232-C Signal Cable.
EEPROM,. (3) Write CI+ Key through RS-232-C.
(4) Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below)
11-4. Method & notice

(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0
* Manual Download (Model Name and Serial Number)
- If the TV set is downloaded By OTA or Service man,
Sometimes model name or serial number is initialized.(
Not always)
- There is impossible to download by bar code scan, so It
need Manual download.
1) Press the ‘instart’ key of ADJ remote controller.

2) Go to the menu ‘5.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 42LD450-TA) or Serial -> Check the Download to CI+ Key value in LGset.
number like photo.
4) Check the model name Instart menu ? Factory name 12-2. Check the method of CI+ Key value
displayed (ex 42LD450-TA) (1) check the method on Instart menu
(2) check the method of RS232C Command
1) into the main ass’y mode (RS232 : aa 00 00)
CMD 1 CMD 2 Data 0
A A 0 0
2) check the key download for transmitted command

(RS232 : ci 00 10)
CMD 1 CMD 2 Data 0
C 1 1 0
3) result value
- normally status for download : OKx
- abnormally status for download : NGx
12-3. Check the method of CI+ Key value

(RS232)
(1) into the main ass’y mode (RS232 : aa 00 00)
CMD 1 CMD 2 Data 0
A A 0 0
(2) Check the mothed of CI+ key by command

(RS232 : ci 00 20)
CMD 1 CMD 2 Data 0
C 1 2 0
((3) result value
13. SW Download Guide.

※ Put a *.bin to USB Stick and Turn on TV
(1) Put the USB Stick to the USB socket

(2) Automatically detecting update file in USB Stick
* If your downloaded program version in USB Stick is Low,
it didn’t work.
But your downloaded version is High, USB data is
automatically detecting.
(3) Show the message“Copying files from memory”
(4) Updating is staring.
(5)0 Updating Completed, The TV will restart automatically.

After turn on TV, Please press‘IN-STOP’button on ADJ
Remote-control.
※ IF you don’t have ADJ R/C, enter‘Factory Reset’in
OPTION MENU.
(6) When TV turn on, check the Updated version on

Diagnostics MENU.
BLOCK DIAGRAM
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
601
520
501
602
209
200
240
206
208
910
580
590
201
205
305
900
207
204
202
303
203
A9
301
A4
A10
304
302
LV1
300
A12
120
A21
A2
570
- 15 - LGE Internal Use Only

Full SCART Half SCART / COMP1 Option
+5V
+3.3V +3.3V
EU EU
R114 R1112
JK100 10K C119 10K JK101
EU R154 C118 R176
PSC008-02 470 0.1uF 0.1uF
SC2/COMP1_DET PSC008-02
AV/SC1_DET E 16V 16V 470 E
R115 EU READY EU R1107
R136 READY
1K 0 1K
SHIELD EU EU SHIELD
B B
R156 R173
SC1_SOG_IN C 15K 18K Q109 C
23 C Q103 C 23
ISA1530AC1 EU EU ISA1530AC1
AV/SC1_CVBS_IN B EU EU B SC2_CVBS_IN
D103 30V AV_DET C C AV_DET D113 30V
22 R122 C110 C112 R145 R183 Q112 C132 C134 22
READY Q100 330 ATV_OUT DTV/MNT_VOUT Q108 330 R195 R1118 READY
COM_GND 75 27pF 220pF
2SC3052 E EU B B
2SC3052 EU E 2SC3052 220pF 27pF 75 0
COM_GND
EU 50V 50V EU 50V 50V
EU
21 EU EU READY EU EU 21
D104 30V SYNC_IN EU READY C117 C121 SYNC_IN D114 30V
20 E Q104 100uF 100uF E 20
D105 READY30V SYNC_OUT
SC1_VOUT 2SC3052 R157 16V 16V R174 SC2_VOUT SYNC_OUT D115 READY 30V
EU 10K EU EU 10K
19 R150 EU EU R179 R1102 19
READY SYNC_GND2 R120 C111 R144 R153 R177 R187 C131 SYNC_GND2 READY
75 R123 C107 R143 0 220 240 0 R188 C133 R196 75
1000pF 180 180 1000pF
18 EU 470K 100uF 50V
100 EU EU
EU
P_17V EU
EU EU 100 50V 100uF 470K
EU
EU 18
SYNC_GND1 EU 16V 1/4W EU 16V SYNC_GND1
READY READY EU R1117
17 EU EU R151 R178 17
3K 390 0
D106 30V RGB_IO 390 RGB_IO
SC1_FB READY R1468 READY NON_EU
16 EU 16
D107 READY30V R_OUT SC1_R+/COMP1_Pr+> R124
R130
REC_8 R_OUT D116 30V
33
15 75 15
READY EU R166 READY
RGB_GND EU RGB_GND
R163 12K C
14 EU 14
R_GND 7.5K SC2_ID R_GND
SC1_R-/COMP1_Pr- SC1_ID B Q107
EU 2SC3052 R1101
13 R121 R125 C R197 13
D2B_OUT EU 10K R1116 D2B_OUT
10K 2.7K Q105 2.7K
R167 EU 0
12 EU EU B 2SC3052 12K E EU 12
D108 30V G_OUT SC_RE2 EU G_OUT D117 30V
SC1_G+/COMP1_Y+> R164 EU C EU
11 1K 11
READY D2B_IN AV/SC1_L_IN E D2B_IN READY
EU B D112 SC2/COMP1_L_IN
10 SC_RE1 Q106 10
R126 C140 R128 R133 2SC3052 ENKMC2838-T112 R194
G_GND 1000pF 10K R165 C135 R199 G_GND
SC1_G-/COMP1_Y- 470K 12K EU EU R189 10K 1000pF
9 50V EU 1K E 470K 9
30V EU EU EU 12K 50V
D109 ID READY ID D118 30V
READY
8 8
D110 READY30V B_OUT B_OUT D119 READY 30V
SC1_B+/COMP1_Pb+> AV/SC1_R_IN
READY 7 SC2/COMP1_R_IN 7
D111 30V AUDIO_L_IN R127 C141 R131 AUDIO_L_IN D120 READY 30V
470K 1000pF 10K R134
IC100 R193 C136
READY 6
50V EU 12K P_17V R190 10K 1000pF R1100
6 READY
B_GND EU 12K 50V B_GND
5
SC1_B-/COMP1_Pb- READY EU AS324MTR-E1 READY
470K
5
AUDIO_GND AUDIO_GND
4 MNT_L_OUT 4
D100 30V AUDIO_L_OUT DTV_L_OUT OUT1
1 14
OUT4 AUDIO_L_OUT D122 30V
3 R129 R147 C115 R159 R171 C122 3
C105 C129 R192 C137
D101 READY 30V AUDIO_R_IN
1000pF 0
C108 2K C114 27pF 15K 33K 27pF C124 R184
0 1000pF
AUDIO_R_IN D123 READY 30V
4700pF EU 10uF 50V IN1- IN4- EU 10uF 2K 4700pF
2 50V EU EU 50V EU 50V EU 50V 2
2 13
D102 READY 30V AUDIO_R_OUT 50V 16V EU EU 16V AUDIO_R_OUT D124 READY 30V
1 Q101 EU EU Q111 1
READY 2SC3052 R175 READY
R155 SCART1_Lout IN1+ IN4+ SCART2_Lout 10K 2SC3052
EU R146 6.8K 3 12 R186
EU EU
R132 2K EU 2K
C106 C109 R162 R168
EU C130 R191 C138
1000pF 0 EU 5.6K 5.6K
4700pF 4700pF 0 1000pF
50V EU EU VCC GND EU 50V
50V 4 11 50V EU
Close to Jack
SCART1_Rout IN2+ IN3+ SCART2_Rout
5 10 JK105
R103
0 R161 R169 PPJ-230-01
SC1_G+/COMP1_Y+ 5.6K 5.6K [RD]MONO
SC1_G+/COMP1_Y+> EU IN2- IN3- EU 13 NON_EU
READY
R100 C101 C116 6 9
R104 C123
75 27pF 27pF R158 R160 R170 R172 27pF [RD]R_IN
0 50V 15K 6.8K 10K 33K 4
50V 50V
GND SC1_G-/COMP1_Y- DTV_R_OUT EU EU EU OUT2 OUT3 EU EU EU MNT_R_OUT
7 8
[WH]L_IN 5
R105 R148 R185
2K C113 C125 2K
0 10uF 10uF
SC1_B+/COMP1_Pb+> SC1_B+/COMP1_Pb+ EU EU R1111 0 [RD]R
READY 16V 16V 6
R101 C100 EU EU SC1_R+/COMP1_Pr+>
75 R106 27pF NON_EU
Q102 Q110
0 50V R1109 0 [BL]B 7
GND SC1_B-/COMP1_Pb- 2SC3052 2SC3052 SC1_B+/COMP1_Pb+>
EU R149 R182 EU D121 30V
2K 2K NON_EU
[GN]C_DET 8 READY
R108 EU SCART1_MUTE EU
0
SC1_R+/COMP1_Pr+> SC1_R+/COMP1_Pr+
READY R1110 0 [GN]G 9
R102 C102 SC1_G+/COMP1_Y+>
75 R107 NON_EU
27pF
0 50V [GN]GND
GND SC1_R-/COMP1_Pr- 10
11
FIX-TER
+3.3V_CI
CI SLOT +5V_CI_ON
EU
EU IC101 EU
EU AR108 33
C103 C104 CI_ADDR[12] PCM_A[12] TC74LCX244FT C120
22uF 0.1uF 0.1uF
10V 16V CI_ADDR[13] PCM_A[13] 16V
CI_ADDR[14] PCM_A[14] 1OE VCC
1 20
CI_DET EU
REG /PCM_REG 1A1 2OE
JK104 PCM_A[0]
2Y4
2 19
1Y1
EAG41860102 EU CI_ADDR[7] 3 18
CI_ADDR[0]
AR109 33 1A2 2A4
10067972-000LF CI_ADDR[8] PCM_A[8] PCM_A[1]

2Y3
4 17
1Y2
PCM_A[7]
5 16
CI_ADDR[9] PCM_A[9] CI_ADDR[6] CI_ADDR[1]
35 EU AR105 33
EU CI_ADDR[10] PCM_A[10] PCM_A[2]
1A3
6 15
2A3
PCM_A[6]
R112 EU 100 PCM_D[3] 2Y2
7 14
1Y3
/CI_CD1 36 R142 CI_ADDR[11] PCM_A[11] CI_ADDR[5] CI_ADDR[2]

EU PCM_D[4] 10K 1A4
8 13
2A2
EU 37 3 PCM_A[3] PCM_A[5]
AR100 33 PCM_D[5] 2Y1 1Y4
CI_TS_DATA[4] 38 4 EU CI_ADDR[4] 9 12
CI_ADDR[3]
AR107 33
39 5 PCM_D[6] CI_OE /PCM_OE
GND
10 11
2A1
PCM_A[4]
CI_TS_DATA[5]
40 6 PCM_D[7] CI_WE /PCM_WE
CI_TS_DATA[6]
R137 33 EU
CI_TS_DATA[7] 41 7 /PCM_CE CI_IORD /PCM_IORD
EU R138 33 EU
42 8 CI_IOWR /PCM_IOWR
CI_ADDR[10]
R118 43 9 CI_OE
10K CI_ADDR[11] BUF_FE_TS_DATA[0-7] AR110
CI_IORD 44 10 AR101 EU 33 EU
CI_ADDR[9] 33
CI_IOWR 45 11 FE_TS_SYN BUF_FE_TS_SYN
CI_ADDR[8] BUF_FE_TS_DATA[0]
46 12 FE_TS_VAL_ERR BUF_FE_TS_VAL_ERR
BUF_FE_TS_SYN CI_ADDR[13] BUF_FE_TS_DATA[1] FE_TS_DATA[1]
47 13
FE_TS_DATA[0-7]
FE_TS_CLK BUF_FE_TS_CLK
BUF_FE_TS_DATA[0-7]
BUF_FE_TS_DATA[0] CI_ADDR[14] BUF_FE_TS_DATA[2] FE_TS_DATA[2]

48 14
BUF_FE_TS_DATA[1] BUF_FE_TS_DATA[3] FE_TS_DATA[3]
49 15 CI_WE
BUF_FE_TS_DATA[2] READY 50 16 R141 EU 100
/PCM_IRQA AR102
BUF_FE_TS_DATA[3] R119 33
51 17 EU
0 R135 0 BUF_FE_TS_DATA[4] FE_TS_DATA[4]
52 18
BUF_FE_TS_DATA[5] FE_TS_DATA[5]
53 19 READY
BUF_FE_TS_VAL_ERR BUF_FE_TS_DATA[6] FE_TS_DATA[6]
BUF_FE_TS_DATA[4] EU 54 20 BUF_FE_TS_CLK
BUF_FE_TS_DATA[5] CI_ADDR[12] BUF_FE_TS_DATA[7] FE_TS_DATA[7] +5V_CI_ON
R116 55 21 +5V EU EU
BUF_FE_TS_DATA[6] 10K CI_ADDR[7] FE_TS_DATA[0-7] Q114 L101
56 22 120-ohm
BUF_FE_TS_DATA[7] CI_ADDR[6] RSR025P03
BUF_FE_TS_DATA[0-7] 57 23 CI Part
CI_ADDR[5] S D
R110 EU 33 58 24
PCM_RST CI_ADDR[4]
R111 EU 33 59 25
/PCM_WAIT CI_ADDR[3] EU
60 26 G C139 R1122
REG CI_ADDR[2] 0.1uF
AR103 33 10K
CI_TS_CLK 61 27 EU 16V
CI_ADDR[1] READY
EU 62 28 R1114
CI_TS_VAL R1105
READY AR106 33 CI_ADDR[0] 10K
CI_TS_SYNC 63 29 10K
R117 EU PCM_D[0]
+5V READY
64 30
0 PCM_D[1] +3.3V_CI +3.3V_CI
AR104 33 65 31
IC102 3.3V_CI
CI_TS_DATA[0] 66 32 PCM_D[2] EU EU
EU R198 R1103 KIC7SZ32FU
CI_TS_DATA[1] 67 33 CI_ADDR[0-14] 10K 10K EU +3.3V +3.3V_CI
CI_TS_DATA[2] 68 34 EU R1115
/CI_CD2
IN_B 1
EU
5 VCC
R1120 EU
CI_TS_DATA[3] 2K L100
IN_A 2 10K
2
G2 69 G1
1 /CI_CD1 120-ohm
R113 100 C CI Part
/CI_CD2 GND 3 4 OUT_Y
EU EU
PCM_D[0-7] CI_DET EU EU
EU PCM_D[0-7] EU B Q113
R1119 R1121 PCM_5V_CTL 2SC3052
33 33 R1104 R1106 EU EU
10K EU C126 C128
/PCM_CD 0 E
R1108 0.1uF 0.1uF
10K 16V 16V
CI DETECT CI POWER ENABLE CONTROL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2R_S7R 2010-08-31
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
SCART/COMP1
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. CI Slot 1
Copyright © 2011 LG Electronics Inc. All rights reserved.

Only for training and service purposes LGE Internal Use Only
S7_TXD
5V_HDMI_2 5V_DET_HDMI_2 5V_HDMI_3 5V_DET_HDMI_3 HDMI RS232C R295 0

S7_RXD
HDMI_1 HDMI_2 SIDE_HDMI 5V_HDMI_4 5V_DET_HDMI_4

PM_TXD
+3.3V_ST
C
R212 C C For CEC +3.3V_ST +3.3V_ST
10K SHIELD R236 BODY_SHIELD R258 C245
SHIELD Q200 B PM_RXD
2SC3052 HPD2 Q201 B 10K Q202 B 10K 0.1uF
R225 1K HPD3 HPD4 JK203 R297 0
IC203 16V
R200 1K 20 2SC3052 R248 1K 2SC3052
20
20 E SPG09-DB-009 R290 R291 MAX3232CDR
E E 10K 10K
19 19
19 R226 1.8K R249 1.8K
R201 1.8K 1
18 18 R220 R1434 VCC C1+
18 R204 100 16 1 R1206
R229 R252 56K R269
3.3K 3.3K 3.3K 6 232C_NO6 C244 10K
17 R230 33 17 0.1uF
17 R253 33 27K R288 100 READY
MMBD301LT1G
R205 33 DDC_SDA_3 DDC_SDA_4 2 GND V+ 16V
DDC_SDA_2 16 READY 15 2
16
16 R231 33 R254 33
R206 33 DDC_SCL_3 DDC_SCL_4 D228 C241
DDC_SCL_2 15 R221 7 30V R289
15 D218 DOUT1 C1- 0.1uF
15 0 READY READY 100
30V 3 14 3 16V
14 14 READY R268
14 CEC_REMOTE 0
CEC_REMOTE CEC_REMOTE CEC_REMOTE 8 D229 RIN1 C2+
13 13 C232
13 CEC_REMOTE_S7 30V 13 4
CK-_HDMI3 220pF
CK-_HDMI2 12 12 CK-_HDMI4 S B D 4 50V
READY C242
12 READY 0.1uF
D219 9 ROUT1 C2- 16V
11 11 12 5
11 CK+
CK+_HDMI3
CK+ READY Q203 C233
CK+ 10 10 5 220pF
10 CK+_HDMI2
D0-
CK+_HDMI4 BSS83 50V
DIN1 V-
D0- READY
D0- 9 D0-_HDMI3 9 10 11 6 R1436 232C_NO4
9 D0-_HDMI2 D0-_HDMI4 R1435 100
D0_GND D0_GND 100
D0_GND 8 8 232C_NO4 UART_TXD_3D
8 G R273 0 NON_RGB DIN2 DOUT2 C243
D0+ D0+ 10 7 0.1uF
D0+ 7 D0+_HDMI3 7 PC_SER_DATA
7 D0+_HDMI2 D0+_HDMI4 16V
D1- R274 0 NON_RGB UART_RXD_3D R1437
D1- PC_SER_CLK 232C_NO6
D1- 6 D1-_HDMI3 6 ROUT2 RIN2 100
6 D1-_HDMI2 D1-_HDMI4 9 8
D1_GND D1_GND
D1_GND 5 5 D226 D227
5 30V 30V
D1+ D1+
D1+ 4 D1+_HDMI3 4 READY READY
4 D1+_HDMI2 D1+_HDMI4
D2- D2-
D2- 3 D2-_HDMI3 3
3 D2-_HDMI2 D2-_HDMI4
D2_GND D2_GND
D2_GND 2 2
2
D2+ D2+
D2+ 1 D2+_HDMI3 1
1 D2+_HDMI2 D2+_HDMI4
D200 D207
READY D212
JK201 READY
JK200 JK202 READY
HDMI2 HDMI Side
HDMI1
EAG59023302
5V_HDMI_2 +5V EAG59023301
5V_HDMI_3 +5V EAG62611201
5V_HDMI_4 +5V SPDIF
+5V +5V
A2
A1
A2
A1
A2
A1
ENKMC2838-T112 ENKMC2838-T112
D205 D208 ENKMC2838-T112
D213
C
HDMI1
C
HDMI2 HDMI Side R292
C
IC204
IC200 EDID_WP IC201 IC202 C235
1K NL17SZ00DFT2G
AT24C02BN-SH-T AT24C02BN-SH-T AT24C02BN-SH-T JK204 0.1uF READY READY
EDID_WP 16V
R207
R232
EDID_WP JST1223-001 VCC A
10K R255 5 1 SPDIF_OUT
10K 10K NAND B
A0 VCC A0 VCC A0 VCC GND 2
GATE
1
1 8
Fiber Optic
1 8 1 8 Y GND
4 3
$0.055 $0.055 R293
A1 WP $0.055 R233 R234 VCC 100
R208 R209 A1 WP A1 WP C234 C236
2
2 7 2 7 2 7 R256 R257 READY
10K 10K 0.1uF 10pF
10K 10K
10K 10K 16V 50V
A2 SCL JP200 JP203 JP206 VINPUT READY
A2 SCL A2 SCL R296
3
3 6 3 6 3 6
DDC_SCL_2 DDC_SCL_3 DDC_SCL_4 100
4
R203 22 R250 22
R228 22
GND SDA GND SDA GND SDA FIX_POLE
4 5 4 5 4 5
DDC_SDA_2 DDC_SDA_3 DDC_SDA_4
R202 22
R227 22 R251 22
RGB PC
+3.3V COMPONENT2 SIDE CVBS
Close to Jack
Close to Jack +3.3V
JK205 R217
R224 COMP2_Pr+> R279 R282 COMP2_Pr+
10K 75
SPG09-DB-010 1K 0
DSUB_DET JK210
PPJ234-02 C228
R241 10pF R294
50V 10K
D206 C210
0 [GN]E-LUG +3.3V D223 READY R1203
DSUB_R+> DSUB_R+ 1K
30V 0.1uF C216 6A 30V SIDEAV_DET
RED_GND READY 16V R238
R242 10pF [GN]O-SPRING READY COMP2_Pr-
JK207
6 75 C237
READY COMP2_Y+> R264 D230
GND_2 0 50V
DSUB_R- 5A 10K R271
PPJ235-01 30V
0.1uF
1 11 RED READY [GN]CONTACT 1K COMP2_DET R283 READY
16V
DSUB_R+> 0
GREEN_GND D210 4A READY R280 R284 COMP2_Y+ 5A [YL]E-LUG
7 DDC_DATA 30V [BL]E-LUG-S D220 COMP2_Y+>
75 0
2 12 RGB_DDC_SDA READY 30V R270 SIDEAV_CVBS_IN
GREEN 7B 10K C229 4A
DSUB_G+> AV/COMP2_DET [YL]O-SPRING D231 R1200 C240
BLUE_GND R243 [BL]O-SPRING 10pF
8 R218 0 COMP2_Pb+> D224 50V 30V 75 27pF
H_SYNC 33 DSUB_B+ 5B 30V READY READY 50V
DSUB_HSYNC DSUB_B+> READY R272 3A [YL]CONTACT
3 13 BLUE C217 [RD]E-LUG-S D221 1K READY COMP2_Y-
DSUB_B+> R239 10pF
75 R244 30V
NC R219 0 50V 7C 4B
9 33 DSUB_B- R285 [WH]O-SPRING R1201
V_SYNC READY [RD]O-SPRING_1 0 10K
4 14 DSUB_VSYNC COMP2_Pr+> SIDEAV_L_IN
GND_1 D211 5C 3C
R281 R286 COMP2_Pb+ [RD]CONTACT
SYNC_GND 30V [RD]CONTACT_1 COMP2_Pb+> D232 R298 C239 R1204
10 READY 75 0 30V 470K 1000pF 12K
DDC_CLOCK 4C 4C 50V
RGB_DDC_SCL [RD]O-SPRING READY
5 15 DDC_GND R245 [WH]O-SPRING R261 10K COMP2_L_IN C230
10pF
C209 C211 0 D225 50V R1202
5D R259 C224 R265 READY 5C 10K
10pF 10pF DSUB_G+> DSUB_G+ D215 30V [RD]E-LUG
C218 [RD]CONTACT_2 470K 1000pF 12K SIDEAV_R_IN
50V 50V 30V READY COMP2_Pb-
16 R240
R246 10pF 4E READY
50V
R299 C238 R1205
75 R262 10K D233
0 50V [RD]O-SPRING_2 COMP2_R_IN 470K 1000pF 12K
DSUB_G- R287 30V 50V
SHILED READY 0 READY
5E D216 C225
D209 R260 R266
30V [RD]E-LUG 30V 470K 1000pF 12K
READY READY 50V
6E
GND R211
10
PC_SER_DATA
C204 C207
D204 220pF
220pF
30V 50V 50V
READY READY R210 READY
10 +3.3V
PC_SER_CLK
C203
C208
SWITCH ADDED
D201
220pF
50V
220pF SIDE USB IC206 +3.3V
30V READY 50V
READY READY AP2191SG-13
R267
Capacitors on VBUSA should be
PC AUDIO placed as closd to connector as possible.
10K NC
8 1
GND R277
10K
+5V
OUT_2 IN_1
JK209 7
$0.11
2 READY
JK208 3AU04S-305-ZC-(LG) C222 C223 USB1_OCD R263 OUT_1
6 3
IN_2
0.1uF 100uF 33
PEJ027-01 RGB EDID +5V_ST 16V 16V
FLG
5 4
EN
1
E_SPRING
USB DOWN STREAM
3
IC205 R278 USB1_CTL
2
6A T_TERMINAL1 AT24C02BN-SH-T SIDE_USB_DM 33

R215
B_TERMINAL1 10K
7A
3
PC_R_IN R235 C219 SIDE_USB_DP

1 8 10K R237 0.1uF
R247
4 R_SPRING D202 10K 10K 16V D214 D217
C205
30V R213 R222 30V 30V
4
1000pF 2 7
READY 50V 470K 12K READY READY
5 T_SPRING EDID_WP
5
3 6
R216 RGB_DDC_SCL
B_TERMINAL2 10K
10mm
7B
PC_L_IN
4 5 RGB_DDC_SDA
T_TERMINAL2 D203 C206 R214
6B 30V 1000pF R223 C214 C215
470K 12K 10pF
READY 50V 10pF
50V 50V

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR HDMI/RGB/RS232C/USB
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. COMP2/Side CVBS/SPDIF 2

H-NIM Tuner Audio AMP
+3.3V
R370
10K
READY R373 @compC
0
C READY
R367
TU300 10K B 19 18
+5V_TU AMP_MUTE Q303
TDTJ-S001D READY 2SC3052 EAPD/OUT4B OUT3A/FFX3A
READY
+5V_TU R341
E
R374
20 17
ANT_PWR[OPT] 470
R344
82
0 TWARN/OUT4A OUT3B/FFX3B
1 TU_SIF C331
BST_CNTL 0.1uF 21 16
2 50V VDD_DIG_1 CONFIG
ISA1530AC1 C335
+B Q300 22 15
3 +3.3V_TU R338 0.1uF
NC[RF_AGC] C304 C307 4.7K
GND_DIG_1 VDD 50V
4 0.1uF 22uF AC_DET
AS 16V 10V 22 R375
23 14
5 R326
R365 PWRDN GND_REG
R319 1.2K
SCL R313 22 1.2K 2.2 24 13 R381 L302 C347 C351
6 TU_SCL 10.0uH
SDA +5V_TU
VDD_PLL OUT1A 20 0.22uF 1000pF
7 R314 22 R371 50V 50V
TU_SDA 25 12
SMAW250-H04R
C305 C306 2K C333 C345
NC[IF_TP] C301 C327
8 0.1uF 10pF 10pF R345 R349 0.1uF 680pF
50V
FILTER_PLL GND1 C336 1uF 25V 0.22uF
R343 200 200 16V C328 C342 50V 4
SIF 16V 50V 50V 4700pF C348 C352
9 READY READY 0 R366 50V 26 11 C337 0.1uF 50V 330pF
L303 0.22uF 1000pF
TU_CVBS GND_PLL VCC1 50V 10.0uH
P301
NC READY 0 Close-by 50V 50V
27Close-by
10 AUD_MASTER_CLK C355 3
VIDEO READY 22pF 22 R376
10
11 E 50V XTI OUT1B
Q301 AUD_SCK C356
GND +3.3V_TU 28 9 L304 2
12 +1.26V_TU +3.3V_TU ISA1530AC1
READY 22pF 22 R377 C343 10.0uH
1.2V
B
50V
BICKI OUT2A C338 1uF 25V 330pF C349 C353
13 AUD_LRCK 50V 0.22uF 1000pF
C C357
3.3V READY 22pF 22 R378
29 8 C339 0.1uF 50V C346
0.22uF 50V 50V 1
14 R335 50V
LRCKI VCC2 50V
RESET
10K +5V_TU AUD_LRCH C358 R382 C350 C354
15 Close to Tuner R334 100
TUNER_RESET READY 22pF 22 R379
30 7 20 L305 0.22uF 1000pF
50V SDI GND2 10.0uH
16
IF_AGC_CNTL C308 R342
0
R346
200
R348
200 AMP_RESET_N
Close-by 50V 50V
(Should be guarded by GND) IF_AGC_MAIN 0.1uF
READY EU EU 31 6 P_17V C340
DIF_1 16V 22 R380 C341 C344
17 IF_N_MSTAR
ATV_OUT RESET OUT2B 0.1uF 68uF 68uF
50V 35V
DIF_2 C334 35V
18 IF_P_MSTAR
R359 2K
R315 32 5 0.1uF READY
22 INT_LINE VCC_REG 50V
THERMAL
- Should be guarded by GND AMP_SDA
19 C300 C302
- No Via ISA1530AC1
R360 2K R316 33 4
0.1uF 0.1uF
- Width(Signal) : min 12mm Q302 22 SDA VSS
37
SHIELD 16V 16V EU
GND(Signal) : min 24mm AMP_SCL
34 3
SCL TEST_MODE
R372 35 2
10K GND_DIG_2 SA
C329 C332 36 Close-by 1
0.1uF 0.1uF
VDD_DIG_2 GND_SUB
50V
50V
[EP]GND
STA368BWG
IC303
LVDS Key/IR
SDA_3.3V_MOD
SCL_3.3V_MOD
+3.3V
PC_SER_DATA
PC_SER_CLK
UART_RXD
UART_TXD
P602
DISP_EN
12507WS-15L
TCLK2P
TCLK2N
TCLK1P
TCLK1N
R809
TE2P
TE2N
TD2P
TD2N
TC2P
TC2N
TB2P
TB2N
TA2P
TA2N
TE1P
TE1N
TD1P
TD1N
TC1P
TC1N
TB1P
TB1N
TA1P
TA1N
R781 R807
2.2K 0 4.7K
IR 1
G
+3.3V_ST C648
0
0
10pF
P_SDA S
SDA_3.3V_MOD 2
D
Q701 R632 R634 R628 R639
R836
R835
10K 10K 10K 10K

2N7002(F)
KEY1 3
+3.3V
KEY2 4
C 5
R780 R806 R808 R629
0 4.7K 4.7K ZD601
2.2K B Q602 5.6B
LED_RED
2SC3052
+3.3V_ST
TF05-51S
6
G
E
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
R633 R635
P701
4.7K 4.7K R630

22
HD
7
52
P_SCL SCL_3.3V_MOD SUB_SCL

S
R631
Q700 22
2N7002(F) SUB_SDA 8
C645 C649
10pF 10pF
+3.3V_ST READY READY
9
LVDS_DATA_2_E+ R794 2D 0 R822 2D 0

TE2P 10
R795 2D 0 R823 2D 0
LVDS_DATA_2_E- TE2N
LVDS_DATA_2_D+ R796 2D 0 R824 2D 0 C646
TD2P 0.1uF
LVDS_DATA_2_D- R797 2D 0 R825 2D 0 11
TD2N 16V
R798 2D 0 R826 2D 0
TCLK4P
TCLK4N
LVDS_CLK_2+
UART_RXD
UART_TXD
TCLK2P
SDA_3.3V_MOD
SCL_3.3V_MOD
2D R827 2D
TE4P
TE4N
TD4P
TD4N
TC4P
TC4N
TB4P
TB4N
TA4P
TA4N
R799 0 0
PC_SER_DATA
LVDS_CLK_2- TCLK2N 12
PC_SER_CLK
LVDS_DATA_2_C+ R800 2D 0 R828 2D 0

TC2P
R801 2D 0 R829 2D 0
DISP_EN
LVDS_DATA_2_C- TC2N
2D R830 2D
TCLK3P
TCLK3N
TCLK2P
TCLK2N
TCLK1P
TCLK1N
LVDS_DATA_2_B+ R802 0 0 13
TB2P TOUCH_VER_CHK
TE3P
TE3N
TD3P
TD3N
TC3P
TC3N
TB3P
TB3N
TA3P
TA3N
TE2P
TE2N
TD2P
TD2N
TC2P
TC2N
TB2P
TB2N
TA2P
TA2N
TE1P
TE1N
TD1P
TD1N
TC1P
TC1N
TB1P
TB1N
TA1P
TA1N
R803 2D 0 R831 2D 0
LVDS_DATA_2_B- TB2N
LVDS_DATA_2_A+ R804 2D 0 R832 2D 0
TA2P 14
R805 2D 0 R833 2D 0
LVDS_DATA_2_A- TA2N
0
0
LVDS_DATA_1_E+ R782 2D 0 R810 2D 0

TE1P
R842
R849
R783 2D 0 R811 2D 0 15
LVDS_DATA_1_E- TE1N
LVDS_DATA_1_D+ R784 2D 0 R812 2D 0
TD1P
R785 2D 0 R813 2D 0 16
LVDS_DATA_1_D- TD1N
LVDS_CLK_1+ R786 2D 0 R814 2D 0
TCLK1P
R787 2D 0 R815 2D 0
LVDS_CLK_1- TCLK1N
104060-8017
LVDS_DATA_1_C+ R788 2D 0 R816 2D 0

TC1P
R789 2D 0 R817 2D 0
LVDS_DATA_1_C- TC1N
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
2D R818 2D 0

R790 0
P703
LVDS_DATA_1_B+ TB1P
FHD
R791 2D 0 R819 2D 0
81
LVDS_DATA_1_B- TB1N
LVDS_DATA_1_A+ R792 2D 0 R820 2D 0
TA1P
R793 2D 0 R821 2D 0
LVDS_DATA_1_A- TA1N

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Tuner/Audio Amp
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS / Key-IR 3

VIDEO/AUDIO L400 +3.3V_AVDD
120-ohm
POWER
R463 1K Main
IC400
IC400 R462 10K LGE101DC-R [S7R DIVX/MS10]
LGE101DC-R [S7R DIVX/MS10] IF_AGC_MAIN PCM_D[0-7]
C449
0.1uF
C447 C464 PCM_D[0] U22 N21
0.01uF 0.01uF PCM_D0 TCON0/POL
F1 W2 PCM_D[1] T21 M21
5V_DET_HDMI_2
A_RXCP VIFP 50V 50V PCM_D1 TCON2/GSP_R/GCLK1
F2 W1 PCM_D[2] T22 L22
5V_DET_HDMI_4
A_RXCN VIFM PCM_D2 TCON4/CPV/GSC/GCLK3
G2 PCM_D[3] AB18 L21
5V_DET_HDMI_3
A_RX0P PCM_D3 TCON6/FLK
G3 V2 R464 100 C452 0.1uF PCM_A[0-14] PCM_D[4] AC18 P21
SIDEAV_DET
A_RX0N IP IF_P_MSTAR PCM_D4 TCON8/CS2/FLK3
H3 V1 R465 100 C453 0.1uF PCM_D[5] AC19
A_RX1P IM IF_N_MSTAR PCM_D5
G1 PCM_D[6] AC20
A_RX1N PCM_D6
H1 Y2 C430 0.1uF R472 47 TU_SIF PCM_D[7] AC21 K21 R446 0
A_RX2P SSIF/SIFP PCM_D7 GPIO36/UART3_RX 3D_RF_RXD
H2 Y1 C431 0.1uF R473 47 L23 R492 0
A_RX2N SSIF/SIFM GPIO37/UART3_TX 3D_RF_TXD
F5 PCM_A[0] U21 K20 3D_RFMODULE_RESET
3D_RFMODULE_DD DDCDA_DA/GPIO24 C456 PCM_A0 GPIO38
F4 U3 PCM_A[1] V21 L20 SC2/COMP1_DET
3D_RFMODULE_DC DDCDA_CK/GPIO23 QP 1000pF PCM_A1 GPIO39
E6 V3 PCM_A[2] Y22 M20
AV/SC1_DET
PCM_5V_CTL HOTPLUGA/GPIO19 QM READY PCM_A2 GPIO40
PCM_A[3] AA22 G20
ERROR_DET
PCM_A3 GPIO41
D3 Y5 PCM_A[4] R22 G19
TUNER_RESET
CK+_HDMI2 B_RXCP IFAGC Close to MStar PCM_A4 GPIO42
C1 Y4 R477 0 PCM_A[5] R21
CK-_HDMI2 B_RXCN RF_TAGC AMP_SCL PCM_A5
22
D1 R478 0 AMP_SDA PCM_A[6] T23 F20 R493 UART_RXD +1.26V_VDDC
D0+_HDMI2 B_RX0P PCM_A6 GPIO50/UART1_RX
D2 U1 PCM_A[7] T24 F19 R494 22 UART_TXD
D0-_HDMI2 B_RX0N TGPIO0/UPGAIN DEMOD_SCL PCM_A7 GPIO51/UART1_TX
IC400
D1+_HDMI2
E2 U2 PCM_A[8] AA23
B_RX1P TGPIO1/DNGAIN DEMOD_SDA PCM_A8 +3.3V_AVDD LGE101DC-R [S7R DIVX/MS10]
D1-_HDMI2
E3 R3 PCM_A[9] Y20 E7 R436 100 AC_DET
B_RX1N TGPIO2/I2C_CLK TU_SCL PCM_A9 GPIO6/PM0/INT0 READY
F3 T3 PCM_A[10] AB17 D7
D2+_HDMI2 B_RX2P TGPIO3/I2C_SDA
R458 X400 TU_SDA PCM_A10 GPIO7/PM1/PM_UART_TX PM_TXD R471
E1 PCM_A[11] AA21 E11
D2-_HDMI2 B_RX2N 1M 24MHz +3.3V_AVDD PCM_A11 GPIO8/PM2 LED_RED 3.3K
D4 T2 C450 27pF PCM_A[12] U23 G9 EDID_WP H11 G18
DDC_SDA_2 DDCDB_DA/GPIO26 XTALIN PCM_A12 GPIO9/PM3 5V_ON VDDC_1 GND_1
E4 T1 PCM_A[13] Y23 F9 H12 H9
DDC_SCL_2 DDCDB_CK/GPIO25 XTALOUT C451 27pF R1411 PCM_A13 GPIO10/PM4 RL_ON VDDC_2 GND_2
D5 R1412 PCM_A[14] W23 C5 H13 H10
HPD2 HOTPLUGB/GPIO20 3.3K PCM_A14 GPIO11/PM5/PM_UART_RX/INT1 PM_RXD VDDC_3 GND_3
3.3K E8 R496 33 C H14 H18
PM_SPI_CS1/GPIO12/PM6 /SPI_CS VDDC_4 GND_4
AA2 G14 R1408 22 /PCM_REG W22 E9 C469 0.1uF H15 H19
CK+_HDMI4 C_RXCP SPDIF_IN/GPIO177 P_SDA +5V PCM_REG_N PM_SPI_WP1/GPIO13/PM7
R437 10K /FLASH_WP B Q400 VDDC_5 GND_5
AA1 G13 R476 100 F7 C470 0.1uF J12 J10
CK-_HDMI4 C_RXCN SPDIF_OUT/GPIO178 SPDIF_OUT PM_SPI_WP2/GPIO14/PM8/INT2
2SC3052 VDDC : 2026mA VDDC_6 GND_6
AB1 AA17 F6 R468 22 3D C471 0.1uF J13 J17
D0+_HDMI4 C_RX0P /PCM_OE PCM_OE_N GPIO15/PM9
READY 3D_RF_GPIO0 VDDC_7 GND_7
AA3 V22 D8 R456 0 +1.26V_VDDC C472 0.1uF J14 J18
D0-_HDMI4 C_RX0N /PCM_WE PCM_WE_N PM_SPI_CS2/GPIO16/PM10
READY E VDDC_8 GND_8
D1+_HDMI4
AB3 B7
/PCM_IORD W21 G12 R445 0 C473 0.1uF J15 J19
C_RX1P DM_P0 PCM_IORD_N GPIO17/PM11/INT3 VDDC_9 GND_9
D1-_HDMI4
AB2 A7
/PCM_IOWR Y21 F10 C474 0.1uF J16 K9
C_RX1N DP_P0 R481 R479 PCM_IOWR_N GPIO18/PM12/INT4 L401 VDDC_10 GND_10
AC2
10K C475 10uF L18 K10
D2+_HDMI4 C_RX2P 10K 120-ohm VDDC_11 GND_11
AC1 AF17
SIDE_USB_DM
AA20 D9 R497 33 SPI_SCK Main C476 0.1uF K11
D2-_HDMI4 C_RX2N DM_P1 /PCM_CE PCM_CE_N PM_SPI_CK/GPIO1 GND_12
AB4 AE17
SIDE_USB_DP /PCM_IRQA V23 D11 MIU0VDDC H16 K12
DDC_SDA_4 DDCDC_DA/GPIO28 DP_P1 PCM_IRQA_N GPIO0/PM_SPI_CZ A_DVDD GND_13
AA4
/PCM_CD P23 E10
SPI_SDI MIU1VDDC K19 K13
DDC_SCL_4 DDCDC_CK/GPIO27 PCM_CD_N PM_SPI_DI/GPIO2
10uF B_DVDD GND_14
AC3
/PCM_WAIT R23 D10 R498 33 SPI_SDO C478 K14
HPD4 HOTPLUGC/GPIO21
F14
PCM_WAIT_N PM_SPI_DO/GPIO3 L402 C477 0.1uF GND_15
K15
AR401 P22 L19
I2S_IN_BCK/GPIO175 SUB_SDA PCM_RST 22 PCM_RESET 120-ohm C479 0.1uF VDDC_12 GND_16
A2 F13 R1401 22 Main M18 K16
CK+_HDMI3 A3
D_RXCP I2S_IN_SD/GPIO176
F15
P_SCL C457 C458 AA9 C480 0.1uF M19
VDDC_13 GND_17
K17
CK-_HDMI3 D_RXCN I2S_IN_WS/GPIO174 SUB_SCL 0.1uF 0.1uF TS0_CLK CI_TS_CLK VDDC_14 GND_18
B3 AC17 AA5 N18 K18
D0+_HDMI3 D_RX0P READY /PF_CE0 PCM_PF_CE0Z TS0_VLD CI_TS_VAL CI_TS_DATA[0-7] VDDC_15 GND_19
A1 D20 AR400 AB20 AA10 N19 L9
D0-_HDMI3 D_RX0N I2S_OUT_BCK/GPIO181 AUD_SCK /PF_CE1 22 PCM_PF_CE1Z TS0_SYNC CI_TS_SYNC VDDC_16 GND_20
B1 E20 AA18 N20 L10
D1+_HDMI3 D_RX1P I2S_OUT_MCK/GPIO179 AUD_MASTER_CLK /PF_OE PCM_PF_OEZ VDDC_17 GND_21
D1-_HDMI3
B2 D19
/PF_WE AB21 AB5 CI_TS_DATA[0] P18 L11
D_RX1N I2S_OUT_SD/GPIO182 AUD_LRCH +3.3V_AVDD PCM_PF_WEZ TS0_D0 VDDC_18 GND_22
C2 F18
PF_ALE AB19 AC4 CI_TS_DATA[1] P19 L12
D2+_HDMI3 D_RX2P I2S_OUT_SD1/GPIO183 MODEL_OPT_3 PCM_PF_ALE TS0_D1 VDDC_19 GND_23
C3 E18
/PF_WP AD17 Y6 CI_TS_DATA[2] P20 L13
D2-_HDMI3 D_RX2N I2S_OUT_SD2/GPIO184 USB1_OCD PCM_PF_AD[15] TS0_D2
C487 10uF VDDC_20 GND_24
B4 D18
/F_RB AA19 AA6 CI_TS_DATA[3] L14
DDC_SDA_3 DDCDD_DA/GPIO30 I2S_OUT_SD3/GPIO185 USB1_CTL PCM_PF_RBZ TS0_D3 GND_25
C4 E19
AUD_LRCK
W6 CI_TS_DATA[4] Y12 L15
DDC_SCL_3 DDCDD_CK/GPIO29 I2S_OUT_WS/GPIO180 TS0_D4 NC_13 GND_26
E5
R480 AA7 CI_TS_DATA[5] L16
HPD3 HOTPLUGD/GPIO22 R482 TS0_D5 GND_27
D6
2.2K 2.2K S7_TXD R483 22 M23 Y9 CI_TS_DATA[6] L17
CEC_REMOTE_S7 CEC/GPIO5
C435 2.2uF UART_TX2/GPIO65 TS0_D6 GND_28
N1
S7_RXD R484 22 N23 AA8 CI_TS_DATA[7] J11 M9
LINE_IN_0L
C436 AV/SC1_L_IN UART_RX2/GPIO64 TS0_D7
C488 1uF AVDD1P2 GND_29
P3 2.2uF L7 M10
R402 22 LINE_IN_0R
C437 2.2uF AV/SC1_R_IN DVDD_NODIE GND_30
G5 P1
I2C_SDA R485 22 M22 AC5 M11
DSUB_HSYNC R403 22 HSYNC0 LINE_IN_1L
C438 SC2/COMP1_L_IN DDCR_DA/GPIO71 TS1_CLK FE_TS_CLK C489 0.1uF GND_31
G6 P2 2.2uF I2C_SCL R486 22 N22 AC6 FE_TS_DATA[0-7] AVDD2P5/ADC2P5:162mA M12
DSUB_VSYNC R404 33 C401 0.047uF K1
VSYNC0 LINE_IN_1R
P4 C439 2.2uF SC2/COMP1_R_IN DDCR_CK/GPIO72 TS1_VLD
AB6
FE_TS_VAL_ERR GND_32
M13
H7
DSUB_R+ RIN0P LINE_IN_2L SIDEAV_L_IN TS1_SYNC FE_TS_SYN +2.5V_AVDD AVDD2P5_ADC_1 GND_33
R405 68 C402 0.047uF L3 P5 C440 2.2uF R487 22 A5 J7 M14
DSUB_R- RIN0M LINE_IN_2R SIDEAV_R_IN RGB_DDC_SDA DDCA_DA/UART0_TX AVDD2P5_ADC_2 GND_34
R406 33 C403 0.047uF K3 R6 C441 2.2uF R488 22 B5 AC10 FE_TS_DATA[0] J8 M15
DSUB_G+ GIN0P LINE_IN_3L COMP2_L_IN RGB_DDC_SCL DDCA_CK/UART0_RX TS1_D0 AVDD25_REF GND_35
R407 68 C404 0.047uF K2 T6 C442 2.2uF AB10 FE_TS_DATA[1] M16
DSUB_G- R408 33 C405 0.047uF GIN0M LINE_IN_3R COMP2_R_IN TS1_D1 AU25:10mA GND_36
J3 U5 C443 2.2uF AC9 FE_TS_DATA[2] C490 0.1uF M17
DSUB_B+ R409 68 C406 0.047uF BIN0P LINE_IN_4L PC_L_IN TS1_D2 GND_37
J2 V5 C444 2.2uF K23 AB9 FE_TS_DATA[3] L8 N10
DSUB_B- R410 0 C407 1000pF BIN0M LINE_IN_4R
C445 PC_R_IN PWM0 PWM0/GPIO66 TS1_D3 AVDD_AU25 GND_38
J1 U6 2.2uF READY K22 AC8 FE_TS_DATA[4] N11
SOGIN0 LINE_IN_5L
C446 PWM1 PWM1/GPIO67 TS1_D4
L404
GND_39
V6 2.2uF READY G23 AB8 FE_TS_DATA[5] C491 10uF N12
R400 R401 LINE_IN_5R AV/COMP2_DET PWM2/GPIO68 TS1_D5 120-ohm GND_40
10K 10K G22 AC7 FE_TS_DATA[6] Main C492 0.1uF W15 N13
SC_RE2 PWM3/GPIO69 TS1_D6 PVDD_1 GND_41
G4 G21 AB7 FE_TS_DATA[7] AVDD2P5 Y15 N14
SC1_ID HSYNC1 PWM4/GPIO70 TS1_D7 PVDD_2 GND_42
H6 U4 C493 0.1uF N15
SC1_FB R411 33 C408 0.047uF VSYNC1 LINE_OUT_0L R459 100 GND_43
K5 W3
SCART1_Lout AVDD25_PGA U8 N16
SC1_R+/COMP1_Pr+ R412 68 C409 0.047uF K4
RIN1P LINE_OUT_2L
W4 C6 D12
AVDD25_PGA GND_44
N17
SC1_R-/COMP1_Pr- RIN1M LINE_OUT_3L SCART2_Lout KEY1 SAR0/GPIO31 MPIF_CLK L405 AVDD25_PGA:13mA GND_45
R413 33 C410 0.047uF J4 V4 R474 100 B6 D14
120-ohm P10
SC1_G+/COMP1_Y+ R414 C411 GIN1P LINE_OUT_0R
R475 100 KEY2 SAR1/GPIO32 MPIF_CS_N
+3.3V_AVDD Main C494 10uF GND_46
68 0.047uF K6 Y3
SCART1_Rout
C8 M8 P11
SC1_G-/COMP1_Y- R415 33 0.047uF GIN1M LINE_OUT_2R TOUCH_VER_CHK SAR2/GPIO33
R491 1K C495 0.1uF AVDD_NODIE GND_47
C412 H4 W5
SCART2_Rout
C7 E14
C496 P12
SC1_B+/COMP1_Pb+ R416 68 0.047uF BIN1P LINE_OUT_3R SC2_ID SAR3/GPIO34 MPIF_BUSY VDD33_DVI:163mA 0.1uF GND_48
C413 J6 R495 100 A6
C497 0.1uF P13
R439 22K
R442 22K
SC1_B-/COMP1_Pb- BIN1M AMP_MUTE SAR4/GPIO35 GND_49

R455 22K
R457 22K
C432 0.01uF
C433 0.01uF
C467 0.01uF
C468 0.01uF
C414 1000pF J5 R4 E12 VDD33_DVI N9 P14

SC1_SOG_IN SOGIN1 MIC_DET_IN MPIF_D0 AVDD_DVI_1 GND_50
R417 0 T5 F12 +3.3V_ST P9 P15
MICCM
R5
MPIF_D1
D13 L406Main C498 0.1uF N8
AVDD_DVI_2 GND_51
P16
NON_EU MICIN MPIF_D2 120-ohm C499 0.1uF AVDD3P3_CVBS GND_52
H5 E13 AVDD_DMPLL P8 P17
HSYNC2 MPIF_D3 AVDD_DMPLL GND_53
R418 33 C415 0.047uF N3 T4 R10
COMP2_Pr+ R419 68 C416 0.047uF N2
RIN2P AUCOM L409 AVDD_DMPLL/AVDD_NODIE:7.362mA GND_54
R11
COMP2_Pr- R420 RIN2M
+3.3V_AVDD 120-ohm GND_55
33 C417 0.047uF M2 P7
Main AU33:31mA C1400 0.1uF T7 R12
COMP2_Y+ R421 GIN2P VRM AVDD_AU33 GND_56
68 C418 0.047uF M1 U7 R13
COMP2_Y- R422 33 C419 0.047uF GIN2M AVDD_EAR33 GND_57
L2 R7
L410Main C1401 0.1uF R14
COMP2_Pb+ R423 68 C420 0.047uF L1
BIN2P VAG
P6 READY READY GND_58
R15
COMP2_Pb- BIN2M VRP R470 R469 120-ohm GND_59
R424 0 C421 1000pF M3 T9 R16
SOGIN2 C434 C448 C454 C455 3.3K 3.3K AVDD33_T GND_60
R1 4.7uF 1uF 0.1uF 10uF R17
HP_OUT_1L GND_61
R2 R8 R18
HP_OUT_1R VDDP_1 GND_62
R425 33 C422 0.047uF N4 3D C1404 10uF R9 T10
TU_CVBS
AV/SC1_CVBS_IN
R426 33 C423 0.047uF N6
CVBS0P
CVBS1P R466 22
3D_RF_GPIO1 LVDS DDR IC400 C1405 0.1uF T8
VDDP_2
VDDP_3
GND_63
GND_64
T11
R427 33 C424 0.047uF L4 E21 LGE101DC-R [S7R DIVX/MS10] VDD33_T/VDDP/U3_VD33_2:47mA C1406 0.1uF T12
COMP2_Y+ R428 33 C425 0.047uF CVBS2P ET_RXD0 IC400 GND_65
L5 E22
LGE101DC-R [S7R DIVX/MS10] C1407 0.1uF T13
SIDEAV_CVBS_IN L6
CVBS3P ET_TXD0 SC_RE1 V20
GND_66
T14
CVBS4P 3D NC_5 GND_67
R429 33 C426 0.047uF M4 D21 R438 22 B8 A25 W20 T15
SC2_CVBS_IN R430 33 C427 0.047uF M5
CVBS5P ET_RXD1
F21
LG8300_RESET A-TMA0 A_DDR3_A0/DDR2_A13 B_DDR3_A0/DDR2_A13 B-TMA0 NC_8 GND_68
T16
B9 B24
R431 33 C428 0.047uF CVBS6P ET_TXD1 DSUB_DET AE1 W26 A-TMA1 A_DDR3_A1/DDR2_A8 B_DDR3_A1/DDR2_A8 B-TMA1 GND_69
K7
AF16
NC_48 LVACLKP/LLV6P/BLUE[3]
W25
LVDS_CLK_1- A8 A24 U19 T17
CVBS7P A-TMA2 A_DDR3_A2/DDR2_A9 B_DDR3_A2/DDR2_A9 B-TMA2 NC_2 GND_70
E23 NC_78 LVACLKN/LLV6N/BLUE[2] LVDS_CLK_1+ C21 P25
FRC_LPLL:13mA
U20 T18
ET_REFCLK COMP2_DET AF1 U26 A-TMA3 A_DDR3_A3/DDR2_A1 B_DDR3_A3/DDR2_A1 B-TMA3 NC_3 GND_71
M6 D22 NC_64 LVA0P/LLV3P/BLUE[9] LVDS_DATA_1_A- B10 C24 FRC_MPLL:4mA V19 T19
CVBS_OUT1 ET_TX_EN 3D SCART1_MUTE AE3 U25 A-TMA4 A_DDR3_A4/DDR2_A2 B_DDR3_A4/DDR2_A2 B-TMA4 NC_4 GND_72
M7 F22 R467 22 NC_50 LVA0N/LLV3N/BLUE[8] LVDS_DATA_1_A+ A22 P26 U10
DTV/MNT_VOUT CVBS_OUT2 ET_MDC 3D_RF_GPIO2 AD14 U24 A-TMA5 A_DDR3_A5/DDR2_A10 B_DDR3_A5/DDR2_A10 B-TMA5 C1411 0.1uF GND_73
D23 R440 100 NC_45 LVA1P/LLV4P/BLUE[7] LVDS_DATA_1_B- A10 B26 W19 U11
R432 68 C429 0.047uF ET_MDIO DISP_EN AD3 V26 A-TMA6 A_DDR3_A6/DDR2_A4 B_DDR3_A6/DDR2_A4 B-TMA6 FRC_LPLL NC_7 GND_74
C400 N5 F23 NC_34 LVA1N/LLV4N/BLUE[6] LVDS_DATA_1_B+ B22 R24 U18 U12
1000pF VCOM0 ET_CRS AMP_RESET_N AF15 V25 A-TMA7 A_DDR3_A7/DDR2_A3 B_DDR3_A7/DDR2_A3 B-TMA7 AVDD_LPLL GND_75
AF2
NC_77 LVA2P/LLV5P/BLUE[5]
V24
LVDS_DATA_1_C- C9 B25 C1412 0.1uF T20 U13
READY R441 R1476 NC_65 LVA2N/LLV5N/BLUE[4] LVDS_DATA_1_C+ A-TMA8 A_DDR3_A8/DDR2_A6 B_DDR3_A8/DDR2_A6 B-TMA8 L412 NC_1 GND_76
U14
C23 T26
1K 1K AE15 W24 A-TMA9 A_DDR3_A9/DDR2_A12 B_DDR3_A9/DDR2_A12 B-TMA9 120-ohm GND_77
F8
AD2
NC_62 LVA3P/LLV7P/BLUE[1]
Y26
LVDS_DATA_1_D- B11 D24
Main
Y14 U15
AVLINK A-TMA10 A_DDR3_A10/DDR2_RASZ B_DDR3_A10/DDR2_RASZ B-TMA10 NC_14 GND_78
G8 NC_33 LVA3N/LLV7N/BLUE[0] LVDS_DATA_1_D+ A9 A26 U16
IRINT IR AD16 Y25 A-TMA11 A_DDR3_A11/DDR2_A11 B_DDR3_A11/DDR2_A11 B-TMA11 GND_79
K8
AD15
NC_47 LVA4P/LLV8P
Y24
LVDS_DATA_1_E- C10 C25 U17
TESTPIN A-TMA12 A_DDR3_A12/DDR2_A0 B_DDR3_A12/DDR2_A0 B-TMA12 GND_80
A4 NC_46 LVA4N/LLV8N LVDS_DATA_1_E+ B23 T25 AVDD_MEMPLL:24mA V7
RESET
Y17
SOC_RESET AE16 A-TMA13 A_DDR3_A13/DDR2_A7 B_DDR3_A13/DDR2_A7 B-TMA13 C1413 0.1uF R19
GND_81
V8
NC_63
NC_16 +1.5V_DDR_IN AVDD_MEMPLL GND_82
W14 V9
AC26 NC_6 GND_83
LVBCLKP/LLV0P/GREEN[5]
AC25
LVDS_CLK_2- C1414 10uF V10
AVDD_DDR0:55mA GND_84
LVBCLKN/LLV0N/GREEN[4]
AA26
LVDS_CLK_2+ B21 P24 C1415 10uF V11
A-TMBA0 A_DDR3_BA0/DDR2_BA2 B_DDR3_BA0/DDR2_BA2 B-TMBA0 GND_85
LVB0P/RLV6P/RED[1] LVDS_DATA_2_A- A11 C26 AVDD_DDR0 D15 V12
AF3 AA25 A-TMBA1 A_DDR3_BA1/DDR2_CASZ B_DDR3_BA1/DDR2_CASZ B-TMBA1 AVDD_DDR0_D_1 GND_86
AF14
NC_66 LVB0N/RLV6N/RED[0]
AA24
LVDS_DATA_2_A+ A23 R26 C1416 0.1uF D16 V13
A-TMBA2 A_DDR3_BA2/DDR2_A5 B_DDR3_BA2/DDR2_A5 B-TMBA2 AVDD_DDR0_D_2 GND_87
NC_76 LVB1P/RLV7P/GREEN[9] LVDS_DATA_2_B- L408 C1417 0.1uF E15 V14
AD1 AB26 AVDD_DDR0_D_3 GND_88
NC_32 LVB1N/RLV7N/GREEN[8] LVDS_DATA_2_B+ A12 D26 C463 120-ohm C1418 0.1uF E16 V15
AB25 A-TMCK A_DDR3_MCLK/DDR2_MCLK B_DDR3_MCLK/DDR2_MCLK B-TMCK 0.1uF AVDD_DDR0_D_4 GND_89
LVB2P/RLV8P/GREEN[7] LVDS_DATA_2_C- C11 D25 Main C1419 0.1uF E17 V16
AD13 AB24 A-TMCKB A_DDR3_MCLKZ/DDR2_MCLKZ B_DDR3_MCLKZ/DDR2_MCLKZ B-TMCKB AVDD_DDR0_C GND_90
AE14
NC_44 LVB2N/RLV8N/GREEN[6]
AC24
LVDS_DATA_2_C+ B12 E24 C1420 0.1uF V17
A-TMCKE A_DDR3_CKE/DDR2_DQ5 B_DDR3_CKE/DDR2_DQ5 B-TMCKE GND_91
AE13
NC_61 LVB3P/LLV1P/GREEN[3]
AD26
LVDS_DATA_2_D- F16 V18
AVDD_DDR1_D_1 GND_92
NC_60 LVB3N/LLV1N/GREEN[2]
AD25
LVDS_DATA_2_D+ AVDD_DDR1:55mA F17 W7
LVB4P/LLV0P/GREEN[1]
AD24
LVDS_DATA_2_E- C20 N25 C1421 10uF G16 W8
MODEL OPTION SOC_RESET LVB4N/LLV0N/GREEN[0] LVDS_DATA_2_E+ A-TMODT A20
A_DDR3_ODT/DDR2_ODT B_DDR3_ODT/DDR2_ODT
M26
B-TMODT C1422 10uF G17
W9
AE4 A-TMRASB A_DDR3_RASZ/DDR2_WEZ B_DDR3_RASZ/DDR2_WEZ B-TMRASB AVDD_DDR1_D_4 GND_95
NC_51 B20 N24 H17 W10
AD5 A-TMCASB B-TMCASB AVDD_DDR1_C GND_96
PIN NAME PIN NO. HIGH LOW +3.3V_ST NC_36 A21
A_DDR3_CASZ/DDR2_BA1 B_DDR3_CASZ/DDR2_BA1
N26 C1423 0.1uF W11
AF4 AD23 A-TMWEB A_DDR3_WEZ/DDR2_BA0 B_DDR3_WEZ/DDR2_BA0 B-TMWEB GND_97
NC_67 RLV3P/RED[7] C1424 0.1uF W12
AD4 AE23 GND_98
MODEL_OPT_3 B6 FHD HD NC_35 RLV3N/RED[6] C22 R25 C1425 0.1uF AB11 W13
AE26 A-TMRESETB A_DDR3_RESETB B_DDR3_RESETB B-TMRESETB NC_22 GND_99
RLV0P/LVSYNC C1426 0.1uF AB12 W16
AE2 AE25 NC_23 GND_100
NC_49 RLV0N/LHSYNC AC11 W17
AF26 NC_27 GND_101
READY RLV1N/LCK C16 J25 AC12 W18
SW400 AF25 A-TMDQSL A_DDR3_DQSL/DDR2_DQS0 B_DDR3_DQSL/DDR2_DQS0 B-TMDQSL NC_28 GND_102
RLV2P/RED[9] B16 J24 AA12 Y13
+3.3V_AVDD TMUE312GAB AF8 AE24 A-TMDQSLB A_DDR3_DQSLB/DDR2_DQSB0 B_DDR3_DQSLB/DDR2_DQSB0 B-TMDQSLB NC_18 GND_103
Y18
NC_71 RLV1P/LDE
2
4
1K
AD9 AF24 GND_104

NC_40 RLV2N/RED[8] A16 H26 AA13
AF23 A-TMDQSU A_DDR3_DQSU/DDR2_DQSB1 B_DDR3_DQSU/DDR2_DQSB1 B-TMDQSU R1403 GND_106
5
RLV4P/RED[5] C15 H25 AB13

AE9 AD22 A-TMDQSUB A_DDR3_DQSUB/DDR2_DQS1 B_DDR3_DQSUB/DDR2_DQS1 B-TMDQSUB 1K GND_107
NC_56 RLV4N/RED[4] AC13
READY AF9 AE22 1% GND_108
R451
R435 NC_72 RLV5P/RED[3]

AF22
A14 F26 MVREF G15 D17
A-TMDML B-TMDML MVREF GND_109
1
A_DDR3_DML//DDR2_DQ13 B_DDR3_DML/DDR2_DQ13 C1427 0.1uF

100 AE11
RLV5N/RED[2] B18 L24 H23
A-TMDMU A_DDR3_DMU/DDR2_DQ6 B_DDR3_DMU/DDR2_DQ6 B-TMDMU GND_110
C465 NC_58 R1404 AF13
AF6 GND_111
4.7uF NC_69 C18 L25 1K Y7 J9
R434 AD19 A-TMDQL0 A_DDR3_DQL0/DDR2_DQ3 B_DDR3_DQL0/DDR2_DQ3 B-TMDQL0 1% NC_9 GND_FU
10V 10 AE6
TCON3/OE/GOE/GCLK2
AE19
B13 F24 Y8 U9
A-TMDQL1 A_DDR3_DQL1/DDR2_DQ7 B_DDR3_DQL1/DDR2_DQ7 B-TMDQL1 NC_10 PGA_VCOM
MODEL_OPT_3 SOC_RESET NC_53 TCON15/SCAN_BLK1 A19 L26
AF11 AD21 A-TMDQL2 A_DDR3_DQL2/DDR2_DQ1 B_DDR3_DQL2/DDR2_DQ1 B-TMDQL2 L413
1K
NC_74 TCON18/CS7/GCLK5 C13 F25 120-ohm

D400 AD6 AE21 A-TMDQL3 A_DDR3_DQL3/DDR2_DQ10 B_DDR3_DQL3/DDR2_DQ10 B-TMDQL3
KDS181 AD12
NC_37 TCON19/CS8/GCLK6
AF21
C19 M25 Main
A-TMDQL4 B-TMDQL4
READY
A_DDR3_DQL4/DDR2_DQ4 B_DDR3_DQL4/DDR2_DQ4
NC_43 TCON11/CS5/HCON A13 E26
C466 AE5 AD20 A-TMDQL5 A_DDR3_DQL5/DDR2_DQ0 B_DDR3_DQL5/DDR2_DQ0 B-TMDQL5
R433 NC_52 TCON10/CS4/OPT_N B19 M24
0.1uF AF12 AE20 A-TMDQL6 A_DDR3_DQL6/DDR2_CKE B_DDR3_DQL6/DDR2_CKE B-TMDQL6
R452
62K NC_75 TCON9/CS3/OPT_P C12 E25

AF5 AF20 A-TMDQL7 A_DDR3_DQL7/DDR2_DQ2 B_DDR3_DQL7/DDR2_DQ2 B-TMDQL7
NC_68 TCON16/WPWM
AE12 AF19
NC_59 TCON12/DPM A15 G26
AD18 A-TMDQU0 A_DDR3_DQU0/DDR2_DQ15 B_DDR3_DQU0/DDR2_DQ15 B-TMDQU0
TCON1/STV/GSP/VST A17 J26
AE10 AE18 A-TMDQU1 A_DDR3_DQU1/DDR2_DQ9 B_DDR3_DQU1/DDR2_DQ9 B-TMDQU1
NC_57 TCON5/TP/SOE B14 G24
AF7 AF18 A-TMDQU2 A_DDR3_DQU2/DDR2_DQ8 B_DDR3_DQU2/DDR2_DQ8 B-TMDQU2
NC_70 TCON14/SACN_BLK C17 K25
AD11 A-TMDQU3 A_DDR3_DQU3/DDR2_DQ11 B_DDR3_DQU3/DDR2_DQ11 B-TMDQU3
NC_42 B15 H24
AD7 A-TMDQU4 A_DDR3_DQU4/DDR2_DQM1 B_DDR3_DQU4/DDR2_DQM1 B-TMDQU4
NC_38 A18 K26
AD10 AB22 A-TMDQU5 A_DDR3_DQU5/DDR2_DQ12 B_DDR3_DQU5/DDR2_DQ12 B-TMDQU5
NC_41 TCON21/CS10/VGH_ODD C14 G25
AE7 AB23 A-TMDQU6 A_DDR3_DQU6/DDR2_DQM0 B_DDR3_DQU6/DDR2_DQM0 B-TMDQU6
NC_54 TCON20/CS9/VGH_EVEN B17 K24
<T3 CHIP Config(AUD_LRCH)> +3.3V_AVDD AF10 AC23 A-TMDQU7 A_DDR3_DQU7/DDR2_DQ14 B_DDR3_DQU7/DDR2_DQ14 B-TMDQU7
NC_73 TCON13/LEDON
AD8 AC22
NC_39 TCON17/CS6/GCLK4
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
READY
R460
R453
AB16
R447
R449
R443
NC_26
AA14 CLose to Saturn7M IC CLose to Saturn7M IC
1K
READY1K
1K
READY 1K
NC_19
1K
AC15
NC_30
VCC_1.5V_DDR VCC_1.5V_DDR
AUD_LRCH Y16
<T3 CHIP Config> AUD_SCK NC_15
AC16
AUD_MASTER_CLK NC_31
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0) PWM1
AE8
NC_55 NC_29
AC14
R489
1K 1%
R499
1K 1%
PWM0 Y11 AA16

1K READY
1KREADY
MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.) NC_12 NC_21
R448
R450
AA15
R454
R461
Y19
R444
MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.) GND_105 NC_20
MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.)
Y10 A-MVREFCA B-MVREFCA
1K
B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble)
0.1uF
1000pF
1K
1K
0.1uF
1000pF
NC_11
1%
AA11
1%
B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble)
R1400
NC_17
R490
AB15
NC_25
C460
AB14
C462
1K
C459
1K
C461
NC_24

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN 4

IC500
H5TQ1G63BFR-H9C DDR3 Memory DDR_VREF_DDR
LG8300 DDR3 Memory NAND Flash
VCC_1.5V_DDR 1GBit x 2 256MBit 1GBit IC502
3D 3D IC701 H27U1G8F2BTR-BC
M8 N3 +3.3V_AVDD
A-MVREFCA VREFCA A0 A-MA0 C702 C704 +3.3V_AVDD
R502 R513 56
1K A1
P7
A-MA1
A-MA0 A-TMA0 0.1uF 470pF W9725G6JB-25
P3 R514 56 A-TMA2 16V 50V NC_1 NC_29
1% A-MA2 DDR_DQ[15-0]
A2 A-MA2 1 48
A-MVREFDQ H1 N2 AR500 56
VREFDQ A3 A-MA3 A-MA11 A-TMA11 DDR_A[12-0] NC_2 NC_28
P8 VREF DQ0 DDR_DQ[0] 2 47
A-MA4 A-MA1 A-TMA1 J2 G8
R503 A4 DDR_DQ[1] PCM_A[0-7]
1K P2 G2 DQ1 NC_3 NC_27
R505 A5 A-MA5 A-MA8 A-TMA8 3 46
1% L8 R8 DQ2 DDR_DQ[2]
A-MA6 A-MA6 A-TMA6 DDR_A[0] A0 H7 NC_4 NC_26
ZQ A6 M8 DDR_DQ[3]
240 R2 DDR_A[1] H3 DQ3 R537 4 45 AR520
C501 C503 A7 A-MA7 AR501 56 A1
0.1uF 1000pF 1% T8 A-MBA0 A-TMBA0 M3 DQ4 DDR_DQ[4] 1K NC_5 I/O7 PCM_A[7]
A-MA8 DDR_A[2] A2 H1 5 44
A8 A-MA3 A-TMA3 M7 DDR_DQ[5] R545
B2 R3 DDR_A[3] H9 DQ5 4.7K
VDD_1 A9 A-MA9 A-TMA5 A3 N2 DDR_DQ[6] NC_6 I/O6 PCM_A[6]
C524 10uF D9 L7 A-MA5 DQ6 6 43
A-MA10 DDR_A[4] A4 F1
VDD_2 A10/AP A-MA7 A-TMA7 N8 DDR_DQ[7]
C525 0.1uF G7 R7 DDR_A[5] F9 DQ7 R/B I/O5 PCM_A[5]
VDD_3 A11 A-MA11 A5 N3 DDR_DQ[8] /F_RB 7 42
C526 0.1uF K2 N7 AR502 56 A-TMA4 DQ8
A-MA12 A-MA4 DDR_A[6] A6 C8 RE I/O4 PCM_A[4]
VDD_4 A12/BC N7 DDR_DQ[9]
C527 0.1uF K8 T3 A-MA12 A-TMA12 DDR_A[7] C2 DQ9 /PF_OE 8 41
VDD_5 A13 A-MA13 A7
C528 0.1uF N1 A-MBA1 A-TMBA1 DDR_A[8]
P2
D7 DQ10 DDR_DQ[10] CE NC_25 22
VDD_6 A8 P8 DDR_DQ[11] /PF_CE0 9 40
C529 0.1uF N9 M7 A-MA10 A-TMA10 DDR_A[9] D3 DQ11
VDD_7 A15 A9 P3 DDR_DQ[12] NC_7 NC_24
C530 0.1uF R1 A-MCK AR503 56 DDR_A[10] D1 DQ12 10 39
VDD_8 A-MRESETB A-TMRESETB A10/AP READY C550
R9 M2 A-MCKB M2 DQ13 DDR_DQ[13] R538 NC_8 NC_23 10uF
C531 0.1uF DDR_A[11] D9
VDD_9 BA0 A-MBA0 A-MBA2 A-TMBA2 A11 P7 1K C549 11 38
C532 0.1uF N8 DQ14 DDR_DQ[14]
A-MBA1 A-TMA13 DDR_A[12] A12 B1 0.1uF VCC_1 VCC_2
BA1 R509 R511 A-MA13 R2 DDR_DQ[15]
C533 0.1uF M3 56 56 B9 DQ15 12 37
BA2 A-MBA2 A-MA9 A-TMA9 +3.3V_AVDD
C505 A1 1% 1% VSS_1 VSS_2 C551
0.1uF R515 22 13 36 0.1uF
VDDQ_1 A-MCK A-TMCK
C534 0.1uF A8 J7 DDR_BA[0] BA0 L2 +1.8V
VDDQ_2 CK R516 22 A-TMCKB READY NC_9 NC_22
C1 K7 C543 A-MCKB BA1 14 35
C535 0.1uF DDR_BA[1] L3
VDDQ_3 CK 0.01uF AR504 56 A1 VDD_5 C720 0.1uF
C536 0.1uF C9 K9 50V A-MRASB A-TMRASB 3D R541 NC_10 NC_21
VDDQ_4 CKE A-MCKE DDR2_CLK E1 VDD_4 C719 0.1uF 1K 15 34
C537 0.1uF D2 A-MCASB A-TMCASB 3D
CLK VDD_3 CLE NC_20
R700
VDDQ_5 J8 J9 C718 0.1uF
100
E9 L2 A-TMODT 3D 16 33
3D
C538 0.1uF A-MODT R536 /PF_CE1 AR521
VDDQ_6 CS CLK K8 M9 VDD_2 C717 0.1uF
C539 0.1uF F1 K1 A-MWEB A-TMWEB 3D 10K ALE I/O3 PCM_A[3]
A-MODT /DDR2_CLK CKE VDD_1 17 32
VDDQ_7 ODT K2 R1 C716 0.1uF READY PF_ALE
C540 0.1uF H2 J3 R517 22 DDR2_CKE 3D
VDDQ_8 RAS A-MRASB A-MDQSL A-TMDQSL C715 0.1uF +3.3V_ST WE I/O2 PCM_A[2]
H9 K3 VCC_1.5V_DDR R518 22 3D 18 31
C541 0.1uF A-MDQSLB A-TMDQSLB R535 /PF_WE
VDDQ_9 CAS A-MCASB C714 0.1uF
L3 R519 22 A-TMDQSU ODT 3D 0 WP I/O1 PCM_A[1]
A-MWEB R506 A-MDQSU DDR2_ODT K9 19 30
WE 10K R520 22
J1 A-MDQSUB A-TMDQSUB /DDR_CS CS L8 A9 VDDQ_10 C713 0.1uF R532
NC_1 3D 3.3K C NC_11 I/O0 PCM_A[0]
J9 T2 AR505 22 RAS VDDQ_9 C712 0.1uF R542 20 29
A-MRESETB A-MDQL1 A-TMDQL1 /DDR_RAS K7 C1 READY 1K
NC_2 RESET 3D B Q500
L1
A-MDQL3 A-TMDQL3 /DDR_CAS CAS L7 C3 VDDQ_8 C711 0.1uF 3D /PF_WP NC_12 NC_19 22
NC_3 2SC3052 21 28
L9 A-TMDML /DDR_WE WE K3 C7 VDDQ_7 C710 0.1uF R534
NC_4 A-MDML 3D 10K READY NC_13 NC_18
T7 F3 VDDQ_6 C709 0.1uF READY E 22 27
A-MDQSL A-MDQU2 A-TMDQU2 C9 3D R533
NC_6 DQSL 3.3K
G3 E9 VDDQ_5 C708 0.1uF NC_14 NC_17
DQSL A-MDQSLB AR506 22 A-TMCKE DDR_DQS0P LDQS F7 3D 23 26
A-MCKE VDDQ_4 C707 0.1uF
UDQS G1 NC_15 NC_16
A-MDQL7 A-TMDQL7 DDR_DQS1P B7 3D
A9 C7 G3 VDDQ_3 C706 0.1uF 24 25
VSS_1 DQSU A-MDQSU A-TMDQL5 3D
B3 B7 A-MDQL5 VDDQ_2 C703 0.1uF
A-MDQSUB G7
VSS_2 DQSU 3D
E1 DDR_DQM0 LDM F3 G9 VDDQ_1 C701 0.1uF
VSS_3 3D
G8 E7 AR507 22 A-TMDQL0 UDM C700 10uF
A-MDML A-MDQL0 DDR_DQM1 B3 3D
VSS_4 DML
J2 D3 A-MDQL2 A-TMDQL2
VSS_5 DMU A-MDMU
J8 A-MDQL6 A-TMDQL6
VSS_6 DDR_DQS0M LDQS E8 A3 VSS_5
M1 E3 A-MDQL4 A-TMDQL4
VSS_7 DQL0 A-MDQL0 DDR_DQS1M UDQS A8 E3 VSS_4
M9 F7
VSS_8 DQL1 A-MDQL1 AR508 22 A-TMDQU7 VSS_3
P1 F2 A-MDQU7 J3
P9
VSS_9 DQL2
F8
A-MDQL2 A-MDQU3 A-TMDQU3
NC_4 L1
N1 VSS_2 SERIAL FLASH
VSS_10 DQL3 A-MDQL3 A-MDQU5 A-TMDQU5 P9 VSS_1 +3.3V_ST
T1
T9
VSS_11 DQL4
H3
H8
A-MDQL4 A-MDMU A-TMDMU
NC_5
NC_6
R3 8MBit +3.3V_ST
A-MDQL5 R7
VSS_12 DQL5 AR509 22
G2 A-MDQU6 A-TMDQU6
DQL6 A-MDQL6
H7 A-MDQU0 A-TMDQU0 B2 VSSQ_10
DQL7 A-MDQL7 NC_1
B1 A-MDQU4 A-TMDQU4
A2
B8 VSSQ_9 R547 IC503
VSSQ_1 NC_2 4.7K
B9 D7 E2
A7 VSSQ_8 +3.3V_ST MX25L8005M2I-15G
VSSQ_2 DQU0 A-MDQU0 NC_3 READY
D1 C3 R8 VSSQ_7
A-MDQU1 R521 22 A-TMDQU1 D2
VSSQ_3 DQU1 A-MDQU1
D8 C8 R512 10K D8 VSSQ_6 C552
VSSQ_4 DQU2 A-MDQU2 A-MCKE CS# VCC
E2 C2 VSSQ_5 /SPI_CS 1 8
A-MDQU3 VSSDL J7 E7 R546
VSSQ_5 DQU3
E8 A7 F2 VSSQ_4 10K 0.1uF
VSSQ_6 DQU4 A-MDQU4
F9 A2 VSSQ_3 SO HOLD#
A-MDQU5 +1.8V F8 2 7
VSSQ_7 DQU5 SPI_SDO
G1 B8 H2 VSSQ_2
VSSQ_8 DQU6 A-MDQU6
G9 A3 3D VDDL VSSQ_1 R540
A-MDQU7 R522 56 J1 H8 0 WP# SCLK
VSSQ_9 DQU7 B-MA0 B-TMA0 3 6
R523 56 C705 /FLASH_WP SPI_SCK
B-MA2 B-TMA2 100pF
AR510 56 50V R549
B-MA11 B-TMA11 C GND SI 33
READY 4 5 SPI_SDI
B-MA1 B-TMA1
B Q501
IC501 B-MA8 B-TMA8 2SC3052
R539
H5TQ1G63BFR-H9C B-MA6 B-TMA6 10K
READY E
VCC_1.5V_DDR AR511 56
B-MBA0 B-TMBA0
B-MA3 B-TMA3
M8 N3
B-MVREFCA VREFCA A0 B-MA0 B-MA5 B-TMA5 AR531
R500 P7 3D 22
1K A1 B-MA1 B-MA7 B-TMA7
1% P3 1/16W
A2 B-MA2 AR512 56
B-MVREFDQ H1 N2 B-MA4 B-TMA4
/C_DDR_WE /DDR_WE
VREFDQ A3 B-MA3 B-MA12 B-TMA12
P8 C_DDR2_CKE DDR2_CKE
R501 A4 B-MA4 B-MBA1 B-TMBA1
1K P2 C_DDR_BA[1] DDR_BA[1]
R504 A5 B-MA5 A0’h
1% L8
ZQ A6
R8
B-MA6
B-MA10
AR513 56
B-TMA10
C_DDR_BA[0] DDR_BA[0] EEPROM
240 R2 B-MRESETB B-TMRESETB
C500 C502
0.1uF 1000pF 1%
A7
T8
B-MA7
B-MA8
B-MBA2 B-TMBA2 3D
AR532
22 1MBit
A8 1/16W
B2 R3 B-MA13 B-TMA13 +3.3V_AVDD
VDD_1 A9 B-MA9
C506 10uF D9 L7 B-MA9 B-TMA9 C_DDR_A[2] DDR_A[2]
VDD_2 A10/AP B-MA10
C507 0.1uF G7 R7 R524 22 C_DDR_A[0] DDR_A[0]
VDD_3 A11 B-MA11 B-MCK B-TMCK
C508 0.1uF K2 N7 R525 22 /C_DDR_RAS /DDR_RAS
VDD_4 A12/BC B-MA12 B-MCKB B-TMCKB
C509 0.1uF K8 T3 AR514 56 C_DDR2_ODT DDR2_ODT
VDD_5 A13 B-MA13 B-MRASB B-TMRASB C547
C510 0.1uF N1 0.1uF
VDD_6 B-MCASB B-TMCASB AR533 IC504
C511 0.1uF N9 M7 3D 22
VDD_7 A15 B-MODT B-TMODT 1/16W M24M01-HRMN6TP
C512 0.1uF R1
VDD_8 B-MCK B-MWEB B-TMWEB
C513 0.1uF R9 M2 C_DDR_A[1] DDR_A[1]
VDD_9 BA0 B-MBA0 B-MCKB NC VCC
R526 22 C_DDR_A[3] DDR_A[3] 1 8
C514 0.1uF N8 B-MDQSL B-TMDQSL
BA1 B-MBA1 R527 22
C515 0.1uF M3 R508 R510 B-MDQSLB B-TMDQSLB C_DDR_A[12] DDR_A[12]
BA2 B-MBA2 R528 22 E1 WP
A1 56 56 B-MDQSU B-TMDQSU C_DDR_A[9] DDR_A[9] 2 7
C504 0.1uF 1% 1% R529 22
VDDQ_1 B-MDQSUB B-TMDQSUB
C516 0.1uF A8 J7 AR534
VDDQ_2 CK E2 SCL
AR515 22 3D 22 3 6 R543 22 I2C_SCL
C517 0.1uF C1 K7 B-MDQL1 B-TMDQL1
VDDQ_3 CK 1/16W
C518 0.1uF C9 K9 C542 B-MDQL3 B-TMDQL3
VDDQ_4 CKE B-MCKE 0.01uF VSS SDA
C_DDR_A[10] DDR_A[10] 4 5 R544 22
C519 0.1uF D2 50V B-MDML B-TMDML I2C_SDA
VDDQ_5 C_DDR_A[5] DDR_A[5]
C520 0.1uF E9 L2 B-MDQU2 B-TMDQU2 C546 C548
VDDQ_6 CS C_DDR_A[7] DDR_A[7] 10pF 10pF
C521 0.1uF F1 K1 AR516 22
VDDQ_7 ODT B-MODT B-MCKE B-TMCKE C_DDR_A[11] DDR_A[11] READY READY
C522 0.1uF H2 J3
VDDQ_8 RAS B-MRASB VCC_1.5V_DDR B-MDQL7 B-TMDQL7
C523 0.1uF H9 K3 AR535
VDDQ_9 CAS B-MCASB B-MDQL5 B-TMDQL5
L3 3D 22
B-MWEB R507 1/16W
WE 10K
J1
NC_1 AR517 22 C_DDR_A[8] DDR_A[8]
J9 T2 B-MDQL0 B-TMDQL0
NC_2 RESET B-MRESETB C_DDR_A[6] DDR_A[6]
L1 B-MDQL2 B-TMDQL2
NC_3 C_DDR_A[4] DDR_A[4]
L9 B-MDQL6 B-TMDQL6
NC_4 /C_DDR_CAS /DDR_CAS
T7 F3 B-MDQL4 B-TMDQL4
NC_6 DQSL B-MDQSL AR527 DDR_DQ[15-0]
G3 AR518 22 22
B-MDQSLB B-MDQU7 B-TMDQU7 R1459
DQSL 1/16W
3D 22 C_DDR_DQ[5] 3D Addr:10101--
A9 C7
B-MDQU3
B-MDQU5
B-TMDQU3
B-TMDQU5
C_DDR2_CLK
R1460
DDR2_CLK
C_DDR_DQ[2]
DDR_DQ[5] HDCP EEPROM
VSS_1 DQSU B-MDQSU DDR_DQ[2]
B3
E1
VSS_2 DQSU
B7
B-MDQSUB B-MDMU B-TMDMU
/C_DDR2_CLK
3D 22
/DDR2_CLK
C_DDR_DQ[0]
DDR_DQ[0] 8KBit
AR519 22 C_DDR_DQ[7]
VSS_3 B-MDQU6 B-TMDQU6 R1461 DDR_DQ[7]
G8 E7 3D 22
VSS_4 DML B-MDML B-MDQU0 B-TMDQU0
J2 D3 C_DDR_DQS0P DDR_DQS0P AR528
VSS_5 DMU B-MDMU B-MDQU4 B-TMDQU4 R1462 22
J8 3D 22 +3.3V_AVDD
VSS_6 1/16W
M1 E3 C_DDR_DQS1P DDR_DQS1P C_DDR_DQ[13] 3D
B-MDQL0 DDR_DQ[13]
VSS_7 DQL0 R530 22 R1463 C_DDR_DQ[10]
M9 F7 B-MDQU1 B-TMDQU1 3D 22 DDR_DQ[10]
VSS_8 DQL1 B-MDQL1
P1 F2 R531 10K C_DDR_DQM0 DDR_DQM0 C_DDR_DQ[8]
B-MDQL2 B-MCKE DDR_DQ[8]
VSS_9 DQL2 R1464 C_DDR_DQ[15]
P9 F8 DDR_DQ[15]
VSS_10 DQL3 B-MDQL3 3D 22 IC505
T1 H3 C_DDR_DQM1 DDR_DQM1 CAT24WC08W-T
VSS_11 DQL4 B-MDQL4 R548
T9 H8 R1465 AR529 4.7K
VSS_12 DQL5 B-MDQL5 3D 22 A0 1 VCC
G2 22 8
B-MDQL6 C_DDR_DQS0M DDR_DQS0M 1/16W
DQL6
H7 R1466 C_DDR_DQ[14] 3D A1 2 WP R550 4.7K
DQL7 B-MDQL7 3D 22 DDR_DQ[14] 7
B1 VCC_1.5V_DDR C_DDR_DQ[9]
VSSQ_1 C_DDR_DQS1M DDR_DQS1M DDR_DQ[9] A2 3 SCL 22
B9 D7 C_DDR_DQ[11] 6 R551
R1467 DDR_DQ[11] I2C_SCL
VSSQ_2 DQU0 B-MDQU0 +1.5V_DDR_IN 3D 22
D1 C3 C_DDR_DQ[12] VSS SDA
VSSQ_3 DQU1 B-MDQU1 /C_DDR_CS /DDR_CS DDR_DQ[12] 4 5 I2C_SDA
D8 C8 R552 22
VSSQ_4 DQU2 B-MDQU2
E2 C2 AR530
VSSQ_5 DQU3 B-MDQU3 22
E8 A7 1/16W
VSSQ_6 DQU4 B-MDQU4 L500 C_DDR_DQ[3] 3D
F9 A2 500 C544 C545 DDR_DQ[3]
VSSQ_7 DQU5 B-MDQU5 C_DDR_DQ[4]
G1 B8 Main 10uF 0.1uF DDR_DQ[4]
VSSQ_8 DQU6 B-MDQU6 10V 16V C_DDR_DQ[1]
G9 A3 DDR_DQ[1]
VSSQ_9 DQU7 B-MDQU7 C_DDR_DQ[6]
DDR_DQ[6]
C_DDR_DQ[15-0]

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Memory 5

Power Wafer 5Vst Enable 1.26V Core
+5V_ST_EN
READY
P601 R610
SMAW200-H18S1
P_17V +5V_ST 3.2A / P-CHANNEL 10K
READY
+5V_ST_EN
C614
0.1uF READY +1.26V_VDDC
16V R617
1 2 0
3 4 S D R638
R642
EP[GND]
C655 10K 0
5 6 C654
VIN_3
PWRGD
0.01uF C656 C657 READY
+3.3V_ST 22uF
BOOT
25V 100uF 0.01uF
+3.3V_ST 7 8 R612 16V
25V C622
EN
10K 16V 0.1uF
9 10
11 12
L603
500 +5V_ST G 50V L607
R601 R602 R607
16
15
14
13
Power Main 3.6uH
10K 10K 13 14 10K VIN_1
1 12 PH_3
R606 100 C619 C627
RL_ON
R603 100
15 16
100uF 0.1uF
16V R609 C Q600 VIN_2 2
THERMAL
17 11 PH_2 R1
17 18 16V
5V_ON
RL_ON
10K B Q601 RTR030P02 R621
C603 C604 RT1C3904-T112 C610 C612 GND_1 3 IC603 10 PH_1 39K C630
100pF C633 C651 C652
0.1uF 0.1uF 10uF 0.1uF 1% C653
+3.3V 16V 19 E 16V SN1007054RTER 50V 22uF 10uF 10uF
16V 16V GND_2 SS 0.1uF
4 9 16V 10V 10V 16V
R600
3A C626 0.01uF
8
10K
READY +5V
100
AGND
VSENSE
COMP
RT/CLK
R604 L604
ERROR_DET
R605 100 500
AC_DET Power Main
C602 C628 C631
0.1uF C621 C624 R615 R619
100uF 0.1uF 22uF 10K
16V 100uF 16V R637 75K
16V 16V 16V 330K R2
L605 C618 1/16W
500 2200pF 1%
Power Main
Switching freq: 600K
Vout=0.827*(1+R1/R2)
3.3V_AVDD / 2.5AVDD 5V Tuner +5V_TU
Power Main
120-ohm
L610
EAP61606601
L608
+2.5V_AVDD 22.0uH
+3.3V_AVDD
1.5V DDR
MBRA340T3G
Power Main
IC605
120-ohm
P_17V C639
+5V_ST_EN TPS54231D
L611
IC600
R626
105K
IC604 0.1uF
1%
C641 C642 C644 R1
D600
AZ1085S-3.3TR/E1 TJ3964S-2.5 50V 10uF 10uF 10uF +5V_ST_EN
40V
BOOT PH 16V 16V 16V READY
INPUT OUTPUT VIN VOUT 1 2A 8 READY
3 2 1 3 R608
L602 R611
C600 1 1K 2 C616 10K READY
120-ohm C662 C623 VIN GND READY
0.1uF ADJ/GND C607 C608 Power Main READY C615 47uF 2 7 R616
10uF GND 0.1uF C613 0
16V 47uF 0.1uF A1[GN] 0.1uF 6.3V
10V 16V 0.1uF R640
6.3V 16V
EP[GND]
16V LD600 16V 0
EN COMP R627
VIN_3
PWRGD
SAM2333 3 6 20K R2
R623
BOOT
C
READY 1%
16K
R613 C620 +1.5V_DDR_IN
EN
C634 C635 C636 C640 C643 10K 0.1uF
4.7uF 4.7uF 0.01uF SS VSENSE 470pF 15pF READY
4 5 50V L606
50V 50V 50V 50V 50V
16
15
14
13
3.6uH
R624 VIN_1
3.6K C638 R625 1 12 PH_3
0.015uF 51K THERMAL
VIN_2 2 17 11 PH_2 R1
50V
R620
C609 GND_1 PH_1 10.7K C629
C611 3 IC602 10 100pF C632 C637 C647
10uF 1% C650
16V 0.1uF SN1007054RTER 50V 22uF 10uF 10uF
16V GND_2 SS 0.1uF
4 9
3.3Vst 3.3V 3A C625 0.01uF
16V 10V 10V 16V
8
1.26V Tuner
AGND
VSENSE
COMP
RT/CLK
+1.26V_TU
+5V_ST +3.3V_ST +3.3V_AVDD +3.3V_TU IC301
+5V IC606 +3.3V L300 AZ1117BH-ADJTRE1 R614
R618
IC601 AZ1085S-3.3TR/E1 120-ohm 10K R636 12K
AP2121N-3.3TRE1 2A
INPUT ADJ/GND R2 C617
330K
1/16W R2
3 1 2200pF 1%
VIN 3 VOUT INPUT 3 2 OUTPUT C309
2 C313 2 R350
22uF 0.1uF 10
1 C658 1 C797 C660 C661 10V 16V OUTPUT
C601 C605 C606 R1
0.1uF 100uF 0.1uF 0.1uF ADJ/GND 10uF C663 0.1uF 0.1uF
GND 16V C659
16V 16V 16V 16V 47uF 10uF 16V 16V R347
6.3V 1.2K
R1475 16V
1 READY Switching freq: 600K
C322 C325
0.1uF
16V
47uF
6.3V Vout=0.827*(1+R1/R2)
+5V
LG8300 1.0V SEPARATE GND
3D
LG8300 3.3V / 1.8V R1
L710 0
BLM18PG121SN1D
3D R2000
READY R1440 R2
R762 0 0
10K READY R2001 CGND1

C734
R704 READY
10K 0.1uF +1.0V
READY 16V R3
+3.3V +3.3V_3D 0
R773 0 R641
EP[GND]
0 3D
IC707
VIN_3
PWRGD
3D 3D 3D R2002
BOOT
AZ1117BH-1.8TRE1 +1.8V
C739 L709 L703 R4
EN
0.1uF BLM18PG121SN1D BLM18PG121SN1D 0

3D 3D
1/10W
50V L702 INADJ/GND R834 CGND2

16
15
14
13
3.6uH READY 3D 0
5%
VIN_1 PH_3 C749 OUT R2003

1 12 C751
THERMAL 47uF 0.1uF
VIN_2 2 17 11 PH_2 3D
R1 6.3V R5
3D 16V 3D 0
3D R778 3D
C725 3D 3D C755
C728 GND_1 3 IC704 10 PH_1 5.1K 3D 3D 3D C752
10uF 1% C743 C745 C746 C747 C748 47uF 0.1uF
16V 0.1uF SN1007054RTER R2004
100pF 22uF 10uF 10uF 0.1uF 6.3V 16V
GND_2 4 3A 9 SS 50V 10V 16V
10V 10V R6
3D C740 0
5
0.01uF CGND3
3D
3D R2005
AGND
VSENSE
COMP
RT/CLK
R779
22K R2 R7
3D 1% 0
10K
R774 3D
R775 R2006
3D 330K
C738 R8
2200pF 0
CGND4
R2007
Switching freq: 600K
Vout=0.8*(1+R1/R2) 1.8V Control for Power_On Seq of LG8300

SIDE_HDMI/USB GASKET GND
M1 M2 M3
MDS62110205 MDS62110205 MDS62110205
READY

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power 6

RF Emiiter Interface
+3.3V_3D
P704
READY READY READY READY READY

IC700 12507WS-12L
+3.3V +3.3V
+1.0V
LG8300
P_SCL
P_SDA
R745 R747 R749 R751 R753

UART_TXD_3D
UART_RXD_3D
3.3K 3.3K 3.3K 3.3K 3.3K

SPI_CSZ
L/R_DETECT
FLASH_WP
SPI_CK
SPI_DI
SPI_DO
A2
/JTAG_TRST
BOOT_SEL GND_0 1 READY
JTAG_TCLK
READY READY
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]
BOOT_SEL
F6 F5
JTAG_TDO
JTAG_TDI
JTAG_TMS
R1454 R1481 R1482
TMODE[3] VDD10_1 GND_1 2.7K 2.7K 2.7K
C818 6.3V 10uF F13 F7
TMODE[2] VDD10_2 GND_2
C791 6.3V 10uF G6 F8 2
TMODE[1] VDD10_3 GND_3
C798 16V 0.1uF G7 F9
VDD10_4
R1443
TMODE[0] GND_4
22 R1444
C756 16V 0.1uF G8 F10

22 R1445
22 R1446
R746 R748 R750 R752 R754 VDD10_5 GND_5 3 3D_RF_RXD

C763 16V 0.1uF G9 F11
22 R1449
22 R1448
3.3K 3.3K 3.3K 3.3K 3.3K ZD701

22 R902
22 R904
22 R905
22 R903
VDD10_6 GND_6 5.6B
22 R908
22 R910
22 R911
G10 F12
R708 0
R721 0
R722 0
R723 0
R725 0
R726 0
22 R907
22 R909
C770 16V 0.1uF
VDD10_7 GND_7
22
C777 16V 0.1uF G11 F14 4
R739
3D_RF_TXD
4.7K
VDD10_8 GND_8
C781 16V 0.1uF G12 G5 ZD702
VDD10_9 GND_9 5.6B R1456
C785 16V 0.1uF G13 G14 100
VDD10_10 GND_10 5 3D_RFMODULE_RESET
H6 G16
A16
B16
C16
D16
A15
B15
C15
D15
A14
B14
C14
D14
A13
B13
C13
D13
A12
B12
C12
D12
A11
B11
C11
D11
A10
B10
C10
D10 C790 16V 0.1uF
A9
B9
C9
D9
A8
B8
C8
D8
A7
B7
C7
D7
A6
B6
C6
D6
A5
B5
C5
D5
A4
B4
C4
D4
A3
VDD10_11 GND_11
C800 16V 0.1uF H13 H7 R1483
VDD10_12 GND_12 100
C808 16V 0.1uF J6 H8 6 3D_RFMODULE_DC
UART_TXD
UART_RXD
SPI_CS
SPI_SCLK
SPI_DO
SPI_DI
SCL
SDA
SCL_M
SDA_M
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]
GPIO[9]
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[22]
GPIO[23]
GPIO[24]
GPIO[25]
GPIO[26]
GPIO[27]
GPIO[28]
GPIO[29]
GPIO[30]
GPIO[31]
TDI
TMS
TRST
TDO
TCK
TEST_SE
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]
BOOT_SEL
VDD10_13 GND_13
C813 16V 0.1uF J13 H9 ZD707
VDD10_14 GND_14 5.6B R1484
C757 16V 0.1uF K6 H10 100
VDD10_15 GND_15 7 3D_RFMODULE_DD
C764 16V 0.1uF K13 H11
VDD10_16 GND_16 ZD708
B2 U18 C771 16V 0.1uF L6 H12 5.6B R1477
TE4P TE4P RA1N 100 LVDS_DATA_1_A- VDD10_17 GND_17 1K
B1 U17 R1438 L7 H14 8
TE4N LVDS_DATA_1_A+ VDD10_18 GND_18
TE4N RA1P L8 H15
B3 T18
TD4P TD4P RB1N 100 LVDS_DATA_1_B- VDD10_19 GND_19
C3 T17 R1439 L9 H16 R1453 100
TD4N LVDS_DATA_1_B+ VDD10_20 GND_20 9 3D_RF_GPIO0
TD4N RB1P L10 J7
C1 R18 ZD703
TCLK4P TCLK4P RC1N 100 LVDS_DATA_1_C- VDD10_21 GND_21 5.6B
C2 R17 R896 L11 J8
TCLK4N LVDS_DATA_1_C+ VDD10_22 GND_22 R1469 100
TCLK4N RC1P L12 J9 10
D2 P18 3D_RF_GPIO1
TC4P TC4P RCLK1N 100 LVDS_CLK_1- VDD10_23 GND_23 ZD704
D1 P17 R894 +1.0V L13 J10
LVDS_CLK_1+ VDD10_24 GND_24 5.6B
TC4N TC4N RCLK1P M6 J11 R1470 100
D3 N18 L704 11
TB4P TB4P RD1N 100 LVDS_DATA_1_D- VDD10_25 GND_25 3D_RF_GPIO2
E3 N17 R891 BLM18PG121SN1D M13 J12
LVDS_DATA_1_D+ VDD10_26 GND_26 ZD705
TB4N TB4N RD1P +1.0V_LTX J14 5.6B
E1 M18
TA4P TA4P RE1N 100 LVDS_DATA_1_E- GND_27 R1455 22
E2 M17 R883 C820 6.3V 10uF H5 J15 12 3D_L/R_SYNC
TA4N LVDS_DATA_1_E+ LTX_VDD10_1 GND_28
TA4N RE1P C795 16V 0.1uF J5 J16 ZD706
LTX_VDD10_2 GND_29 5.6B
K5 K7 13 R1478 R1479 R1480
F2 L18 C803 16V 0.1uF 1K 1K 1K
TE3P TE3P RA2N 100 LVDS_DATA_2_A- LTX_VDD10_3 GND_30
F1 L17 R878 C811 16V 0.1uF L5 K8
TE3N LVDS_DATA_2_A+ LTX_VDD10_4 GND_31
TE3N RA2P C828 16V 0.1uF M5 K9
F3 K18
LTX_VDD10_5 GND_32
TD3P
TD3N
TCLK3P
G3
G1
TD3P
TD3N
TCLK3P
IC700 RB2N
RB2P
RC2N
K17
J18
R845
R895
100
100
LVDS_DATA_2_B-
LVDS_DATA_2_B+
LVDS_DATA_2_C-
+3.3V_3D
L705
C821 16V 0.1uF
GND_33
GND_34
K10
K11
G2 J17 BLM18PG121SN1D E5 K12
TCLK3N LVDS_DATA_2_C+ VDD33_1 GND_35
TCLK3N RC2P +3.3V_VDD E6 K14
H2 H18
TC3P TC3P RCLK2N 100 LVDS_CLK_2- VDD33_2 GND_36
H1 H17 R874 C794 6.3V 10uF E7 K15
LVDS_CLK_2+ VDD33_3
TC3N
TB3P
TB3N
H3
J3
TC3N
TB3P
TB3N
LG8300 RCLK2P
RD2N
RD2P
G18
G17 R840
100 LVDS_DATA_2_D-
LVDS_DATA_2_D+
C758 16V
C765 16V
0.1uF
0.1uF
E8
E9
VDD33_4
VDD33_5
GND_37
GND_38
GND_39
K16
L14
J1 F18 C778 16V 0.1uF E10 L15
TA3P TA3P RE2N 100 LVDS_DATA_2_E- VDD33_6 GND_40
J2 F17 R897 C772 16V 0.1uF E11 M7
TA3N LVDS_DATA_2_E+ VDD33_7 GND_41
TA3N RE2P C782 16V 0.1uF E12 M8
VDD33_8 GND_42
27pF
C721
E13 M9
50V
K2
TE2P TE2P VDD33_9 GND_43
K1 A17 E14 M10
TE2N TE2N CLK_XIN VDD33_10 GND_44
K3 B18 E15 M11
25MHz
X700
VDD33_11 GND_45
R744
TD2P TD2P CLK_XOUT
1M 1%
L3 B17 F15 M12
C722
L712 VDD33_12 GND_46
27pF
TD2N TD2N PO_RST_N G15 M14
50V
L1 BLM18PG121SN1D
TCLK2P TCLK2P VDD33_13 GND_47
L2 V2 +3.3V_LRX M15
TCLK2N TCLK2N LR_SYNC GND_48
M2 V3 C832 6.3V 10uF L16 N5
TC2P TC2P EMITTER_PULSE LRX_AVDD33_1 GND_49
M1 C829 16V 0.1uF N16 N6
TC2N R1452 LRX_AVDD33_2 GND_50
TC2N 0 C831 16V 0.1uF N15
M3
TB2P TB2P LG8300_RESET GND_51
N3 +3.3V_LTX E4 P5
TB2N TB2N LTX_AVDD33_1 GND_52
N1 R1450 L706 C833 6.3V 10uF G4 P11
TA2P TA2P 0 LTX_AVDD33_2 GND_53
N2 3D_L/R_SYNC BLM18PG121SN1D C796 16V 0.1uF L4 R4
TA2N TA2N LTX_AVDD33_3 GND_54
C804 16V 0.1uF N4 R14
LTX_AVDD33_4 GND_55
P2 C812 16V 0.1uF J4
TE1P TE1P LTX_AVDD33_5
P1 C815 16V 0.1uF M16
TE1N TE1N LRX_AVSS33_1
P3 C816 16V 0.1uF P16
TD1P TD1P LRX_AVSS33_2
R3 C836 6.3V 10uF T4
TD1N TD1N DDR_VREF0
R1 C835 16V 0.1uF R11 F4
TCLK1P TCLK1P DDR_VREF1 LTX_AVSS33_1
R2 DDR_VREF_LG8300 C817 16V 0.1uF V17 H4
TCLK1N TCLK1N DDR_VREF2 LTX_AVSS33_2
T2 C837 16V 0.1uF K4
TC1P TC1P LTX_AVSS33_3
T1 N7 M4
TC1N TC1N DDR_VDDQ_1 LTX_AVSS33_4
T3 N8 P4
TB1P TB1P +1.8V DDR_VDDQ_2 LTX_AVSS33_5
U3 N9
TB1N TB1N DDR_VDDQ_3
U1 C838 6.3V 10uF N10
TA1P TA1P DDR_VDDQ_4
N11 C17
DDR_ADDR[10]
DDR_ADDR[11]
DDR_ADDR[12]
DDR_DQS_N[0]
DDR_DQS_N[1]
DDR_TDOUT[0]
DDR_TDOUT[1]
U2 C792 6.3V 10uF

+3.3V_3D
DDR_ADDR[0]
DDR_ADDR[1]
DDR_ADDR[2]
DDR_ADDR[3]
DDR_ADDR[4]
DDR_ADDR[5]
DDR_ADDR[6]
DDR_ADDR[7]
DDR_ADDR[8]
DDR_ADDR[9]
TA1N TA1N DDR_VDDQ_5 DDRPLL_AVSS33

DDR_DQS[0]
DDR_DQS[1]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
C760 16V 0.1uF N12 D17

DDR_BA[0]
DDR_BA[1]
DDR_RAS_N
DDR_CAS_N
DDR_DM[0]
DDR_DM[1]
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_TAOUT
DDR_VDDQ_6 SYSPLL_AVSS33
DDR_CK_N
DDR_CS_N
DDR_WE_N
C767 16V 0.1uF N13 E16

DDR_CKE
DDR_ODT
DDR_VDDQ_7 ADPLL_AVSS33 L707

DDR_CK
C774 16V 0.1uF N14 F16 BLM18PG121SN1D

DDR_VDDQ_8 SSPLL_AVSS33
C779 16V 0.1uF P6 +3.3V_PLL
DDR_VDDQ_9
C783 16V 0.1uF P7 C18 C834 0.1uF
DDR_VDDQ_10 DDRPLL_AVDD33
C787 16V 0.1uF P8 D18 C773 0.1uF
U5
V8
V5
U8
R6
T8
T6
R8
R7
U7
C_DDR_A[10] R9
C_DDR_A[11] T7
C_DDR_A[12] V7
U9
T9
V6
U6
V9
R5
U4
V4
T5
R10
V14
V12
U14
U12
R15
T12
C_DDR_DQ[0] V15
T15
U16
T16
R16
V16
T14
U15
T13
V11
U13
U11
T11
V13
R12
R13
U10
T10
V10
DDR_VDDQ_11 SYSPLL_AVDD33
C793 16V 0.1uF P9 E17 C766 0.1uF
DDR_VDDQ_12 SSPLL_AVDD33
C_DDR_A[0]
C_DDR_A[1]
C_DDR_A[2]
C_DDR_A[3]
C_DDR_A[4]
C_DDR_A[5]
C_DDR_A[6]
C_DDR_A[7]
C_DDR_A[8]
C_DDR_A[9]
C802 16V 0.1uF P10 E18 C759 0.1uF

DDR_VDDQ_13 ADPLL_AVDD33
C_DDR_DQ[10]
C_DDR_DQ[11]
C_DDR_DQ[12]
C_DDR_DQ[13]
C_DDR_DQ[14]
C_DDR_DQ[15]
C810 16V 0.1uF P12 C839 10uF

C_DDR_DQ[1]
C_DDR_DQ[2]
C_DDR_DQ[3]
C_DDR_DQ[4]
C_DDR_DQ[5]
C_DDR_DQ[6]
C_DDR_DQ[7]
C_DDR_DQ[8]
C_DDR_DQ[9]
DDR_VDDQ_14
C814 16V 0.1uF P13
C_DDR_BA[0]
C_DDR_BA[1]
/C_DDR_WE
C_DDR2_CLK
/C_DDR_RAS
/C_DDR_CAS
C_DDR_DQM0
C_DDR_DQM1
C_DDR2_ODT
/C_DDR2_CLK
C_DDR_DQS0P
C_DDR_DQS1P
C_DDR_DQS0M
C_DDR_DQS1M
/C_DDR_CS
DDR_VDDQ_15
C_DDR2_CKE
P14
DDR_VDDQ_16
C_DDR_A[12-0]
P15
DDR_VDDQ_17
C_DDR_DQ[15-0]
Serial Flash +3.3V_3D EJTAG

+3.3V_3D
2MBit
IC702
R758
10K
W25X20BVSNIG C735 R776

0.1uF 3.3K
SPI_CSZ R763 R765
CS
1 8
VCC 16V 3.3K 3.3K
READY R768
SPI_DO R761 3.3K +1.8V
DO HOLD 3.3K +1.8V
2 7
R764
3.3K
TP7
WP CLK
3 6
SPI_CK /JTAG_TRST
C TP1
GND DIO
B Q703 4 5 SPI_DI JTAG_TDI TP2
FLASH_WP KRC103S JTAG_TDO
READY TP3
E DDR_VREF_LG8300 DDR_VREF_DDR
JTAG_TMS TP4 R998 R996
JTAG_TCLK TP5 4.7K 4.7K
0 R759 1% 1%
TP6
R770 R999 R997

1K 4.7K 4.7K
1% 1%
LG8300_RESET C843 C842 C840 C841
0.1uF 1000pF 0.1uF 1000pF
+3.3V_3D
SW700
JTP-1127WEM R757 R772 Close to LG8300 Close to DDR2(IC701)
1 2 0 10K
LG8300_RESET
C737
3 4 0.1uF
16V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 3DF 7

PDP TV Repair Guide
< Applicable Model >
- PD11A/B/L/K
ⓒ LG Electronics. Inc.2010
PDP TV Repair Process Index
No. Symptom (L) Symptom (M) Page Remark
1 No Picture/Sound OK 1
2 No Picture/No sound 2
3 A. Picture Problem Mal-discharge/Noise/dark picture 3
4 Picture broken/Freezing 4
5 Vertical bar/ Horizontal Bar 5
6 No Power (Not turn on) 6

B. Power Problem
7 Turn off (Instant, under watching) 7
8 C. Sound Problem No sound/ Sound distortion 8
9 Remote control & Local Key checking 9

E. General function Problem
10 RF emitter checking 10
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Repair Process
A. Picture Problem Making 2010. 11. 16 전자 - 6-2
PDP TV Symptom
No Picture/Sound OK Revision 1/10
First of all, Check whether all of cable between board was inserted properly or not.
(Main B/D ↔ Power B/D, Power B/D ↔ Y-sus B/D, Power B/D ↔ Z-Sus B/D(for 60Inch), LVDS Cable, Speaker Cable, IR B/D Cable)
☞A1 ☞A2
Check Module pattern
Y Check Sound Y Check Y
by using “TILT” key Normal Normal Close
Sound OK LVDS Cable
on SVC R/C
N N
Move Replace
N
No Picture/No sound
Main B/D
Section
☞A13
☞A5~A6 ☞A12
☞A3 Check voltage Check B+ Voltage
1.Check Control Board
Check Y Y Y . LED on
. -VY on Power Board
Normal Normal Normal . Crystal(X2), 3.3V, 5V
Vs, Va . VSC / Control Board
. Rom update
. VZB .Check B+(5V)
2.Replace Control B/D
N N N
☞A8~A11
Move Move
Power problem 1. Check Y-Sus/ Z-Sus Board Power problem
Section 2. Replace defective B/D Section
※Refer to the Module label for each voltage ☞A4

<SVC R/C & Pattern>
-VY VSC VZB

1 ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV Symptom
No Picture/No Sound Revision 2/10
☞A1 ☞A2
Check Module pattern
Y Check Sound Y Check Picture Y
by using “TILT” key Normal Close
Sound OK LVDS Cable OK
on SVC R/C
N N N
☞A6
Check
Move
Video
No Picture/ Sound Ok
Section
Close
Check N Check Speaker N Y Apply Y

Normal Normal SVC Normal
“Speaker ON/Off” setting jack connection SVC Bulletin
Sound? Sound? Bulletin? Sound?
in OSD Menu & Speaker Cable open (S/W Upgrade etc)
Y Y N N
Check 17V N
Close Close Normal Check Power B/D
(Audio IC B+)
voltage? Replace Power B/D
on Power B/D
Y
Check Audio IC Short

Replace Main B/D
Repair Process
PDP TV Symptom
Mal-discharge/Noise/dark picture Revision 3/10
Check ☞A15
Picture problem
Type Check CTRL ROM Ver. N N
Dot Normal Replace Normal Replace
and
type Picture? Control board Picture? Module
Rom Upgrade
☞A14 Y Y
Mal-discharge
Close Close N
☞A5 ☞A16
☞A13
Check voltage Check
Scan Normal Y Normal N 1.Check Control B/D Normal
. –VY / VSC Y Drive B/D
Type Picture? & Picture? 2.Replace Board Picture?
(Y-Sus B/D) Replace B/D
N Y
Y
Close
Replace
Y-Sus B/D Close
☞A6-1, 2
Check RF Cable Normal N Check Tuner
Picture Noise
Connection Picture? & Replace
Y
Close
☞A9
Check Normal N 1. Check Z-Sus Board Normal N Replace
Dark Picture Picture mode Module
Picture? 2. Replace Board Picture?
setting
Y Y
Close Close
Repair Process
PDP TV Symptom
Picture broken/Freezing Revision 4/10
. By using Digital signal level meter

☞A21 . By using Diagnostics menu on OSD
Check RF Signal level ( Menu→Press red key on R/C →Signal TEST)
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Y Check whether other equipments have problem or not.

Normal
(By connecting RF Cable at other equipment)
Signal?
→ DVD Player ,Set-Top-Box, Different maker TV etc
Check RF Cable Move

Connection Normal N
No Picture/ Sound Ok
1. Reconnection Picture? Section
2. Install Booster
Y ■ Menu→Setup →Booster
Normal N N Booster menu

Check SVC Normal Y
Picture? On→Off: Check Close
S/W Version Bulletin? Picture?
Off→On: Check
Y Y N
☞A6-1, 2
S/W Upgrade Check
Close Tuner & replace
Main B/D
Normal N
Picture? Contact with signal
Normal N distributor or
Y Picture? broadcaster
Close (Cable or Air)
Repair Process
PDP TV Symptom
Vertical bar/ Horizontal Bar Revision 5/10
☞A19
☞A1
Check
defect type Regular Check Module pattern Y
Normal Replace
Vertical by using “TILT” key
Pattern? Module
Line / Bar on SVC R/C
N
☞A13
1.Check CTRL B/D
Vertical 2.Replace Board ※CTRL B/D: Control board
Line/Bar
☞A20 ☞A13
Check connection
Irregular N Check Main B/D
of Connector Y 1.Check CTRL B/D Normal
Vertical Normal Replace Module
Line / Bar (COF,TCP) 2.Replace Board Picture?
(If Main B/D doesn’t cause)
on CTRL B/D , X B/D
N
Y
1.Connector re-connection
Close
2.Eliminate foreign material on Connector
☞A18
Half 1.Check X B/D Normal N Replace
No picture 2.Replace Board Picture? Module
Y
Close
※ H-Line’s Cause is rare CTRL B/D
☞A20
☞A16
Check connection Y N N
Horizontal 1. Check Y Drive B/D Normal 1.Check CTRL B/D Normal Replace
of Connector (FFC) Normal
Line/Bar 2. Replace Board Picture? 2.Replace Board Picture? Module
on Y Drive B/D
N Y Y
1.Connector re-connection Close Close

2.Eliminate foreign material on FFC
Repair Process
B. Power Problem Making 2010. 11. 16 전자 - 6-2
PDP TV Symptom
No Power (Not turn on) Revision 6/10
☞A26
Y DC Power on N N
Check Check Repair/Replace
Power LED by pressing Power Key Normal Normal
Power LED ON? R/C IR Operation IR B/D
On Remote control
. Stand-By: Red Y Y
. Operating: Blue N
Close
Check Power cord
was inserted properly
Y
Normal Close
?
N
☞A22
Check ST-BY 5V
on Power Board
☞A22
☞A22 ☞A22
Check
Y Check Y Check Y N
Normal Normal Normal the other pin’s Replace
AC DET Signal RL_ON Signal Normal
Voltage? Signal? Signal? Output voltage Power B/D
on Power B/D on Power B/D
on Power B/D
N N Y
N ☞A23
Close
Check Power B/D Check Main B/D
Replace Power B/D Replace Main B/D
Repair Process
PDP TV Symptom
Turn off (Instant, under watching) Revision 7/10
※ To check Power B/D Protection ☞A8~A11

Y 1. Check Y-Sus/ Z-Sus Board
Instant Turn on after pull out connector Power LED (especially Short or Open)
Turn off between Power B/D & Y-Sus Blue? 2. Replace defective B/D
N
☞A23
Check Power B/D
Replace Power B/D
RCU Off
☞A24
Turn off N KEY Off
Check This is not problem
“Off Timer”
Under watching Set? Power Off History
2HOUR Off Normal operation
Y
NO Signal Off
“Off timer”
Function off Move
Don’t appear
No Power problem
Power Off History Section
Repair Process
C. Sound Problem Making 2010. 11. 16 전자 - 6-2
PDP TV Symptom
No sound/ Sound distortion Revision 8/10
1.No sound( If HDMI Input only have no sound, upload EDID data) Close
☞A25
Check N Check Speaker N Y Apply Y
Normal Normal SVC Normal
“Speaker ON/Off” setting jack connection SVC Bulletin
Sound? Sound? Bulletin? Sound?
in OSD Menu & Speaker Cable open (S/W Upgrade etc)
N N
Y Y
☞A22 ☞A23
Close Close
Check 17V N
Normal Check Power B/D
(Audio IC B+)
voltage? Replace Power B/D
on Power B/D
Y
2.Sound distortion & sound drop Check Audio IC Short

☞A2 Replace Main B/D
Check Input signal Problem in all input
→Cable connection N Check
Normal Normal
→Cable open AVL off/on Problem in only DTV
Sound? Sound?
- RF & external Clear voiceⅡ off/on
(HDMI,SCART,,,) N
Y Problem in external input
Y (SCART,HDMI,,,)
Close Close
Check whether Problem happen N Y Apply Y

in same output of other equipments or not. Normal SVC Normal
SVC Bulletin Close
(By connecting same output cable of other equipment) Sound? Bulletin? Sound?
(S/W Upgrade etc)
→ DVD Player ,Set-Top-Box, different maker TV etc
Y N N
Explain customer that Check Audio IC
Cause is RF Signal’s problem (Case 1) Replace Main B/D
Cause is Equipment’s problem (case 2)
Repair Process
D. General Function Problem Making 2010. 11. 16 전자 - 6-2
PDP TV Symptom
Remote control & Local Key & RF emitter checking Revision 9/10
1. Remote controller (R/C) operating error Replace

Main B/D
☞A26 ☞A26
☞A26
Check & Repair N Y Y
Check R/C itself Normal Y Normal Check B+ 5V Normal Check IR Normal
Cable connection
Operation operating? operating? On Main B/D Voltage? Output signal Signal?
Connector solder
N
Y N N
☞A12
Check R/C Operating Check & Replace Close Check 5V on Power B/D Repair/Replace
When turn off light Battery of R/C Replace Power B/D or IR B/D
in room Replace Main B/D
(Power B/D don’t have problem)
If R/C operate, Normal
Close
Explain the customer operating?
cause is interference
from light in room. N
Replace R/C
2. Local KEY operating error

Replace
Main B/D
☞A27 ☞A27
Check local Y Check & Repair
Normal Normal N Check Key Normal Y
key Cable connection
operating? operating? Output signal Signal?
Operation Connector solder
N Y N
Close Repair/Replace
Move
Power problem Local Key B/D
Section
Repair Process
D. General Function Problem Making 2010. 11. 16 전자 - 6-2
PDP TV Symptom
Remote control & Local Key & RF emitter checking Revision 10/10
3. RF emitter operating error
Check RF Check the signal Y Y

Normal Check the RF emitter Display
emitter between the RF emitter Close
Signal? SW Ver. at SVC menu normally
Operation and Mani board
N N Y
☞A28
☞A28
Check & Repair N
Normal Replace RF Normal
Cable connection
operating? emitter board operating?
Connector solder
Y N
Replace
Close
Main B/D
PDP TV Repair Process Reference data Index
No. Symptom Detail Page Remark
1 Check Module pattern by Tilt key A1

2 Audio check method A2
3 Check Va, Vs on Power Board A3
4 PDP Module Label Information A4
Check & Adjust –VY,VSC,VZB voltage
5 A5
- 50R3 –VY,VSC(Y-Sus) / VZB(Z-Sus)
6 Video Check Method A6
6 Fuse Checking Method A7
7 Y-Sus Board Checking Method(50R3) A8
8 Z-Sus Board Checking Method(50R3) A9
11 Check 5V on Power B/D A12
12 Picture Problem Control Board Checking Method(50R3) A13
13 Mal discharge Symptom Picture A14
14 PDP Module Rom Ver. Checking method A15
15 Y Drive B/D Checking method A16
17 (Half picture) X- B/D Checking method(50R3) A18
Next page Continued

PDP TV Repair Process Reference data Index
No. Symptom Detail Page Remark
18 Defect type cause by PDP Module A19

19 Picture Problem Connector Type on PDP Module A20
20 RF Signal level Checking method A21
21 Check voltage on Power board A22
22 Power Problem Power board Checking Method A23
23 Check Power off History A24
24 Sound Problem Speaker cable checking method A25
25 Check Remote control IR operation A26
26 General Function Problem Check Local Key operation A27
27 Check RF emitter operation A28
Repair Process-Reference data
Symptom A. Picture Problem Making 2010. 11. 16 전자 - 6-2
PDP TV
Item Check Module pattern by Tilt key Revision A1
Tilt Key
You can see 20 types patterns by using TILT Key on SVC Remote controller (except Old model)
< CHECK Item >
1. Dead pixel 2.Image sticking 3.Mal discharge 4.Module defect (V-Line/Bar, H-Line/Bar,,,)
5. In case of no picture, you can judge defect cause (Module or Main B/D)
- If patterns appear, defect cause is Main B/D
A1 ⓒ LG Electronics. Inc.2010
PDP TV Symptom
Audio check method Revision A2
Jack for Speaker connection
1.Check Audio output by using oscilloscope 2.Check whether speaker jack was inserted properly or not.
GND ↔ R- or R+ or L- or L+
Audio output waveform
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block All Input Audio Problem
Revision A2-1
Make sure you can’t hear any audio
Y
N
Check speaker for damage. Replace the Speaker
Check Connector N
Replace P301
P301
Y
Check IC303 Power N Check 17V (P600 #1,2),
17V(C340), 3.3V(R365,R374) 3.3V (IC606 #2)
Y
N Check
Check IC700 Status
Reset (R380) / PDN (R374)
PDN(#23) / Reset(#31) is High?
:They must be High (3.3V)
Y
N
Check SCL,SDA
Replace R359, R360
R359, R360
Y
N
Check Mstar I2S Output
Replace MSTAR(IC400).
#27,28, 29, 30 on IC303
Replace AMP(IC303)
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block Digital TV / HDMI Audio Problem
Revision A2-2
◆ Digital TV
N Follow procedure digital TV
Check video output
video trouble shooting
Y
Follow procedure All source audio

trouble shooting
◆ HDMI
N Follow procedure HDMI video
Check video output
trouble shooting
Y
N
Check EDID Download Re-download EDID data
Follow procedure All source audio

trouble shooting
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block Analog TV Audio Problem
Revision A2-3
N Follow procedure analog TV

Check video output
video trouble shooting
Y
N
Check #3 on TU300 for 5V Check IC605 output Voltage
N
Check SIF signal C301 Replace TU300
N
Check SIF signal (C301) Check SIF line
Follow procedure All source audio < SIF waveform – sample >
trouble shooting
- Defend on the input signal.
Y
Replace MSTAR IC (IC400)
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block Component / AV/RGB Audio Problem
Revision A2-4
Check Connector and cables

JK210(Component) N Replace connector or
JK100, JK101 (SCART)
cable if found damaged
JK208 (RGB)
JK207 (Side AV)
Y
Check signal
JK210 (Component) : R261, R262
JK100, JK101 (SCART) : R128, R131, R193, N
Replace the Resistor
R194
JK208 (RGB) : R215, R216
JK207 (Side AV) : R1201, R1202
Y
Check IC400 signal
JK210 (Component) : C441, C442
JK100, JK101 (SCART) : C435, C436, C437, N
Replace the Capacitor
C438
JK208 (RGB) : C443, C444
JK207 (Side AV) : C439, C440
Y
Follow procedure
All source audio trouble shooting
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block Optical Audio Problem
Revision A2-5
Check Signal (JK204 #3)
Y
N Check P601 Output
Check 5V #2 on JK204
(L604,L605)
Y
N
Check SPDIF signal (R296) Replace MSTAR(IC400)
< SPDIF waveform – sample >

PDP TV Symptom
Check Va, Vs on Power Board Revision A3
▶ Check Va & Adjust Va Voltage

(Refer to the Module label for Va specification)
Z-Sus Board
PDP Module Label Power Board ▶ Check Vs & Adjust Vs Voltage
(Refer to the Module label for Vs specification)
Y-Sus Board
Check Va Check Vs
Vs Adjustment
Control Board (VR901)
Main Board Va Adjustment

(VR502)
A3
PDP TV Symptom
PDP Module Label Information Revision A4
PDP Module Label Information.
① ⑨
⑧
② ⑩
③
⑪
④
⑤ ⑫
⑦ ⑬
⑥ ⑭
Vy Vsc Vzb
① Model Name ⑨ UL Approval Mark

② Bar Code ⑩ UL Approval No.
(Code 128, Contains the manugacture No.) ⑪ Model Name
③ Manugacture No.
⑫ Max. Watt
④ Adjusting Voltage(DC Va, Vs)
⑬ Max. Volts
⑤ Adjusting Voltage (Set up/-Vy/Vsc/Ve/Vzb)
⑭ Max. Amps
⑥ The trade name of LG Electronics
⑦ Manufactured date(Year & Month)
⑧ Warning A4 ⓒ LG Electronics. Inc.2010
PDP TV Symptom
Check & Adjust –VY,VSC,VZB voltage(50R3) Revision A5
Voltage Check & Adjustment : 50R3 YSUS board

<Module Label>
Vsc adjustment
Fuses
-Vy adjustment
Vy Vsc Vzb
1. Vsc (150V) on Y-Sus B/D

- Check Point: R324
- Adjustment Point: VR301
2. -Vy (-190V) on Y-Sus B/D

- Check Point: R334
PDP TV Symptom
Check & Adjust –VY,VSC,VZB voltage(50R3) Revision A5
Voltage Check & Adjustment : 50R3

<Module Label> ZSUS board
Vzb adjustment
Vy Vsc Vzb
3. VZB (115V) on Z-Sus B/D

. Check Point: R156
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block Digital TV Video Problem
Revision A6-1
Check RF Cable
Y
Check Voltage
Check TU300 Power N
5V : IC605 Output
5V(C304), 3.3V(C302),
3.3V : IC600 Output
1.2V(C300)
1.2V:IC301 Output
Y
N Check Monitor Out Video N

Check Video color
(Scart out) Replace Tuner
Y Y
N
Check IIC Line Check TU_SCL/SDA Line
Y
N
Check other input / OSD Check Module
Y
Change MSTAR(IC400)
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block Analog TV Video Problem
Revision A6-2
Check RF Cable
Check 5V voltage N Check IC605 Output

on TU300(Pin3) Voltage(L610)
Y
Check CVBS signal N

Replace Tuner(TU300)
TU601 #11 Pin
Replace MSTAR(IC400)
< CVBS waveform – sample >

Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block Component Video Problem
Revision A6-3
Check input signal format

Is it supported?
Check Component Cable
Check signal N Check the damage of JK210

on R411,C413,C415 And Replace Connector
※ Measured signals depend on the input signal.
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block RGB(D-Sub) Video Problem
Revision A6-4

Is it supported?
Y
Check RGB Cable

conductors for damage
Y
N
Check P205 Replace connector (P205).
Check signal, Hsync, Vsync

R218, R219
Y
N
Check signal
Replace R404, R406, R408
R404, R406, R408
※ Measured signals depend on the input signal.

Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block AV Video Problem
Revision A6-5

Is it supported?
Check AV Cable for damage or open

conductors
Y
N
Check AV port of JK207(Side),
Replace connector
JK100,JK101(Rear)
Check signal line

N
JK207-Video : C425
Replace Capacitor
JK100-Video : C408,C410,C412(RGB),
C423(CVBS)
Replace MSTAR(IC400) ※ Measured signals depend on the input signal.
Input Making 2010. 11. 16 전자 - 6-2
PDP TV Block HDMI Video Problem
Revision A6-6

Is it supported?
Check HDMI Cable for damage or

open conductors
Y
N
Check EDID D/L Re-Download EDID
Check JK200 / J201 / J202 N

Replace Connector
for proper connection or damage
PDP TV Symptom
Fuse Checking Method Revision A7
< DMM mode >
Pic. 1. Fuse check
Pic. 1. Pic. 2.
1) Sound comes, the fuse is OK.

2) If Fuse is defects, it should check again voltage of 5V, Va, Va after replacing the fuse.
3) In case there are no voltage of 5V, Va, Vs, the board is failure, it need to replace the board.
PDP TV Symptom
Y-Sus Board Checking Method(50R3) Revision A8
▣ Check Method
① Check input voltages(5V, Va, Vs) at P103 connector. YSUS board
② Check it is short or not between Vs and GND at P103 connector.
③ Check all of fuses open. (FS201, FS202, FS203, FS501)
④ Check voltage of diode , FET by using digital multi-meter. FS203
Vs fuse
▣ Measurement method
Diode FET P113
FS202
5V fuse
FS201
▣ Specifications Va fuse
Position Direction Circuit No. FS501
D610 Q606,Q607 Q608,Q609 18V fuse
HS601 Forward 0.35V ~ 0.45V 0.45V~0.55V 0.45V~0.55V
Reverse O.L. (Overload)
HS603
HS601
HS602
D604,D605 Q601,Q602
HS602 Forward 0.35V ~ 0.45V 0.45V~0.55V
D602 Q603,Q605 Q610,Q612
HS603 Forward 0.35V ~ 0.45V 0.35V ~ 0.45V 0.4V~0.5V
A8
PDP TV Symptom
Z-Sus Board Checking Method(50R3) Revision A9
① Check input voltages(5V, Va, Vs) at P203 connector.

② Check it is short or not between Vs and GND at P203 connector. ZSUS board
③ Check all of fuses open. (FS202) P203
④ Check voltage of diode , FET by using digital multi-meter.
▣ Measuring Method FET Diode
▣ Specifications
HS101
HS102
Position Direction Circuit No.
D114,D118 Q107, Q110 Q106, Q109
HS101 Forward 0.35V ~ 0.45V 0.35V ~ 0.45V 0.35V ~ 0.45V
D109,D110,D108,D111 Q104,Q113,Q114 Q102,Q103
HS102 Forward 0.35V ~ 0.45V 0.5V ~ 0.6V 0.45V~0.55V
FS202
5V fuse
PDP TV Symptom
Check 5V, 17V on Power B/D Revision A12
Power Board
P813
P600
P813
▣ Measure 5V voltage ▣ Measure 17V voltage
17.02

PDP TV Symptom
Control Board Checking Method(50R3) Revision A13
▣ Checking Method ④ Check IC ( IC53, IC51 )
① Check input voltages(5V of P105 / 18V of P2) at control IC53 IC51

board. 5V
② Check LED is on. 3.3V 3.3V
GND
③ If LED doesn’t work, check crystal X1 output.
④ Check 3.3V, 5V IC.
⑤ Check MCM at VS_DA by using digital multi meter.
② Check LED On
③ Check Crystal(X1)
Check oscillation of Crystal
(Normal: 25 MHZ)
⑤ Check MCM
P2(18V)
P105_FL1,FL2(5V) Pin14, 15
MCM Check point
(+)VS_DA / (-) GND
(Normal: 3.3V ) Pin 14,15 : 18V
① Check Input voltage

PDP TV Symptom
Mal discharge Symptom Revision A14
▣ Dot type Mal-discharge symptom
▣ Dark picture caused by Mal-discharge ▣ Scan type Mal-discharge symptom

PDP TV Symptom
PDP Module Rom Ver. Checking method Revision A15
▣ Check by using Rom Label on control board
Rom ver. Label
▣ Check by using SVC Remote controller

Press “In-start” →Press ”0413” ※Refer to the Module Rom upgrade manual
→ Select Panel Control → Check Module Rom ver. for Rom upgrade.
USB Type Jig

PDP TV Symptom
Y Drive B/D Checking method(50R1) Revision A16
▣ Y drive board
Scan IC
※ DMM (Digital Multi-Meter)
Input signal connector
※ Check all output pins of scan IC (connector) using DMM.

PDP TV Symptom
(Half picture) X- B/D Checking method(50R1) Revision A18
▣ Half / partly display (or abnormal display) Picture 1. Picture 2. Picture 3.

-. Check Va input voltage. abnormal
(P121, P120, P220, P221, P320 : Power connector of the X board) Half
-. Check cables between CTRL board and X board. display
-. Replace the X B/D.
(abnormal)
-. Check TCP connection after X B/D replacement.
▣ Connections between panel and X B/D Partly abnormal

-. Right display (Picture 1.) ↔ Check/replace right X B/D display
-. Both ends display (Picture 2.) ↔ Check/replace center X B/D
(abnormal)
-. Left display (Picture 3.) ↔ Check/replace left X B/D
※ Check connections (TCP - X board, CTRL board - X board)
Va from CTRL Va from CTRL Va from CTRL

PDP TV Symptom
Defect type cause by PDP Module Revision A19
First of all, Check whether all of cable between board was inserted properly or not.
Next, Check whether there is foreign material on connector.
Symptom picture defects description To action
1. Check connection
(CTRL B/D, X B/D)
Regular vertical lines
2. Check CTRL B/D
3. Replace CTRL B/D
1. Check connection
(CTRL B/D, X B/D)
Vertical lines or Bar
2. Check CTRL B/D
3. Replace CTRL B/D
1. Check connection
(CTRL B/D, X B/D)
Many irregular vertical lines
2. Check CTRL B/D
3. Replace CTRL B/D
1. Check connection
(Y-Sus B/D ↔Panel)
Horizontal Line or Bar
2. Check Y-Sus B/D
3. Replace Y-Sus B/D

PDP TV Symptom
Connector Type on PDP Module Revision A20
COF Type TCP Type FFC Type
96 Out Put 192 Out Put
1. Check foreign & Connection status TCP (Tape Carrier Package) is film Connector to connect between
2. Check bad soldering for IC connect with Electrode pattern Electrode PAD Of PANEL and
on Chip resistance (Direct Bonding) on X B/D Y Drive B/D,Z-Sus B/D
▣ Defect symptom

PDP TV Symptom
RF Signal level Checking method Revision A21
◆ MENU Æ Press Red Button on R/C Æ Singal TEST -> Diagnostics
1. Check whether Signal Strength, Signal Quality is over 50% or not.

2. If Signal Strength, Signal Quality is under 50%,install the Booster to increase signal level.

PDP TV Symptom
Check voltage on Power board Revision A22
P813
Pin Map
Power B/D↔Main B/D Checking
Checking Order
Order
Checking
No. Spec Remark
Point
1 STBY 5V
2 5V 5V
3 17V 17V
4 AC DET High(3.3V~5V)
5 RL_ON High(3.3V~5V)
6 M_ON High(3.3V~5V)

PDP TV Symptom
Power board Checking Method Revision A23
P811
Power B/D↔ Y-Sus B/D(P811) ◆ Check 5V,Va,Vs voltage
: For Voltage specification,

PIN NAME refer to the PDP Module Label.
Vs adjust 1 VS
2 VS
Va adjust 3 NC
4 GND
5 GND
6 VA
7 M5V
SC101
P813
Va Voltage ADJ
◆ Adjust Va,Vs voltage.
▣ Checking Method
① Check soldering status on each major component. - value + value
② Check there is problem on major component or not by eye.

(CONDENSER, FET, IC, Resistor)
Vs Voltage ADJ
③ Check FUSE.
④ Check 5V,Va,Vs voltage
Adjust way
※ PSU Maker: 1) LGIT 2) LITEON 3) YUYANG
※ If happen Power board Protection,
check whether there is Short or Open on Y-SUS, Z-SUS B/D or not.
PDP TV Symptom
Check Power off History Revision A24
▣ Check Power off History by using SVC Remote controller

Press “In-start” →Press” 0000” → Select “Power Off History” → Pop up Module Rom ver.
LAST HISTORY Appear Power off history 5ea.

1~5 (1 is the latest history)
RCU OFF Power off by Remote control
KEY OFF Mechanical power switch off
After turn on by OnTimer, There is no operation

2HOUR OFF
for 2hours
NO SIGNAL OFF In case that there is no signal for 15minutes

C. Sound Problem Making 2010. 11. 16 전자 - 6-2
PDP TV Symptom
Speaker cable checking method Revision A25
Jack for Speaker connection
Speaker
1.Check whether speaker jack was inserted properly on Main B/D side & speaker side or not.
2. Check whether speaker cable have problem (disconnection wire) or not.

D. General function defect Making 2010. 11. 16 전자 - 6-2
PDP TV Symptom
Check Remote control IR operation Revision A26
IR
GND
KEY1
KEY2
LED-RED
GND
SCL
SDA
GND
3.3V ST
NC
NC
TOUCH_VER_CHK
NC
IR Board NC
▣ Checking method
1.Check connector was inserted properly

on Main board and IR board.
2. Check +3.3V_ST Voltage at Pin10
3. Check whether appear voltage on multi meter
when operate remote control.
※ Test Condition for case 3
→ Check Point: Pin 1( IR)
→ TV: power on status
→ Multi meter: Select DC 10V
IR & Local key Board for 2/3/4/550 TOOL

PDP TV Symptom
Check Local Key operation A27
IR
GND
KEY1
KEY2
LED-RED
GND
SCL
SDA
GND
3.3V ST
NC
NC
TOUCH_VER_CHK
NC
NC
P+ P- Vol+ Vol- OK Menu Input Power

on Main board and IR board.
when operate Local switch.
IR & Local key Board for 2/3/4/550 TOOL → Check Point: Pin 2,3( Key1,Key2)
→ Multi meter: Select DC 10V

PDP TV Symptom
Check RF emitter operation A28
+3.3V
GND
3D_RF_RXD
3D_RF_TXD
3D_RFMODULE_RESET
3D_RFMODULE_DC
3D_RFMODULE_DD
GND
3D_RF_GPIO0
3D_RF_GPIO1
3D_RF_GPIO2
3D_L/R_SYNC

on Main board and RF emitter board.
when operate RF emitter board.
→ Check Point: Pin 12
RF emitter Board → Multi meter: Select DC 10V

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Internal Use Only

North/Latin America http://aic.lgservice.com

P/NO : MFL67013001(1101-REV00) Printed in Korea

SAFETY PRECAUTIONS ...........................................................................................................3

ADJUSTMENT INSTRUCTION ..................................................................................................6

BLOCK DIAGRAM ...................................................................................................................14

EXPLODED VIEW .................................................................................................................. 15

CIRCUIT DIAGRAM .....................................................................................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Good Earth Ground

No Item Specification Remarks

1. Application Range 3. Main PCB check process

3-1. Boot file Download

O After RGB Full White in HEAT-RUN Mode, the receiver

(8) Push The “IN STOP KEY” - For memory initialiLAtion.

(5) Updating Completed, The TV will restart automatically.

* Caution: Using ‘power on’ button of the Adjustment R/C , power

Adjust ‘Mode In’ ‘Mode In’ Cool 11000K

Mode Carry the Medium 9300K

command. Warm 6500K

ADC ADC A D 1 0 Automatically

6-1. Check display and sound

7-6. EDID DATA

7-7. EDID DATA Auto Download

* To check the coordinates of White Balance, you have to

(4) 2D - HD HDMI3 EDID data

7-9. EDID DATA

(2) 2D - HD HDMI1 EDID data

O Checksum: Changeable by total EDID data.

(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12)

* This test is to check Network operation.

10. 3D Function Test

(1) Please input 3D test pattern like below

11. Model name & Serial number

11-3. Command Set

12. CI+ Key Download

11-4. Method & notice

1) Press the ‘instart’ key of ADJ remote controller.

2) check the key download for transmitted command

12-3. Check the method of CI+ Key value

(2) Check the mothed of CI+ key by command

((3) result value

13. SW Download Guide.

(1) Put the USB Stick to the USB socket

(4) Updating is staring.

(5)0 Updating Completed, The TV will restart automatically.

(6) When TV turn on, check the Updated version on

- 15 - LGE Internal Use Only

10067972-000LF CI_ADDR[8] PCM_A[8] PCM_A[1]

/CI_CD1 36 R142 CI_ADDR[11] PCM_A[11] CI_ADDR[5] CI_ADDR[2]

BUF_FE_TS_DATA[0] CI_ADDR[14] BUF_FE_TS_DATA[2] FE_TS_DATA[2]

CI DETECT CI POWER ENABLE CONTROL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright © 2011 LG Electronics Inc. All rights reserved.

5V_HDMI_2 5V_DET_HDMI_2 5V_HDMI_3 5V_DET_HDMI_3 HDMI RS232C R295 0

HDMI_1 HDMI_2 SIDE_HDMI 5V_HDMI_4 5V_DET_HDMI_4

HDMI2 HDMI Side R292

6A T_TERMINAL1 AT24C02BN-SH-T SIDE_USB_DM 33

PC_R_IN R235 C219 SIDE_USB_DP

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright © 2011 LG Electronics Inc. All rights reserved.

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