Discussion of Results:

During the experiment, the group was able to verify the operations of the NOT
gate, two-input AND gate and two-input OR gate based on their respective truth tables.
Moreover, the group verified the double negation theory stating that a variable, to which
two NOT operators are consecutively applied, does not change its logic value.

The experiment involved using the Module DL 3155M18T which contains the
gates to be used. The NOT, AND and OR gates all have 14 pins wherein the pin 7 is for
the ground and the pin 14 is for the VCC, but in the Module DL 3155M18T, it is already
powered-up. All that needs to be done is to tap or connect the VCC and the GND to the
corresponding VCC and GND which is located below the gate.

First, for the NOT gate or the inverter, 7404 TTL IC, a truth table is formulated to
compare the expected output to the actual output. Based on the truth table, the NOT
gate inverts the logic signal applied to its input. In other words, it complements the input.
The group followed the figure 1-4 for the circuit diagram. As performed in the
experiment, when logic low or near zero volts is applied as the input, the actual output is
logic high and the red LED is on. While if the input is logic high or 5V, the actual output
is logic low and the green LED is on.

For the double negation theory, the group used two NOT gates consecutively
using figure 1-5 as basis for the circuit diagram. Based from the truth table formulated
by the group, the output should have the same logic value with the input. As performed
in the experiment, when logic low is applied as the input, the actual output is still logic
low and the green LED is on. While if the input is logic high, the actual output is still
logic high red LED is on.

Second, for the 7408 quad 2-input AND gate, a truth table is formulated which
states that an AND gate has a high logic level output only when its input is all logic high.
The group followed the figure 1-6 for the circuit diagram. As performed in the
experiment, the combinations of logic [0,0], [0,1] and [1,0] all have an actual output of
logic low and the green LED is on. While if the combination of logic [1,1], the actual
output is logic high and the red LED is on.

Third, for the 7432 quad 2-input OR gate a truth table is formulated which states
that an OR gate has a high logic level output when at least one of the inputs is at high
logic level. The group followed the figure 1-7 for the circuit diagram. As performed in the
experiment, the combination of logic [0,0], has an actual output of logic low and the
green LED is on. While the combinations of logic [0,1], [1,0] and [1,1], the actual output
is logic high and the red LED is on.
 Lastly, for the extra works, the instructor gave a circuit design that has 3 inputs:
A, B and C with an output F. the setup involved three inverters, one two-input AND gate,
one 2-input OR gate, one 3-input AND gate and one 3-input OR gate. By analysing the
inputs and the logic gates, the group formulated the Boolean Expression of the function
F, F(A,B,C)=(A’BC’) + (B+C’) + A(B+C’). Before doing the actual implementation, the
group first constructed a circuit implementation about the proper connections from the
inputs A,B and C as it goes to the logic gates up to the final output F. The circuit
diagram uses a 3-input AND gate and 3-input OR gate, and through the circuit
implementation, by utilizing the 4 gates in each AND and OR gate, the same expected
outputs were still achieved.

The group formulated a truth table for the given circuit in order to compare it to
the actual outputs. Based on the circuit diagram, given 3 inputs, there are 8 outputs
wherein the combinations of logic [0,0,0], [0,1,0], [0,1,1], [1,0,0], [1,1,0] and [1,1,1], all
have a logic high or 5V output and the red LED is on. On the other hand, the two
combinations of logic [0,0,1] and [1,0,1] have a logic low or near zero volts output and
the green LED is on.

For the timing diagram, the group first formulated one using the truth table as
basis. The output F in the timing diagram is HIGH, LOW, HIGH, HIGH, HIGH, LOW,
HIGH, HIGH. Moreover, using the De Lorenzo Training Software, the group was able to
acquire the actual timing diagram of the circuit which was taken from the Logic
Waveform Analyzer (LWA). The expected and actual timing diagram is the same.

Conclusion:

After the experiment, the group was able to verify the operation of the NOT, AND
and OR gates based on their respective truth tables. For the NOT gate or the inverter,
7404 TTL IC, based on the truth table, it inverts the logic signal applied to its input. Its
actual outputs of the NOT gate from the experiment were identical to the outputs in the
truth table. For the double negation theory, based on the truth table, the output should
have the same logic value with the input. The actual outputs of using two consecutive
NOT gates from the experiment were identical to the outputs in the truth table. For the
7408 quad 2-input AND gate, based on the truth table, it has a high logic level output
only when its input is all logic high. The actual outputs of the AND gate from the
experiment were identical to the outputs in the truth table. For the 7432 quad 2-input OR
gate, based on the truth table, it has a high logic level output when at least one of the
inputs is at high logic level. The actual outputs of the OR gate from the experiment were
identical to the outputs in the truth table. Since the actual outputs of each gate are
identical to its corresponding truth table, therefore, the group was able to verify each
gate’s operation.

Moreover, for the extra works, based on the given circuit diagram, there are 8
outputs. The combinations of logic [0,0,0], [0,1,0], [0,1,1], [1,0,0], [1,1,0] and [1,1,1], all
have a logic high output. While the two combinations of logic [0,0,1] and [1,0,1] have a
logic low output. From the formulated truth table and timing diagram, the outputs were
verified as it was identical to the actual timing diagram taken from the De Lorenzo
Training Software which is HIGH, LOW, HIGH, HIGH, HIGH, LOW, HIGH, HIGH.