Dual N-Channel Enhancement Mode P07D03LVG

NIKO-SEM SOP-8
Field Effect Transistor
Lead-Free

PRODUCT SUMMARY
V(BR)DSS RDS(ON) ID
30 20mΩ 7A G : GATE
D : DRAIN
S : SOURCE

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS
Drain-Source Voltage VDS ±30 V
Gate-Source Voltage VGS ±20 V
TC = 25 °C 7
Continuous Drain Current ID
TC = 70 °C 6 A
1
Pulsed Drain Current IDM 40
TC = 25 °C 2
Power Dissipation PD W
TC = 70 °C 1.3
Junction & Storage Temperature Range Tj, Tstg -55 to 150
1
°C
Lead Temperature ( /16” from case for 10 sec.) TL 275

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS
Junction-to-Ambient RθJA 62.5 °C / W
1
Pulse width limited by maximum junction temperature.
Duty cycle ≤ 1%
2

ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)

LIMITS
PARAMETER SYMBOL TEST CONDITIONS UNIT
MIN TYP MAX
STATIC
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 30
V
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 0.7 1 1.4
Gate-Body Leakage IGSS VDS = 0V, VGS = ±20V ±100 nA
VDS = 24V, VGS = 0V 1
Zero Gate Voltage Drain Current IDSS µA
VDS = 20V, VGS = 0V, TJ = 55 °C 10
1
On-State Drain Current ID(ON) VDS = 5V, VGS = 10V 25 A

1 Jun-29-2004
 Dual N-Channel Enhancement Mode P07D03LVG
NIKO-SEM SOP-8
Field Effect Transistor
Lead-Free

Drain-Source On-State VGS = 2.5V, ID = 5A 40 48

1
Resistance RDS(ON) VGS = 4.5V, ID = 6A 23 30 mΩ

VGS = 10V, ID = 7A 18 25
1
Forward Transconductance gfs VDS = 15V, ID = 5A 16 S
DYNAMIC
Input Capacitance Ciss 830
Output Capacitance Coss VGS = 0V, VDS = 15V, f = 1MHz 185 pF
Reverse Transfer Capacitance Crss 80
2
Total Gate Charge Qg 9 13
2 VDS = 0.5V(BR)DSS, VGS = 5V,
Gate-Source Charge Qgs 2.8 nC
Gate-Drain Charge
2
Qgd ID = 7A 3.1
2
Turn-On Delay Time td(on) 5.7
2
Rise Time tr VDS = 15V 10
2
nS
Turn-Off Delay Time td(off) ID ≅ 1A, VGS = 10V, RGEN = 6Ω 18
2
Fall Time tf 5
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current IS 3
3
A
Pulsed Current ISM 6
1
Forward Voltage VSD IF = 1A, VGS = 0V 1 V
Reverse Recovery Time trr IF = 5A, dlF/dt = 100A / µS 15.5 nS
Reverse Recovery Charge Qrr 7.9 nC
Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.
1
2
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.

REMARK: THE PRODUCT MARKED WITH “P07D03LVG”, DATE CODE or LOT #

Orders for parts with Lead-Free plating can be placed using the PXXXXXXXG parts name

2 Jun-29-2004
 Dual N-Channel Enhancement Mode P07D03LVG
NIKO-SEM SOP-8
Field Effect Transistor
Lead-Free

TYPICAL PERFORMANCE CHARACTERISTICS

3 Jun-29-2004
 Dual N-Channel Enhancement Mode P07D03LVG
NIKO-SEM SOP-8
Field Effect Transistor
Lead-Free

4 Jun-29-2004
 Dual N-Channel Enhancement Mode P07D03LVG
NIKO-SEM SOP-8
Field Effect Transistor
Lead-Free

SOIC-8(D) MECHANICAL DATA

mm mm
Dimension Dimension
Min. Typ. Max. Min. Typ. Max.

A 4.8 4.9 5.0 H 0.5 0.715 0.83

B 3.8 3.9 4.0 I 0.18 0.254 0.25

C 5.8 6.0 6.2 J 0.22

D 0.38 0.445 0.51 K 0° 4° 8°

E 1.27 L

F 1.35 1.55 1.75 M

G 0.1 0.175 0.25 N

F
I
G H K
D E

B C

5 Jun-29-2004