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Basic MOS Device Physics
Channel area
Source Drain
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Basic MOS Device Physics
When both NMOS and PMOS devices are needed to be placed on one chip, n-well or p-well is
needed.
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Basic MOS Device Physics
1.) A deep n-well that can be utilized to reduce substrate noise coupling.
3.) At least 6 levels of metal that can form many useful structures such as
inductors, capacitors, and transmission lines.
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Basic MOS Device Physics
P-type N-type
P-type N-type
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Basic MOS Device Physics
P-type N-type
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Basic MOS Device Physics
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Basic MOS Device Physics
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Basic MOS Device Physics
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Basic MOS Device Physics
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Basic MOS Device Physics
PN Junction Summary
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Basic MOS Device Physics
The gate voltage that the inversion layer is formed in the channel
Full of holes
Electrons
accumulated and
inversion layer
formed
Qdep
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Basic MOS Device Physics
Similar to NMOSFET, but inversion layer is full of holes and threshold voltage is negative.
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Basic MOS Device Physics
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Basic MOS Device Physics
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Basic MOS Device Physics
Due to the complex of the I-V curves, I-V characteristics of a MOSFET are often divided
into two regions: Triode region & Saturation region
1. Triode region
W 1
I D = µ nCox [(VGS − VTH )VDS − VDS ]
2
L 2
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Basic MOS Device Physics
If VDS <<2(VGS – VTH ), device is in deep triode region. In this case, device actives as a
controlled linear resistor. So we also call this region as linear region.
1
Ron =
W ∂I D / ∂VDS
I D = µ nCox [(VGS − VTH )VDS
L 1
=
W
µ nCox (VGS − VTH )
L
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Basic MOS Device Physics
Example:
Assume
µnC ox = 50µ A / V 2
W
= 10
L
VTH = 0.7V
Plot the on-resistance as a function of VG. Note that the drain terminal is open.
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Basic MOS Device Physics
2. Saturation region
It is the pinch-off of the channel that leads to saturation region of the device, at pinch-off point,
Vp≡VGS-VTH. In the simplest model, the pinch-off point displace is neglected. In this case, the
channel can be taken as a resistor with constant resistance Rsat.
1 W
ID = µ nCox (VGS − VTH ) 2
2 L
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Basic MOS Device Physics
Example:
Plot the transconductance gm as a function of VDS
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Basic MOS Device Physics
1.Body effect
2.Channel-Length modulation
3.Subthreshold conduction
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Basic MOS Device Physics
Example:
Assume
VTH 0 = 0.6V
γ = 0.4V 1 2
2Φ F =0.7V
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Basic MOS Device Physics
1 W
ID = µ nCox (VGS − VTH ) 2 (1 + λVDS )
2 L
λ Is Channel-Length modulation factor
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Basic MOS Device Physics
In above simplest model, there is no current when gate voltage is small than threshold
voltage (VGS < VTH).
In fact, the weak inversion layer exists even if VGS < VTH and there exists a
subthreshold current, shown as follow:
VGS
I D = I 0 exp
ξVT
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Basic MOS Device Physics
Device layout
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Basic MOS Device Physics
Device layout
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Basic MOS Device Physics
Device layout
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Basic MOS Device Physics
Device Capacitance
(1) C1=WLCox, oxide capacitance between the gate and the channel
(2) C2 = WL qε si N sub /( 4ΦF ) , Depletion capacitance between channel and substrate
(3) C3 and C4, Capacitance due to the overlap of the gate poly with the source and drain
areas. The overlap capacitance per unit width is denoted by Cov.
(4) C5 and C6, Junction capacitance between the source/drain areas and the substrate, is
usually decomposed into two components: bottom-plate capacitance Cj, per unit area, and
sidewall capacitance Cjsw, per unit length.
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Basic MOS Device Physics
Device Capacitance
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Basic MOS Device Physics
∂V ∂I D
r0 = DS g mb =
∂I D ∂VBS
1 ∂I D ∂VTH
= =
∂I D / ∂VDS ∂VTH ∂VBS
1 W ∂V
= = µ nCox (VGS − VTH )(− TH )
1 W L ∂VBS
µ nCox (VGS − VTH ) 2 ⋅ λ
2 L γ
= gm
≈
1 2 2Φ F + VSB
λI D = ηg m
Where:
η = g mb / g m
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Basic MOS Device Physics
Mobility of electrons is greatly higher than mobility of holes, therefore NMOS transistors have
higher current drive and transconductance ;
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PN Junction Capacitors
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Basic MOS Device Physics
Polysilicon-Oxide-Polysilicon (Poly-Poly):
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Polysilicon Resistor
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N-well Resistor
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Solenoid Inductors
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Basic MOS Device Physics
Transformers
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Basic MOS Device Physics
Layout-Capacitor
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Basic MOS Device Physics
Layout-Resistor
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