DESIGN OF ADSL MODEM FOR WLAN APPLICATIONS

Prashanth B.U.V1 and Farheen Begum Mirza2

1 2
Department of Research and Development(R&D)Cell, Department of Research and Development(R&D)Cell,
Vasavi College of Engineering, Vasavi College of Engineering,
IbrahimBagh, Hyderabad, IbrahimBagh, Hyderabad,
AndhraPradesh, India AndhraPradesh, India

Abstract Microchip, Zilog Z80,Motorola68kfamily and the

This system is to implement ADSL Modem for WLAN
Applications. The main advantage of this project
implementation is to enhance the reliability of ADSL
Modem, by using device driver technology; it gives
compact size, high speed and high reliability. Whenever
an application calls for the use of a particular device,
the corresponding driver function is called. The
presence of the peripherals is what makes the micro
controller/DSP so versatile, enabling it to be used in a
wide range of applications. The set up has been
explained in-detail and the results show that the
modulation and the demodulation of the input signals
are satisfactory.
1. Introduction
PowerPC/Connexant family. An embedded system
needs memory for two purposes – to store its
program and to store its data. Unlike normal
desktops, in which program and data are stored in the
same place, embedded systems store data and
programs in different memories [2]. This is because
the embedded system does not have a hard drive and
the program must be stored in memory, even when
the power is turned off. For this, embedded
applications employ a special type of ROM that can
be programmed or reprogrammed with the help of
special devices. To store data, additional memory is
used. Any additional requirement in an embedded
system is dependent on the equipment it is
controlling. Very often these devices have a standard
serial port.

The past few decades have been marked by the

onslaught of devices that are intelligent and 2. Block Diagram
interactive. Embedded software systems are the
‘invisible’ computers hidden inside cell phones, cars,
home electronics appliances, game consoles, PDA’s
etc. The embedded software provides for real-time
data handling and processing capability, faster
response times and enhanced mobility in any product.
It is instrumental in the product delivering highest
performance with minimal resources. The field of
embedded technology was completely revolutionized
by the invention of the micro controllers [1].
WLAN: Wireless LAN (Local Area Networks)
widely use spread spectrum communications. IEEE
802.11 is a standard that is developed for mobile and
wireless communication, and widely implemented
throughout the world. The standard defines three
types of Physical Layer communications. They are
DSSS, and FHSS are widely used. All embedded
systems need a microprocessor, and the kinds of
microprocessors used are varied. A list of some of the
common microprocessor families are: Intel, Fig.1BlockDiagram

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 management, unified memory architecture, and
advanced system buses, maximize performance by
Dual Programmable Network Processors
allowing segmentation of real-time-critical
The CXRP56 DSP utilizes the proven software
DOCSIS/EuroDOCSIS 2.0/1.1/1.0 functions from non
programmable dual processor architecture of its
real-time-critical application processes.
predecessor, the CX24943, and further boosts its
performance by increasing the instruction memory size
to 128K bytes. The CXRP56 DSP is pin compatible with 3. Existing system
the CX2800 [3].The dual network processing engine
architecture offers real-time-critical packet management The Existing system is not so reliable and is
processing and superior performance. The software not a versatile product. The Customer satisfaction in case
programmability of this architecture accommodates
application specific requirements, worldwide standards, of existing system is less. The board complexity is more
and manufacturers’ unique value added features for and also less speed in case of existing system.
maximum flexibility.
Limitations:
Highly Integrated
The CXRP56 DSP supports a number of interfaces Programming complexity is very high
including a USB 1.1 communications transceiver, an Real time implementation is not possible.
IEEE 802.3 10/100 Ethernet Media Access Controller Circuit complexity
(MAC) with a Media Independent Interface for access to Requirements of external hardware’s and their
home networking standards. Examples are HPNA connections
2.0, Home Plug 1.0 and a host interface which supports
seamless connectivity to any 4. PROPOSED system
PCMCIA compliance device such as IEEE 802.11a and
IEEE 802.11b wireless transceivers. The CXRP56 DSP Real time control actions are implemented
supports integrated and stand alone cable modems, home Advantages:
networking gateway products, IP (Internet Protocol) Less programming complexity
telephone products, and digital set-top boxes.The Less external hardware and connections were
CXRP56 DSP was developed using leading-edge process required
and packaging technologies [4]. This helps drive down Less programming memory
the size of the monolithic IC, Package and power, while High Speed Board Design by using Device
allowing clock rates to increase. The CXRP56 DSP Driver Technology.
dissipates less than 550mW of power setting a new High Operating speeds
standard for the industry. The CXRP56 DSP, through its
Highly reliable and versatile.
high level of integration,enables manufacturers to
develop a complete cable modem with a minimal
number of additional components.
Development Tools:
Increased Performance
Hitech PICC Compiler:
Conexant’s seventh-generation physical-layer
downstream receiver includes a 10-bit A/D that accepts a
This tool is used to develop the source code
direct IF signal (at 44 or 36 MHz) and a
needed for the design.
QPSK/16/32/64/128/256 QAM demodulator with
forward error correction.The CXRP56 DSP also contains
an 11-bit D/A converter, which can accommodate 65 The tool helps us not only to develop but also
MHz of upstream bandwidth for EuroDOCSIS and DVB compile the code and simulate the code.
applications, and a QPSK/8/16/32/64/128 QAM burst
upstream modulator. Conexant’s proven PHY This tool is also used to convert the compiled
technology exceeds all DOCSIS/EuroDOCSIS Embedded C code to its equivalent hex code.
2.0/1.1/1.0 requirements for low BERin noise-filled Start Plus Programmer: (ISP)
environments. The CXRP56 is the fastest solution in the
industry with integrated dual software programmable Start Plus programmer is used to fuse the built
network processing engines on board. Its unique packet hex code into the CPU CXRP56 DSP (here).

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 many of the real-time applications in which DSP
processors are applied.
ORCAD Circuit Design:
This tool is used to design the schematic of the 6. Implementation & Results:
hardware.
The Implementation of this project is done in real
5. Hardware Overview time environment i.e. MATLAB.we need to compile the
embedded ‘C’ code means .(source code) by using
ISP PROGRAMMER: compiler, after successful compilation we can generate
HEX file . This file can be dump into the microcontroller
/DSP by using ISP programmer. After connecting the
To program our micro-controller we’ve to go hardware, run the MATLAB code output will be display
for in system programming. Systems programming (or on the screen as follows.
system programming) is the activity of programming Initialization
system software [5]. The primary distinguishing The Initialization part includes the calculation of
characteristic of systems programming when compared the following steps:-
to application programming is that application 1. Number of points in calculation
programming aims to produce software which provides
services to the user (e.g. word processor), whereas
2. Sampling rate of digital message is set to 1
systems programming aims to produce software which
provides services to the computer hardware (e.g. disk
defragmenter). It also requires a greater degree of 3. Sampling rate of Analog message is set to 1
hardware awareness.ISP is a way to serially program our
micro controller, while it resides in its place, in other 4. M-ary number is set to 16
words, without removing the chip from your board. ISP
(In System Programming) will provide you a simple and Message Formation
affordable home made solution to program and debug 1. Generating random bits
your micro controller/DSP based applications. 2. Plotting digital bit stream
Sometimes, ISP can become very useful, when adjusting
some delays, frequencies or any other values that you Digital bit stream
would intend to find by trial and error.

EMBEDDED C

High-level language programming has long

been in use for embedded-systems development.
However, assembly programming still prevails,
particularly for digital-signal processor (DSP) based
systems. DSPs are often programmed in assembly
language by programmers who know the processor
architecture inside out. The key motivation for this
practice is performance, despite the disadvantages of
assembly programming when compared to high-level
language programming. Performance is key to signal-
processing applications because it directly translates into
end-user features. A 10-percent lower clock speed
generally results in a corresponding reduction in power
consumption. With more effective code generation, an
application needs less processing cycles and thus a lower
clock speed, which results in less EMI, longer battery
life, and less heat generation. If the video decoding
takes 80 percent of the CPU-cycle budget instead of 90
percent, for instance, there are twice as many cycles
available for audio processing. This coupling of
performance to end-user features is characteristic of Fig 2 Input Bit Stream

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The Input bit streams are generated as shown in the fig
are generated by MATLAB as the random bit streams by
setting M-ary number M=16,and the length of the bit
stream is set to 100.The sampling frequency and the
digital frequency is set to unity. Finally a digital bit
stream is generated.

Mapping to I and Q:-

The next step is the mapping the message signal

to I-phase and Q-phase components. Here the poles and
zero’s of the message signal is calculated and plotted as
shown in fig

Fig 4Quadrature component

Pulse shaping the signals:-

The following factors are considered while

pulse shaping the signals
The steps are as follows:-

1. Oversampling factor

2. Basic raised-cosine pulse-shape

3. Signal before pulse shaping

4. Discard transient

Fig 3 in phase component 5. Signal after pulse shaping

The above figure shows the In phase 6. Discard transient

component and also the quadrature component is also
shown..Both In Phase and quadrature component are
opposite by 90 degrees phase shift to each other. These
are separated by a product modulator of 90 degrees
phase shift.

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 As a modulated signal is generated, it is passed
in the channel with noise present in it automatically.
The signal gets added up to noise and a modulated signal
with noise is displayed.

DEMODULATION
Demodulation of the received signal is done by
using coherent sine and cosine signals the two
streams are then passed through RRC filter. The signal is
sampled and decision is taken by the Slicer. The original
symbols are generated by decoding the I and Q symbols.
The corresponding output of the Demodulation Section
is as follows:-

Fig 5 Root Raised Cosine Filter

Modulation of I and Q channels:-

The steps involved in this process of modulation of I &
Q channels are as follows
1. Generation of Sine Wave signal.
2. Generation of Cosine signal
3. Modulation the sine signal
4. Modulation of Cosine Signal.
5. Addition of noise to Modulated signal.
The corresponding output is as follows.

Fig7 Comparison between signals before modulation

and after demodulation

Fig 6 Modulated signal after adding noise

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 The comparison shows that the original bit
stream generated at the transmitter side is same as the bit
stream received at the receiver side. Since both the bit
streams are matching the designed digital
communication system is having better throughput and is
highly versatile in nature

7. Application:-
The ADSL Device configured using device driver
technology can be used in various applications. One of the
applications is as shown in the figure given below.

Fig 10 Final Developed application

Fig9. Application of ADSL Device
Consider the Personal computer (P.C) with diverse
applications as device implementing a call control
functions and data transfer operations are possible by
using a Data Transfer Switch with two channels A & B
and I/O Channel (optional) is interfaced to the ADSL
device.
The LED’s present on ADSL device indicate the
integrators for various Hardware and Software utilities
[6].
Also one more similar type of application is as shown
below, it is also indicated by various status LED’s as
shown in the figures below.
8. Conclusion
In the current day scenario where newer and better
technologies seem to be emerging everyday, there is
always a curiosity about how much further existing
designs can be improved upon, to better suit the rapidly
expanding fields of embedded applications. The
Innovations remain limited only by the imagination of
the developers who design them. Therefore, it is
suggested that a hybrid hardware prototype including
DSP blocks and FPGA would be an ideal hardware
platform for implementing the system. Also, it is
desirable to incorporate soft-core design into the
hardware design to allow for logic elements reduction.
As the spreading factor increases, the system performs
better with compensated transmission rate and
bandwidth requirement. Real time signal transmission
was successfully implemented using the prototype[7].

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Finally, synchronization between the transmitter and the [5] Ibraheem, O.W. , Khamiss, N.N.,
receiver is to be investigated. The applications of this Comput. Eng. Dept., “Design and Simulation of
project are manifold. If any application uses the Asymmetric Digital Subscriber Line (ADSL)
CONNEXANT DSP the drivers can be employed to run Modem”April 2008,Univ. of Kalamoon (UOK),
any peripheral device. The drivers written for each Damascus.
module enables the programmer to use each of the
[6] Soininen, J.-P., Boumard, S.,Salminen, T., Heusala,
peripherals even with a limited knowledge of the
H.,” Application of decision-making method for
Connexant. Instead of starting the design from scratch
architecture selection of ADSL modem” VTT Electron.,
with a detailed study of the peripheral, the designer, can
Oulu.
make use of the already existing driver functions. To
achieve the desired specifications, the corresponding [7] Surim Ryu; Se Young Eun; Sunwoo, M.H.,” Design
parameters are passed to each function. The I/O drivers of an efficient high-speed VLSI architecture for WLAN
by themselves can be modeled as an Operating System modem”, C&S Technol. Co. Ltd., Seoul, South Korea.
for the CPU. The I/O driver functions are an
indispensable part of any real-time application which
employs the CONNEXANT. Many application programs
can be developed with these I/O drivers as the basic
building blocks enabling easier and efficient
programming.

9. References

[1] Paulo S. R. Diniz, Eduardo A. B. da Silva, Digital

Signal Processing: System Analysis and Design,
2e,Cambridge University Press, 2010,Outside North
America.

[2] Scott Hauck, André Dehon, Reconfigurable

Computing: The Theory and Practice of FPGA-Based
Computing Elsevier Science, 2008, Outside North
America

[3] Glokler, T., Bitterlich, S., Meyr, H., A universal

coprocessor and its application for an ADSL modem”,
1999, Aachen Univ. of Technology.

[4] Sen M. Kuo, Woon-Seng Gan, Embedded Signal

Processing with the Micro Signal Architecture,John
Wiley & Sons, Inc., 2007 , Outside North America.

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