CMPE12 – Notes 


LC-3 Architecture

Textbook Chapter 4 (please read)"
 The “Stored-Program” Computer"
1943: ENIAC"
–  Hard-wired program -- settings of dials and switches."

1944: Beginnings of EDVAC - Electronic Discrete

Variable Automatic Computer "
–  among other improvements, includes program stored in memory"

1945: John von Neumann"

–  wrote a report on the “stored-program computer”, 

known as the First Draft of a Report on EDVAC "

CMPE12 – Fall 2011– Joel Ferguson" 3 - 2"

 First Draft of a Report on EDVAC
The basic structure proposed in the draft
became known as the “von Neumann
machine” (or model). "
This machine/model had five main components:"
1.  the Central Arithmetical part, CA"
2.  the Central Control part, CC"
3.  the Memory, M, for both "
"instructions and data"
4.  the Input, I"
5.  the Output, O"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 3"

 Von Neumann Model*"
MEMORY
MAR MDR

INPUT OUTPUT
Keyboard Monitor
Mouse PROCESSING UNIT Printer
Scanner LED
Disk ALU TEMP Disk

CONTROL UNIT
PC IR

* A slightly modified version of Von Neumann’s original diagram

CMPE12 – Fall 2011– Joel Ferguson" 3 - 4"
 Input and Output"
Devices for getting data into and 
 INPUT OUTPUT
Keyboard Monitor
out of computer memory" Mouse Printer
Scanner LED
Disk Disk
Each device has its own interface,

usually a set of registers like the

memoryʼs MAR and MDR"
–  LC-3 supports keyboard (input) and monitor (output)"
–  keyboard: data register (KBDR) and status register (KBSR)"
–  monitor: data register (DDR) and status register (DSR)"

Some devices provide both input and output"

–  disk, network"
The program that controls access to a device is usually called a driver."

CMPE12 – Fall 2011– Joel Ferguson" 3 - 5"

 Memory"
2 k x m array of stored bits:!
•  Address" address
–  unique (k-bit) identifier of location"
0000
–  LC-3: k = 16" 0001
•  Contents" 0010
0011 00101101
–  m-bit value stored in location" 0100
–  LC-3: m = 16" 0101
0110
Basic Operations:! •
•
•
•  READ (Load)" 1101 10100010
–  value in a memory location is transferred 1110
to the Processor" 1111
•  WRITE (Store)"
contents
–  value in the Processor transferred to a
memory location"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 6"

 Interface to Memory"
How does the processing unit get data to/from memory?"
MAR: Memory Address Register"
MDR: Memory Data Register"
Processor
To LOAD from a location (A):" MAR MDR
1.  Write the address (A) into the MAR."
2.  Send a “read” signal to the memory."
16 16
3.  Read the data from MDR."

To STORE a value (X) into a location (A):"

1.  Write the data (X) to the MDR." Memory
2.  Write the address (A) into the MAR."
3.  Send a “write” signal to the memory."

CMPE12 – Fall 2011– Joel Ferguson" 3 - 7"

 CPU-only tasks"

In addition to input & output a program also: 


1)  Evaluates arithmetic & logical functions to determine

values to assign to variable."

2)  Determines the order of execution of the statements in

the program."

In assembly this distinction is captured in the notion of

arithmetic/logical, and control instructions."

CMPE12 – Fall 2011– Joel Ferguson" 3 - 8"

 Processing Unit"
Functional Units"
–  ALU = Arithmetic/Logic Unit" PROCESSING UNIT
–  could have many functional units.

some of them special-purpose
 ALU Temp
(floating point, multiply, square root, …)"
–  LC-3 performs ADD, AND, NOT
Registers"
–  Small, temporary storage"
–  Operands and results of functional units"
–  LC-3 has eight registers (R0, …, R7), each 16 bits wide"
Word Size"
–  number of bits normally processed by ALU in one instruction"
–  also width of registers"
–  LC-3 is 16 bits"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 9"

 Control Unit"
Controls the execution of the program"

CONTROL UNIT
PC IR

Instruction Register (IR) contains the current instruction."

Program Counter (PC) contains the address of the next instruction to be
executed."
Control unit:"
–  reads an instruction from memory "
•  the instructionʼs address is in the PC"
–  interprets the instruction, generating signals that tell the other components
what to do"
•  an instruction may take many machine cycles to complete"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 10"

 LC-3 Architecture"

o  RISC - only 15 instructions"

o  16-bit data and address"
o  8 general-purpose registers (GPR)"
o  4 special-purpose registers:"
o  Program Counter (PC)"
o  Instruction Register (IR)"
o  Condition Code Register (CC)"
o  Process Status Register (PSR)"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 11"

 Instructions"

The instruction is the fundamental unit of work."

Specifies two things:"
–  Opcode: operation to be performed"
–  Operands : data/locations to be used for operation"

Three basic kinds of instructions:"

–  Computational instructions "
–  Data-movement instructions"
–  Flow-control instructions"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 12"

 Breaking down an instruction

(simplified)"

ADD a, b, c (assembly language instruction)

ADD! a! b! c! 16 bits"

Source registers/immediate"
Opcode"
Destination register"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 13"

 Instruction encoding"
What meaning which bits have, depending on the
situation"

Ex: in LC-3, the most-significant four bits always

contain the instructionʼs OPCODE."
15 14 13 12 0

The meaning of the other bits changes according to

the opcode/instruction."

The back cover of the textbook shows all 20 LC-3

instruction format descriptions"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 14"

 Full LC3 instruction set"

Table in back of Book. Syntax for

instructions: Appendix 1 (pp. 524-543)
CMPE12 – Fall 2011– Joel Ferguson" 3 - 15"
 Representing Multi-bit Values"
• Number bits from right (0) to left (n-1)"
–  just a convention -- could be left to right, but must be consistent!
• Use brackets to denote range:

D[l:r] denotes bit l to bit r, from left to right!

15 0

A = 0101001101010101

A[14:9] = 101001 A[2:0] = 101

May also see A<14:9>, especially in hardware block

diagrams.
CMPE12 – Fall 2011– Joel Ferguson" 3 - 16"
 Ex: LC-3ʼs ADD Instruction"
LC-3 has 16-bit instructions."
–  Each instruction has a four-bit opcode, bits [15:12]."
LC-3 has 8 registers (R0-R7) for temp. storage."
–  Sources and destination of ADD are registers."

“Add the contents of R2 to the contents of R6, and store the

result in R6.”
CMPE12 – Fall 2011– Joel Ferguson" 3 - 17"
 Ex: LC-3ʼs LDR Instruction"
Load instruction – read data from memory"
Base + offset mode:"
–  add offset to base register - result is memory address"
–  load from memory address into destination register"

“Add the value 6 to the contents of R3 to form a memory

address. Load the contents of that memory location to R2.”

CMPE12 – Fall 2011– Joel Ferguson" 3 - 18"

 Changing the Sequence of
Instructions"
The default is that you execute the “next” instruction,
which is the instruction stored at the current address
+1. In the FETCH phase, we increment the Program
Counter by 1."

What if we donʼt want to always execute the

instruction that follows this one?"
–  examples: loop, if-then, function call"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 19"

 Flow-control instructions"

We need special instructions that change the contents

of the PC."

These are the flow-control instructions:"

–  Jumps* are unconditional -- they always change
the PC"
–  Branches* are conditional -- they change the PC
only if some condition is true (e.g., the result of an
ADD is zero)"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 20"

 Ex: LC-3 JMP "
Set the PC to the value contained in a register.
This becomes the address of the next
instruction to fetch."

Load the contents of R3 into the PC.

CMPE12 – Fall 2011– Joel Ferguson" 3 - 21"

 Two ISA strategies/types"

CISC : Complex Instruction Set Computer


Lots of instructions of variable size, very memory
optimal, typically less registers. "

RISC : Reduced Instruction Set Computer Less

instructions, all of a fixed size, more registers,
optimized for speed. Usually called a “Load/Store”
architecture."

CMPE12 – Fall 2011– Joel Ferguson" 3 - 22"

 What is “Modern”"
For embedded applications and for workstations
there exist a wide variety of CISC and RISC and
CISCy RISC and RISCy CISC."

Most current PCs use the best of both worlds to

achieve optimal performance."

CMPE12 – Fall 2011– Joel Ferguson" 3 - 23"

 LC-3"

Will be coming
back to this for
each instruction

CMPE12 – Fall 2011– Joel Ferguson" 3 - 24"

 Microarchitecture simulator"
•  http://mac.softpedia.com/progDownload/LC3-
Microarchitecture-Simulator-
Download-68741.html"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 25"

 Probable HW, red is not turned
in, black is."

•  Ex 4.2, 4.3, 4.5 (excluding b(2 and 3))"

•  Ex 4.7, 4.8, 4.9, "

Next chapter to read: 5"

CMPE12 – Fall 2011– Joel Ferguson" 3 - 26"