Sunteți pe pagina 1din 6

You searched for: R. Rivest, A. Shamir, L.

Adleman, "A Method for Obtaining


Digital Signatures and Public-Key Cryptosystems", Communications of the
ACM, vol. 21 (2), pp. 120-126, 1978.
R. Rivest, A. Shamir, L. Adleman, "A Method for Obtaining Digital Signatures and Public-Key
Cryptosystems", Communications of the ACM, vol. 21 (2), pp. 120-126, 1978.::
N=0&Ntk=Search+All&Ntt=R.+Rivest%2c+A.+Shamir%2c+L.+Adleman%2c+
%22A+Method+for+Obtaining+Digital+Signatures+and+Public-Key+Cryptosystems
%22%2c+Communications+of+the+ACM%2c+vol.+21+%282%29%2c+pp.+120-
126%2c+1978.&Ntx=mode+matchallpartial&Nty=1
searchresults search_results_form



25

Results per Page Showing 1 - 10 of 10 results


Relevance

Sort By:
Select All | Deselect All

Improved RSA Encryption Algorithm for Increased Security of Wireless


Networks
Frunza, M.; Scripcariu, L.;
Signals, Circuits and Systems, 2007. ISSCS 2007. International Symposium on
Volume: 2
Digital Object Identifier: 10.1109/ISSCS.2007.4292737
Publication Year: 2007 , Page(s): 1 - 4
IEEE CONFERENCES

AbstractPlus | Full Text: PDF (374 KB)

The RSA algorithm proposed by Rivest, Shamir and Adleman as a public key cryptosystem is
used in different communication networks in order to ensure data confidentiality. Different
weaknesses of this algorithm could be observed and many attacks against it are developed
successfully. Improving this algorithm was performed in this paper in order to ensure a higher
data security and an increased computing process speed. We propose an optimized encryption
method which may be associated with the RSA key generation mechanism. The proposed
method is based on a detailed analysis of the algebraic finite fields (AFF). The improved
algorithm can be implemented on new generation networks (second generation networks and so
on) and applies to wireless networks with Bluetooth devices which need an increased security by
enlargement of the utilization area. In the same time, we have used a maximum acceptable
length encryption key and algorithm complexity, which increases the computing speed and
security degree, but allows the processor to work properly. Read More»

GOLGE: a case study of a secure data communication subsystem for micro-


satellites
Yesil, S.; Sever, R.; Okcan, B.; Ismailoglu, N.;
Recent Advances in Space Technologies, 2005. RAST 2005. Proceedings of 2nd International
Conference on
Digital Object Identifier: 10.1109/RAST.2005.1512607
Publication Year: 2005 , Page(s): 438 - 441
IEEE CONFERENCES

AbstractPlus | Full Text: PDF (173 KB)

This paper presents a real-time data encryption/decryption subsystem developed for a satellite,
which is planned to be launched in 2007 by TUBITAK-BILTEN. The subsystem GOLGE contains
two ASICs, which perform encryption/decryption using AES (Advanced Encryption Standard) and
RSA (Rivest-Shamir-Adleman) algorithms and a communication interface unit. The
data/command interface of the GOLGE module is implemented on a reconfigurable ASIC (FPGA),
where the encryption/decryption processors have previously been designed in TUBITAK-BILTEN
and prototyped in ANTIS 0.35-μm CMOS technology. The system uses an 8-bit bidirectional data
bus, which operates at a maximum frequency of 40 MHz supplying a throughput of 160 Mbit/sec
and a SpaceWire interface, which provides a 100 Mbit/sec serial data communication link. Read
More»

A New Scalable Hardware Architecture for RSA Algorithm


Gudu, T.;
Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on
Digital Object Identifier: 10.1109/FPL.2007.4380742
Publication Year: 2007 , Page(s): 670 - 674
IEEE CONFERENCES

AbstractPlus | Full Text: PDF (1473 KB)


A new scalable systolic hardware architecture for RSA cryptosystems is presented. The kernel of
the architecture can operate with different precision of inputs which enables making area-time
tradeoff in design. The add-shift Montgomery algorithm is used for modular multiplication. Unlike
previous approaches after add operation, the result is shifted to the previous systole to divide by
radix. This simplifies the structure of processing elements. The R-L binary Montgomery
exponentiation algorithm is used. The square and multiply operations are performed in parallel.
The architecture is implemented in Xilinx Virtex-5 FPGA (Field Programmable Gate Array) chips
for different radixes. The DSP48E slices in the FPGA chips are used to increase the throughput of
the design. The results are compared with the literature. It is seen that the highest performance
per area is obtained with the Radix-216 design. Read More»

Efficient identification and signature schemes


Ohta, K.;
Electronics Letters
Volume: 24 , Issue: 2
Publication Year: 1988 , Page(s): 115 - 116
IET JOURNALS

AbstractPlus | Full Text: PDF (224 KB)

The letter proposes new identity-based identification and signature schemes which are more
efficient than the Fiat-Shamir scheme (1986) from the standpoint of transmitted message length
and secret information size stored in a smart card, and are about one order of magnitude faster
than the RSA scheme (R.L. Rivest et al., 1977) Read More»

The Hardware-based PKCS#11 Standard using the RSA Algorithm


Muzzi, F.A.G.; Chiaramonte, R.B.; Ordonez, E.D.M.;
Latin America Transactions, IEEE (Revista IEEE America Latina)
Volume: 7 , Issue: 2
Digital Object Identifier: 10.1109/TLA.2009.5256823
Publication Year: 2009 , Page(s): 160 - 169
IEEE JOURNALS

AbstractPlus | Full Text: PDF (1981 KB)


In this paper, we have proposed and implemented a hardware-based security system, which
executes RSA-based cryptography operations by using the PKCS#11 standard. It was
implemented in C, VHDL and FPGAs and it is modular and easily adaptable to the future
upgrades for the communication among machines and devices. Any cryptography algorithm can
be used; however, in our project we only used the RSA as a case study. We did simulations and
real tests that allowed verifying the correct behavior and execution of our project; we used the
RSA with keys up to 512 bits. Real tests showed the transmission of ciphered data between our
project (PKCS#11 and RSA) and a PC by using serial communication. Read More»

The use of public key cryptography in communication system design


Adleman, L.; Rivest, R.;
Communications Society Magazine, IEEE
Volume: 16 , Issue: 6
Digital Object Identifier: 10.1109/MCOM.1978.1089778
Publication Year: 1978 , Page(s): 20 - 23
IEEE JOURNALS

AbstractPlus | Full Text: PDF (392 KB)

Since the time of Caesar, cryptography has been used in the design of secure communications
systems. Recently, Diffie and Hellman [2] have introduced a new type of cryptographic method,
based on "trapdoor" functions, which promises to be of great value in the design of such
systems. We present a review of public key cryptosystems, followed by examples of
communications systems which make particularly elegant use of their properties. Read More»

An introduction to contemporary cryptology


Massey, J.L.;
Proceedings of the IEEE
Volume: 76 , Issue: 5
Digital Object Identifier: 10.1109/5.4440
Publication Year: 1988 , Page(s): 533 - 549
IEEE JOURNALS

AbstractPlus | Full Text: PDF (1580 KB)

An appraisal is given of the current status, both technical and nontechnical, of cryptologic
research. The principal concepts of both secret-key and public-key cryptography are described.
C.E. Shanon's theory of secrecy (1949) and G.J. Simon's theory authenticity (1984) are reviewed
for the insight that they give into practical cryptographic systems. Public-key concepts are
illustrated through consideration of the Diffie-Hellman public-key-distribution system and the
Rivest-Shamir-Adleman public-key cryptosystem. The subtleties of cryptographic protocols are
shown through consideration of some such specific protocols Read More»

Carry-save Montgomery modular exponentiation on reconfigurable hardware


Cilardo, A.; Mazzeo, A.; Romano, L.; Saggese, G.P.;
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
Volume: 3
Digital Object Identifier: 10.1109/DATE.2004.1269231
Publication Year: 2004 , Page(s): 206 - 211 Vol.3
IEEE CONFERENCES

AbstractPlus | Full Text: PDF (494 KB)

In this paper we present a hardware implementation of the RSA algorithm for public-key
cryptography. Basically, the RSA algorithm entails a modular exponentiation operation on large
integers, which is considerably time-consuming to implement. To this end, we adopted a novel
algorithm combining the Montgomery's technique and the carry-save representation of numbers.
A highly modular, bit-slice based architecture has been designed for executing the algorithm in
hardware. We also propose an FPGA-based implementation of the architecture developed. The
characteristics of the algorithm, the regularity of the architecture, and the data-flow aware
placement of the FPGA resources resulted in a considerable performance improvement, as
compared to other implementations presented in the literature. Read More»

A single-chip public key encryption subsystem


Ivey, P.A.; Cox, A.L.; Harbridge, J.R.; Oldfield, J.K.;
Solid-State Circuits, IEEE Journal of
Volume: 24 , Issue: 4
Digital Object Identifier: 10.1109/4.34094
Publication Year: 1989 , Page(s): 1071 - 1075
IEEE JOURNALS

AbstractPlus | Full Text: PDF (576 KB)

A single-chip system capable of encryption using the Rivest, Shamir, and Adleman algorithm at
rates significantly higher than other implementations is reported. The chip uses a self-timed
methodology and has been implemented in a 2 μm technology. The chip is a complete system
and includes registers for the storage of keys for duplex operation. It is provided with a standard
interface to a number of common microprocessors Read More»

A scheme for analyzing electronic payment systems


de Carvalho Ferreira, L.; Dahab, R.;
Computer Security Applications Conference, 1998, Proceedings., 14th Annual
Digital Object Identifier: 10.1109/CSAC.1998.738600
Publication Year: 1998 , Page(s): 137 - 146
IEEE CONFERENCES

AbstractPlus | Full Text: PDF (100 KB)