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MODULE VI
For current measurement, the drop across an internal calibrated shunt is measured
directly by the ADC in the ‘dc current mode’, and after ac to dc conversion in the ‘ac current
mode’. This drop is often in the range of 200 mV (corresponding to full scale).
For resistance measurement the digital multimeter operates by measuring the voltage
across the externally connected resistance, resulting from a current forced through it from a
calibrated internal current source. The accuracy of the resistance measurement is of the
order of 0.1 to 0.5%
This simple circuit indicates the amount of power that goes to a loudspeaker. The dual-
color LED shows green at an applied power level of about 1 watt. At 1.5 watts it glows orange
and above 3 watts it is bright red. The circuit is connected in parallel with the loudspeaker
connections and is powered from the audio signal.
During the positive half cycle of the output signal the green color in the dual-color LED
will be turned on. At higher output voltages, T1 (depending on the voltage divider R2/R1) will
begin to conduct and the green LED will go out.
During the negative half cycle the red color in the dual-color LED is driven via R3 and will
turn on when the voltage is high enough.
In the transition region the combination of red/green gives the orange color of the
dual-LED. By choosing appropriate values for the resistors the power levels can be adjusted to
suit.
In this measurement mode, two inputs are used to start and stop the counting. The start and
stop signals are derived from two inputs. The AND gate is enabled with the external input 1
applied. The counting of the pulses starts at this instant. The AND gate is disabled with the
input 2 applied. Thus pulses are counted in the time interval which is proportional to the time
interval between application of inputs 1 and 2.
Here the internal frequency pulses generated by time base generator circuits are
counted. Schmitt trigger, which converts the input sine wave to an output consisting of a train
of pulses at a rate equal to the frequency of the clock oscillator. The train of pulses then passes
through a series of frequency divider decade assemblies connected in cascade. Each decade
divider consists of a decade counter and divides the frequency by ten. Outputs are taken from
each decade frequency divider by means of a selector switch; any output may be selected.
The gating signal is derived from the unknown input signal, which now controls the
enabling and disabling of the main AND gate. The number of pulses which occur during one
period of the unknown signal are counted and displayed by the decade counting assemblies.
Consider the 2 signals applied having same Amplitude, and Frequency. but having Phase
difference of Φ between them.
E1 = Em sinwt
E2 = Em sin (wt + Φ)
1. The Lissajous figure abstained on CRO is shown. Find the phase difference between the two
waves applied
The waveform in Figure 6.7 shows that a clear pulse is applied to the counter at t0 to set
the counter at zero. Prior to t1, the GATE ENABLE signal is LOW, and so the output of the AND
gate will be LOW and the counter will not be counting. The GATE ENABLE goes HIGH from t1
tot2 and during this time interval t (= t2 – t1), the unknown input signal pulses will pass through
the AND gate and will be counted by the counter. After t2, the AND gate output will be again
LOW and the counter will stop counting. Thus, the counter will have counted the number of
pulses that occurred during the time interval, t of the GATE ENABLE SIGNAL, and the resulting
contents of the counter are a direct measure of the frequency of the input signal.
The block diagram of a simple digital voltmeter is shown in Figure 5.8. The unknown
signal is fed to the pulse generator which generates a pulse whose width is directly proportional
to the input unknown voltage.
The output of the pulse generator is applied to one leg of an AND gate. The input signal
to the other leg of the AND gate is a train of pulses. The output of the AND gate is, thus, a
positive trigger train of duration t second and the inverter converts it into a negative trigger
train. The counter counts the number of triggers in t seconds which is proportional to the
voltage under measurement. Thus, the counter can be calibrated to indicate voltage in volts
directly.
Thus, the DVMs described above is an Analog to Digital Converter (ADC) which converts
an analog signal into a train of pulses, the number of which is proportional to the input voltage.
So a digital voltmeter can be made by using any one of the analog to digital conversion
methods and can be represented by a block diagram shown in Figure 5.9.
of the divider, the output frequency of the oscillator can be changed. This makes the frequency
synthesizer programmable.
These digital frequency synthesizers are ideal for many applications on their own. They perform
well where the differences between channels are relatively high.
Frequency synthesizers are used in many modern devices such as radio receivers, televisions,
mobile telephones, radiotelephones, walkie-talkies, CB radios, cable television converter boxes
satellite receivers, and GPS systems.
A frequency synthesizer may use the techniques of frequency multiplication, frequency division,
direct digital synthesis, frequency mixing, and phase-locked loops to generate its frequencies.
The RF input to be analyzed is applied to the input attenuator. After attenuating, the
signal is fed to low pass filter. The low pass filter suppresses high frequency components and
allows low frequency components to pass through it. The output of the low pass filter is given
to the mixer, where this signal is fixed with the signal coming from voltage controlled or voltage
tuned oscillator.
This oscillator is tuned over 2 to 3 GHz range. The output of the mixer includes two
signals whose amplitudes are proportional to the input signal but their frequencies are the sum
and difference of the input signal and the frequency of the local oscillator.
Since the frequency range of the oscillator is tuned over 2 to 3 GHz, the IF amplifier is
tuned to a narrow band of frequencies of about 2 GHz. Therefore only those signals which are
separated from the oscillator frequency by 2 GHz are converted to Intermediate Frequency (IF)
band. This IF signal is amplified by IF amplifier and then rectified by the detector. After
completing amplification and rectification the signal is applied to vertical plates of CRO to
produce a vertical deflection on the CRT screen. Thus, when the saw tooth signal sweeps, the
oscillator also sweeps linearly from minimum to maximum frequency range i.e., from 2 to 3
GHz.
Here the saw tooth signal is applied not only to the oscillator (to tune the oscillator) but
also to the horizontal plates of the CRO to get the frequency axis or horizontal deflection on the
CRT screen. On the CRT screen the vertical axis is calibrated in amplitude and the horizontal axis
is calibrated in frequency.
FARIS K.K , AP/EEE AL-AMEEN ENGG COLLEGE
EC 307 POWER ELECTRONICS & INSTRUMENTATION
video amplifier is given to CRT (vertical axis), and the output of the sawtooth generator is given
to the horizontal axis of the CRT. Thus, we see the signal amplitude against the time sweep
(which in turn represents the frequency).
Normally, the frequency conversion takes place in multiple stages, and band-pass filters are
used to shape the signals. Also, precision amplifiers and detectors are used to amplify and
detect the signals.
Spectrum analysis is normally done in order to verify the harmonic content of oscillators,
transmitters, frequency multipliers, etc. or the spurious components of amplifiers and mixers.
Other specialized applications are possible, such as the monitoring of Radio Frequency
Interference (RFI), Electromagnetic Interference (EMI), and Electromagnetic Compatibility
(EMC).
Logic state analyzer analyzes number of signals at a time and displays complex
relationship between them. A simplified functional block diagram of logic state analyzer is
shown in figure below.
Logic analyzers typically have between 34 and 136 channels. Each channel inputs one digital
signal. Some complex system designs require thousands of input channels. Appropriately-scaled
logic analyzers are available for those tasks as well.
When you connect a logic analyzer to a digital circuit, you’re only concerned with the
logic state of the signal. A logic analyzer looks for just two logic levels, as shown in Figure 2.
When the input is above the threshold voltage (V) the level is said to be “high” or “1;”
conversely, the level below Vth is a “low” or “0.” When a logic analyzer samples input, it stores
a “1” or a “0” depending on the level of the signal relative to the voltage threshold.
Logic Analyzer Operation
For simplification, above functional block diagram is reduced to four step operation as shown
in Figure 3.
1 Connect
2 Setup
3 Acquire
4 Analyze
Probes are used to capture large number of signals at one time by the logic. The
acquisition probes connect to the SUT. The probe’s internal comparator is where the input
voltage is compared against the threshold voltage (Vth), and where the decision about the
signal’s logic state (1 or 0) is made.
The data stored in the real-time acquisition memory can be in a variety of display and analysis
modes. Once the information is stored within the system, it can be viewed in formats ranging
from timing waveforms to instruction mnemonics correlated to source code.
The input signal is applied to the amplifier and attenuator section. The oscilloscope uses
same type of amplifier and attenuator circuitry as used in the conventional oscilloscopes. The
attenuated signal is then applied to the vertical amplifier. The vertical input, after passing
through the vertical amplifier, is digitized by an analog to digital converter to create a data set
that is stored in the memory. The data set is processed by the microprocessor and then sent to
the display.
To digitize the analog signal, analog to digital (A/D) converter is used. The output of the
vertical amplifier is applied to the AID converter section. The main requirement of A/D
converter in the digital storage oscilloscope is its speed, while in digital voltmeters accuracy and
resolution were the main requirements. The digitized output needed only in the binary form
and not in BCD. The successive approximation type of AID converter is most oftenly used in the
digital storage oscilloscopes.
Modes of operation:
The digital storage oscilloscope has three modes of operation:
Roll mode ii) Store mode iii) Hold or save mode.
Roll Mode:
This mode is used to display vely fast varying signals clearly on the screen. The fast varying
signal is displayed as if it changing slowly on the screen. In this mode, the input signal is not
triggered at all. The stored signal is rolled slowly from Right to Left across the screen.
Store Mode:
This is most commonly used and called "Refresh Mode”. In this mode, the input initiates a
trigger circuit. This initiates the memory WRITE cycle. The digital data is transferred to the
memory. When the memory is full the write cycle stops. Using DAC, the memory data is
converted to Analog and then displayed on the screen. When the Next Trigger occurs The
memory is refreshed.
Hold and Save Mode:
This is called “Automatic Refresh mode". When a new Sweep Signal is generated by Time Base
Generator, the old contents gets refreshed by new one. If a particular signal is to be stored
then by pressing HOLD or SAVE button, over writing can be stopped and previously saved signal
is locked.
Acquisition Methods .
In the digital storage oscilloscope it is necessary to capture the digital signal and store it.
Dependig upon a particular application, there are 3 different acquisition methods.
In which Real Time Sampling is the most straight forward method of digital signal
capturing. In this method the complete record of nm samples is simultaneously captured on
each and every channel. From these samples recorded in a single acquisition cycle, the wave
form is displayed on CRO.