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Low power has become an important issue in VLSI circuit design due to increasing transistor counts per Moore's law, higher operating speeds which increase power dissipation, and greater leakage currents in nanometer technologies which form a significant percentage of total power. Reliability of VLSI circuits is also related to power dissipation as higher temperatures from increased power doubling failure rates. For portable systems, power dissipation is more important than energy as low power design is crucial for extending battery life.
Low power has become an important issue in VLSI circuit design due to increasing transistor counts per Moore's law, higher operating speeds which increase power dissipation, and greater leakage currents in nanometer technologies which form a significant percentage of total power. Reliability of VLSI circuits is also related to power dissipation as higher temperatures from increased power doubling failure rates. For portable systems, power dissipation is more important than energy as low power design is crucial for extending battery life.
Low power has become an important issue in VLSI circuit design due to increasing transistor counts per Moore's law, higher operating speeds which increase power dissipation, and greater leakage currents in nanometer technologies which form a significant percentage of total power. Reliability of VLSI circuits is also related to power dissipation as higher temperatures from increased power doubling failure rates. For portable systems, power dissipation is more important than energy as low power design is crucial for extending battery life.
Why low power has become an important issue in the
present day VLSI circuit realization? Ans: In deep submicron technology the power has become as one of the most important issue because of:
Increasing transistor count : the number of transistors is getting doubled in
every 18 months based on moore’s Law
Higher speed of operation : the power dissipation is proportional to the clock
frequency.
Greater device leakage currents : In nanometer technology the leakage
component becomes a significant percentage of the total power and the leakage current increases at a faster than dynamic power in technology generations.
Q2. How reliability of a VLSI circuit is related to its power
dissipation? Ans: It has been observed that every 10ºC rise in temperature roughly doubles the failure rate because various failure mechanisms such as silicon interconnect fatigue, electromigration diffusion, junction diffusion and thermal runaway starts occurring as temperature increases.
Q3. Distinguish between energy and power dissipation of VLSI
circuits. Which one is more important for portable systems? Ans: Power (P) is the power dissipation in Watts at different instances of time. On the other hand energy (E) refers to the energy consumed in Joule over a period of time (E = P*t).
Now a days power dissipation is more important for portable devices. For portable device low power design is very important issue. Q4:Make comparison between LSI,VLSI,ULSI?
Q5: Define moore’s law
sheet of sir page 1 Q6: what do you know about SSI LSI VLSI? sheet of sir page 2 Q7: what are the challenges in VLSI design? The central challenge of VLSI design is making good trade-offs between performance and power for a particular application. 1. Conquest over Complexity 2. Efficient Design process and manufacture 3. High Speed Design . 4. Low Power Design 5. Handling mixed Digital, Analog and RF circuits 6. Efficient Test and Verification
Q8: Define VLSI? Write down the advantages of VLSI design?
Q12: Compare between the Iv characteristics of enhancement
type and depletion type mos Q10. What is the threshold voltage of a MOS transistor? How it varies with the body bias? Sheet of sir 8 page
Q12.Draw the ideal characteristics of a CMOS inverter and
compare it with the actual characteristics. Ans: The ideal and actual characteristics are given below. In the ideal characteristics, the output voltage is Vdd for input voltage from o to Vdd/2 and 0 for input voltage from Vdd/2 to Vdd. This is not true in case of the actual characteristics as shown below.
Q 11: Draw the basic layer structure of depletion type MOS